NFVA25012NP2T

## ASPM34 Series Automotive 3-Phase 1200 V 50 A IGBT Intelligent Power Module 

## _Product Preview_ NFVA25012NP2T 

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## **General Description** 

NFVA25012NP2T is an advanced Auto IPM module providing a fully−featured, high−performance inverter output stage for hybrid and electric vehicles. These modules integrate optimized gate drive of the built−in IGBTs to minimize EMI and losses, while also providing multiple on−module protection features including under−voltage lockouts, over−current shutdown, thermal monitoring of drive IC, and fault reporting. The built−in, high−speed HVIC requires only a single supply voltage and translates the incoming logic−level gate inputs to the high−voltage, high−current drive signals required to properly drive the module’s internal IGBTs. Separate negative IGBT terminals are available for each phase to support the widest variety of control algorithms. 

## **Features** 

- Automotive SPM[®] in 34 Pin DIP Package 

- AEC & AQG324 Qualified and PPAP Capable 

- 1200 V − 50 A 3−Phase IGBT Inverter with Integral Gate Drivers and Protection 

3D Package Drawing (Click to Activate 3D Content) 

## **DIP34 80x33, AUTOMOTIVE MODULE CASE MODGL** 

- Low−Loss, Short−Circuit Rated IGBTs 

- Very Low Thermal Resistance Using AlN DBC Substrate 

## **MARKING DIAGRAM** 

- Built−In Bootstrap Diodes and Dedicated Vs Pins Simplify PCB Layout 

- Separate Open−Emitter Pins from Low−Side IGBTs for Three−Phase Current Sensing 

- Single−Grounded Power Supply Supported 

- Built−In NTC Thermistor for Temperature Monitoring and Management 

- Adjustable Over−Current Protection via Integrated Sense−IGBTs 

- Isolation Rating of 2500 Vrms / 1 min 

- This is a Pb−Free Device 

## **Applications** 

- Automotive High Voltage Auxiliary Motors 

   - ♦ Climate E−Compressors 

XXXXXXXXXXXX = Specific Device Code ZZZ = Lot ID AT = Assembly & Test Location Y = Year W = Work Week NNN = Serial Number 

   - ♦ Oil / Water Pumps 

   - ♦ Super / Turbo Chargers 

   - ♦ Variety Fans 

- Motion Control 

## **ORDERING INFORMATION** 

See detailed ordering and shipping information on page 14 of this data sheet. 

- ♦ Industrial Motor 

This document contains information on a product under development. ON Semiconductor reserves the right to change or discontinue this product without notice. 

Publication Order Number: **NFVA25012NP2T/D** 

**1** 

© Semiconductor Components Industries, LLC, 2019 **December, 2019 − Rev. P0** 

## **NFVA25012NP2T** 

## **Related Resources** 

- AN−9075 − Users Guide for 1200V SPM[®] 2 Series 

- AN−9076 − Mounting Guide for New SPM[®] 2 Package 

- AN−9079 − Thermal Performance of 1200 V Motion SPM[®] 2 Series by Mounting Torque 

- Integrated Power Functions 

- Integrated Drive, Protection, and System Control Functions 

## **Integrated Power Functions** 

- 1200 V - 50 A IGBT inverter for three−phase DC / AC power conversion (Please refer to Figure 1) 

## **Integrated Drive, Protection and System Control Functions** 

- For inverter high−side IGBTs: gate drive circuit, high−voltage isolated high−speed level shifting control circuit Under−Voltage Lock−Out Protection (UVLO) 

- For inverter low−side IGBTs: gate drive circuit, Short−Circuit Protection (SCP) control supply circuit Under−Voltage Lock−Out Protection (UVLO) 

- Fault signaling: corresponding to UVLO (low−side supply) and SC faults 

- Input interface: active−HIGH interface, works with 3.3 / 5 V logic, Schmitt−trigger input 

## **PIN CONFIGURATION** 

**==> picture [449 x 296] intentionally omitted <==**

**----- Start of picture text -----**<br>
(34) V S(W)<br>=a (32) V(33) V B(W)BD(W)<br>(1) P (31) V DD(WH)<br>L_ = (30) IN (WH)<br>— (29) V S(V)<br>(28) V B(V)<br>(2) W _c (27) V BD(V)<br>(26) V DD(VH)<br>(25) IN (VH)<br>+<br>(3) V = (24) V S(U)<br>(23) V B(U)<br>G=<br>Case Temperature (TC) (22) V BD(U)<br>Detecting Point (21) V DD(UH)<br>(20) COM (H)<br>(4) U L NELd == (19) IN (UH)<br>(18) R SC<br>(5) N W =_ (17) C SC<br>(6) N V _% [=] (16) C FOD<br>a— (15) V FO<br>(7) N U _°= (14) IN (WL)<br>(13) IN (VL)<br>(12) IN (UL)<br>(8) R(9) VTHTH —ol EG (10) V(11) COMDD(L) (L)<br>**----- End of picture text -----**<br>


**Figure 1. Pin Configuration − Top View** 

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## **PIN DESCRIPTION** 

|**Pin Number**|**Pin Name**|**Pin Description**|
|---|---|---|
|1|P|Positive DC−Link Input|
|2|W|Output for W Phase|
|3|V|Output for V Phase|
|4|U|Output for U Phase|
|5|NW|Negative DC−Link Input for W Phase|
|6|NV|Negative DC−Link Input for V Phase|
|7|NU|Negative DC−Link Input for U Phase|
|8|RTH|Series Resistor for Thermistor (Temperature Detection)|
|9|VTH|Thermistor Bias Voltage|
|10|VDD(L)|Low−Side Bias Voltage for IC and IGBTs Driving|
|11|COM(L)|Low−Side Common Supply Ground|
|12|IN(UL)|Signal Input for Low−Side U Phase|
|13|IN(VL)|Signal Input for Low−Side V Phase|
|14|IN(WL)|Signal Input for Low−Side W Phase|
|15|VFO|Fault Output|
|16|CFOD|Capacitor for Fault Output Duration Selection|
|17|CSC|Shut Down Input for Short−Circuit Current Detection Input|
|18|RSC|Resistor for Short−Circuit Current Detection|
|19|IN(UH)|Signal Input for High−Side U Phase|
|20|COM(H)|High−Side Common Supply Ground|
|21|VDD(UH)|High−Side Bias Voltage for U Phase IC|
|22|VBD(U)|Anode of Bootstrap Diode for U Phase High−Side Bootstrap Circuit|
|23|VB(U)|High−Side Bias Voltage for U Phase IGBT Driving|
|24|VS(U)|High−Side Bias Voltage Ground for U Phase IGBT Driving|
|25|IN(VH)|Signal Input for High−Side V Phase|
|26|VDD(VH)|High−Side Bias Voltage for V Phase IC|
|27|VBD(V)|Anode of Bootstrap Diode for V Phase High−Side Bootstrap Circuit|
|28|VB(V)|High−Side Bias Voltage for V Phase IGBT Driving|
|29|VS(V)|High−Side Bias Voltage Ground for V Phase IGBT Driving|
|30|IN(WH)|Signal Input for High−Side W Phase|
|31|VDD(WH)|High−Side Bias Voltage for W Phase IC|
|32|VBD(W)|Anode of Bootstrap Diode for W Phase High−Side Bootstrap Circuit|
|33|VB(W)|High−Side Bias Voltage for W Phase IGBT Driving|
|34|VS(W)|High−Side Bias Voltage Ground for W Phase IGBT Driving|



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## **INTERNAL EQUIVALENT CIRCUIT AND INPUT/OUTPUT PINS** 

NOTES: 

**==> picture [386 x 442] intentionally omitted <==**

**----- Start of picture text -----**<br>
P (1)<br>(33) VB(W) VB<br>(32) VBD(W)<br>(31) VDD(WH) VDD HVIC OUT<br>COM<br>(30) IN (WH) IN VS<br>(34) VS(W) W (2)<br>(28) VB(V) VB<br>(27) VBD(V)<br>(26) VDD(VH) VDD HVIC OUT<br>COM<br>(25) IN (VH) IN VS<br>(29) VS(V) V (3)<br>(23) VB(U) VB<br>(22) VBD(U)<br>(21) VDD(UH) VDD HVIC OUT<br>(20) COM (H) COM<br>(19) IN (UH) IN VS<br>(24) VS(U) U (4)<br>(17) CSC C SC OUT<br>(16) CFOD C FOD<br>NW (5)<br>(15) VFO VFO<br>(14) IN (WL) IN<br>OUT<br>LVIC<br>(13) IN (VL) IN<br>(12) IN (UL) IN NV (6)<br>(11) COM (L) COM<br>(10) VDD(L) VDD OUT<br>NU (7)<br>RTH (8)<br>Thermistor<br>VTH (9)<br>(18) R SC<br>**----- End of picture text -----**<br>


1. nverter low−side is composed of three IGBTs, freewheeling diodes for each IGBT, and one control IC. It has gate drive and protection functions. 

2. nverter power side is composed of four inverter DC−link input terminals and three inverter output terminals. 

3. Inverter high−side is composed of three IGBTs, freewheeling diodes, and three drive ICs for each IGBT. 

**Figure 2. Internal Block Diagram** 

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**NFVA25012NP2T** 

**ABSOLUTE MAXIMUM RATINGS** (Tj = 25 ° C unless otherwise noted) 

|**Symbol**|**Rating**|**Conditions**|**Rating**|**Unit**|
|---|---|---|---|---|
|**INVERTER PART**|||||
|VPN|Supply Voltage|Applied between P − NU, NV, NW|900|V|
|VPN(Surge)|Supply Voltage (Surge)|Applied between P − NU, NV, NW|1000|V|
|VCES|Collector − Emitter Voltage||1200|V|
|±IC|Each IGBT Collector Current|TC= 100°C, TJ≤150°C, VDD ≥15 V (Note 4)|50|A|
|±ICP|Each IGBT Collector Current (Peak)|TC= 25°C, TJ≤150°C, Under 1 ms Pulse Width<br>(Note 4)|75|A|
|PC|Collector Dissipation|TC= 25°C per One Chip (Note 4)|347|W|
|TJ|Operating Junction Temperature|VCES= 960 V|−40~150|°C|
|||VCES= 1200 V|−40~125|°C|
|**CONTROL PART**|||||
|VDD|Control Supply Voltage|Applied between VDD(H), VDD(L)− COM|20|V|
|VBS|High−Side Control Bias Voltage|Applied between VB(U)− VS(U), VB(V)− VS(V),<br>VB(W)− VS(W)|20|V|
|VIN|Input Signal Voltage|Applied between IN(UH), IN(VH), IN(WH), IN(UL),<br>IN(VL), IN(WL)− COM|−0.3~VDD+ 0.3|V|
|VFO|Fault Output Supply Voltage|Applied between VFO− COM|−0.3~VDD+ 0.3|V|
|IFO|Fault Output Current|Sink Current at VFOpin|2|mA|
|VSC|Current Sensing Input Voltage|Applied between CSC− COM|−0.3~VDD+ 0.3|V|
|**BOOSTSTRAP DIODE PART**|||||
|VRRM|Maximum Repetitive Reverse Voltage||1200|V|
|IF|Forward Current|TC= 25°C, TJ≤150°C (Note 4)|1.0|A|
|IFP|Forward Current (Peak)|TC= 25°C, TJ≤150°C, Under 1 ms Pulse Width<br>(Note 4)|2.0|A|
|TJ|Operating Junction Temperature (Note 6)||−40~150|°C|
|**TOTAL SYSTEM**|||||
|tSC|Short Circuit Withstand Time|VDD= VBS ≤16.5 V, VPN ≤800 V,<br>TJ= 150°C<br>Non−repetitive|3|�s|
|TSTG|Storage Temperature||−40~150|°C|
|VISO|Isolation Voltage|60 Hz, Sinusoidal, AC 1 minute, Connection Pins<br>to Heat Sink Plate|2500|Vrms|



Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 4. These values had been made an acquisition by the calculation considered to design factor. 

## **THERMAL RESISTANCE** 

|**Symbol**|**Parameter**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|Rth(j−c)Q|Junction to Case Thermal<br>Resistance (Note 5)|Inverter IGBT part (per 1 / 6 module)|−|−|0.36|°C/W|
|Rth(j−c)F||Inverter FWD part (per 1 / 6 module)|−|−|0.66|°C/W|
|L�|Package Stray Inductance|P to NU, NV, NW(Note 6)|−|32|−|nH|



5. For the measurement point of case temperature (TC), please refer to Figure 1. DBC discoloration and Picker Circle Printing allowed, please refer to application note AN−9190 (Impact of DBC Oxidation on SPM[®] Module Performance). 

6. Stray inductance per phase measured per IEC 60747−15 _._ 

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**NFVA25012NP2T** 

## **ELECTRICAL CHARACTERISTICS** 

|**Symbol**|**Symbol**|**Parameter**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|**INVERTER PART**(Tj as specified)||||||||
|VCE(SAT)||Collector −Emitter Saturation<br>Voltage|VDD= VBS= 15 V, VIN= 5 V, IC= 50 A, TJ= 25°C|−|2.20|2.80|V|
||||VDD= VBS= 15 V, VIN= 5 V, IC= 50 A, TJ= 150°C|−|2.75|3.25|V|
||VF|FWDi Forward Voltage|VIN= 0 V, IF= 50 A, TJ= 25°C|−|2.40|3.00|V|
||||VIN= 0 V, IF= 50 A, TJ= 150°C|−|2.25|2.85|V|
|HS|tON|High Side Switching Times|VPN= 600 V, VDD= 15 V, IC= 50 A, TJ= 25°C<br>VIN= 0 V↔5 V, Inductive Load<br>See Figure 4<br>(Note 7)|0.90|1.40|2.00|�s|
||tC(ON)|||−|0.50|0.95|�s|
||tOFF|||−|1.10|1.70|�s|
||tC(OFF)|||−|0.15|0.55|�s|
||trr|||−|0.20|−|�s|
|LS|tON|Low Side Switching Times|VPN= 600 V, VDD= 15 V, IC= 50 A, TJ= 25°C<br>VIN= 0 V↔5 V, Inductive Load<br>See Figure 4<br>(Note 7)|0.50|1.00|1.60|�s|
||tC(ON)|||−|0.50|0.95|�s|
||tOFF|||−|1.10|1.70|�s|
||tC(OFF)|||−|0.15|0.55|�s|
||trr|||−|0.25|−|�s|
||ICES|Collector − Emitter Leakage<br>Current|Tj = 25°C, VCE= VCES|−|−|3|mA|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 

7. tON and tOFF include the propagation delay time of the internal drive IC. tC(ON) and tC(OFF) are the switching time of IGBT itself under the given gate driving condition internally. For the detailed information, _please see Figure 3_ . 

**==> picture [368 x 254] intentionally omitted <==**

**----- Start of picture text -----**<br>
100% IC 100% IC<br>t rr<br>VCE IC IC VCE<br>VIN VIN<br>t ON t OFF<br>t C(ON) t C(OFF)<br>10% IC<br>VIN(ON) 90% IC 10% VCE VIN(OFF) 10% VCE 10% IC<br>(a) turn-on (b) turn-off<br>**----- End of picture text -----**<br>


**Figure 3. Switching Time Definition** 

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**NFVA25012NP2T** 

**==> picture [469 x 182] intentionally omitted <==**

**----- Start of picture text -----**<br>
One−Leg Diagram of ASPM34 I C<br>R BS<br>P<br>C BS e e i VDD VB ,<br>O COM OU T LS Switching<br>Bea IN ee V l S < O9<br>HS Switching VPN<br>{T . ————) U,V,W<br>V<br>LS Switching IN Inductor 600 V<br>O_ O oe. VDD<br>5 V VIN VDD 4.7 k Ω a O VCFOFOD OU T HS Switching O<br>0 V C SC<br>cra Zc. « ?<br>V aaO COM<br>NU,V,W<br>15 V<br>V R SC<br>©) 5 V J<br>om<br>**----- End of picture text -----**<br>


**Figure 4. Example Circuit of Switching Test** 

**==> picture [446 x 395] intentionally omitted <==**

**----- Start of picture text -----**<br>
Inductive Load, VPN = 600 V, VCC = 15 V, Tj = 25 C Inductive Load, VPN = 600 V, VCC = 15 V, Tj = 150 C<br>1400 a as a 14400 —— To<br>we00 | TT IGBT Turn-ON,Fc cee dee wean | TT IGBT Turn-ON,Fefli<br>——IGBTTurn-OFF,F : 5 3: Dt ——IGBTTum-OFF,E,© 5 5 os Oe<br>——FRDTum-OFF,E 5 5): Dt ——FRDTunOFF,F 2 5 6 Of<br>3600 ; ; ; ; ; Leet hese tebe 9600 ; ; ; ; ete Lhe<br>0 4 3 12 16 20 24 28 #32 36 40 44048 52 «56 Oo 4 a 12 16 20 24 28 32 36 40 44 48 52<br>Collector Current, IC [A] Collector Current, IC [A]<br>Figure 5. Switching Loss Characteristics<br>R−T Curve<br>600<br>550<br>R−T Curve in 50 C ~ 125 C<br>20<br>500<br>450 16<br>| 400 12<br>350<br>8<br>300<br>250 4<br>200 0<br>50 60 70 80 90 100 110 120<br>150 Temperature [ ° C]<br>100<br>50<br>0<br>−20 −10 0 10 20 30 40 50 60 70 80 90 100 110 120<br>Temperature [ ° C]<br>J] J]<br> [  [<br>SW SW<br>Switching Loss, E Switching Loss, E<br>] ]<br>Resistance [k<br>Resistance [k<br>**----- End of picture text -----**<br>


**Figure 6. R−T Curve of Built−in Thermistor** 

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## **ELECTRICAL CHARACTERISTICS** 

|**Symbol**|**Parameter**|**Conditions**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|**BOOTSTRAP DIODE PART **(Tj as specified)||||||||
|VF|Forward Voltage|IF= 1.0 A, TJ= 25°C||−|2.2|−|V|
|trr|Reverse−Recovery Time|IF= 1.0 A, dIF/ dt = 50 A/ms, TJ= 25°C||−|80|−|ns|
|**CONTROL PART **(Tj = 25°C unless otherwise noted)||||||||
|IQDDH|Quiescent VDDSupply<br>Current|VDD(UH,VH,WH)= 15 V,<br>IN(UH,VH,WH)= 0 V|VDD(UH)− COM(H),<br>VDD(VH)− COM(H),<br>VDD(WH)− COM(H)|−|−|0.15|mA|
|IQDDL||VDD(L)= 15 V, IN(UL,VL, WL)= 0 V|VDD(L)− COM(L)|−|−|4.80|mA|
|IPDDH|Operating VDDSupply<br>Current|VDD(UH,VH,WH)= 15 V,<br>fPWM= 20 kHz, Duty = 50%,<br>Applied to one PWM Signal Input<br>for High−Side|VDD(UH)− COM(H),<br>VDD(VH)− COM(H),<br>VDD(WH)− COM(H)|−|−|0.30|mA|
|IPDDL||VDD(L)= 15V, fPWM= 20 kHz,<br>Duty = 50%, Applied to one PWM<br>Signal Input for Low−Side|VDD(L)− COM(L)|−|−|15.5|mA|
|IQBS|Quiescent VBSSupply<br>Current|VBS= 15 V, IN(UH,VH,WH)= 0 V|VB(U)− VS(U),<br>VB(V)− VS(V),<br>VB(W)− VS(W)|−|−|0.30|mA|
|IPBS|Operating VBSSupply<br>Current|VDD= VBS= 15 V, fPWM= 20 kHz,<br>Duty = 50%, Applied to one PWM<br>Signal Input for High−Side|VB(U)− VS(U),<br>VB(V)− VS(V),<br>VB(W)− VS(W)|−|−|12.0|mA|
|VFOH|Fault Output Voltage|VDD= 15 V, VSC= 0 V, VFOCircuit: 4.7 k�to 5 V Pull−up||4.5|−|−|V|
|VFOL||VDD= 15 V, VSC= 1 V, VFOCircuit: 4.7 k�to 5 V Pull−up||−|−|0.5|V|
|ISEN|Sensing Current of Each<br>Sense IGBT|VDD= 15 V, VIN= 5 V, RSC= 0�,<br>No Connection of Shunt Resistor<br>at NU,V,WTerminal|IC= 50 A|−|43|−|mA|
|VSC(ref)|Short Circuit Trip Level|VDD= 15 V (Note 8)|CSC− COM(L)|0.43|0.50|0.57|V|
|ISC|Short Circuit Current Level<br>for Trip|RSC= 13�(±1%), No Connection of Shunt Resistor<br>at NU,V,WTerminal (Note 8)||−|75|−|A|
|UVDDD|Supply Circuit<br>Under−Voltage Protection|Detection Level||10.3|−|12.8|V|
|UVDDR||Reset Level||10.8|−|13.3|V|
|UVBSD||Detection Level||9.5|−|12.0|V|
|UVBSR||Reset Level||10.0|−|12.5|V|
|tFOD|Fault−Out Pulse Width|CFOD= Open|(Note 9)|50|−|−|�s|
|||CFOD= 2.2 nF||1.7|−|−|ms|
|VIN(ON)|ON Threshold Voltage|Applied between IN(UH,VH,WH)− COM(H),<br>IN(UL,VL,WL)− COM(L)||−|−|2.6|V|
|VIN(OFF)|OFF Threshold Voltage|||0.8|−|−|V|
|RTH|Resistance of Thermistor|at TTH= 25°C|_See Figure 6_<br> (Note 10)|−|47|−|k�|
|||at TTH= 100°C||−|2.9|−|k�|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 

8. Short−circuit current protection functions only at the low−sides because the sense current is divided from main current at low−side IGBTs. Inserting the shunt resistor for monitoring the phase current at NU, NV, NW terminal, the trip level of the short−circuit current is changed. 9. The fault−out pulse width tFOD depends on the capacitance value of CFOD according to the following approximate equation: tFOD = 0.8 x 10[6] x CFOD [s]. 

10.TTH is the temperature of thermistor itself. To know case temperature (TC), conduct experiments considering the application. 

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## **RECOMMENDED OPERATING RANGES** 

|**Symbol**<br>~~——~~|**Parameter**<br>~~es~~|**Conditions**<br>~~ie~~|**Min**<br>~~ie~~|**Typ**<br>~~ee~~|**Max**<br>~~ee~~|**Unit**|
|---|---|---|---|---|---|---|
|VPN<br>~~——~~<br>~~a~~|Supply Voltage<br>~~es~~<br>~~a~~|Applied between P − NU, NV, NW<br>~~ie~~<br>~~ee~~|300<br>~~ie~~<br>~~ee ee~~|600<br>~~ee~~<br>~~ee~~|800<br>~~ee~~<br>~~ee~~|V<br>~~ee~~|
|VDD<br>~~——~~<br>~~a~~<br>~~a~~|Control Supply Voltage<br>~~es~~<br>~~a~~<br>|Applied between VDD(UH,VH,WH)−<br>COM(H), VDD(L)− COM(L)<br>~~ie~~<br>~~ee~~<br>~~ee~~|14.0<br>~~ie ~~<br>~~ee ee~~<br>~~ee~~|15.0<br> ~~ee~~<br>~~ee~~|16.5<br>~~ee~~<br>~~ee~~|V<br>~~ee~~|
|VBS<br>~~a ~~<br>~~a~~<br>~~a~~<br>~~—~~|High−Side Bias Voltage<br> ~~a~~<br>~~ee~~<br>~~ee~~|Applied between VB(U)− VS(U), VB(V)−<br>VS(V), VB(W)−VS(W)<br>~~ee ~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|13.0<br> ~~ee ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|15.0<br>~~ee~~<br>~~ee~~|18.5<br>~~ee~~<br>~~ee~~|V<br>~~ee~~<br>~~ee~~|
|dVDD/ dt,<br>dVBS/ dt<br>~~a ~~<br>~~—~~|Control Supply Variation<br> ~~ee~~<br>~~ee~~|~~ee ~~<br>~~ee~~<br>~~i~~|−1<br> ~~ee~~<br>~~ee~~<br>~~i~~|−<br>~~a~~|1<br>~~ee~~|V/ s|
|tdead<br> <br>~~—~~|Blanking Time for Preventing Arm − Short<br> ~~ee~~<br>~~ee~~|For Each Input Signal<br>~~ee~~<br>~~i~~|2.0<br>~~ee~~<br>~~i~~|−<br>~~a~~|−<br>~~ee~~|s|
|fPWM<br> <br>~~—~~|PWM Input Signal<br> ~~ee~~<br>~~ee~~|−40°C≤ TC≤ 125°C, −40°C≤ TJ≤ 150°C<br>~~ee ~~<br>~~i~~|−<br> ~~ee~~<br>~~i~~|−<br>~~a~~|20<br>~~ee~~|kHz|
|VSEN|Voltage for Current Sensing<br>~~ee~~|Applied between NU, NV, NW− COM(H, L)<br> (Including Surge Voltage)<br>~~i~~|−5<br>~~i ~~|−<br> ~~a~~|5<br>~~ee~~|V|
|PWIN(ON)<br>~~a~~|Minimum Input Pulse Width<br>~~a~~|VDD= VBS= 15 V, IC≤ 75 A, Wiring<br>Inductance between NU,V,Wand DC Link<br>N < 10 nH (Note 11)<br>~~sae~~|2.5<br>~~sae~~|−<br>~~sae~~|−<br>~~sae~~|s<br>~~sae~~|
|PWIN(OFF)<br>~~a~~|||2.5<br>~~sae~~|−<br>~~sae~~|−<br>~~sae~~||
|TJ<br>~~a~~|Junction Temperature<br>~~a~~|~~sae~~|−40<br>~~sae~~|−<br>~~sae~~|150<br>~~sae~~|°C<br>~~sae~~|



11. This product might not make output response if input pulse width is less than the recommended value. 

## **MECHANICAL CHARACTERISTICS AND RATINGS** 

|**Parameter**|**Conditions**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|Device Flatness|_See Figure 7_||0|−|+200|m|
|Mounting Torque<br>~~Fs~~|Mounting Screw: M4<br> _See Figure 8_<br>~~Ne~~|Recommended 1.0 N⋅m|0.9|1.0|1.5|N⋅m|
|||Recommended 10.1 kg⋅cm<br>~~Ne~~|9.1<br>~~Ne~~|10.1<br>~~Ne~~|15.1<br>~~Ne~~|kg⋅cm<br>~~Ne~~|
|Terminal Pulling Strength<br>~~Fs~~|Load 19.6 N<br>~~Ne~~||10<br>~~Ne~~|−<br>~~Ne~~|−<br>~~Ne~~|s<br>~~Ne~~|
|Terminal Bending Strength<br>~~Fs~~|Load 9.8 N, 90 degrees Bend<br>~~Ne~~||2<br>~~Ne~~|−<br>~~Ne~~|−<br>~~Ne~~|times<br>~~Ne~~|
|Weight|||−|50|−|g|



(+) 

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**Figure 7. Flatness Measurement Position** 

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2<br>Pre − Screwing: 1  →  2<br>Final Screwing: 2  →  1<br>1<br>¥<br>**----- End of picture text -----**<br>


NOTES: 

- 12.Do not over torque when mounting screws. Too much mounting torque may cause DBC cracks, as well as bolts and Al heat−sink destruction. 

- 13.Avoid one−sided tightening stress. Figure 8 shows the recommended torque order for the mounting screws. Uneven mounting can cause the DBC substrate of package to be damaged. The pre−screwing torque is set to 20~30% of maximum torque rating. 

## **Figure 8. Mounting Screws Torque Order** 

## **TIME CHARTS OF SPMs PROTECTIVE FUNCTION** 

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Input Signal<br>Protection<br>RESET SET RESET<br>Circuit State<br>UVDDR<br>a1 a6<br>Control UVDDD<br>a3<br>Supply Voltage<br>aa a2<br>a4 a7<br>Output Current<br>a5<br>Fault Output Signal<br>JS Lyt |<br>**----- End of picture text -----**<br>


- a1: Control supply voltage rises: after the voltage rises UVDDR, the circuits start to operate when the next input is applied. a2: Normal operation: IGBT ON and carrying current. 

- a3: Under-voltage detection (UVDDD). 

- a4: IGBT OFF in spite of control input condition. 

- a5: Fault output operation starts with a fixed pulse width according to the condition of the external capacitor CFOD. a6: Under-voltage reset (UVDDR). 

- a7: Normal operation: IGBT ON and carrying current by triggering next signal from LOW to HIGH. 

**Figure 9. Under-Voltage Protection (Low-Side)** 

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Input Signal<br>Protection<br>RESET SET RESET<br>Circuit State<br>UVBSR<br>Control b1 UVBSD b5<br>b3<br>Supply Voltage<br>b6<br>b2<br>b4<br>Output Current<br>High−level (no fault output)<br>Fault Output Signal<br>**----- End of picture text -----**<br>


b1: Control supply voltage rises: after the voltage reaches UVBSR, the circuits start to operate when the next input is applied. b2: Normal operation: IGBT ON and carrying current. b3: Under-voltage detection (UVBSD). 

b4: IGBT OFF in spite of control input condition, but there is no fault output signal. b5: Under-voltage reset (UVBSR). 

b6: Normal operation: IGBT ON and carrying current by triggering next signal from LOW to HIGH. 

**Figure 10. Under-Voltage Protection (High-Side)** 

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Lower Arms<br>Control Input c6 c7<br>Protection<br>Circuit state SET RESET<br>c4<br>Internal IGBT<br>Gate−Emitter c3<br>Input Voltage<br>c2 Internal delay<br>at protection circuit<br>SC current trip level<br>c8<br>c1<br>Output Current<br>SC reference voltage<br>Sensing Voltage<br>of Sense Resistor<br>RC filter circuit<br>time constant<br>delay<br>Fault Output Signal c5<br>**----- End of picture text -----**<br>


(With the external sense resistance and RC filter connection) 

c1: Normal operation: IGBT ON and carrying current. 

c2: Short-circuit current detection (SC trigger). 

c3: All low-side IGBTs gate are hard interrupted. 

c4: All low-side IGBTs turn OFF. 

c5: Fault output operation starts with a fixed pulse width according to the condition of the external capacitor CFOD. 

- c6: Input HIGH: IGBT ON state, but during the active period of fault output, the IGBT doesn’t turn ON. 

- c7: Fault output operation finishes, but IGBT doesn’t turn on until triggering the next signal from LOW to HIGH. 

c8: Normal operation: IGBT ON and carrying current. 

**Figure 11. Short-Circuit Current Protection (Low-Side Operation Only)** 

## **INPUT/OUTPUT INTERFACE CIRCUIT** 

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+5 V (MCU or control power)<br>4.7 k � ASPM<br>IN(UH), IN(VH), IN(WH)<br>IN(UL), IN(VL), IN(WL)<br>MCU<br>VFO<br>COM<br>NOTE:<br>14.RC coupling at each input might change depending on the PWM control scheme used in the application and the wiring impedance of the<br>application’s printed circuit board. The input signal section of the Motion SPM 2 product integrates 5 k �  (typ.) pull−down resistor. Therefore,<br>when using an external filtering resistor, please pay attention to the signal voltage drop at input terminal.<br>**----- End of picture text -----**<br>


**Figure 12. Recommended MCU I/O Interface Circuit** 

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P (1)<br>Gating WH R 1 R 2 C 4 (30) IN(32) V(31) V BD(W)DD(WH)(WH) COMVINDD HVIC OUT<br>C 3 C 4 (34) V(33) V S(W)B(W) V B V S W (2)<br>Gating VH R 1 R 2 C 4 (25) IN((27) V26) V DD(VH)BD(V)(VH) COMVINDD HVIC OUT<br>(28) V B(V) V B V S<br>C 3 C 4 (29) V S(V) V (3) M<br>M Gating UH R 1 C 1 C 1 C 1 R 2 C 4 (22) V((20) COM(1921)) IN V BD(U)DD(UH(U)H(H)) COMVINDD HVIC OUT C 7 V DC<br>(23) V B(U) V B V S<br>C C 3 C 4 (24) V S(U) U (4)<br>U 5V line<br>R 1 R 3 C 5 (16) C FOD OUT<br>Fault C FOD<br>C 1 C 1 (15) V FO V FO N W (5) R 4 A<br>Gating WL R 1 (14) IN (WL) IN<br>Gating VL R 1 (13) IN (VL) IN LVIC OUT<br>Gating UL R 1 (12) IN (UL) IN N V (6) R 4 E<br>C 1 C 1 C 1 15V line (10) V DD(L) V DD ResistorShunt Power<br>C 2 C 4 (11) COM (L) COM GND Line<br>OUT<br>5V line (9) V TH<br>(8) R TH C SC N U (7) R 4<br>Temp.<br>Monitoring R 7 Thermistor R SC (18) R 5<br>(17) C SC Sense<br>Resistor<br>D<br>R 6 B Control<br>C 6 W−Phase Current GND Line<br>V−Phase Current<br>C U−Phase Current<br>**----- End of picture text -----**<br>


## NOTES: 

- 15.To avoid malfunction, the wiring of each input should be as short as possible (less than 2 − 3 cm). 

- 16.VFO output is an open−drain type. This signal line should be pulled up to the positive side of the MCU or control power supply with a resistor that makes IFO up to 2 mA. _Please refer to Figure 13_ . 

- 17.Fault out pulse width can be adjust by capacitor C5 connected to the CFOD terminal. 

- 18.Input signal is active−HIGH type. There is a 5 k � resistor inside the IC to pull−down each input signal line to GND. RC coupling circuits should be adopted for the prevention of input signal oscillation. R1C1 time constant should be selected in the range 50~ 50 ns (recommended R1 = 100 � , C1 = 1 nF). 

- 19.Each wiring pattern inductance of point A should be minimized (recommend less than 10 nH). Use the shunt resistor R4 of surface mounted (SMD) type to reduce wiring inductance. To prevent malfunction, wiring of point E should be connected to the terminal of the shunt resistor R4 as close as possible. 

- 20.To insert the shunt resistor to measure each phase current at NU, NV, NW terminal, it makes to change the trip level ISC about the short−circuit current. 

- 21.To prevent errors of the protection function, the wiring of points B, C, and D should be as short as possible. The wiring of B between CSC filter and RSC terminal should be divided at the point that is close to the terminal of sense resistor R5. 

- 22.For stable protection function, use the sense resistor R5 with resistance variation within 1% and low inductance value. 

- 23.In the short−circuit protection circuit, select the R6C6 time constant in the range 1.0~1.5 � s. R6 should be selected with a minimum of 10 times larger resistance than sense resistor R5. Do enough evaluaiton on the real system because short−circuit protection time may vary wiring pattern layout and value of the R6C6 time constant. 

- 24.Each capacitor should be mounted as close to the pins of the ASPM34 product as possible. 

- 25.To prevent surge destruction, the wiring between the smoothing capacitor C7 and the P & GND pins should be as short as possible. The use of a high−frequency non−inductive capacitor of around 0.1~0.22 � F between the P & GND pins is recommended. 

- 26.Relays are used in most systems of electrical equipments in industrial application. In these cases, there should be sufficient distance between the MCU and the relays. 

- 27.The Zener diode or transient voltage suppressor should be adapted for the protection of ICs from the surge destruction between each pair of control supply terminals (recommended Zener diode is 22 V / 1 W, which has the lower Zener impedance characteristic than about 15 � ). 

- 28.C2 of around seven times larger than bootstrap capacitor C3 is recommended. 

- 29.Please choose the electrolytic capacitor with good temperature characteristic in C3. Choose 0.1~0.2 � F R−category ceramic capacitors with good temperature and frequency characteristics in C4. 

## **Figure 13. Typical Application Circuit** 

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## **PACKAGE MARKING AND ORDERING INFORMATION** 

|**Device**|**Device Marking**|**Package**|**Shipping**|
|---|---|---|---|
|NFVA25012NP2T|NFVA25012NP2T|ASPM34−CAA<br>(Pb−Free)|6 Units/Tube|



SPM is registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. 

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**14** 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

**DIP34 80x33, AUTOMOTIVE MODULE** CASE MODGL ISSUE O 

DATE 19 OCT 2018 

## **GENERIC** 

## **MARKING DIAGRAM*** 

XXXX = Specific Device Code ZZZ = Lot ID XXXXXXXXXXX AT = Assembly & Test Location ZZZ ATYWW Y = Year NNNNNNN W = Work Week NNN = Serial Number 

*This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ ”, may or may not be present. Some products may not follow the Generic Marking. 

Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. 

**DOCUMENT NUMBER: 98AON97156G DESCRIPTION: DIP34 80x33, AUTOMOTIVE MODULE** 

**PAGE 1 OF 1** 

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