NFAM5065L4BBA

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## Intelligent Power Module (IPM) 650 V, 50 A NFAM5065L4BBA 

## **General Description** 

The NFAM5065L4BBA is a fully-integrated inverter power module consisting of an independent High side gate driver, LVIC, six IGBT’s and a temperature sensor (VTS), suitable for driving permanent magnet synchronous (PMSM) motors, brushless DC (BLDC) motors and AC asynchronous motors. The IGBT’s are configured in a three-phase bridge with separate emitter connections for the lower legs for maximum flexibility in the choice of control algorithm. 

The power stage has under voltage lockout protection (UVP). Internal boost diodes are provided for high side gate boost drive. 

**DIP39, 54.5x31.0 EP -2 CASE MODGX** 

## **MARKING DIAGRAM** 

## **Features** 

- Three-phase 650 V, 50 A IGBT Module with Independent Drivers 

NFAM5065L4BBA ZZZATYWW 

- Active Logic Interface 

- Built-in Under -Voltage Protection (UVP) 

- Integrated Bootstrap Diodes and Resistors 

- Separate Low-side IGBT Emitter Connections for Individual Current Sensing of Each Phase 

- Temperature Sensor (VTS) 

- UL1557 Certified (File No.339285) 

- This Device is Pb -Free and RoHS Compliant 

Device marking is on package top side 

NFAM5065L4BBA = Specific Device Code ZZZ = Assembly Lot Code A = Assembly Location T = Test Location Y = Year WW = Work Week 

## **Applications** 

- Industrial Drives 

## **ORDERING INFORMATION** 

- Industrial Pumps 

- Industrial Fans 

- Industrial Automation 

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P U V W<br>VS(U)<br>VB(U) High Side HS1<br>VDD(UH) HVIC1<br>HIN(U)<br>VS(V)<br>VDD(VH)VB(V) High SideHVIC2 HS2 HS1 HS2 HS3<br>HIN(V)<br>VS(W)<br>VB(W) High Side HS3<br>VDD(WH) HVIC3<br>HIN(W)<br>VTS LS1 LS2 LS3<br>LIN(U)<br>LIN(V) LS1<br>LIN(W) Low Side<br>VFO LVIC LS2<br>CFOD with<br>CIN Protection LS3<br>VSS<br>VDD(L)<br>NU NV NW<br>**----- End of picture text -----**<br>


|**Device**|**Package**|**Shipping**|
|---|---|---|
|NFAM5065L4BBA|DIP39<br>54.5 x 31.0<br>(Pb-Free)|90 Units / Box|



**Figure 1. Application Schematic** 

Publication Order Number: **NFAM5065L4BBA/D** 

**1** 

 Semiconductor Components Industries, LLC, 2021 **July, 2025 − Rev. 2** 

**NFAM5065L4BBA** 

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VB(U) (3)<br>N.C (38)<br>VS(U) (1) P (37)<br>CS + C1<br>HIN (U) (6) VB<br>HIN HOUT<br>VDD(UH) (4) HVIC 1<br>VDD<br>U (36)<br>VSS VS<br>VB(V) (9)<br>VS(V) (7)<br>HIN (V) (12) VB<br>HIN HOUT<br>VDD(VH) (10) VDD HVIC 2 V (35)<br>VSS VS Motor<br>VB(W) (15)<br>VS(W) (13)<br>MCU HIN (W) (18) VB<br>HIN HOUT<br>VDD(WH) (16) HVIC 3<br>VDD W (34)<br>VSS VS<br>VTS (20)<br>VTS<br>LIN(U) (21) OUT(U)<br>LIN(U)<br>LIN(V) (22) NU (33)<br>Ee LIN(V)<br>LIN(W) (23)<br>LIN(W)<br>5V line<br>LVIC<br>VFO (24)<br>VFO OUT(V)<br>CFOD (25)<br>CFOD NV (32)<br>CIN (26) CIN<br>15V line<br>VDD(L) (28) VDD<br>VSS (27) VSS OUT(W)<br>NW (31)<br>Signal for short circuit trip<br>Phase current<br>**----- End of picture text -----**<br>


**Figure 2. Application Schematic  - Adjustable Option** 

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**NFAM5065L4BBA** 

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N.C (38)<br>VS(U) (1)<br>P (37)<br>VB(U) (3)<br>VB<br>VDD(UH) (4) VDD HOUT<br>HVIC1<br>HIN(U) (6) HIN<br>VSS VS U (36)<br>VS(V) (7) SSL<br>VB(V)(9)<br>VB<br>VDD(VH) (10) VDD HOUT<br>HVIC2<br>HIN(V) (12) HIN<br>VSS VS V (35)<br>VS(W) (13) =e<br>|<br>VB(W) (15)<br>VB<br>VDD(WH) (16) VDD HOUT<br>HVIC3<br>HIN(W) (18) HIN<br>= VSS VS e|| W (34)<br>VTS (20) VTS OUT(U)<br>LIN(U) (21) LIN(U)<br>NU (33)<br>LIN(V) (22) LIN(V)<br>LIN(W) (23) LIN(W)<br>VFO (24) VFO OUT(V)<br>LVIC<br>CFOD (25) CFOD<br>NV (32)<br>CIN (26) CIN<br>VSS (27) VSS<br>VDD(L) (28) VDD OUT(W)<br>NW (31)<br>ele<br>Figure 3. Equivalent Block Diagram<br>**----- End of picture text -----**<br>


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**NFAM5065L4BBA** 

## **PIN FUNCTION DESCRIPTION** 

|**Pin**<br>~~a~~|**Name**|**Description**|
|---|---|---|
|1<br>~~a~~|VS(U)|High -Side Bias Voltage GND for U phase IGBT Driving|
|(2)<br>~~a~~|−|Dummy|
|3<br>~~a~~|VB(U)|High -Side Bias Voltage for U phase IGBT Driving|
|4<br>~~a~~|VDD(UH)|High -Side Bias Voltage for U phase IC|
|(5)<br>~~a~~|−<br>|Dummy<br>|
|6<br>~~eG~~|HIN(U)<br>~~eG~~|Signal Input for High -Side U Phase<br>~~eG~~|
|7<br>~~eG~~|VS(V)<br>~~eG~~|High -Side Bias Voltage GND for V phase IGBT Driving<br>~~eG~~|
|(8)<br>~~a~~|−|Dummy|
|9<br>~~a~~|VB(V)|High -Side Bias Voltage for V phase IGBT Driving|
|10<br>~~a~~|VDD(VH)|High -Side Bias Voltage for V phase IC|
|(11)<br>~~a~~|−|Dummy|
|12<br>~~a~~|HIN(V)|Signal Input for High -Side V Phase|
|13<br>~~a~~|VS(W)|High -Side Bias Voltage GND for W phase IGBT Driving|
|(14)<br>~~a~~<br>~~a~~|−<br>~~es~~|Dummy|
|15<br>~~a~~<br>~~a~~|VB(W)<br>~~es~~|High -Side Bias Voltage for W phase IGBT Driving|
|16<br>~~a~~|VDD(WH)<br>~~es~~|High -Side Bias Voltage for W phase IC|
|(17)<br>~~a~~|−|Dummy|
|18<br>~~a~~|HIN(W)<br>|Signal Input for High -Side W Phase<br>|
|(19)<br>~~eG~~|−<br>~~eG~~|Dummy<br>~~eG~~|
|20<br>~~Ge~~|VTS<br>~~Ge~~|Voltage Output for LVIC Temperature Sensing Unit<br>~~Ge~~|
|21<br>~~a ~~|LIN(U)<br> ~~eG~~|Signal Input for Low -Side U Phase<br>~~eG~~|
|22<br>~~a~~|LIN(V)|Signal Input for Low -Side V Phase|
|23<br>~~a ~~|LIN(W)<br> ~~eG~~|Signal Input for Low -Side W Phase<br>~~eG~~|
|24<br>~~a~~|VFO|Fault Output|
|25<br>~~a ~~|CFOD<br> ~~eG~~|Capacitor for Fault Output Duration Selection<br>~~eG~~|
|26<br>~~a~~|CIN|Input for Current Protection|
|27<br>~~a~~|VSS|Low -Side Common Supply Ground|
|28<br>~~a~~|VDD(L)|Low -Side Bias Voltage for IC and IGBTs Driving|
|(29)<br>~~a~~|−|Dummy|
|(30)<br>~~a~~|−|Dummy|
|31<br>~~a~~|NW<br>|Negative DC -Link Input for U Phase<br>|
|32<br>~~eG~~|NV<br>~~eG~~|Negative DC -Link Input for V Phase<br>~~eG~~|
|33<br>~~a~~|NU|Negative DC -Link Input for W Phase|
|34<br>~~a~~|W|Output for U Phase|
|35<br>~~a~~|V|Output for V Phase|
|36<br>~~a eG~~|U<br>~~eG~~|Output for W Phase<br>~~eG~~|
|37<br>~~a ~~|P<br> ~~eG~~|Positive DC -Link Input<br>~~eG~~|
|38<br>~~a~~|N.C|No Connection|
|(39)<br>~~a~~|−|Dummy|



1. Pins of () are the dummy for internal connection. These pins should be no connection. 

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**NFAM5065L4BBA** 

## **ABSOLUTE MAXIMUM RATINGS** (Tc = 25 C) (Note 2) 

|**ABSOLUTE MAXIMUM RATINGS**|**ABSOLUTE MAXIMUM RATINGS**(Tc = 25 C) (Note 2)C) (Note 2)C) (Note 2)|(Tc = 25 C) (Note 2)C) (Note 2)C) (Note 2)|||
|---|---|---|---|---|
|**Symbol**|**Rating**|**Conditions**|**Value**|**Unit**|
|VPN|Supply Voltage|P −NU, NV, NW|450|V|
|VPN(surge)|Supply Voltage (Surge)|P −NU, NV, NW (Note 3)|550|V|
|VPN(PROT)|Self Protection Supply Voltage Limit<br>(Short -Circuit Protection Capability)|VDD = VBS = 13.5 V～16.5 V, Tj = 150C,<br>Vces < 650 V, Non -repetitive, < 2 s|400|V|
|Vces|Collector -emitter voltage||650|V|
|VRRM<br>~~ee~~|Maximum Repetitive<br>Reverse Voltage<br>~~ee~~|~~ee~~|650<br>~~ee~~|V<br>~~ee~~|
|Ic<br>~~ee~~|Each IGBT Collector Current<br>~~ee~~|~~ee~~|50<br>~~ee~~|A<br>~~ee~~|
|Icp<br>~~ee~~|Each IGBT Collector<br>Current (Peak)<br>~~ee~~|Under 1 ms Pulse Width<br>~~ee~~|100<br>~~ee~~|A<br>~~ee~~|
|VDD<br>~~ee~~|Control Supply Voltage<br>~~ee~~|VDD(UH,VH,WH), VDD(L)−VSS<br>~~ee~~|−0.3 to 20<br>~~ee~~|V<br>~~ee~~|
|VBS<br>~~a~~|High -Side<br>Control Bias voltage<br>~~a~~|VB(U)−VS(U), VB(V)−VS(V),<br>VB(W)−VS(W)<br>~~a~~|−0.3 to 20<br>~~a~~|V<br>~~a~~|
|VIN<br>~~a~~|Input Signal Voltage<br>~~a~~|HIN(U), HIN(V), HIN(W), LIN(U), LIN(V),<br>LIN(W)–VSS<br>~~a~~|−0.3 to VDD<br>~~a~~|V<br>~~a~~|
|VFO<br>~~a~~|Fault Output Supply Voltage<br>~~a~~|VFO–VSS<br>~~a~~|−0.3 to VDD<br>~~a~~|V<br>~~a~~|
|IFO<br>~~a~~|Fault Output Current<br>~~a~~|Sink Current at VFO pin<br>~~a~~|2<br>~~a~~|mA<br>~~a~~|
|VCIN<br>~~a~~|Current Sensing<br>Input Voltage<br>~~a~~|CIN–VSS<br>~~a~~|−0.3 to VDD<br>~~a~~|V<br>~~a~~|
|Pc<br>~~a~~|Corrector Dissipation<br>~~a~~|Per One Chip<br>~~a~~|125<br>~~a~~|W<br>~~a~~|
|Tj|Operating Junction Temperature|~~<<~~|−40 to +150|C|
|Tstg<br>~~>~~|Storage temperature<br>~~>~~|~~>~~<br>~~<<~~|−40 to +125<br>~~>~~|C<br>~~>~~|
|Tc<br>~~>~~|Module Case Operation Temperature<br>~~>~~|~~>~~<br>~~<<~~|−40 to +125<br>~~>~~|C<br>~~>~~|
|Viso<br>~~>~~|Isolation voltage<br>~~>~~|60 Hz, Sinusoidal, AC 1 minute,<br>Connection Pins to Heat Sink Plate<br>~~>~~<br>~~<<~~|2500<br>~~>~~|Vrms<br>~~>~~|



2. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for Safe Operating parameters. 

3. This surge voltage developed by the switching operation due to the wiring inductance between P and NU, NV, NW terminal. 

|**THERMAL CHARACTERISTICS**||||||||
|---|---|---|---|---|---|---|---|
|**Symbol**<br>**Rating**<br>**Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Unit**<br>Rth(j-c)Q<br>Junction-to-Case Thermal<br>Resistance<br>Inverter IGBT Part (per 1/6 module)<br>−<br>−<br>1.0<br>C/W<br>Rth(j-c)F<br>Inverter FWD Part (per 1/6 module)<br>−<br>−<br>1.7<br>C/W<br>~~|~~||||||||
|4. Refer toELECTRICAL CHARACTERISTICS<br>, RECOMMENDED OPERATING RANGES<br>||||and/or APPLICATION INFORMATION for Safe||||
|Operating parameters.||||||||



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**NFAM5065L4BBA** 

## **RECOMMENDED OPERATING CONDITIONS** 

|**Symbol**<br>~~a~~|**Rating**<br>~~a~~<br>~~a~~|**Conditions**<br>~~a~~|**Conditions**<br>~~a~~|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|VPN<br>~~a~~|Supply Voltage<br>~~a~~<br>~~a~~|P−NU, NV, NW||−|300|400|V|
|VDD|Gate Driver Supply<br>Voltages<br>~~a~~<br>~~a~~<br>~~a~~|VDD(UH,VH,WH), VDD(L)−VSS<br>~~a~~||13.5<br>~~a~~|15<br>~~a~~|16.5|V|
|VBS<br>~~a~~<br>~~a~~||VB(U)−VS(U), VB(V)−VS(V),<br>VB(W)−VS(W)<br>~~a~~<br>~~a~~<br>~~ee~~||13.0<br>~~a~~<br>~~ee~~|15<br>~~a~~<br>~~ee~~|18.5<br>~~ee~~|V|
|dVDD / dt,<br>dVBS / dt<br>~~a~~<br>~~a~~|Supply Voltage Variation<br>~~a~~<br>~~a~~|~~a~~<br>~~ee~~||−1<br>~~ee~~|−<br>~~ee~~|1<br>~~ee~~|V/ s|
|fPWM<br>~~a~~|PWM Frequency<br>~~a~~|~~ee ~~||1<br> ~~ee ~~|−<br> ~~ee ~~|20<br> ~~ee~~|kHz|
|DT<br>~~a ~~|Dead Time<br> ~~a~~|Turn-off to Turn-on (external)||1.5|−|−|s|
|Io|Allowable r.m.s. Current|VPN = 300 V,<br>VDD = 15 V,<br>P.F. = 0.8<br>Tc125C,<br>Tj150C<br>(Note 5)|fPWM = 5 kHz|−|−|30.0|Arms|
||||fPWM =  15 kHz|−|−|21.2||
|PWIN (on)|Allowable Input Pulse<br>Width<br>~~PP~~|200 VVPN400 V<br>13.5 VVDD16.5 V<br>13.0 VVBS18.5 V<br>−20CTc100C<br>~~PP~~||1.0|−|−|s|
|PWIN (off)||||1.5|−|−||
|~~a~~|Package Mounting Torque|M3 type screw||0.6|0.7|0.9|Nm|



Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. 

5. Allowable r.m.s current depends on the actual conditions. 

6. Flatness tolerance of the heatsink should be within −50 m to +100 m. 

## **ELECTRICAL CHARACTERISTICS** (Tc = 25 C, VDD = 15 V, VBS = 15 V, unless otherwise noted) (Note 7) 

|Ices<br>~~ns~~<br>~~fo~~|Collector-Emitter Leakage<br>Current<br>~~ns~~<br>~~fo~~|Collector-Emitter Leakage<br>Current<br>~~ns~~<br>~~fo~~|Vce = Vces, Tj = 25C<br>~~ns~~<br>|−<br>~~ns~~<br>~~ee~~<br>|−<br>~~ns~~<br>~~ee~~<br>|1<br>~~ns~~<br>|mA<br>~~ns~~<br>|
|---|---|---|---|---|---|---|---|
||||Vce = Vces, Tj = 150C<br>~~ns~~<br>|−<br>~~ns~~<br>~~ee~~<br>|−<br>~~ns~~<br>~~ee~~<br>|10<br>~~ns~~<br>|mA<br>~~ns~~<br>|
|VCE(sat)<br>~~fo~~|Collector-Emitter Saturation<br>Voltage<br>~~fo~~||VDD = VBS = 15 V, IN = 5 V<br>Ic = 50 A, Tj = 25C<br>|−<br>~~ee~~<br>|1.65<br>~~ee~~<br>|2.30<br>|V<br>|
||||VDD = VBS = 15 V, IN = 5 V<br>Ic = 50 A, Tj = 150C<br>|−<br>~~ee~~<br>|1.85<br>~~ee~~<br>|−<br>|V<br>|
|VF<br>|FWDi Forward Voltage<br>||IN = 0 V, Ic = 50 A, Tj = 25C<br>~~OO~~|−<br>~~OO~~|2.00<br>~~OO~~|2.40<br>~~OO~~|V<br>~~OO~~|
||||IN = 0 V, Ic = 50 A, Tj = 150C<br>~~OO~~|−<br>~~OO~~<br>~~re~~|2.00<br>~~OO~~<br>~~a~~|−<br>~~OO~~<br>~~a~~|V<br>~~OO~~|
|ton|Switching Times|High Side|VPN = 300 V, VDD(H) = VDD(L) = 15 V<br>Ic = 50 A, Tj = 25C, IN = 0⇔5 V<br>Inductive Load|0.90<br>~~re~~<br>~~re~~|1.50<br>~~a~~|2.10<br>~~a~~|s|
|tc(on)||||−<br>~~re ~~<br>~~re~~<br>~~re~~|0.40<br> ~~a~~<br>~~ee~~|0.70<br>~~a~~<br>~~ee~~|s<br>~~ee~~|
|toff||||−<br>~~re~~<br>~~re~~<br>~~re~~|1.80<br>~~ee~~<br>~~ee~~|2.40<br>~~ee~~<br>~~ee~~|s<br>~~ee~~<br>~~ee~~|
|tc(off)||||−<br>~~re~~<br>~~re~~<br>~~re~~|0.25<br>~~ee~~<br>~~ee~~<br>~~ee~~|0.75<br>~~ee~~<br>~~ee~~<br>~~ee~~|s<br>~~ee~~<br>~~ee~~<br>~~ee~~|
|trr||||−<br>~~re~~<br>~~re~~<br>~~re~~|0.25<br>~~ee~~<br>~~ee~~<br>~~ee~~|−<br>~~ee~~<br>~~ee~~<br>~~ee~~|s<br>~~ee~~<br>~~ee~~<br>~~ee~~|
|ton||Low Side|VPN = 300 V, VDD(H) = VDD(L) = 15 V<br>Ic = 50 A, Tj = 25C, IN = 0⇔5 V<br>Inductive Load|0.90<br>~~re~~<br>~~re~~<br>~~re~~|1.50<br>~~ee~~<br>~~ee~~<br>~~ee~~|2.10<br>~~ee~~<br>~~ee~~<br>~~es~~|s<br>~~ee~~<br>~~ee~~|
|tc(on)||||−<br>~~re~~<br>~~re~~<br>~~re~~|0.30<br>~~ee~~<br>~~ee~~<br>~~ee~~|0.60<br>~~ee~~<br>~~es~~<br>~~ee~~|s<br>~~ee~~<br>~~ee~~|
|toff<br>~~_——~~||||−<br>~~re ~~<br>~~re~~<br>~~re~~|1.70<br> ~~ee ~~<br>~~ee~~<br>~~ee~~|2.30<br> ~~es~~<br>~~ee~~<br>~~ee~~|s<br>~~ee~~<br>~~ee~~|
|tc(off)<br>~~_——~~||||−<br>~~re~~<br>~~re~~|0.25<br>~~ee~~<br>~~ee~~|0.75<br>~~ee~~<br>~~ee~~|s<br>~~ee~~<br>~~ee~~|
|trr<br>~~_——~~||||−<br>~~re~~<br>~~a~~|0.25<br>~~ee~~<br>~~a~~|−<br>~~ee~~<br>~~a~~|s<br>~~ee~~<br>~~a~~|



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## **NFAM5065L4BBA** 

**ELECTRICAL CHARACTERISTICS** (Tc = 25 C, VDD = 15 V, VBS = 15 V, unless otherwise noted) (Note 7) (continued) 

|IQDDH<br>~~jj~~|Quiescent VDD Supply<br>Current<br>~~jj~~<br>~~ff~~|VDD(UH,VH,WH) = 15 V,<br>HIN(U,V,W) = 0 V<br>~~ff~~|VDD(UH)−VSS<br>VDD(VH)−VSS<br>VDD(WH)−VSS<br>~~fffit~~|−<br>~~fit~~|−<br>~~fit~~|0.30<br>~~te~~|mA<br>~~te~~|
|---|---|---|---|---|---|---|---|
|IQDDL<br>~~jj~~||VDD(L) = 15 V,<br>LIN(U,V,W) = 0 V<br>~~ff~~|VDD(L)−VSS<br>~~fffit~~|−<br>~~fit~~|−<br>~~fit~~|3.50<br>~~te~~|mA<br>~~te~~|
|IPDDH<br>~~jj~~<br>~~eee~~|Operating VDD Supply<br>Current<br>~~jj~~<br>~~ff~~<br>~~eee~~|VDD(UH,VH,WH) = 15 V,<br>fPWM = 20 kHz, Duty =<br>50%, Applied to one PWM<br>Signal Input for High-Side<br>~~ff~~<br>~~eee~~|VDD(UH)−VSS<br>VDD(VH)−VSS<br>VDD(WH)−VSS<br>~~ff fit~~<br>~~eee~~|−<br>~~fit~~<br>~~eee~~|−<br>~~fit ~~<br>~~eee~~|0.40<br> ~~te~~<br>~~eee~~|mA<br>~~te~~<br>~~eee~~|
|IPDDL<br>~~eee~~||VDD(L) = 15 V,<br>fPWM = 20 kHz, Duty =<br>50%, Applied to one PWM<br>Signal Input for Low-Side<br>~~eee~~<br>~~ee~~|VDD(L)−VSS<br>~~eee~~<br>~~eee~~|−<br>~~eee~~<br>~~eee~~|−<br>~~eee~~<br>~~eee~~|6.00<br>~~eee~~<br>~~eee~~|mA<br>~~eee~~<br>~~eee~~|
|IQBS<br>~~ee~~|Quiescent VBS Supply<br>Current<br>~~ee~~|VBS = 15 V,<br>HIN(U,V,W) = 0 V<br>~~ee~~<br>~~ee~~|VB(U)−VS(U)<br>VB(V)−VS(V)<br>VB(W)−VS(W)<br>~~ee~~<br>~~eee~~|−<br>~~ee~~<br>~~eee~~|−<br>~~ee~~<br>~~eee~~|0.30<br>~~ee~~<br>~~eee~~|mA<br>~~ee~~<br>~~eee~~|
|IPBS<br>~~rs~~|Operating VBS Supply<br>Current|VDD = VBS = 15 V,<br>fPWM = 20 kHz, Duty =<br>50%, Applied to one PWM<br>Signal Input for High-Side<br>~~ee ~~<br>~~A~~|VB(U)−VS(U)<br>VB(V)−VS(V)<br>VB(W)−VS(W)<br> ~~eee~~|−<br>~~eee~~<br>~~er~~|−<br>~~eee~~<br>~~er ee~~|5.00<br>~~eee~~<br>~~ee~~|mA<br>~~eee~~<br>~~ee~~|
|VIN(ON)<br>~~es~~<br>~~rs~~<br>~~a~~|ON Threshold Voltage<br>~~es~~|HIN(U,V,W)−VSS, LIN(U,V,W)−VSS<br>~~es~~<br>~~A~~||−<br>~~es~~<br>~~er~~<br>~~es~~|−<br>~~es~~<br>~~er ee~~|2.6<br>~~es~~<br>~~ee~~|V<br>~~es~~<br>~~ee~~|
|VIN(OFF)<br>~~es~~<br>~~rs~~<br>~~a~~|OFF Threshold Voltage<br>~~es~~|||0.8<br>~~es~~<br>~~er~~<br>~~es~~|−<br>~~es~~<br>~~er ee~~|−<br>~~es~~<br>~~ee~~|V<br>~~es~~<br>~~ee~~|
|VCIN(ref)<br>~~rs~~<br>~~a—~~|Short Circuit Trip Level<br>~~SS —_~~|VDD = 15 V, CIN−VSS<br>~~A~~<br>~~—_~~||0.46<br>~~er~~<br>~~es~~<br>~~—_~~|0.48<br>~~er ee~~|0.50<br>~~ee~~|V<br>~~ee~~|
|UVDDD<br>~~—~~|Supply Circuit<br>Under-Voltage Protection<br>~~SS —_~~<br>~~I~~<br>~~I~~<br>~~a~~|Detection Level<br>~~—_~~||10.3<br>~~—_~~|−|12.5|V|
|UVDDR<br>~~—~~<br>~~I~~||Reset Level<br>~~—_~~<br>~~I~~<br>~~a~~||10.8<br>~~—_~~<br>~~I~~<br>~~a~~|−<br>~~I~~<br>~~a~~|13.0<br>~~I~~<br>~~a~~|V<br>~~I~~<br>~~a~~|
|UVBSD<br>~~—~~<br>~~I~~||Detection Level<br>~~—_~~<br>~~I~~<br>~~a~~||10.0<br>~~—_~~<br>~~I~~<br>~~a~~|−<br>~~I~~<br>~~a~~|12.0<br>~~I~~<br>~~a~~|V<br>~~I~~<br>~~a~~|
|UVBSR<br>~~—~~<br>~~a~~||Reset Level<br>~~—_~~<br>~~a~~<br>~~a~~||10.5<br>~~—_~~<br>~~a~~<br>~~a~~|−<br>~~a~~<br>~~a~~|12.5<br>~~a~~<br>~~a~~|V<br>~~a~~<br>~~a~~|
|VTS<br>~~—~~<br>~~a~~|Voltage Output for LVIC<br>Temperature Sensing Unit<br>~~SS —_~~<br>~~a~~<br>~~ee~~|VTS−VSS = 10 nF, Temp. = 25C (Note 10)<br>~~—_~~<br>~~a~~<br>~~ee~~||1.145<br>~~—_~~<br>~~a~~<br>~~ee~~|1.250<br>~~a~~<br>~~ee~~|1.380<br>~~a~~<br>~~ee~~|V<br>~~a~~<br>~~ee~~|
|VFOH<br>~~eee~~|Fault Output Voltage<br>~~eee~~|VDD = 0 V, CIN = 0 V,<br>VFO Circuit: 10 k to 5 V Pull-up<br>~~eee~~||4.9<br>~~eee~~|−<br>~~eee~~|−<br>~~eee~~|V<br>~~eee~~|
|VFOL<br>~~eee~~<br>~~|~~||VDD = 0 V, CIN = 1 V,<br>VFO Circuit: 10 k to 5 V Pull-up<br>~~eee~~<br>~~poe~~||−<br>~~eee~~<br>~~poe~~|−<br>~~eee~~<br>~~poe~~|0.95<br>~~eee~~<br>~~poe~~|V<br>~~eee~~<br>~~poe~~|
|tFOD<br>~~a~~|Fault-Output Pulse Width|CFOD = 22 nF||1.6|2.4|−|ms|



8. The fault -out pulse width tFOD depends on the capacitance value of CFOD according to the following approximate equation: tFOD = 0.11  10[6]  CFOD (s). 

9. Values based on design and/or characterization. 

10.VTS is only for sensing temperature of LVIC and can not shutdown IGBTs automatically. To get linear VTS output voltage at low temperature below room temperature, 5 k pull down resistor should be inserted between VTS and VSS. 

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4.0<br>3.5<br>TOOT<br>3.0<br>CCC eee<br>2.5<br>CT eer<br>2.0<br>eet<br>1.5 eer TTT<br>1.0 PEC<br>40 45 50 55 60 65 70 75 80 85 90 95 100 105 110 115 120 125 130<br>LVIC Temperature ( C)<br>VTS Output Voltage (V)<br>**----- End of picture text -----**<br>


**Figure 4. Temperature of LVIC versus VTS Characteristics** 

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## **REVISION HISTORY** 

|**Revision**|**Description of Changes**|**Date**|
|---|---|---|
|2|Updated MIN limit spec of VTS item in the Electrical Characteristics Table (DRIVER SECTION)<br>on page 7.|7/1/2025|



This document has undergone updates prior to the inclusion of this revision history table. The changes tracked here only reflect updates made on the noted approval dates. 

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MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

## **DIP39, 54.50x31.00x5.60, 1.78P EP−2** CASE MODGX ISSUE B 

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GENERIC<br>MARKING DIAGRAM*<br>XXXXXXXXXXXXXXXXX<br>ZZZATYWW<br>2D<br>CODE<br>XXXXX = Specific Device Code<br>ZZZ      = Assembly Lot Code *This information is generic. Please refer to device data<br>AT        = Assembly & Test Location sheet for actual part marking. Pb−Free indicator, “G” or<br>Y          = Year microdot “ ”, may or may not be present. Some products<br>WW     = Work Week may not follow the Generic Marking.<br>Electronic versions are uncontrolled except when accessed directly from the Document Repository.<br>98AON05290H Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red.<br>DESCRIPTION: DIP39, 54.50x31.00x5.60, 1.78P EP−2 PAGE 1 OF 1<br>**----- End of picture text -----**<br>


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