NCL30170ADR2G

## NCL30170 

## Direct AC Drive LED Driver for Power Factor Correction and Precise Constant Current Regulation 

The NCL30170 is a linear regulating constant current LED controller in smart lighting and phase−cut dimming application. The controller manages multiple series LED current in ON Semiconductor’s proprietary auto−commutation topology with high CC regulation accuracy and superior performance in PF and THD. 

The device provides wide analog dimming range with linear dimming curve and low current consumption in the standby mode. In phase−cut dimming application, input current shape modulation provides both good PF and excellent dimmer compatibility. Self−biasing high−voltage regulator supplies stable IC bias voltage with fast startup time. The NCL30170 has several protections such as thermal shutdown, input over voltage protection, sensing resistor short protection and LED over current limit for high system reliability. 

## **Features** 

- Accurate CC Regulation by Closed Loop Control 

- High PF and Low THD: 0.99 PF and less than 10% THD 

- Wide Analog Dimming down to 5% 

- Input Voltage and Current Modulation for High Phase−cut Dimmer Compatibility 

- Low System BOM 

- High Voltage Startup 

## **www.onsemi.com** 

**==> picture [50 x 27] intentionally omitted <==**

**----- Start of picture text -----**<br>
SOIC10<br>R2 SUFFIX<br>CASE 751EE<br>**----- End of picture text -----**<br>


## **MARKING DIAGRAM** 

**==> picture [137 x 120] intentionally omitted <==**

**----- Start of picture text -----**<br>
ZXYKK<br>NCL30170P<br>NCL30170 = Specific Device Code<br>Z = Plant Code<br>X = 1 Digit Year Code<br>Y = 1 Digit Week Code<br>KK = 2 Digit Lot Traceability Code<br>P = Product Option<br>= (A = HVDIM, B = LVDIM)<br>**----- End of picture text -----**<br>


- Flexible Selection of the Number of LED Channels 

- Wide Range Power Design in 5 ~ 300 W with Single Controller 

- Robust Protection Features 

   - ♦ Input Over Voltage Protection 

   - ♦ Sensing Resistor Short Protection 

   - ♦ Thermal Shutdown 

- These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant 

## **Typical Applications** 

## **PIN CONNECTIONS** 

**==> picture [110 x 76] intentionally omitted <==**

**----- Start of picture text -----**<br>
HV 1 VDD<br>NC VIN<br>BLD OUT<br>DIM GND<br>FB CS<br>(Top View)<br>**----- End of picture text -----**<br>


- LED Lighting System 

## **ORDERING INFORMATION** 

See detailed ordering, marking and shipping information on page 12 of this data sheet. 

Publication Order Number: 

**1** 

© Semiconductor Components Industries, LLC, 2018 **December, 2018 − Rev. 0** 

**NCL30170/D** 

**NCL30170** 

**==> picture [482 x 216] intentionally omitted <==**

**----- Start of picture text -----**<br>
Option for<br>Phase−cut<br>dimming<br>AC Input<br>HV VDD<br>NC VIN<br>Option for<br>Analog dimming BLD OUT<br>ADIM signal<br>GND<br>DIM<br>Option for<br>Phase−cut dimming<br>FB CS<br>**----- End of picture text -----**<br>


**Figure 1. Application Schematic** 

**==> picture [460 x 291] intentionally omitted <==**

**----- Start of picture text -----**<br>
HV<br>1 Mode<br>VDD ref. detector<br>SB<br>NC generator<br>2<br>VIN.TH BLD<br>3 BLD<br>CS controller<br>VDD<br>10<br>VDD.ON<br>16 V / 8 V<br>Voltage<br>GND<br>7 VV CS (SHACS (SHA −REF )−MAX ) Amplifier 8 OUT<br>TJ Thermal shutdown<br>CS Sensing Resistor Short RESET VCS (SHA −MAX ) VIN.TH 1 uA<br>Protection generator CS<br>6<br>VIN over voltage<br>protection DIM<br>VIN.TH<br>DIM V CS (SHA −REF )<br>generator<br>OTA<br>VIN<br>9 V CS (AVG −REF ) 10 uA<br>V CS (AVG −REF ) generator<br>VIN.TH FB SB<br>VVIN (TH ) adjustment V DIM (SB ) (Standby)<br>0.3/0.15 V<br>5 4<br>FB DIM<br>**----- End of picture text -----**<br>


**Figure 2. Simplified Block Diagram** 

**www.onsemi.com** 

**2** 

**NCL30170** 

## **Table 1. PIN FUNCTION DESCRIPTION** 

|**Pin No.**|**Pin Name**|**Function**|**Description**|
|---|---|---|---|
|1|HV|High Voltage Startup|This pin is connected to the rectified input voltage for fast startup and self biasing.|
|2|NC|No Connection||
|3|BLD|Bleeding Control|This pin controls the external bleeding MOSFET for phase−cut dimming.|
|4|DIM|Dimming Input|Analog dimming signal is provided to this pin. In phase−cut dimming, this pin is<br>connected to a resistor and a capacitor in parallel to obtain phase angle information.|
|5|FB|Feedback|This pin is connected to the compensation network.|
|6|CS|Current Sense|This pin monitors LED current.|
|7|GND|Ground.|The controller ground.|
|8|OUT|Output Drive|This pin is connected to drive external regulator switch.|
|9|VIN|Input Voltage Detection|This pin is connected to the resistive divider to detect input voltage.|
|10|VDD|Power Supply|This pin voltage is regulated by internal self biasing HV supply.|



## **Table 2. NCL30170 VERSION** 

|**Table 2. NCL30170 VERSION**||
|---|---|
|**Part Number**|**Description**|
|**NCL30170ADR2G**|Option A: HVDIM version has analog DIM voltage control in 0 ~ 3 V.|
|**NCL30170BDR2G**|Option B: LVDIM version has analog DIM voltage control in 0 ~ 1.5 V.|



## **Table 3. MAXIMUM RATINGS** 

|**Table 3. MAXIMUM RATINGS**||||
|---|---|---|---|
|**Rating**|**Symbol**|**Value**|**Unit**|
|HV Pin Voltage Range|VHV(MAX)|560|V|
|VDD, BLD, OUT, VIN Pin Voltage Range|VMV(MAX)|−0.3 to 26|V|
|FB, DIM, CS Pin Voltage Range|VLV(MAX)|−0.3 to 6|V|
|CS Pin Negative Pulse Voltage at ILV< 0.2 A and tPULSE< 5�s|VLV(PULSE)|−1.5|V|
|Maximum Power Dissipation (TA< 50°C)|PD(MAX)|663|mW|
|Maximum Junction Temperature|TJ(max)|150|°C|
|Storage Temperature Range|TSTG|−55 to 150|°C|
|Junction−to−Ambient Thermal Impedance|RθJA|158|°C/W|
|Junction−to−Case Thermal Impedance|RθJC|39|°C/W|
|ESD Capability, Human Body Model (Note 1)|ESDHBM|1.5|kV|
|ESD Capability, Charged Device Model (Note 1)|ESDCDM|1.0|kV|



Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 

1. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114) ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115) 

Latchup Current Maximum Rating: � 150 mA per JEDEC standard: JESD78 

## **Table 4. RECOMMENDED OPERATING RANGES** 

|**Table 4. RECOMMENDED OPERATING RANGES**|||||
|---|---|---|---|---|
|**Rating**|**Symbol**|**Min**|**Max**|**Unit**|
|Junction Temperature|TJ|−40|125|°C|



Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. 

**www.onsemi.com** 

**3** 

## **NCL30170** 

**Table 5. ELECTRICAL CHARACTERISTICS** VDD = 20 V and TJ = −40 ~ 125 ° C unless otherwise specified 

|**Table 5. ELECTRICAL CHARACTER**|**ISTICS**VDD= 20 V and TJ= −40 ~ 12|5°C unless otherw|ise specifi|ed|||
|---|---|---|---|---|---|---|
|**Parameter**|**Test Conditions**|**Symbol**|**Min**|**Typ**|**Max**|**Unit**|
|**VDD SECTION**|||||||
|VDD Regulation Voltage|VHV= 80 V|VDD(REG)|19.5|20|20.5|V|
|VDD Regulation High Voltage at Standby|VHV= 80 V , VDIM= 0 V|VDD(SB−H)|9.5|10|10.5|V|
|VDD Regulation Low Voltage at Standby|VHV= 80 V , VDIM= 0 V|VDD(SB−L)|9.0|9.5|10.0|V|
|IC Turn−On Threshold Voltage||VDD(ON)|15|16|17|V|
|IC Turn−Off Threshold Voltage||VDD(OFF)|7|8|9|V|
|Startup HV Current|VHV= 80 V, VDD= VDD(ON)− 1.6 V|IDD(ST−HV)|1.35|||mA|
|Startup Current|VHV= 80 V, VDD= VDD(ON)− 1.6 V|IDD(ST)||90|200|�A|
|Operating Current|VHV= 80 V|IDD(OP)||0.8|1.2|mA|
|Standby Current|VHV= 80 V, TJ= 25°C|IDD(SB)|||250|�A|
|**DIM SECTION**|||||||
|DIM Sourcing Current|VDIM= 3.5 V|IDIM|9|10|11|�A|
|DIM Voltage for 99% VCS(AVG−REF)at<br>HVDIM||VDIM(MAX−EFF−HV)|2.91|2.97|3.03|V|
|DIM Voltage for 99% VCS(AVG−REF)at<br>LVDIM||VDIM(MAX−EFF−LV)||1.488||V|
|Standby Enabling DIM Voltage at HVDIM|A version|VDIM(SB−ENA−HV)|0.15|0.2|0.25|V|
|Standby Disabling DIM Voltage at HVDIM|A version|VDIM(SB−DIS−HV)|0.25|0.3|0.35|V|
|Standby Enabling DIM Voltage at LVDIM|B version|VDIM(SB−ENA−LV)||0.1||V|
|Standby Disabling DIM Voltage at LVDIM|B version|VDIM(SB−DIS−LV)||0.2||V|
|Standby Delay Time||tSB(DELAY)||10||ms|
|**CS SECTION**|||||||
|CS Average Regulation Voltage at HVDIM<br>(Test in closed loop CC regulation)|A version<br>VDIM= 3.1 V<br>VDIM= 3.1 V (Note 2)<br>VDIM= 1.0 V<br>VDIM= 1.0 V (Note 2)<br>VDIM= 0.3 V (TJ= 25°C)<br>VDIM= 0.3 V (TJ= 25°C) (Note 2)|VCS(AVG−REG−HV)|1.432<br>1.455<br>0.253<br>0.265<br>0.025<br>0.043|1.500<br>1.500<br>0.300<br>0.300<br>0.050<br>0.050|1.568<br>1.545<br>0.347<br>0.335<br>0.075<br>0.057|V|
|CS Average Regulation Voltage at LVDIM<br>(Test in closed loop CC regulation)|B version<br>VDIM= 1.6 V<br>VDIM= 0.54 V<br>VDIM= 0.2 V|VCS(AVG−REG−LV)||1.500<br>0.300<br>0.050||V|
|Temperature Coefficient of CS Regulation|VDIM= 0.3 V A Ver. Design guaran-<br>teed|TCVCS(AVG−REG)|−180||+180|�V/°C|
|CS Source Current||ICS(SOURCE)|0.7|1.0|1.3|�A|
|**FB SECTION**|||||||
|FB OTA Sink Current|VCS= 2.5 V|IFB(SINK)|26|34|47|�A|
|FB OTA Source Current|VCS= 0.5 V|IFB(SOURCE)|26|34|47|�A|
|FB OTA Transconductance||gM(FB)|26|34|47|�mho|
|FB OTA High Voltage|VDIM= 3.3 V, VCS= 0.5 V|VFB(HIGH)|4.7|||V|
|FB OTA Low Voltage|VDIM= 3.3 V, VCS= 2.5 V|VFB(LOW)|||0.1|V|
|FB Clamping Voltage at PCDIM||VFB(CLP−PC)|1.7|1.8|1.9|V|



2. Drift after IC reliability test (HTOL, HOSL, TMCL, HAST) is not included. 

3. If over−temperature protection is activated, the power system enters Protection Mode and output is disabled. Device operation above the maximum junction temperature is not guaranteed. 

**www.onsemi.com** 

**4** 

**NCL30170** 

**Table 5. ELECTRICAL CHARACTERISTICS** VDD = 20 V and TJ = −40 ~ 125 ° C unless otherwise specified 

|**Table 5. ELECTRICAL CHARACTER**|**ISTICS**VDD= 20 V and TJ= −40 ~ 12|5°C unless otherw|ise specifi|ed|||
|---|---|---|---|---|---|---|
|**Parameter**|**Test Conditions**|**Symbol**|**Min**|**Typ**|**Max**|**Unit**|
|**VIN SECTION**|||||||
|VIN−TH High Threshold||VVIN(TH−H)|0.25|0.30|0.35|V|
|VIN−TH Low Threshold||VVIN(TH−L)|0.10|0.15|0.20|V|
|**OUT SECTION**|||||||
|OUT Voltage High||VOUT(H)|19|||V|
|OUT Voltage Low||VOUT(L)|||1|V|
|Voltage Amplifier Input Offset||VOUT(OFFSET)|||10|mV|
|Voltage Amplifier Open Loop Gain|Design guaranteed|AVA(OPEN)||100||dB|
|Voltage Amplifier Bandwidth|Design guaranteed|fVA(BW)||190||kHz|
|**BLD SECTION**|||||||
|BLD Reset Time||tBLD(RST)|56|80|104|�s|
|Phase Cut DIM Mode Monitoring Time||tBLD(PCDIM)|3.5|5.0|6.8|�s|
|Phase Cut DIM Mode Monitoring Voltage||VBLD(PCDIM)|2.75|3.25|3.75|V|
|Internal BLD Resistance||RBLD|85|110|135|k�|
|BLD Enabling CS Voltage||VCS(BLD)|150|200|250|mV|
|**PROTECTION SECTION**|||||||
|Thermal Shut Down Temperature|Design guaranteed (Note 3)|TSD|145|160|175|°C|
|Thermal Shut Down Hysteresis|Design guaranteed|TSD(HYS)||30||°C|
|Input Over Voltage Protection Threshold||VVIN(OVP)|3.5|4.0|4.5|V|
|Sensing Resistor Short Current||ISRSP|30||90|mA|
|Sensing Resistor Short Voltage||VSRSP|60|100|140|mV|



2. Drift after IC reliability test (HTOL, HOSL, TMCL, HAST) is not included. 

3. If over−temperature protection is activated, the power system enters Protection Mode and output is disabled. Device operation above the maximum junction temperature is not guaranteed. 

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 

**www.onsemi.com** 

**5** 

**NCL30170** 

## **TYPICAL CHARACTERISTICS** 

**==> picture [243 x 173] intentionally omitted <==**

**----- Start of picture text -----**<br>
22.0<br>21.5<br>21.0<br>20.5<br>20.0<br>19.5<br>19.0<br>18.5<br>18.0<br>−40 −20 0 20 40 60 80 100 120 140<br>TJ, JUNCTION TEMPERATURE ( ° C)<br> (V)<br>DD(REG)<br>V<br>**----- End of picture text -----**<br>


**Figure 3. VDD(REG) vs. Temperature** 

**==> picture [239 x 173] intentionally omitted <==**

**----- Start of picture text -----**<br>
17.0<br>16.8<br>16.6<br>16.4<br>16.2<br>16.0<br>15.8<br>15.6<br>15.4<br>15.2<br>15.0<br>−40 −20 0 20 40 60 80 100 120 140<br>TJ, JUNCTION TEMPERATURE ( ° C)<br> (V)<br>DD(ON)<br>V<br>**----- End of picture text -----**<br>


**Figure 4. VDD(ON) vs. Temperature** 

**==> picture [243 x 172] intentionally omitted <==**

**----- Start of picture text -----**<br>
9.0<br>8.8<br>8.6<br>8.4<br>8.2<br>8.0<br>7.8<br>7.6<br>7.4<br>7.2<br>7.0<br>−40 −20 0 20 40 60 80 100 120 140<br>TJ, JUNCTION TEMPERATURE ( ° C)<br> (V)<br>DD(OFF)<br>V<br>**----- End of picture text -----**<br>


**Figure 5. VDD(OFF) vs. Temperature** 

**==> picture [239 x 173] intentionally omitted <==**

**----- Start of picture text -----**<br>
0.90<br>0.88<br>0.86<br>0.84<br>0.82<br>0.80<br>0.78<br>0.76<br>0.74<br>0.72<br>0.70<br>−40 −20 0 20 40 60 80 100 120 140<br>TJ, JUNCTION TEMPERATURE ( ° C)<br> (mA)<br>IDD(OP)<br>**----- End of picture text -----**<br>


**Figure 6. IDD(OP) vs. Temperature** 

**==> picture [490 x 172] intentionally omitted <==**

**----- Start of picture text -----**<br>
250 12.0<br>240<br>11.5<br>230<br>11.0<br>220<br>10.5<br>210<br>200 10.0<br>190<br>9.5<br>180<br>9.0<br>170<br>160 8.5<br>150 8.0<br>−40 −20 0 20 40 60 80 100 120 140 −40 −20 0 20 40 60 80 100 120 140<br>TJ, JUNCTION TEMPERATURE ( ° C) TJ, JUNCTION TEMPERATURE ( ° C)<br>A)<br>� A)<br> ( �<br> (<br>IDIM<br>IDD(SB)<br>**----- End of picture text -----**<br>


**Figure 7. IDD(SB) vs. Temperature** 

**Figure 8. IDIM vs. Temperature** 

**www.onsemi.com** 

**6** 

**NCL30170** 

## **APPLICATION INFORMATION** 

## **General** 

NCL30170 provides accurate LED current regulation with good PF and THD in ON Semiconductor’s proprietary auto−commutation topology. The number of LED current regulation channels is flexibly selected with single controller. By selecting different values of external resistor and capacitor at DIM pin, either analog dimming or phase−cut dimming is easily implemented. Self−biasing HV supply shortens startup time with no external components and standby power consumption is minimized by reducing the operating current. 

## **ON Semiconductor’s Auto Commutation Topology** 

By adding cost effective HV diode between series switch connection, auto commutation in each LED channels is easily implemented in ON Semiconductor’s proprietary topology. User can choose the number of LED channels based on the trade−off of system BOM and efficiency. 

## **Power Factor Correction** 

Different from stepped input current in conventional parallel topology, NCL30170 in new parallel topology provides excellent sinusoidal input current shape with 0.99 PF and less than 10% THD. 

## **Constant Current Regulation** 

Averaged input current is precisely regulated by closed loop control which minimizes CC tolerance in mains line variation. 

## **Analog Dimming** 

NCL30170 features wide analog dimming down to 5%. The dimming curve is linear and IC to IC tolerance is small by high resolution trimming in max and min VDIM conditions. 

## **Low Standby Power** 

When DIM pin voltage is close to 0 V, standby mode is entered and most of the internal biasing blocks are turned off 

to minimize standby power. Also, VDD regulation voltage is dropped from 20 V to 10 V and internal HV supply headroom loss will be almost zero if there is external supply voltage (around 15 V) connection through diode to VDD pin. 

## **Phase−cut Dimming** 

As phase angle is reduced, input current is smoothly changed to flat shape from sinusoidal shape. In the low phase angle range, the flattened input current is maintained higher than TRIAC holding current. When input voltage is less than first LED channel voltage and CS voltage is close to 0 V, BLD pin controls external bleeding MOSFET so that input voltage softly reaches to 0 V and maintains close to 0 V during phase−cut condition. The input current shape and bleeding current control performs high dimmer compatibility. 

## **High Voltage Startup** 

Internal HV startup fastens startup time less than 0.2 sec with no external components. 

## **Input Over Voltage Protection** 

When VIN pin voltage is higher than 4 V, OUT pin voltage is pulled down and external linear regulator switches are protected from thermal stress by large headroom loss. 

## **Thermal Shut Down** 

Protection is triggered when the internal junction temperature reaches to 150°C and normal startup begins once the temperature comes down to 120°C. 

## **Sensing Resistor Short Protection** 

Short circuit of a sensing resistor makes severe over current at LED loads by losing close loop regulation. At startup, CS pin short is monitored by sourcing large current into external sensing resistor and protection is triggered if CS pin voltage is lower than SRSP threshold voltage. 

**www.onsemi.com** 

**7** 

**NCL30170** 

## **Direct AC Driver Topology** 

NCL30170 controls multiple LED channels in new Direct AC Drive parallel topology. In the configuration, HV blocking diodes are connected between SW(n) source and SW(n+1) drain. As input voltage increases, the HV diodes are turned off one by one in auto commutation of the ambient switches. Therefore, one main amplifier controls all the channel current with one reference. The amplifier CS shaping reference, VCS(SHA−REF), is sinusoidal so that the input current is optimally sinusoidal with 0.99 PF and less than 10% THD compared to the conventional parallel topology which hardly meets THD in class C due to the stepped input current. 24 V zener diodes are added at gate to source node of each switch except for the last channel switch so that gate to source voltage is maintained under maximum voltage rating specified in the external switch datasheet. 

**==> picture [227 x 88] intentionally omitted <==**

**----- Start of picture text -----**<br>
LED1 LED2 LED3 LED4<br>AC Input<br>SW1 SW2 SW3 SW4<br>Voltage amp .<br>VCS(SHA−REF) OUT<br>CS<br>**----- End of picture text -----**<br>


## **Figure 9. ON Semiconductor’s Proprietary DACD Topology** 

## **Current Regulation and Power Factor Correction** 

An LED current is constantly regulated in the closed feedback loop. The LED current is detected through CS pin and CS voltage is compared with VCS(AVG−REF) reference by internal OTA which generates FB voltage in a narrow bandwidth due to an external large compensation capacitor, CFB. In the closed loop, averaged CS voltage is accurately regulated same as VCS(AVG−REF) thanks to a minimized input voltage offset of OTA which is obtained by high resolution trimming done in mass production. 

**==> picture [228 x 130] intentionally omitted <==**

**----- Start of picture text -----**<br>
Voltage LED<br>Rectified Amplifier load<br>Vin V CS (SHA −REF) OUT<br>VCS (SHA −REF) CS<br>generator<br>OTA<br>VIN RCS<br>V CS(AVG −REF)<br>FB<br>C FB<br>**----- End of picture text -----**<br>


**Figure 10. LED Current Regulation** 

An input current in the driver flows through CS sensing resistor, RCS. Therefore, sinusoidal CS voltage shape in a half line period makes sinusoidal input current with ideal power factor correction. In order to obtain the excellent PF 

and THD, CS voltage shape is controlled by a voltage amplifier and the voltage amplifier reference, VCS(SHA−REF), is set by VIN and FB signals. VIN voltage comes from a resistive divider detecting a rectified Vin. VCS(SHA−REF) generator outputs VCS(SHA−REF) which is a sum of VIN voltage and a voltage offset controlled by the FB voltage. As line voltage increases, FB voltage is reduced to keep the same CS average voltage by OTA and VCS(SHA−REF) voltage offset is reduced accordingly. 

## **Mode Detection** 

NCL30170 provides two dimming modes, ADIM (Analog Dimming Mode) and PCDIM (Phase−Cut Dimming Mode). The dimming mode is set before current regulation starts and NCL30170 operates differently in each dimming mode for the optimized dimming control. 

BLD voltage is pulled up to VDD during UVLO state and pulled down for 80 us once VDD is higher than VDD.ON threshold. After 80 us tBLD(RST), BLD pin is pulled up by internal 110 k� RBLD for 5 us tBLD(PCDIM). If BLD voltage is less than 3.25 V V threshold in the end of BLD(PCDIM) tBLD(PCDIM) by a large capacitor over 500 pF in an external bleeding circuit for PCDIM,  dimming mode is set by PCDIM. If not, operation begins in ADIM mode. In order to set ADIM mode, BLD pin is open or connected to a filtering capacitor less than 50 pF. 

**==> picture [227 x 140] intentionally omitted <==**

**----- Start of picture text -----**<br>
BLD<br>ADIM<br>VBLD(PCDIM )<br>3.25 V PCDIM<br>VDD.ON<br>tBLD( RST ) 80 us<br>t BLD(PCDIM )<br>5 us<br>**----- End of picture text -----**<br>


**Figure 11. Mode Detection** 

## **Analog Dimming** 

Analog dimming is controlled by DC DIM voltage supplied from external dimming control signal. For a resistor controlled analog dimming, a variable resistor is connected to DIM pin in which 10 uA DIM internal current source and the variable resistor sets the DIM voltage. 

As DIM voltage is reduced, VCS(AVG−REF) is reduced accordingly. As VCS(AVG−REF) decreases, FB voltage is also reduced and VCS(SHA−REF) has more negative offset voltage from VIN pin voltage. 

When dimming signal is generated by an MCU, maximum dimming voltage is dependent on Vcc (3.3 V or 1.6 V) of the selected MCU. Therefore, two versions of NCL30170 are provided as shown in Figure 12. In A version, DIM range is up to 3 V and standby is enabled when 

**www.onsemi.com** 

**8** 

**NCL30170** 

DIM voltage is lower than 0.2/0.3 V. B version provides dimming range in 0 ~ 1.5 V DIM voltage with 0.1/0.2 V standby threshold voltage, VDIM(SB). In both options, VCS(AVG−REF) is in between 50 mV and 1.5 V so that min LED brightness is less than 5% of maximum light output. 

When DIM voltage is lower than VDIM(SB) for 10 ms tSB(DELAY), standby mode is entered and IC operating current drops less than 300 �A. 

**==> picture [230 x 129] intentionally omitted <==**

**----- Start of picture text -----**<br>
A version B version<br>(HVDIM) (LVDIM )<br>1.5 V 1.5 V<br>50 mV 50 mV<br>0.5 V 3 V VDIM 0.3 V 1.5 V VDIM<br>VDIM(SB) : 0.2/0.3 V VDIM(SB) : 0.1/0.2 V<br>CS(AVG−REF) CS(AVG−REF)<br>V V<br>**----- End of picture text -----**<br>


**Figure 12. Analog Dimming Curve** 

## **Phase−Cut Dimming** 

In PCDIM mode, DIM current source is enabled and disabled by VIN.TH signal which is set by hysteretic comparator detecting VIN pin voltage. A time constant of external RDIM and CDIM is around 100 ms so that DIM voltage is almost constant over a half line period. Therefore, DIM voltage level is proportional to the phase angle set by the phase−cut dimmer. 

When VDIM is higher than 3 V, VCS(AVG−REF) is constantly set to 1.5 V and constant light output is obtained in the VDIM range. Also, VCS(SHA−REF) is set to sinusoidal shape dominantly determined by VIN voltage for high PF. As VDIM decreases lower than 3 V, light output is reduced and VCS(SHA−REF) gradually changes from sinusoidal shape to flat shape to perform wide phase−cut dimming range and maintain TRIAC holding current by ON Semiconductor’s proprietary active PCDIM control. 

**==> picture [226 x 94] intentionally omitted <==**

**----- Start of picture text -----**<br>
Rectified Light<br>Vin output<br>10 uA<br>VIN<br>VIN.TH VDIM<br>3 V<br>V VIN(TH)<br>0.3/0.15 V DIM<br>R DIM C DIM 130 180<br>Phase angle [ º ]<br>**----- End of picture text -----**<br>


**Figure 13. PCDIM Operation** 

BLD pin drives external bleeding MOSFET to stabilize phase−cut dimmer during TRIAC turn−off time. At input voltage leading edge, inrush current could come through LED current regulation path and damage LED loads and external regulation switches. Therefore, voltage amplifier output is pulled down during the leading edge and softly rises after several tens of usec to normally regulate LED current. 

## **VDD Supply** 

NCL30170 has internal HV JFET switch to supply VDD current for fast startup and self biasing with no external VDD supply circuitry. Once VDD reaches to 16 V, VDD.ON flag is high and internal operation begins and VDD is regulated at 20 V. After VDD drops lower than 8 V, all operating blocks are shutdown. Blocking diode, DHV, is connected to HV pin to protect reverse current when HV voltage is lower than VDD voltage. 

Once SB (Stand By) flag signal is high as DIM pin voltage is lower than VDIM(SB), IC minimizes operating current less than 300 �A by disabling most of the functional blocks. 

**==> picture [227 x 156] intentionally omitted <==**

**----- Start of picture text -----**<br>
Rectified VIN HV<br>SB<br>DHV<br>20V<br>Aux.<br>power HVSW 10V/9.5V<br>3.3 V 15 V<br>DVDD VDD<br>VDD.ON<br>Option 16 V / VDD.OFF<br>8 V<br>GND<br>DIM<br>Wireless<br>module<br>**----- End of picture text -----**<br>


**Figure 14. VDD Supply** 

In standby mode, VDD regulation voltage drops from 20 V down to 10 V/9.5 V by a hysteretic regulation. In wireless smart dimming application, auxiliary power supply is generally added to provide wireless module operating current. If aux. power could provide another output voltage around 15 V, this voltage can be utilized to supply NCL30170 VDD current through a diode (DVDD in Figure 14) during standby condition in which 300 �A IC standby current is provided from efficient aux. power output, not internal HV regulator. 

## **Protection** 

NCL30170 provides robust protections such as input over voltage, sensing resistor short and over temperature protections for system reliability. 

When input voltage increases out of system input spec, external regulation switches take large amount of headroom loss and those switches can end up with severe damage. In order to protect the input over voltage condition, OUT and FB are pulled down when VIN voltage is higher than 4 V VVIN(OVP). This protection is disabled at PCDIM mode to prevent abnormal triggering caused by a leading edge input voltage spike. 

When sensing resistor is short circuited, voltage amplifier is out of regulation and OUT pin voltage is pulled up with high power consumption in the external regulation switches. So, at the beginning of tBLD(RST), 30 mA ISRSP flows into the external CS sensing resistor and SRSP protection is triggered if CS voltage is not higher than 60 mV VSRSP for 

**www.onsemi.com** 

**9** 

**NCL30170** 

5 �s. Once sensing resistor short protection is triggered, internal timer counts 40 ms and detects CS voltage again with ISRSP and startup begins if CS voltage is higher than VSRSP threshold. 

160ºC, protection is triggered and VDD is regulated at 20 V. If the junction temperature drops lower than 130ºC, startup sequence with mode detection normally begins. 

NCL30170 has thermal shutdown protection by detecting internal junction temperature. When the temperature is over 

## **DESIGN GUIDANCE** 

**==> picture [487 x 334] intentionally omitted <==**

**----- Start of picture text -----**<br>
LED1 LED2 LED3 LED4<br>AC Input CIN 7<br>RVIN1<br>CVIN SW1 DL1 SW2 DL2 SW3 DL3<br>RVIN2<br>ZS1 ZS2 ZS3<br>RHV 3<br>Bleeding CVDD<br>circuit QBLD DHV<br>for PCDIM<br>design<br>6 RBLD2 HV VDD<br>ZDBLD<br>CBLD2 NC VIN<br>DVDD<br>RBLD1<br>CBLD1 BLD OUT ROUT<br>SW4<br>CDIM DIM GND<br>4 5 CCOMP 2 RSOURCE<br>RDIM<br>FB CS RCOMP<br>CFB 1 RCS<br>PG SG<br>(Power GND) (Signal GND)<br>**----- End of picture text -----**<br>


**Figure 15. System Layout** 

## **Noise Immune Layout Guidance** 

1. CS – RCS – GND distance should be short. 

2. OUT – SW4 (Switch in the last channel) – CS distance should be short. 

3. It would be better to have SW1 ~ 3 and DL1 ~ 3 close to SW4. But, those switches shouldn’t be very close due to thermal dissipation. 

4. GND of control circuit (CBLD, CDIM, RDIM, CFB, CVIN, RVIN and CVDD) is closely connected near IC GND pin. 

5. SG and PG are connected near IC GND pin. 

6. RBLD2 and ZDBLD are connected to PG. 

7. RVIN1 is connected to rectified input voltage node behind CIN, not between the bridge diode and CIN. 

## **EMI Improvement** 

1. RCOMP and CCOMP can be optionally added to reduce regulation loop speed. 

2. RSOURCE between SW4 and RCS can be optionally added to reduce input current glitch near input voltage zero cross. 

**www.onsemi.com** 

**10** 

**NCL30170** 

## **PACKAGE DIMENSIONS** 

**SOIC10** CASE 751EE ISSUE O 

**==> picture [66 x 65] intentionally omitted <==**

**==> picture [54 x 70] intentionally omitted <==**

**==> picture [38 x 57] intentionally omitted <==**

**==> picture [49 x 48] intentionally omitted <==**

**==> picture [130 x 50] intentionally omitted <==**

**==> picture [147 x 79] intentionally omitted <==**

**==> picture [167 x 118] intentionally omitted <==**

**==> picture [39 x 37] intentionally omitted <==**

**www.onsemi.com** 

**11** 

**NCL30170** 

## **ORDERING INFORMATION** 

|**ORDERING INFORMATION**|||
|---|---|---|
|**Device**|**Package**|**Shipping**|
|**NCL30170ADR2G**|10 Lead SOIC, JDEC MS−012, 150” Narrow Body|Tape and Reel|
|**NCL30170BDR2G**|10 Lead SOIC, JDEC MS−012, 150” Narrow Body|Tape and Reel|



ON Semiconductor and      are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 

## **PUBLICATION ORDERING INFORMATION** 

**LITERATURE FULFILLMENT** : **N. American Technical Support** : 800−282−9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada 19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA **Europe, Middle East and Africa Technical Support: Phone** : 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 **Fax** : 303−675−2176 or 800−344−3867 Toll Free USA/Canada **Email** : orderlit@onsemi.com 

## **LITERATURE FULFILLMENT** : 

**ON Semiconductor Website** : **www.onsemi.com** 

**Order Literature** : http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative 

◊ 

**NCL30170/D** 

**www.onsemi.com** 

**12**