MP4027GJ-P

## **The Future of Analog IC Technology** 

## _**MP4027**_ **Primary-Side Control, Offline LED Controller with Active PFC, NTC and PWM Dimming** 

## **DESCRIPTION** 

The MP4027 is a primary-side-control, offline LED lighting controller. In a tiny TSOT23-8 package, it achieves high power factor (PF) and accurate LED current for isolated, single-powerstage lighting applications. 

This simplifies LED-lighting-system design significantly by eliminating the secondary-side feedback components and the optocoupler. The MP4027 integrates power factor correction (PFC) and valley switching mode to reduce MOSFET switching losses. 

The MP4027 has NTC function and allows PWM dimming. 

To enhance system reliability and safety, the MP4027 has multiple internally integrated protection features, including over-voltage protection (OVP), short-circuit protection (SCP), primary-side over-current protection (OCP), brown-out protection, over-temperature protection (OTP), cycle-by-cycle current limit, VCC under-voltage lockout (UVLO), and autorestart function. 

## **FEATURES** 

- Real-Current Control without SecondaryFeedback Circuit 

- <2% Line/Load Regulation 

- NTC Thermal Current Fold-Back 

- PWM Dimming Available 

- High PF (≥0.9) over Universal Input Voltage 

- Valley Switching Mode for Improved Efficiency 

- Brown-Out Protection 

- Over-Voltage Protection 

- Short-Circuit Protection 

- Over-Temperature Protection 

- Primary-Side Over-Current Protection 

- Cycle-By-Cycle Current Limit 

- VCC Under-Voltage Lockout Protection 

- Auto-Restart Function 

- Available in TSOT23-8 Package 

## **APPLICATIONS** 

- Solid-State Lighting 

- Industrial and Commercial Lighting 

- Residential Lighting 

All MPS parts are lead-free and adhere to the RoHS directive.  For MPS green status, please visit MPS website under Products, Quality Assurance page. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. 

## **TYPICAL APPLICATION CIRCUIT** 

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**----- Start of picture text -----**<br>
MULT<br>**----- End of picture text -----**<br>


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**MP4027 – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC** 

## **ORDERING INFORMATION** 

|**Part Number**|**Package**|**Top Marking**|
|---|---|---|
|MP4027GJ*****|TSOT23-8|_See Below_|



* For Tape & Reel, add suffix –Z (e.g. MP4027GJ–Z) 

## **TOP MARKING** 

AHK: product code of MP4027GJ; Y: year code. 

## **PACKAGE REFERENCE** 

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TOP VIEW<br>VCC 1 8 GATE<br>MULT 2 7 CS/ZCD<br>NTC 3 6 FB<br>COMP 4 5 GND<br>**----- End of picture text -----**<br>


**TSOT23-8** 

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## **ABSOLUTE MAXIMUM RATINGS[(1)]** 

VCC ..............................................-0.3V to +30V GATE Drive Voltage .....................-0.3V to +17V CS/ZCD .........................................-0.3V to 6.5V Other Analog Inputs and Outputs ..-0.3V to 6.5V Max. GATE Source Current.......................  0.8A Max. GATE Sink Current ............................. -1A Continuous Power Dissipation     (TA = +25°C) **[(2)]** TSOT23-8 ................................................ 1.25W Junction Temperature.............. -40C to +150C Lead Temperature ....................................260°C Storage Temperature............... -65°C to +150°C 

_**Recommended Operating Conditions**_ **[(3)]** Supply Voltage VCC .........................12V to 28V Operating Junction Temp. (TJ). -40°C to +125°C 

_**Thermal Resistance**_ **[(4)]** _**θJA θJC**_ TSOT23-8………………... 100.... 55.. °C/W 

## **Notes:** 

- 1) Exceeding these ratings may damage the device. 

- 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX) = (TJ (MAX)TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 

- 3) The device is not guaranteed to function outside of its operating conditions. 

- 4) Measured on JESD51-7, 4-layer PCB. 

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**MP4027 – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC** 

## **ELECTRICAL CHARACTERISTICS** 

## **Typical values are at VCC = 20V, TJ = +25°C, unless otherwise noted. Minimum and maximum values are at VCC = 20V, TJ = -40°C to +125°C, unless otherwise noted, guaranteed by characterization.** 

|**Parameter**|**Symbol**|**Condition**|**Min**|**Typ**|**Max**|**Units**|
|---|---|---|---|---|---|---|
|**Supply Voltage**|||||||
|OperatingRange|VCC|After turn on|12||28|V|
|Turn-On Threshold|VCCON|VCC risingedge|23.0|25.5|28.0|V|
|Turn-Off Threshold|VCCOFF|VCC fallingedge|8.4|9.5|11.0|V|
|Hysteretic Voltage|VCCHYS||14.2|15.7|17.3|V|
|**Supply Current**|||||||
|Start-UpCurrent|ISTARTUP|VCC= VCCON-1V||20|50|µA|
|Quiescent Current|IQ|No switching||0.6|0.82|mA|
|Operating Current Under Fault<br>Condition||No switching||2||mA|
|OperatingCurrent|ICC|fs=70kHz,CGATE=1nF||2|3|mA|
|**Multiplier**|||||||
|Linear Operation Range|VMULT||0||3|V|
|Gain|K(5)|||1.3||1/V|
|Brown-Out Protection Threshold|||280|298|316|mV|
|Brown-Out Detection Time|||25|42|60|ms|
|Brown-Out Protection Hysteretic<br>Voltage|||90|100|110|mV|
|**NTC**|||||||
|High-Threshold Voltage|VH_NTC||1.17|1.23|1.29|V|
|Low-Threshold Voltage|VL_NTC||0.67|0.77|0.87|V|
|Shutdown Threshold|VSD_NTC||0.355|0.39|0.425|V|
|Shutdown-Voltage Hysteretic|||85|100|115|mV|
|Pull-UpCurrent Source|IPULL_UP||44|54|64|μA|
|Leakage Current|ILEAKAGE||||1|μA|
|**Error Amplifier**|||||||
|Reference Voltage|VREF||0.401|0.413|0.425|V|
|Transconductance(6)|GEA|||125||µA/V|
|Upper ClampVoltage|VCOMP_H||4.5|4.75|5.1|V|
|Lower ClampVoltage|VCOMP_L||1.42|1.5|1.58|V|
|Max. Source Current(6)|ICOMP_SOURCE|||50||µA|
|Max. Sink Current(6)|ICOMP_SINK|||-200||µA|



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## **ELECTRICAL CHARACTERISTICS** _**(continued)**_ **Typical values are at VCC = 20V, TJ = +25°C, unless otherwise noted. Minimum and maximum values are at VCC = 20V, TJ = -40°C to +125°C, unless otherwise noted, guaranteed by characterization.** 

|**Parameter**|**Symbol**|**Condition**|**Min**|**Typ**|**Max**|**Units**|
|---|---|---|---|---|---|---|
|**Current Sense Comparator and Zero Current Detector**|||||||
|CS/ZCD Bias Current|IBIAS_CS/ZCD||||500|nA|
|Leading-Edge-BlankingTime|tLEB_CS||290|400|650|ns|
|Current-Sense ClampVoltage|VCS_CLAMP||1.9|2.0|2.1|V|
|Over-Current Protection,<br>Leading-Edge-BlankingTime|tLEB_CS_OCP||190|280|480|ns|
|Over-Current Protection<br>Threshold|VCS_OCP||2.36|2.46|2.56|V|
|Zero-Current Detection Threshold|VZCD_T|VZCDfallingedge|0.270|0.295|0.318|V|
|Zero-Current Detect Hysteresis|VZCD_HYS||562|595|628|mV|
|ZCD Blanking Time|tLEB_ZCD|After turn-off,<br>VMULT_O<br>(5)>0.3V|1.2|1.6|2.1|μs|
|||After turn-off,<br>VMULT_O≤0.3V|0.6|0.8|1.1|μs|
|Over-Voltage Blanking Time|tLEB_OVP|After turn-off,<br>VMULT_O>0.3V|1.2|1.6|2.1|μs|
|||After turn-off,<br>VMULT_O≤0.3V|0.6|0.8|1.1|μs|
|Over-Voltage Protection<br>Threshold|VZCD_OVP|1.6μs delay after turn-off|4.9|5.1|5.4|V|
|Minimum Off Time|tOFF_MIN||4|5.5|8|µs|
|**Starter**|||||||
|Start-Timer Period|tSTART|||190||µs|
|**Gate Driver**|||||||
|Output-ClampVoltage|VGATE_CLAMP|VCC=28V|13.0|14.5|17.0|V|
|Minimum-Output Voltage|VGATE_MIN|VCC=VCCOFF+ 50mV|6.7|||V|
|Max. Source Current(6)|IGATE_SOURCE|||0.8||A|
|Max. Sink Current(6)|IGATE_SINK|||-1||A|
|**Thermal Shutdown**|||||||
|Thermal Shutdown Threshold(6)|TSD|||150||°C|
|Thermal Shutdown Recovery<br>Hysteresis(6)|THYS|||25||°C|



## **Notes:** 

- 5) The multiplier output VMULT_O is given by: VCS=VMULT_O=K•VMULT• (VCOMP-1.5) 

- 6) Guaranteed by characterization. 

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## **TYPICAL PERFORMANCE CHARACTERISTICS** 

**VIN = 90VAC to 264VAC, Isolated Flyback Converter, 6 LEDs in series, VOUT = 20V, ILED=350mA, TA = 25** ° **C, unless otherwise noted.** 

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## **TYPICAL PERFORMANCE CHARACTERISTICS** _**(continued)**_ **VIN = 90VAC to 264VAC, Isolated Flyback Converter, 6 LEDs in series, VOUT = 20V, ILED=350mA, TA = 25** ° **C, unless otherwise noted.** 

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## **PIN FUNCTIONS** 

|**Pin #**|**Name**|**Description**|
|---|---|---|
|1|VCC|**Power Supply Input.**Supply power for the control signals and driving high-current<br>MOSFET. Bypass to ground with an external bulk capacitor (typically 4.7µF).|
|2|MULT|**Multiplier Input.**Connect to the tap of resistor divider between the rectified AC line and<br>GND. The half-wave sinusoid provides a reference signal for the internal-current-control<br>loop. MULT is used for brown-out protection detection.|
|3|NTC|**LED Temperature Protection.**Connect an NTC resistor from this pin to GND can reduce<br>the output current to protect the LED when ambient temperature rising high. Apply an<br>external PWM signal on this pin can dim the LED with PWM mode.<br>A 2.2nF to 4.7nF ceramic cap is recommended to connect from NTC to GND to bypass<br>the high frequency noise when activate temperature protection. For PWM dimming, the<br>cap can be removed.|
|4|COMP|**Loop Compensation Input.**Connect a compensation network to stabilize the LED driver<br>and maintain an accurate LED current.|
|5|GND|**Ground.**Current return for the control signal and the gate-drive signal.|
|6|FB|**Feedback Input.**If the accurate LED current is needed, connect this pin to the LED-<br>current-sensing resistor.|
|7|CS/ZCD|**Current-Sense and Zero-Current Detection.**This is a MPS proprietary dual function pin.<br>When the gate driver turns on, CS/ZCD senses the MOSFET current. The difference<br>between the sensed voltage and the internal sinusoidal-current-reference determines<br>when the MOSFET turns off.<br>When the gate driver turns off, the zero crossing (after blanking time) triggers GATE turn-<br>on signal. Connect CS/ZCD to a resistor divider through a diode between the auxiliary<br>winding and GND.<br>Output over-voltage condition is detected through ZCD. During every turn-off interval, if<br>the ZCD voltage exceeds the over-voltage protection threshold, after the 1.6µs<br>(VMULT_O>0.3V) or 0.8µs (VMULT_O≤0.3V) blanking time, over-voltage protection is triggered<br>and the system stops switching until auto-restart.<br>CS/ZCD is used for primary-side over-current protection. If the sensing voltage reaches<br>2.46V (after blanking time), the primary-side over-current protection is triggered and the<br>system stops switching until auto-restart.<br>A 10pF ceramic cap is recommended to connect CS/ZCD to GND to bypass the high-<br>frequency noise. In order to reduce RC delay influence on the accuracy of the current-<br>sensing signal, a 1kΩ down-side resistance (RZCD2in Figure 7) from CS/ZCD is<br>recommended.|
|8|GATE|**Gate Drive Output.**This totem-pole output stage can drive a high-power MOSFET with a<br>peak current of 0.8A source and 1A sink. The high-voltage limit is clamped to 14.5V to<br>avoid excessive gate-drive voltage. The drive-voltage is higher than 6.7V to guarantee a<br>sufficient drive capacity.|



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## **FUNCTION DIAGRAM** 

**Figure 1: MP4027 Function Block Diagram** 

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**MP4027 – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC** 

## **OPERATION** 

The MP4027 is a primary-side control, offline LED controller. It incorporates all the features of high-performance LED lighting. The LED current is controlled accurately with the realcurrent control method from primary-side information. Active power factor correction (PFC) eliminates unwanted harmonic noise on the AC line. The rich protection features achieve high safety and reliability in real application. 

## **Start Up** 

Initially, the VCC cap is charged by the start-up resistor from the AC line. When VCC reaches 25.5V, the control logic activates and the gate driver signal begins to switch; the power supply is taken over by the auxiliary winding. 

The chip shuts down when VCC drops below 9.5V. 

The high hysteretic voltage allows for a small VCC capacitor (typically 4.7μF) to shorten the start-up time. 

**Figure 2: Valley Switching Mode** 

## **Valley Switching Mode** 

During the external MOSFET ON-time (tON), the rectified-input voltage (VBUS) charges the primary-side inductor (LP) causing the primaryside current (IPRI) to increase linearly from zero to peak value (IPK). When the MOSFET turns off, the energy stored in the inductor is transferred to the secondary-side, which activates the secondary-side diode to power the load. The secondary current (ISEC) decreases linearly from its peak value to zero. When the secondary current decreases to zero, the MOSFET drainsource voltage starts oscillating, which is caused by the primary-side magnetizing inductance and parasitic capacitances—the voltage ring also is reflected on the auxiliary winding (see Figure 2). To improve primarycontrol precision, the chip monitors when ZCD voltage falls to zero twice before the next switching period. The zero-current detector from CS/ZCD generates GATE turn-on signal when the ZCD voltage falls below 0.295V the second time (see Figure 3). 

**Figure 3: Zero-Current Detector** 

## **Real-Current Control** 

The proprietary real-current-control method allows the MP4027 to control the secondaryside LED current using primary-side information. The mean value of the output LED current is calculated approximately as: 

**==> picture [49 x 26] intentionally omitted <==**

- N—Turn ratio between primary side and secondary side; 

This virtually eliminates switch turn-on loss and diode reverse-recovery losses, ensuring high efficiency and low EMI noise. 

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**MP4027 – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC** 

unnecessary IC shut down if ZCD misses detection. 

- VREF—The feedback reference voltage (typical 0.413V); 

## **Minimum Off Time** 

- RS—The sensing resistor connected between the MOSFET source and GND. 

The MP4027 operates with variable switching frequency. The frequency changes with the input instantaneous line voltage. To limit the maximum frequency and enhance EMI performance, the chip employs an internal minimum OFF-time of 5.5µs. 

## **Power-Factor Correction (PFC)** 

MULT is connected to a pull-up resistor from the rectified-instantaneous-line voltage; the multiplier output is sinusoidal. This signal sets the sinusoidal primary side peak current. This achieves a high power factor (PF). 

## **Leading-Edge Blanking (LEB)** 

Internal leading-edge-blanking (LEB) is employed to prevent a switching pulse from terminating prematurely due to parasitic capacitance discharging when the MOSFET turns on. During the blanking time, the path from CS/ZCD to the current comparator input is blocked. Figure 6 shows the leading-edge blanking time. The LEB time of primary-side OCP detection is relatively short at 280ns. 

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Multiplier output<br>Inductor current<br>**----- End of picture text -----**<br>


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|\<br>**----- End of picture text -----**<br>


**Figure 4: Power-Factor Correction** 

The maximum output voltage of the multiplier is clamped to 2.0V, setting the cycle-by-cycle current limit. 

## **VCC Under-Voltage Lockout (UVLO)** 

When the VCC voltage drops below the UVLO threshold 9.5V, the IC stops switching and shuts down; the operating current is very low under this condition. VCC is then charged by the external resistor from the AC line. Figure 5 shows the typical waveform of UVLO. 

**==> picture [122 x 102] intentionally omitted <==**

**----- Start of picture text -----**<br>
V CS<br>tLEB =400 ns<br>A te<br>aL<br>t<br>**----- End of picture text -----**<br>


**Figure 6: Leading-Edge Blanking** 

## **Output Over-Voltage Protection (OVP)** 

Output over-voltage protection prevents component damage from over-voltage conditions.  The auxiliary winding’s positive plateau voltage is proportional to the output voltage; the OVP uses the auxiliary-winding voltage instead of directly monitoring the output voltage. 

**Figure 5: VCC Under-Voltage Lockout** 

## **Auto Starter** 

The MP4027 integrates an auto-restart that begins timing when the MOSFET turns off. If ZCD fails to send a turn-on signal after 190µs, a turn-on signal is initiated. This avoids an 

Figure 7 shows the OVP circuit. Once the ZCD voltage is higher than 5.1V and exceeds the OVP blanking time (during the gate turn-off interval), the OVP signal is latched, turning the gate driver off. When VCC drops below UVLO, the IC restarts. 

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The output OVP setting point is calculated as: 

**==> picture [159 x 26] intentionally omitted <==**

- VOUT_OVP—The output over-voltage protection point; 

- NAUX— The auxiliary winding turns; 

- NSEC— The secondary winding turns 

**==> picture [204 x 93] intentionally omitted <==**

**----- Start of picture text -----**<br>
Gate<br>Gate_OFF<br>CS/ZCD<br>+<br>Latch - 5.1V RZCD2 R1<br>OVP<br>Blanking time RZCD1<br>**----- End of picture text -----**<br>


**Figure 7: OVP Sampling Unit** 

To prevent a voltage spike from an OVP mistrigger, OVP sampling has a tLEB_OVP blanking period, typically 1.6µs when VMULT_O > 0.3V and 0.8µs when VMULT_O ≤ 0.3V (see Figure 8). 

**==> picture [182 x 101] intentionally omitted <==**

**----- Start of picture text -----**<br>
Sampling Here<br>VCS/ZCD<br>0V<br>t LEB_OVP<br>**----- End of picture text -----**<br>


**Figure 8: ZCD Voltage and OVP Sampler** 

A current-limit resistor between the output of the auxiliary winding and the ZCD resistor divider also works as a suppresser to avoid an OVP mis-trigger. 

## **Output Short-Circuit Protection (SCP)** 

If an output short occurs, ZCD cannot detect the transformer’s zero-current-crossing signal, so the 190μs auto-restart timer triggers the MOSFET’s turn-on signal. The switching 

frequency of the power circuit drops to about 5kHz and the output current is limited to its nominal current. The auxiliary-winding voltage drops to follow the secondary-winding voltage, VCC drops to less than the UVLO threshold, and then the system restarts. This sequence limits both the output power and IC temperature if an output short occurs. 

## **Primary-Side Over-Current Protection (OCP)** 

The primary-side over-current protection prevents device damage from excessive current, such as a primary winding short circuit. If the CS/ZCD voltage rises to 2.46V during the gate turn-on interval (see Figure 9), the primary-side over-current protection signal is latched, turning the gate driver off. When VCC drops below UVLO, the IC restarts. 

**==> picture [157 x 88] intentionally omitted <==**

**Figure 9: Primary-Side OCP Sampling Unit** 

## **Brown-Out Protection** 

The MP4027 has brown-out protection; the internal peak detector detects the peak value of the rectified sinusoid waveform on MULT. If the peak value is less than the brown-out protection threshold, 0.298V for typically 42ms, MP4027 identifies this as a brown-out, dropping COMP to zero and disabling the power circuit. If the peak value exceeds 0.398V, the IC restarts and the COMP voltage rises again softly. This feature prevents the transformer and LED current from saturating during fast ON/OFF switching (see Figure 10). 

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**----- Start of picture text -----**<br>
VCC<br>Brown out  Brown<br>happen out<br>recover<br>Brown out<br>Vbus detected<br>Vpeak_ Mult<br>Vcomp<br>Vgate<br>**----- End of picture text -----**<br>


**Figure 10: Brown-Out Protection Waveforms** 

## **NTC Thermal Protection** 

The NTC provides LED thermal protection. A NTC resistor to monitor the LED temperature can be connected to this pin directly. The internal pull-up resistor generates a corresponding voltage on the external NTC resistor, and the LED current changes as NTC voltage changes. Figure 11 shows the NTC curve. 

## **PWM Dimming** 

The MP4027 can accept direct PWM dimming signal. Applying a PWM signal (>200Hz) on NTC pin can achieve dimming performance. 

Following the NTC curve of Figure 11, if the high level of the PWM signal is higher than VH_NTC, the internal reference voltage VREF is full scale. And if the low level of the PWM signal is lower than VSD_NTC, the internal reference voltage VREF is at the minimal value. Then the internal reference voltage of EA can be modulated as the external PWM dimming signal to capture the duty cycle information. 

**==> picture [228 x 123] intentionally omitted <==**

**----- Start of picture text -----**<br>
To Multiplier<br>COMP<br>CCOMP<br>EA<br>Current<br>NTC VREF Caculation<br>PWM Signal<br>CS<br>**----- End of picture text -----**<br>


**Figure 12: PWM Dimming** 

**==> picture [199 x 133] intentionally omitted <==**

**----- Start of picture text -----**<br>
Io<br>Iset<br>Iset/3<br>0<br>SD_NTC L_NTC H_NTC VNTC<br>V V V<br>**----- End of picture text -----**<br>


**Figure 11: NTC Curve** 

If the NTC voltage drops below VSD_NTC, the LED current drops to minimum output, the minimum output current is determined by gate minimum on time. (equal to 400ns LEB time) 

With large COMP cap, the loop response is slow. As long as the PWM frequency is higher than 200Hz, the duty cycle information can be filtered and averaged by COMP. Then, by the close loop control, the output LED current linearly changes with dimming duty from maximum to minimum. 

## **IC Thermal Shut Down** 

To prevent thermal damage to the system and IC, if internal temperatures exceed 150°C, the MP4027 stops switching and the IC is latched off until VCC drops below UVLO and restarts. 

## **Design Example** 

For the design example, please refer to MPS application note AN076 for the detailed design procedure and information. 

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**MP4027 – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC** 

## **NON-ISOLATED APPLICATIONS** 

Although isolated solutions can prevent electric shock from the grid when touching the load, they cause power loss and increase costs. Non-isolated solutions achieve higher efficiency and are highly cost-effective. 

Generally, the flyback converter is used for offline, isolated applications. For the nonisolated applications, a low-side buck-boost topology is used. The MP4027 can operate in _both_ offline isolated and non-isolated LEDlighting applications (see Figure 19). 

## **Operation of Low-Side Buck-Boost** 

The low-side buck-boost equates to a flyback converter with a 1:1 turn ratio transformer. As opposed to an isolated solution, there is not a separate primary and secondary winding, making a smaller core size. This saves cost and improves the efficiency of the driver. 

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BUS<br>N1<br>N2<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
GATE<br>CS<br>**----- End of picture text -----**<br>


**Figure 13: Tapped-Inductor for Low-Side BuckBoost Solution** 

## **The Selection of FET & Rectifier Diode** 

Since it is just an inductor for non-isolated solution, compared with isolated solution, at same output voltage, the power FET can be selected with lower voltage rating. But, oppositely, the voltage rating of rectifier diodes for output and aux-winding must be increased. 

## **Improvement of RF EMI** 

C12 in Figure 19 is added for RF EMI improvement. The recommended value is from 10nF to 68nF with 630V rating. 

## **Improvement of PFC & THD** 

The 1:1 ratio reduces the converter’s duty cycle using the same specifications. Based on the PFC principle in an isolated solution, the converter’s PF and THD drops. A non-isolated solution is suitable particularly for high-output voltage since the higher output voltage can extend the duty cycle to improve PF, THD and efficiency. 

For a non-isolated solution with low-output voltage, the tapped inductor can be applied to improve the PF and THD. 

Shown in Figure 13, the tapped-inductor includes two windings (N1 & N2) and a tap to connect the rectifier diode. When the power FET is turned on, the current goes through both of the windings. When the power FET is off, only N1 conducts the current through the rectifier diode. The stored energy of N2 is released by flux couple. The tapped inductor features a turn ratio similar to the transformer in an isolated solution. 

The nominal turns ratio is 

**==> picture [66 x 23] intentionally omitted <==**

The duty cycle of the converter is extended by the tapped inductor, which makes the improved PF and THD available. 

Like the transformer, the snubber is necessary to clamp the voltage spike. 

However, the non-dimmable solution usually needs to cover the universal input range. The input range is very wide, from 85VAC to 264VAC. MULT is used to detect the inputvoltage signal, but the resistor divider of MULT 

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**MP4027 – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC** 

is fixed. At high-line input, the signal for MULT is very low, which results in an adverse affect on the internal multiplier sampling; this affects the PFC performance. 

Figure 14 shows an improved circuitry on the MULT resistor divider; this adjusts the ratio of the divider to enhance THD. 

As shown in Figure 15, after adding the THD improved circuitry, the MULT voltage rises. The input current at the top of BUS is increased while the input current at the zero-crossing is reduced. This results in the input current becoming more sinusoidal, improving THD. 

## **Operation of High-Side Buck/Buck-Boost** 

The MP4027 features FB pin, which is used to receive the feedback signal of LED current directly. So, the MP4027 can be designed in high-side Buck or Buck-Boost application to achieve excellent LED current accuracy regulation, especially for very high load regulation requirement. 

Figure 20 is a 7.2W high-side Buck solution. 

**Figure 14: THD Improved Circuitry** 

The ZD1 is a HV Zener diode. The common voltage rating is from 80V to 130V. 

At low-line input, ZD1 does not conduct. The MULT signal is: 

**==> picture [126 x 25] intentionally omitted <==**

When the input voltage rises above ZD1 threshold, RMULT3 is paralleled with RMULT1 to increase the ratio of the divider; this raises the MULT signal. 

High-side Buck solution can achieve higher efficiency. But the system just works @ VIN>VOUT based on step-down converter’s operation. But the input voltage of PFC solution is a sinusoid wave. When VIN<VOUT, the gate keeps ON and VOUT drops, so the solution is suitable for the low VOUT application (relative to input voltage). And since the system is out of control at zero-crossing, it has adverse effect on THD. 

High-side Buck-boost’s operation is similar as low-side Buck-boost. With LED current sample, it can cover very wide output voltage range, like up to 100V voltage difference. 

## **Layout Considerations of High-Side Solution** 

Since GND is not connected on a stable point but on switching for high-side solution, the noise impact is serious. Good layout is very important for high-side solution’s stable operation. 

The external feedback resistors should be placed next to the FB pin. And the switching loop is sensitive to noise, so the switch node traces should be short and away from the feedback network. The switching loop includes input/output caps, MOS & rectifier diode. 

**Figure 15: The MULT Signal with THD Improved Circuitry** 

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**MP4027 – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC** 

**Figure 16: The Switching Loop of High-Side** 

**Buck** 

**Figure 17: The Switching Loop of High-Side Buck-Boost** 

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**MP4027 – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC** 

## **TYPICAL APPLICATION CIRCUITS** 

**==> picture [59 x 53] intentionally omitted <==**

**Figure 18: A19 Bulb Driver, 90-265VAC Input, Isolated Flyback Converter, VO =20V, ILED=350mA EVB Model: EV4027-J-00A** 

**==> picture [499 x 207] intentionally omitted <==**

**----- Start of picture text -----**<br>
R1<br>2k/1206 Option for >1kV Surge Test<br>1 2 LED-<br>L3<br>2.2mH D5<br>C1 WSGC10MH<br>220nF/400V 1000V/1A C10<br>100nF/275VacCX1 1 BD1DF06S 2 R2 1N5375B82VD6 499k/1%/1206R3A 3.3uF/400VC11 499k/1206R17499k/1206R16 1800@70MHz 1 L5BEAD 2 30Ts31 T1 100/1206R13 1 D4 68pF/630V/1206 1 2 C8 2 30k/1206R14 330uF/63VC9330uF/63V 600uHL4 36V/500mA LED+<br>470k/1%/0.5W R18 4 600V/3A/SMBWUGF30J<br>2M/0.25W 2 D2 1 R15 R5 19Ts5 C1268nF/630V<br>L260mH BAV3004W350V/0.2A R7 20/1%/1206 R8 2 D3 1 0/1%/1206 Lm=287uHUUR2813<br>5.1M/1% 9.76k/1% BAV3004W<br>L1600uH 100pF/50VC3 R3B499k/1%/1206 1 U1MP4027 VCC GATE 8 20/0805R6350V/0.2A 1 SMK0765FQ1<br>RV1 4.7uF/50VC2 D1NS 2 MULT CS/ZCD 7 2.2k/1%R9 650V/7A<br>F1TVR10431 2.2nF/50VC4 7.32k/1%R4 NTC1 3 NTC FB 6 10pF/50VC7 NC/1206R10 0.2/1%/1206R11<br>250V/2AL N C5 NS 4 COMP GND 5 R12<br>NS C6 0.2/1%/1206<br>2.2uF/10V<br>85VAC-264VAC 0805<br>3 2<br>1<br>1 2<br>2<br>1<br>4<br>2<br>1<br>2<br>2 2 2<br>3<br>1 1<br>1 2<br>1<br>**----- End of picture text -----**<br>


**Figure 19: T8 Driver, 85-265VAC Input, Low-side Buck-boost Converter, VO =36V, ILED=500mA** 

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## **TYPICAL APPLICATION CIRCUITS** _**(continued)**_ 

**==> picture [504 x 439] intentionally omitted <==**

**----- Start of picture text -----**<br>
R12<br>R3 Q1 NC<br>5.1k/1206 600V/4A<br>SMK0460I C9<br>220uF/63V<br>LED+1<br>L3 R11 L4<br>1.5mH/0.25A STTH3R06U D5 D1 2/1%/1210 825uH/EE13 30k/1206R13 36V/200mA<br>MB6SBD1 C2 470k/0.5WR4 1M/1%/0.25WR6 R820/0805 STTH3R06U600V/3A SGND 220uF/63VC8 LED-1<br>220nF/450V GND R7 GND<br>22nF/275VACCX1 D2 R14 1k/1%<br>WUGC10JH 1k/1%/1206<br>600V/1A D4<br>U1 WUGC10JH<br>MP4027 R9 600V/1A<br>5.1k/1206R1 0.47mH/0.9AL1 L2 5.1k/1206R2 D3 C3 1 VCC GATE 8 2.2k/1% R1027k/1%<br>0.47mH/0.9A BZT52C30 4.7uF/50V 2 MULT CS/ZCD 7<br>R5 C4<br>RV1 SGND 7.68k/1% 27nF/50VC7 3 NTC FB 6 C6470nF/16V C110pF/50V<br>TVR10431 2.2nF/50V 4 COMP GND 5<br>250V/2AF1 SGND NTCNC 2.2uF/6.3VC5 SGND<br>L N SGND<br>90VAC-265VAC<br>Figure 20: A19 Bulb Driver, 90-265VAC Input, High-side Buck Converter, VO =36V, ILED=200mA<br>L1<br>1MH 6X8 LED+<br>1 1<br>LED-<br>LX10M/SMDBD1 4 3 CE1 C1 + 1M 0805R1 150K 1206R2 D1US1J SMA 4.7uf/50v 1206C7 C94.7uf/50v 1206 30k 1206 R9<br>EE1024-9865-05501M<br>. T1 1 LED-<br>U1 100R 0805R8 Q1 .<br>1 VCC GATE 8 5N50 IPAK<br>CBB 0.047uF/125VACX1 R10 C10 234 MULTNTCCOMP MP4027 CS/ZCDGNDFB 675 C2 R32k 1% 0603R7 R5 R6<br>RV1 R4<br>221K C8<br>2.2U/6.3v 0603<br>F1 RT1<br>10R/1W<br>D2<br>R13 BAV21WSGH<br>F1 6.8K 1% 0603 SOD-323<br>N<br>D3 22R 0805 1%R14<br>C3 BAV21WSGHSOD-323<br>4.7U/50V 1206<br>1<br>2<br>2<br>1<br>1 1<br>+<br>2<br>10NF/1KV 1206 4.7UF/200V LLE<br>- 3 8<br>2<br>6 7<br>6.2K 0603 10PF/50V 0603<br>100K 0603<br>2.2NF 50V 0603 12.4K 1% 0603 2R4 1% 1206 2R2 1% 1206<br>0805<br>1%<br>100K<br>TC<br>N<br>**----- End of picture text -----**<br>


**Figure 21: 4W Candle Bulb Driver, 90-132VAC Input, Low-Side Buck-Boost Converter, VO =23V, ILED=180mA. No PFC requirement, so the input cap is larger than PFC solution, and small output cap can meet the output current ripple requirement** 

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## **PACKAGE INFORMATION** 

## **TSOT23-8** 

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See note 7<br>EXAMPLE<br>TOP MARK<br>IAAAA<br>PIN 1 ID<br>**----- End of picture text -----**<br>


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TOP VIEW 

## RECOMMENDED LAND PATTERN 

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SEATING PLANE<br>**----- End of picture text -----**<br>


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SEE DETAIL ''A''<br>**----- End of picture text -----**<br>


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FRONT VIEW<br>**----- End of picture text -----**<br>


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SIDE VIEW<br>**----- End of picture text -----**<br>


## NOTE: 

- **1) ALL DIMENSIONS ARE IN MILLIMETERS.** 

- **2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR  GATE BURR.** 

- **3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.** 

- **4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.10 MILLIMETERS MAX.** 

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DETAIL ''A''<br>**----- End of picture text -----**<br>


- **5) JEDEC REFERENCE IS MO-193, VARIATION BA.** 

- **6) DRAWING IS NOT TO SCALE.** 

- **7) PIN 1 IS LOWER LEFT PIN WHEN READING TOP MARK FROM LEFT TO RIGHT, (SEE EXAMPLE TOP MARK)** 

**NOTICE:** The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. 

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