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MC1455BDR2G
Timer, 100ns Rise Time, 100ns Fall Time, TTL, 4.5V to 16V, SOIC-8
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- Manufacturer: ONSEMI
- Product type: Timers, Oscillators & Pulse Generators
- No. of Pins: 8Pins
- Digital IC Case: SOIC
- Supply Voltage Max: 16V
- Supply Voltage Min: 4.5V
- Operating Temperature Max: 85°C
- Operating Temperature Min: -40°C
| Delivery and price | |
|---|---|
| Units per pack | 500 |
| Price | 0.267 € |
| Current stock | 1000+ |
| Lead time | 7 days |
Datasheet
MC1455, MC1455B, NCV1455B ## Timers The MC1455 monolithic timing circuit is a highly stable controller capable of producing accurate time delays or oscillation. Additional terminals are provided for triggering or resetting if desired. In the time delay mode, time is precisely controlled by one external resistor and capacitor. For astable operation as an oscillator, the free−running frequency and the duty cycle are both accurately controlled with two external resistors and one capacitor. The circuit may be triggered and reset on falling waveforms, and the output structure can source or sink up to 200 mA or drive TTL circuits. ## **Features** - Direct Replacement for NE555 Timers - Timing from Microseconds through Hours - Operates in Both Astable and Monostable Modes - Adjustable Duty Cycle - High Current Output Can Source or Sink 200 mA - Output Can Drive TTL - Temperature Stability of 0.005% per °C - Normally ON or Normally OFF Output - Pb−Free Packages are Available **==> picture [253 x 293] intentionally omitted <==** **----- Start of picture text -----**<br> 1.0 k<br>Load<br>MT2<br>3 8 A O<br>10 k 4 6 R G MT1<br>2 MC1455 7<br>5<br>0.1 F 0.01 F 1.0 F C<br>1<br>-10 V 1N4003<br>Boat]<br>3.5 k -<br>t = 1.1; R and C = 22 sec 1N4740 10 F<br>250 V +<br>Time delay (t) is variable by<br>Ti<br>changing R and C (see Figure 16).<br>Figure 1. 22 Second Solid State Time Delay Relay Circuit<br>VCC<br>8<br>5 k<br>6 7<br>Threshold + Discharge<br>Control Voltage 5 -CompA R FlopFlip<br>5 k Q<br>3<br>+ S Inhibit/ Output<br>2 Comp Reset<br>Trigger - B<br>p 5 k o e<br>° 1 4<br>GND Reset<br>117 Vac/60 Hz<br>**----- End of picture text -----**<br> **Figure 1. 22 Second Solid State Time Delay Relay Circuit** **Figure 2. Representative Block Diagram** **http://onsemi.com** **==> picture [202 x 435] intentionally omitted <==** **----- Start of picture text -----**<br> MARKING<br>DIAGRAMS<br>8<br>SOIC−8 1455x<br>8 D SUFFIX ALYW<br>CASE 751<br>1<br>1<br>8 Ld<br>PDIP−8 MC1455yyy<br>P1 SUFFIX AWL<br>8 CASE 626 YYWWG<br>*<br>1 1 rv<br>x = B or V<br>yyy = BP1 or P1<br>A = Assembly Location<br>L = Wafer Lot<br>Y, YY = Year<br>W, WW = Work Week<br>. or G = Pb−Free Package<br>ORDERING INFORMATION<br>See detailed ordering and shipping information in the package<br>dimensions section on page 9 of this data sheet.<br>VCC<br>t VR l h e ICC<br>Reset 4 8 700<br>+ 5 VCC 7<br>0.01 F Control Discharge<br>Voltage MC1455<br>3 Threshold<br>Output 6 Ith 2.0 k [V][S]<br>VO ISink GND Trigger<br>ISource 1 2<br>**----- End of picture text -----**<br> Test circuit for measuring DC parameters (to set output and measure parameters): a) When VS 2/3 VCC, VO is low. b) When VS 1/3 VCC, VO is high. c) When VO is low, Pin 7 sinks current. To test for Reset, set VO c) high, apply Reset voltage, and test for current flowing into Pin 7. c) When Reset is not in use, it should be tied to VCC. **Figure 3. General Test Circuit** Publication Order Number: **MC1455/D** **1** © Semiconductor Components Industries, LLC, 2009 **December, 2009 − Rev. 10** ## **MC1455, MC1455B, NCV1455B** ## **MAXIMUM RATINGS** (TA = +25 ° C, unless otherwise noted.) |**MAXIMUM RATINGS **(TA= +25°C, unless otherwise noted.)|||| |---|---|---|---| |**Rating**|**Symbol**|**Value**|**Unit**| |Power Supply Voltage|VCC|+18|Vdc| |Discharge Current (Pin 7)|I7|200|mA| |Power Dissipation (Package Limitation)<br>P1 Suffix, Plastic Package<br>Derate above TA= +25°C<br>D Suffix, Plastic Package<br>Derate above TA= +25°C|PD<br>PD|625<br>5.0<br>625<br>160|mW<br>mW/°C<br>mW<br>°C/W| |Operating Temperature Range (Ambient)<br>MC1455B<br>MC1455<br>NCV1455B|TA|−40 to +85<br>0 to +70<br>−40 to +125|°C| |Maximum Operating Die Junction Temperature|TJ|+150|°C| |Storage Temperature Range|Tstg|−65 to +150|°C| Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. ## **ELECTRICAL CHARACTERISTICS** (TA = +25 ° C, VCC = +5.0 V to +15 V, unless otherwise noted.) |**ELECTRICAL CHARACTERISTICS**(TA= +25°C, VCC= +5.0 V to +15 V, un|less otherwise|noted.)|||| |---|---|---|---|---|---| |**Characteristics**|**Symbol**|**Min**|**Typ**|**Max**|**Unit**| |Operating Supply Voltage Range|VCC|4.5|−|16|V| |Supply Current<br>VCC= 5.0 V, RL=�<br>VCC= 15 V, RL=�, Low State (Note 1)|ICC|−<br>−|3.0<br>10|6.0<br>15|mA| |Timing Error (R = 1.0 k�to 100 k�) (Note 2)<br>Initial Accuracy C = 0.1�F<br>Drift with Temperature<br>Drift with Supply Voltage||−<br>−<br>−|1.0<br>50<br>0.1|−<br>−<br>−|%<br>PPM/°C<br>%/V| |Threshold Voltage/Supply Voltage|Vth/VCC|−|2/3|−|| |Trigger Voltage<br>VCC= 15 V<br>VCC= 5.0 V|VT|−<br>−|5.0<br>1.67|−<br>−|V| |Trigger Current|IT|−|0.5|−|�A| |Reset Voltage|VR|0.4|0.7|1.0|V| |Reset Current|IR|−|0.1|−|mA| |Threshold Current (Note 3)|Ith|−|0.1|0.25|�A| |Discharge Leakage Current (Pin 7)|Idischg|−|−|100|nA| |Control Voltage Level<br>VCC= 15 V<br>VCC= 5.0 V|VCL|9.0<br>2.6|10<br>3.33|11<br>4.0|V| |Output Voltage Low<br>ISink= 10 mA (VCC= 15 V)<br>ISink= 50 mA (VCC= 15 V)<br>ISink= 100 mA (VCC= 15 V)<br>ISink= 200 mA (VCC= 15 V)<br>ISink= 8.0 mA (VCC= 5.0 V)<br>ISink= 5.0 mA (VCC= 5.0 V)|VOL|−<br>−<br>−<br>−<br>−<br>−|0.1<br>0.4<br>2.0<br>2.5<br>−<br>0.25|0.25<br>0.75<br>2.5<br>−<br>−<br>0.35|V| |Output Voltage High<br>VCC= 15 V (ISource= 200 mA)<br>VCC= 15 V (ISource= 100 mA)<br>VCC= 5.0 V (ISource= 100 mA)|VOH|−<br>12.75<br>2.75|12.5<br>13.3<br>3.3|−<br>−<br>−|V| |Rise Time Differential Output|tr|−|100|−|ns| |Fall Time Differential Output|tf|−|100|−|ns| 1. ‘Supply current when output is high is typically 1.0 mA less. 2. Tested at VCC = 5.0 V and VCC = 15 V Monostable mode. 3. This will determine the maximum value of RA + RB for 15 V operation. The maximum total R = 20 M � . 4. Tlow = 0 ° C for MC1455, Tlow = −40 ° C for MC1455B, NCV1455B - Thigh = +70 ° C for MC1455, Thigh = +85 ° C for MC1455B, Thigh = +125 ° C for NCV1455B 5. NCV prefix is for Automotive and other applications requiring site and change control. **http://onsemi.com** **2** **MC1455, MC1455B, NCV1455B** **==> picture [237 x 616] intentionally omitted <==** **----- Start of picture text -----**<br> 150<br>125<br>100<br>75 0°C<br>50 25°C<br>70°C<br>25<br>0<br>0 0.1 0.2 0.3 0.4<br>VT�(min), MINIMUM TRIGGER VOLTAGE (x VCC = Vdc)<br>Figure 4. Trigger Pulse Width<br>2.0<br>1.8<br>1.6 25°C<br>1.4<br>1.2<br>1.0<br>0.8<br>0.6<br>0.4<br>5.0 V ≤ VCC ≤ 15 V<br>0.2<br>0<br>1.0 2.0 5.0 10 20 50 100<br>ISource (mA)<br>Figure 6. High Output Voltage<br>10<br>25°C<br>1.0<br>0.1<br>0.01<br>1.0 2.0 5.0 10 20 50 100<br>ISink (mA)<br>PW, PULSE WIDTH (ns min)<br>(Vdc)<br>VCC-VOH<br>VOL, LOW OUTPUT VOLTAGE (Vdc)<br>**----- End of picture text -----**<br> **Figure 8. Low Output Voltage @ VCC = 10 Vdc** **==> picture [242 x 158] intentionally omitted <==** **----- Start of picture text -----**<br> 10<br>25°C<br>8.0<br>6.0<br>4.0<br>2.0<br>0<br>5.0 10 15<br>VCC, SUPPLY VOLTAGE (Vdc)<br>ICC, SUPPLY CURRENT (mA)<br>**----- End of picture text -----**<br> **Figure 5. Supply Current** **==> picture [243 x 390] intentionally omitted <==** **----- Start of picture text -----**<br> 10<br>1.0 25°C<br>0.1<br>0.01<br>1.0 2.0 5.0 10 20 50 100<br>ISink (mA)<br>Figure 7. Low Output Voltage<br>@ VCC = 5.0 Vdc<br>10<br>1.0<br>0.1 25°C<br>0.01<br>1.0 2.0 5.0 10 20 50 100<br>ISink (mA)<br>VOL, LOW OUTPUT VOLTAGE (Vdc)<br>VOL, LOW OUTPUT VOLTAGE (Vdc)<br>**----- End of picture text -----**<br> **Figure 9. Low Output Voltage @ VCC = 15 Vdc** **http://onsemi.com** **3** **MC1455, MC1455B, NCV1455B** **==> picture [490 x 159] intentionally omitted <==** **----- Start of picture text -----**<br> 1.015 1.015<br>1.010 1.010<br>1.005 1.005<br>1.000 1.000<br>0.995 0.995<br>0.990 0.990<br>0.985 0.985<br>0 5.0 10 15 20 -75 -50 -25 0 25 50 75 100 125<br>VCC, SUPPLY VOLTAGE (Vdc) TA, AMBIENT TEMPERATURE (°C)<br>td, DELAY TIME NORMALIZED td, DELAY TIME NORMALIZED<br>**----- End of picture text -----**<br> **Figure 10. Delay Time versus Supply Voltage** **Figure 11. Delay Time versus Temperature** **==> picture [238 x 159] intentionally omitted <==** **----- Start of picture text -----**<br> 300<br>250<br>200<br>150 0°C<br>100<br>°<br>° 25 C<br>70 C<br>50<br>0<br>0 0.1 0.2 0.3 0.4<br>VT�(min), MINIMUM TRIGGER VOLTAGE (x VCC = Vdc)<br>, PROPAGATION DELAY TIME (ns)<br>tpd<br>**----- End of picture text -----**<br> **Figure 12. Propagation Delay versus Trigger Voltage** **http://onsemi.com** **4** **MC1455, MC1455B, NCV1455B** **==> picture [404 x 276] intentionally omitted <==** **----- Start of picture text -----**<br> Control Voltage<br>Threshold Trigger<br>Flip-Flop Output<br>Comparator Comparator<br>VCC<br>4.7 k 830 4.7�k 1.0 k 6.8 k<br>5.0 k<br>Threshold<br>7.0 k<br>3.9 k<br>10 k Output<br>c b<br>c b<br>5.0 k e 4.7 k<br>Trigger<br>220<br>Reset<br>Reset 100 k 5.0 k 4.7 k<br>Discharge Discharge<br>GND 100<br>**----- End of picture text -----**<br> **Figure 13. Representative Circuit Schematic** ## **GENERAL OPERATION** The MC1455 is a monolithic timing circuit which uses an external resistor − capacitor network as its timing element. It can be used in both the monostable (one−shot) and astable modes with frequency and duty cycle controlled by the capacitor and resistor values. While the timing is dependent upon the external passive components, the monolithic circuit provides the starting circuit, voltage comparison and other functions needed for a complete timing circuit. Internal to the integrated circuit are two comparators, one for the input signal and the other for capacitor voltage; also a flip−flop and digital output are included. The comparator reference voltages are always a fixed ratio of the supply voltage thus providing output timing independent of supply voltage. ## **Monostable Mode** In the monostable mode, a capacitor and a single resistor are used for the timing network. Both the threshold terminal and the discharge transistor terminal are connected together in this mode (refer to circuit in Figure 14). When the input voltage to the trigger comparator falls below 1/3 VCC, the comparator output triggers the flip−flop so that its output sets low. This turns the capacitor discharge transistor “off” and drives the digital output to the high state. This condition allows the capacitor to charge at an exponential rate which is set by the RC time constant. When the capacitor voltage reaches 2/3 VCC, the threshold comparator resets the flip−flop. This action discharges the timing capacitor and returns the digital output to the low state. Once the flip−flop has been triggered by an input signal, it cannot be retriggered until the present timing period has been completed. The time that the output is high is given by the equation t = 1.1 RA C. Various combinations of R and C and their associated times are shown in Figure 16. The trigger pulse width must be less than the timing period. A reset pin is provided to discharge the capacitor, thus interrupting the timing cycle. As long as the reset pin is low, the capacitor discharge transistor is turned “on” and prevents the capacitor from charging. While the reset voltage is applied the digital output will remain the same. The reset pin should be tied to the supply voltage when not in use. **==> picture [200 x 139] intentionally omitted <==** **----- Start of picture text -----**<br> +VCC (5.0 V to 15 V)<br>RL Reset4 V8CC RA<br>Discharge<br>Output 7<br>3 6<br>MC1455<br>RL 2 Threshold5 C<br>Trigger Control<br>1 Voltage 0.01 �F<br>**----- End of picture text -----**<br> **Figure 14. Monostable Circuit** **http://onsemi.com** **5** **MC1455, MC1455B, NCV1455B** **==> picture [483 x 159] intentionally omitted <==** **----- Start of picture text -----**<br> 100<br>Seeewseme<br>10<br>Py Ty ft yy fl Snmeeerearar<br>1.0<br>| Tf rep velematwren] |_| HORA ASST<br>0.1<br>ae = |Cer<br>0.01<br>“UCLff crpmnorvoron/sovrem | | A] i 0.001 ameMOOI iaeLEE<br>t = 50 s/cm 10 s 100 s 1.0 ms 10 ms 100 ms 1.0 10 100<br>(RA = 10 k C = 0.01 F, RL = 1.0 k VCC = 15 V) td, TIME DELAY (s)<br>μ<br>C, CAPACITANCE ( F)<br>**----- End of picture text -----**<br> **Figure 15. Monostable Waveforms** **Figure 16. Time Delay** **==> picture [469 x 169] intentionally omitted <==** **----- Start of picture text -----**<br> +VCC (5.0 V to 15 V)<br>ttt<br>RL Reset4 V8CC RA<br>Set<br>Output<br>3<br>a MC1455 RB ERE<br>O — LL LL<br>Trigger 5<br>2 Control<br>g RL 1 Voltage C s<br>: _ i na an<br>t = 20 s/cm<br>(RA = 5.1 k C = 0.01 F, RL = 1.0 k ; RB = 3.9 k VCC = 15 V)<br>Figure 17. Astable Circuit Figure 18. Astable Waveforms<br>**----- End of picture text -----**<br> ## **Astable Mode** In the astable mode the timer is connected so that it will retrigger itself and cause the capacitor voltage to oscillate between 1/3 VCC and 2/3 VCC. See Figure 17. The external capacitor changes to 2/3 VCC through RA and RB and discharges to 1/3 VCC through RB. By varying the ratio of these resistors the duty cycle can be varied. The charge and discharge times are independent of the supply voltage. The charge time (output high) is given by: **==> picture [209 x 75] intentionally omitted <==** **==> picture [226 x 28] intentionally omitted <==** and may be easily found as shown in Figure 19. **==> picture [204 x 21] intentionally omitted <==** To obtain the maximum duty cycle RA must be as small as possible; but it must also be large enough to limit the discharge current (Pin 7 current) within the maximum rating of the discharge transistor (200 mA). The minimum value of RA is given by: **==> picture [235 x 197] intentionally omitted <==** **----- Start of picture text -----**<br> VCC(Vdc) VCC(Vdc)<br>RA<br>I7 (A) 0.2<br>100<br>10<br>1.0<br>0.1 SSSNCS<br>0.01<br>(RA + 2 RB)<br>0.001<br>0.1 1.0 10 100 1.0 k 10 k 100<br>f, FREE RUNNING FREQUENCY (Hz)<br>μ<br>C, CAPACITANCE ( F)<br>**----- End of picture text -----**<br> **Figure 19. Free Running Frequency** **http://onsemi.com** **6** **MC1455, MC1455B, NCV1455B** ## **APPLICATIONS INFORMATION** ## **Linear Voltage Ramp** In the monostable mode, the resistor can be replaced by a constant current source to provide a linear ramp voltage. The capacitor still charges from 0 VCC to 2/3 VCC. The linear ramp time is given by: **==> picture [173 x 23] intentionally omitted <==** ## **Missing Pulse Detector** The timer can be used to produce an output when an input pulse fails to occur within the delay of the timer. To accomplish this, set the time delay to be slightly longer than the time between successive input pulses. The timing cycle is then continuously reset by the input pulse train until a change in frequency or a missing pulse allows completion of the timing cycle, causing a change in the output level. If VB is much larger than VBE, then t can be made independent of VCC. **==> picture [480 x 175] intentionally omitted <==** **----- Start of picture text -----**<br> +VCC (5.0 V to 15 V)<br>VCC<br>Reset VCC<br>RL RA<br>4 8<br>Reset 4 8 VCC<br>3 Discharge<br>RE R1 ry<br>2N4403 Output 7<br>Digital 3 7 VE or Equiv MC1455 a Threshold O<br>Output MC1455 6 I VB Input O 2 65 ControlVoltage Tt C<br>Trigger 2 5 Sweep R2 Trigger 1 0.01 F<br>Output C<br>2N4403<br>1 0.01 F Control or Equiv<br>' T Voltage<br>**----- End of picture text -----**<br> **Figure 20. Linear Voltage Sweep Circuit** **Figure 21. Missing Pulse Detector** **==> picture [194 x 23] intentionally omitted <==** **----- Start of picture text -----**<br> t = 100 s/cm wu<br>(RE = 10 k Q R2 = 100 k Q R1 = 39 k Q C = 0.01 F, V wu CC = 15 V)<br>**----- End of picture text -----**<br> **Figure 22. Linear Voltage Ramp Waveforms** **==> picture [155 x 21] intentionally omitted <==** **----- Start of picture text -----**<br> t = 500 s/cm wu<br>(RA = 2.0 k Q RL = 1.0 k Q C = 0.01 F, V Ub CC = 15 V)<br>**----- End of picture text -----**<br> **Figure 23. Missing Pulse Detector Waveforms** **http://onsemi.com** **7** **MC1455, MC1455B, NCV1455B** ## **Pulse Width Modulation** If the timer is triggered with a continuous pulse train in the monostable mode of operation, the charge time of the capacitor can be varied by changing the control voltage at Pin 5. In this manner, the output pulse width can be modulated by applying a modulating signal that controls the threshold voltage. **==> picture [211 x 144] intentionally omitted <==** **----- Start of picture text -----**<br> +VCC (5.0 V to 15 V)<br>RL RA<br>4 8<br>3 7<br>Output 6 Lt C<br>MC1455<br>2 5<br>Clock Modulation<br>Input Input<br>1<br>**----- End of picture text -----**<br> **Figure 24. Pulse Width Modulator** **==> picture [114 x 17] intentionally omitted <==** **----- Start of picture text -----**<br> t = 0.5 ms/cm<br>(RA = 10 k Q C = 0.02 F, V u CC = 15 V)<br>**----- End of picture text -----**<br> **Figure 25. Pulse Width Modulation Waveforms** ## **Test Sequences** Several timers can be connected to drive each other for sequential timing. An example is shown in Figure 26 where the sequence is started by triggering the first timer which runs for 10 ms. The output then switches low momentarily and starts the second timer which runs for 50 ms and so forth. **==> picture [464 x 157] intentionally omitted <==** **----- Start of picture text -----**<br> VCC (5.0 V to 15 V)<br>9.1 k 27 k 9.1 k 27 k 18.2 k<br>8 4 8 4 8 4<br>6 5 0.01 F wu 6 5 0.01 F wu 6 5 0.01 F wu<br>7 7<br>MC1455 MC1455 MC1455<br>7 3 2 3 2 3<br>0.001 F wu 0.001 F wu<br>2 1<br>1.0 F 5.0 F 1 5.0 F 1<br>Load Load Load<br>**----- End of picture text -----**<br> **Figure 26. Sequential Timer** **http://onsemi.com** **8** **MC1455, MC1455B, NCV1455B** ## **ORDERING INFORMATION** |**Device**|**Operating Temperature Range**|**Package**|**Shipping**†| |---|---|---|---| |MC1455P1|TA= 0°C to +70°C|PDIP−8|50 Units / Rail| |MC1455P1G||PDIP−8<br>(Pb−Free)|50 Units / Rail| |MC1455D||SOIC−8|98 Units / Rail| |MC1455DG||SOIC−8<br>(Pb−Free)|98 Units / Rail| |MC1455DR2||SOIC−8|2500 Units / Tape & Reel| |MC1455DR2G||SOIC−8<br>(Pb−Free)|2500 Units / Tape & Reel| |MC1455BD|TA= −40°C to +85°C|SOIC−8|98 Units / Rail| |MC1455BDG||SOIC−8<br>(Pb−Free)|98 Units / Rail| |MC1455BDR2||SOIC−8|2500 Units / Tape & Reel| |MC1455BDR2G||SOIC−8<br>(Pb−Free)|2500 Units / Tape & Reel| |MC1455BP1||PDIP−8|50 Units / Rail| |MC1455BP1G||PDIP−8<br>(Pb−Free)|50 Units / Rail| |NCV1455BDR2*|TA= −40°C to +125°C|SOIC−8|2500 Units / Tape & Reel| |NCV1455BDR2G*||SOIC−8<br>(Pb−Free)|2500 Units / Tape & Reel| †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NCV prefix is for automotive and other applications requiring site and control changes. **http://onsemi.com** **9** **MC1455, MC1455B, NCV1455B** ## **PACKAGE DIMENSIONS** **SOIC−8 D SUFFIX** CASE 751−07 ISSUE AJ NOTES: **==> picture [305 x 198] intentionally omitted <==** **----- Start of picture text -----**<br> −X−<br>A<br>8 5<br>B S 0.25 (0.010) M Y M<br>1<br>4<br>−Y− K<br>G<br>C N X 45 �<br>SEATING<br>PLANE<br>−Z−<br>0.10 (0.004)<br>H D M J<br>0.25 (0.010) M Z Y S X S<br>**----- End of picture text -----**<br> 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. **==> picture [135 x 117] intentionally omitted <==** **----- Start of picture text -----**<br> 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW<br>STANDARD IS 751−07.<br>MILLIMETERS INCHES<br>DIM MIN MAX MIN MAX<br>A 4.80 5.00 0.189 0.197<br>B 3.80 4.00 0.150 0.157<br>C 1.35 1.75 0.053 0.069<br>D 0.33 0.51 0.013 0.020<br>G 1.27 BSC 0.050 BSC<br>H 0.10 0.25 0.004 0.010<br>J 0.19 0.25 0.007 0.010<br>K 0.40 1.27 0.016 0.050<br>M 0 � 8 � 0 � 8 �<br>N 0.25 0.50 0.010 0.020<br>S 5.80 6.20 0.228 0.244<br>**----- End of picture text -----**<br> ## **SOLDERING FOOTPRINT*** **==> picture [227 x 161] intentionally omitted <==** **----- Start of picture text -----**<br> 1.52<br>0.060<br>7.0 4.0<br>0.275 0.155<br>0.6 1.270<br>0.024 0.050 SCALE 6:1<br>� inches [mm] �<br>**----- End of picture text -----**<br> *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. **http://onsemi.com** **10** **MC1455, MC1455B, NCV1455B** ## **PACKAGE DIMENSIONS** **PDIP−8 P1 SUFFIX** CASE 626−05 ISSUE L **==> picture [457 x 204] intentionally omitted <==** **----- Start of picture text -----**<br> NOTES:<br>1. DIMENSION L TO CENTER OF LEAD WHEN<br>8 5 FORMED PARALLEL.<br>2. PACKAGE CONTOUR OPTIONAL (ROUND OR<br>SQUARE CORNERS).<br>−B− 3. DIMENSIONING AND TOLERANCING PER ANSI<br>Y14.5M, 1982.<br>1 4<br>MILLIMETERS INCHES<br>DIM MIN MAX MIN MAX<br>ert F See AB 6.109.40 10.166.60 0.3700.240 0.4000.260<br>C 3.94 4.45 0.155 0.175<br>NOTE 2 −A− D 0.38 0.51 0.015 0.020<br>L F 1.02 1.78 0.040 0.070<br>G 2.54 BSC 0.100 BSC<br>H 0.76 1.27 0.030 0.050<br>J 0.20 0.30 0.008 0.012<br>C K 2.92 3.43 0.115 0.135<br>HE L 7.62 BSC 0.300 BSC<br>−T− J MN 0.76--- 1.0110 0.030--- 0.04010<br>SEATING N<br>PLANE<br>M<br>D K<br>H G<br>ibis =———<br>0.13 (0.005) M T A M B [M]<br>**----- End of picture text -----**<br> **ON Semiconductor** and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. ## **PUBLICATION ORDERING INFORMATION** ## **LITERATURE FULFILLMENT** : Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA **Phone** : 303−675−2175 or 800−344−3860 Toll Free USA/Canada **Fax** : 303−675−2176 or 800−344−3867 Toll Free USA/Canada **Email** : orderlit@onsemi.com **N. American Technical Support** : 800−282−9855 Toll Free **ON Semiconductor Website** : **www.onsemi.com** USA/Canada **Europe, Middle East and Africa Technical Support: Order Literature** : http://www.onsemi.com/orderlit Phone: 421 33 790 2910 **Japan Customer Focus Center** For additional information, please contact your local Phone: 81−3−5773−3850 Sales Representative **http://onsemi.com** **MC1455/D** **11**
Updated at February 9, 2023
onsemi is a premier global supplier of intelligent power and sensing technologies, driving disruptive innovations across the automotive, industrial, and cloud infrastructure markets. Recognized for their commitment to sustainability and reliable supply chains, the company accelerates advancements in vehicle electrification, industrial automation, and 5G networks by solving the industry's most complex design challenges. At the core of their portfolio is an industry-leading selection of discrete semiconductors. This extensive range features thousands of high-performance bipolar transistors, single and dual MOSFETs, and a comprehensive array of diodes, including Zener, Schottky, and fast-recovery rectifiers. Engineered for superior thermal performance and energy efficiency, these foundational components are critical for demanding power conversion, switching, and signal conditioning applications. Beyond essential discretes, onsemi provides a robust suite of advanced power management and circuit protection solutions. Their lineup includes intelligent power modules, single IGBTs, and transient voltage suppression (TVS) diodes designed to safeguard sensitive circuitry. Complimented by integrated passive filters, AC/DC LED driver ICs, and specialized sub-2.4GHz RF transceivers, onsemi equips engineers with the scalable, high-quality technologies needed to build a cleaner, smarter, and more connected world.
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