LYT5226D-TL

## **LYT5216-5228 LYTSwitch-5** Family 

Single-Stage LED Driver IC with Combined PFC and Constant Current Output in Isolated and Non-Isolated Topologies 

## **Product Highlights** 

## **Combined Single-Stage PFC + Accurate CC Output** 

- Accurate CC, better than ±3% 

- Power Factor >0.9 

- Low THD, <10% with typical input and output conditions 

- >90% efficient in optimized designs 

- High switching frequency and DCM allow compact magnetics 

## **Design Flexibility** 

- Supports buck, buck-boost, tapped-buck, boost, isolated and non-isolated flyback topologies 

- 2 MOSFET voltage options and 3 power levels for optimum device selection 

## **Highest Reliability** 

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LYTSwitch-5<br>L D<br>DS CONTROL<br>DO<br>FB BP OC S<br>PI-7711-121015<br>**----- End of picture text -----**<br>


Figure 1a. Typical Application Schematic: Isolated Flyback. 

- No electrolytic bulk capacitors or optoisolators for increased lifetime 

- Comprehensive protection features 

- Input and output overvoltage 

- Open-loop protection 

- Advanced thermal control 

- Thermal foldback allows output light delivery at abnormally high ambient temperatures 

- Hysteretic shutdown provides protection during fault conditions 

## **Description** 

The LYTSwitch™-5 family is ideal for single-stage power factor corrected constant current LED applications – bulbs, tubes and ballasts. 

Each device incorporates a high-voltage power MOSFET and discontinuous mode, variable frequency, variable on-time controller.  The controller also provides fast (cycle-by-cycle) current limit, input and output OVP, plus advanced thermal management circuitry. 

The combination of a low-side switching topology, cooling via electronically quiet SOURCE pins and frequency jitter ensures extremely low EMI. This reduces the size of the input filter components – greatly reducing audible noise. 

The part numbers shown in Table 1 describe 3 different power levels and two MOSFET voltage options to cost-optimize designs, while EcoSmart™ switching technology ensures maximum efficiency for each device size and load condition. 

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LYTSwitch-5<br>L D<br>DS CONTROL<br>DO<br>FB BP OC S<br>PI-7799-121015<br>**----- End of picture text -----**<br>


Figure 1b. Typical Application Schematic: Non-Isolated Buck. 

## **Output Power Table** 

|**Output Power Table**||
|---|---|
|**Product2**|**Output Power1**|
||90-308 VAC|
|**LYT5225D**<br>**LYT5216D, LYT5226D**<br>**LYT5218D, LYT5228D**|9 W<br>16 W<br>25 W|



Table 1.    Output Power Table. 

Notes: 

1. Maximum practical continuous power in an open frame design with adequate heat sinking, measured at 50˚C ambient (see Key Applications Considerations for more information). 

2.  Package: D: SO-16B. 

Figure 2. SO-16B (D Package). 

March 2016 

www.power.com 

This Product is Covered by Patents and/or Pending Patent Applications. 

**LYT5216-5228** 

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BYPASS DRAIN<br>(BP) REGULATOR (D)<br>5.25 V<br>UV<br>LINE-SENSE<br>(L) 4.7 V<br>LOV<br>VLOV<br>ILIM<br>ILIM CURRENT LIMIT SOA<br>SOA S Q<br>V_ILIM LOV R Q<br>UV<br>ZC VFB<br>VZC VFB(SK) +<br>UPDATE<br>+ FREQUENCY AND<br>DUTY CYCLE CONTROL<br>FEEDBACK<br>(FB) VFB<br>OUTPUT VFB(AR)<br>COMPENSATION<br>(OC) IFB<br>MULTIPLIER<br>DRIVER CURRENT Enable<br>SENSING (EN)<br>(DS) FAULT AUTO-RESTART<br>HANDLING<br>S Q<br>R Q<br>SOURCE<br>DATA (S)<br>OUTPUT<br>(DO)<br>PI-7753-110215<br>**----- End of picture text -----**<br>


Figure 3. Block Diagram. 

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## **Pin Functional Description** 

## **LINE SENSE (L) Pin** 

The LINE-SENSE pin measures input voltage.  Input OVP is activated when LINE-SENSE pin current exceeds the predetermined threshold. 

## **DATA OUTPUT (DO) Pin** 

Describes auto-restart events. 

## **DRIVER CURRENT SENSE (DS) Pin** 

DRIVER CURRENT SENSE pin senses the driver current.  This current is used to deduce output current: it is multiplied by the input voltage and the result is then divided by the output voltage to obtain output current. 

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RDS ( W ) Topology<br>6 k  –  12 K  Buck, Buck-Boost, Isolated Flyback<br>24 k Non-Isolated Flyback<br>**----- End of picture text -----**<br>


Table 2.    Topology Selection Resistor. 

## **FEEDBACK (FB) Pin** 

In normal operation the preset threshold on the FEEDBACK pin is 300 mV. 

Cycle skipping is triggered when voltage on this pin exceeds 600 mV. Auto-Restart is triggered when voltage on this pin exceeds 2 V. 

## **BYPASS (BP) Pin** 

5.25 V supply rail. 

## **OUTPUT COMPENSATION (OC) Pin** 

Output OVP for all topologies.  Output voltage compensation for indirect output current sense topologies. 

## **DRAIN (D) Pin** 

High-voltage internal MOSFET (725 V or 650 V). 

## **SOURCE (S) Pin:** 

Power and signal ground. 

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D Package (SO-16B)<br>OC BP S S S S S S<br>16 15 14 13 12 11 10 9<br>1 2 3 4 5 8<br>FB L DO DS NC D<br>PI-7712-091015<br>**----- End of picture text -----**<br>


Figure 4. Pin Configuration. 

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## **Applications Example** 

## **12 W Tube Lamp Driver Accurate Regulation, High Power Factor, Low ATHD Design Example (DER-515)** 

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L1<br>3.3 mH RTN<br>Optional RCD Clamp<br>R1 T1<br>10 kΩ RS1KD5 680 kR2 Ω R3EFD15 100 100 VC8µF 180 kR11Ω<br>2 MΩ<br>C3 1%<br>2.2 µF<br>450 V<br>B10S-GBR1 100 nFC1 150 nFC2 D7 75 V, 160 mA<br>F1 1000 V 450 V 450 V R4 MURS160T3G<br>L 5 A 2 MΩ<br>1%<br>90 - 308 RV1<br>VAC 320 VAC LYTSwitch-5<br>U1<br>6.04 kR7 Ω LYT5226D L D<br>N 1% DS CONTROL<br>R8 DO<br>6.04 kΩ FB BP OC S<br>1% R5<br>100 kΩ D6<br>1% BAV21W-7-F<br>10 C4µF 40.2 kR9 Ω 150 nFC6 6.2 kR6 Ω C7 EFD15T1<br>10 V 1% 25 V C5 10 25 VµF<br>1 µF<br>10 V<br>R10 PI-7763-120315  HLBB<br>3 Ω<br>1%<br>**----- End of picture text -----**<br>


Figure 5. 12 W, 75 V, 160 mA Non-Isolated Tube Lamp Driver for Wide Input Range of 90 VAC to 308 VAC using LYT5526D. 

The circuit shown in Figure 5 is configured as a buck-boost power supply utilizing the LYT5526D from the LYTSwitch-5 family of ICs. This type of LED driver configuration is common for tube lamp applications where accurate regulation, high efficiency, high power factor and low ATHD are required along with low component count for high reliability.  The output can drive an LED load from 70 V to 80 V with a constant output current of 160 mA ±3% across input range of 90 VAC to 308 VAC and can operate in a maximum ambient temperature of 100 ºC with good margin below the thermal foldback protection point.  It has an efficiency of greater than 89%, very low ATHD% (less than 10%) and high power factor of greater than 0.95 measured at nominal input voltages (115 VAC and 230 VAC). 

LYTSwitch-5 also can be configured in a buck topology, and has advantages where low ATHD is not a critical requirement.  Buck designs can realize between 15% to 33% ATHD.  Advantages of buck over buck-boost configuration are: 

- Lower stress voltage on the driver MOSFET. 

- Higher system efficiency. 

- Potentially smaller EMI filter – dependent on power, shape and size of system. 

## **Circuit Description** 

The LYTSwitch-5 device (U1- LYT5526D) combines a high-voltage power MOSFET, variable frequency and on-time control engine, fast start-up, and protection functions including line and output over- 

voltage into a single package, greatly reducing component count. The integrated 725 V power MOSFET provides a large drain voltage margin in universal input AC applications thus increasing reliability. A 625 V MOSFET option is also offered to reduce cost in applications where the voltage stress on the MOSFET is lower.  Configured to operate as a discontinuous conduction mode buck-boost converter, U1 provides high power factor and very low ATHD via its internal control algorithm (the design also features low input capacitance to further reduce THD and increase PF).  Discontinuous conduction mode inherently eliminates reverse current from the output diode when the MOSFET is in the off-state reducing high frequency noise and allowing the use of a simpler, smaller EMI filter which also improves efficiency. 

## **Input Filter** 

AC input power is rectified by bridge BR1.  1000 V voltage rating is recommended (the maximum clamp voltage for a typical 320 V varistor is 850 V).  The rectified DC is filtered by the input capacitors C1 and C2.  Too much capacitance degrades power factor and ATHD, so the values of the input capacitors were adjusted to the minimum values necessary to meet EMI with a suitable margin.  Inductor L1, C1 and C2 form a π (pi) filter, which attenuates conducted differential and common mode EMI currents.  Resistor R1 across L1 damps the Q of the filter inductor to improve filtering without reducing low frequency attenuation.  F1 provides input protection against catastrophic failure such as short-circuit after the fuse.  For cost 

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reduction, this can be replaced by a fusible resistor (typically a flame proof wire-wound type) which would need to be rated to withstand the instantaneous dissipation induced when charging the input capacitance when first connected to the input line. 

Selection of fuse (F1) type and rating is dependent on input surge requirements.  Typical minimum requirement for tube application is 500 V differential surges.  This design meets a 3 kV surge specification, so a 5-ampere slow blow fuse was used.  A fast-blow fuse with a high ampere energy (I[2] T) rating could also be used. 

An optional RCD surge clamp circuit (D5, R2 and C3) can be employed for differential surge voltage requirement of 3 kV.  Capacitor C3 can also be increased to help meet a higher surge voltage requirement. 

|**Input Range**|**Typical Line Surge**<br>**Requirement**|**Protection**|
|---|---|---|
|90 to 264 VAC|500 V Differential Surge /<br>2.5 kV Ring Wave|275 VAC MOV|
|90 to 308 VAC|1 kV to 3 kV Differential<br>Surge / 2.5 kV Ring Wave|320 VAC MOV,<br>RCD Clamp|



Table 3.    Recommended Surge Protection. 

## **LYTSwitch-5 Output Regulation** 

In order to maintain very accurate output current regulation – within ±3%, the FEEDBACK (FB) pin voltage (with an appropriately selected low-pass filter comprising R9 and C6) is compared to a preset average feedback voltage (VFB) of 300 mV.  When the detected signal is above or below the preset average VFB threshold voltage, the onboard averaging-engine will adjust the frequency and/or on-time to maintain regulation. 

The bias winding voltage is proportional to the output voltage (controlled by the turns-ratio between the bias supply and outputmain winding).  This allows the output voltage to be monitored without the need for output-side feedback components.  Resistor R5 converts the bias voltage into a current which is fed into the OUTPUT COMPENSATION (OC) pin of U1.  The OUTPUT COMPENSATION pin current is also used to detect output overvoltage which is set to 30% above the nominal output voltage.  Once the current exceeds the ILOV+ threshold the IC will trigger a latch which disables switching which prevents the output from rising further.  An AC recycle is needed to reset this protection mode once triggered. 

In order to provide line input voltage information to U1 the rectified input AC voltage is fed into the LINE SENSE (L) pin of U1 as a current via R3 and R4 (4 MW total resistance).  This sensed current is also used by U1 to detect input zero-crossing and set the input line overvoltage protection threshold.  In a line overvoltage condition once this current exceeds the IOOV threshold, the IC will instantaneously disable switching to protect the MOSFET from further voltage stress.  The IC will start switching as soon the line voltage drops to safe levels indicated by the L pin current dropping by 5 mA. 

The primary switched current is sensed via R10 and filtered with C4. The signal is fed into the DRIVER CURRENT SENSE (DS) pin.  A low ESR ceramic capacitor of at least 10 mF is recommended for capacitor C4. 

The internal frequency/on-time engine inside LYTSwitch-5 combines the OUTPUT COMPENSATION pin current, the LINE SENSE pin current and the DRIVER CURRENT SENSE pin current information to deduce the FB signal.  This is compared to an internal VFB threshold to maintain accurate constant output current. 

It is important to note that for accurate output current regulation the use of 1% tolerance for LINE SENSE pin resistors (R3 and R4) is recommended.  This recommendation also applies to OUTPUT COMPENSATION pin resistor R5, FEEDBACK pin resistor R9 (capacitor C6 at least X7R type), and DRIVER CURRENT SENSE pin resistor R7 and R10. 

Diode D6 and C7 provides a bias supply for U1 from an auxiliary winding on the transformer.  Bias supply recommended voltage level is 12 V. Filter capacitor C7 should be sized to ensure a low ripple voltage.  Capacitor C5 serves as local decoupling for the BYPASS pin of U1 which is the supply pin for the internal controller.  Current via R6 is typically limited to 1 mA.  During start-up, C5 is charged to ~5.25 V from an internal high-voltage current source internally fed from the DRAIN pin.  This allows U1 to start switching.  After start-up the operating supply current is provided from the bias supply via R6. The recommended value for the BYPASS pin capacitor C5 is 1 mF. The voltage rating for the capacitor should be greater than 7 V.  The capacitor can be a ceramic or electrolytic type, but tolerance should be less than 50%.  The capacitor must be physically located close to BYPASS and SOURCE pins for effective noise decoupling. 

## **Output Rectification** 

During the switching off-state the output from the transformer main winding is rectified by D7 and filtered by C8.  An ultrafast 1 A, 600 V with 35 ns reverse recovery time (trr) diode was selected for efficiency. The value of the output capacitor C8 was selected to give peak-topeak LED ripple current equal to 30% of the mean value.  For designs where lower ripple is desirable the output capacitance value can be increased unlike traditional power supplies, low ESR capacitors are not required for the output stage of LED designs. 

A small output pre-load resistor R11 discharges the output capacitor when the driver is turned off, giving a relatively quick and smooth decay of the LED light.  Recommended pre-load power dissipation is ≤0.5% of the output power. 

## **Key Design Considerations** 

## **Device Selection** 

The data sheet power table (Table 1) represents the maximum practical continuous output power that can be delivered in an open frame design with adequate heat sinking. 

## **Output Power Table** 

|**Output Power Table**||
|---|---|
|**Product2**|**Output Power1**|
||90-308 VAC|
|**LYT5225D**<br>**LYT5216D, LYT5226D**<br>**LYT5218D, LYT5228D**|9 W<br>16 W<br>25 W|



Table 4.    Output Power Table. 

DER-515 is a 12 W driver.  The LYT5226D IC was chosen for its higher voltage MOSFET rating of 725 V because the topology chosen was a buck-boost and the specification called for a maximum input voltage of 308 VAC.  In other applications where surge and line voltage conditions allow, it may be possible to use the 650 V MOSFET option to reduce design cost without impacting reliability. 

## **Magnetics Design** 

The core type selected was a low profile EFD15 with ferrite core material and a wide winding window that allowed better convection cooling for the winding. 

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To ensure that discontinuous conduction mode (DCM) operation of LYTSwitch-5 is maintained over line input and inductance tolerance variations, and to ensure for accurate output current regulation, it is recommended that the LYTSwitch-5 PIXls spreadsheet located at PI Expert web lab (http://piexpertweblab.power.com/site/login) should be used for magnetics calculations. 

## **EMI Considerations** 

Total input capacitance affects PF and ATHD – increasing the value will degrade performance.  With LYTSwitch-5, the combination of a low-side switching configuration and frequency jitter reduces EMI and enables the use of small and simple π (pi) filter.  It also allows simple magnetic construction where the main winding can be wound continuously using the automated winding approach preferred for low-cost manufacturing.  The recommended location of the EMI filter is after the bridge rectifier.  This allows the use of regular film capacitors as opposed to more expensive safety rated X capacitors that would be required if the filter is placed before the bridge. 

## **Surge Immunity Consideration** 

This design assumed a differential surge requirement of 3 kV which can be met easily with LYTSwitch-5 line overvoltage protection and using a RCD surge clamp circuit (D5, R2 and C3) and MOV (RV1).  For lower differential surge requirement such as 1 kV, capacitor C3 can be reduced to 1 mF. 

## **Thermal and Lifetime Considerations** 

Lighting applications present thermal challenges to the driver.  In many cases the LED load dissipation determines the working ambient temperature experienced by the drive.  Thermal evaluation should be performed with the driver inside the final enclosure.  Temperature has a direct impact on driver and LED lifetime.  For every 10 °C rise in temperature, component life is reduced by a factor of 2.  Therefore it is important to verify and optimize the operating temperatures of all components. 

## **Quick Design Checklist** 

## **Maximum Drain Voltage** 

Verify that the peak drain voltage stress (VDS) does not exceed maximum acceptable drain voltage under all operating conditions, including start-up and fault conditions. 

## **Thermal Check** 

At maximum output power, for both minimum and maximum line voltage and maximum ambient temperature; verify that temperature specifications are not exceeded for the LYTSwitch-5, transformer, output diodes, output capacitors and clamp components. 

## **PCB Layout Considerations** 

The EMI filter components should be located close together to improve filter effectiveness.  Place the EMI filter components C1 and L1 as far away as possible from any switching nodes on the circuit board especially U1 drain node, output diode (D7) and the transformer (T1). 

Care should be taken in placing the components on the layout that are used for processing input signals for the feedback loop – any high frequency noise coupled to the signal pins of U1 may affect proper system operation.  The critical components in DER-515 are R5, R9, C6, R4, R7 and R8.  It is highly recommended that these components be placed very close to the pins of U1 (to minimize long traces which could serve as antenna) and far away as much as possible from any high voltage and high current nodes in the circuit board to avoid noise coupling. 

The bypass supply capacitor C5 should be placed directly across BYPASS pin and SOURCE pin of U1 for effective noise decoupling. 

As shown in Figure 6, minimize the loop areas of the following switching circuit elements to lessen the creation of EMI. 

- Loop area formed by the transformer output winding (T1), output rectifier diode (D7) and output capacitor (C8). 

- Loop area formed by transformer bias winding (T1), rectifier diode (D6) and filter capacitor (C7). 

- Loop area formed by input capacitor (C2), transformer (T1) main winding R10, C4 and internal MOSFET (U1). 

Lastly, unlike discrete MOSFET designs where heat sinking is through the drain tab and which generates significant EMI, the LYTSwitch-5 devices employ low-side switching and the ground potential SOURCE pins are used for heat sinking.  This allows the designer to maximize the copper area for good thermal management but without having the risk of increased EMI. 

## **Design Tools** 

## **Maximum Drain Current** 

Up-to-date information on design tools can be found at the Power Integrations web site: www.power.com 

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Measure the peak drain current under all operation conditions<br>(including start-up and fault conditions).  Look for transformer  Integrations web site: www.power.com<br>saturation (usually occurs at highest operating ambient tempera-<br>LYTSwitch-5 PIXls spreadsheet is located at PI Expert web lab:<br>tures).  Verify that the peak current is less than the stated Absolute<br>http://piexpertweblab.power.com/site/login.<br>Maximum Rating in the data sheet.<br>OUTPUT<br>Drain Current COMPENSATION BYPASS Pin Bias Diode Rectifier D6<br>Sense R10 and C4 Pin Resistor R5 Capacitor C5 and Filter C7<br>TRF<br>Output<br>Capacitor<br>=(Tae<br>PI-7795-120315<br>me Oeek cot<br>FEEDBACK Pin  LINE SENSE Pin  DRIVER CURRENT DATA OUTPUT Pin Ouput Diode<br>Resistor R9 and C6 Resistor R4 SENSE Pin Resistor R7 Resistor R8 Rectifier D7 and<br>Filter C8<br>**----- End of picture text -----**<br>


Figure 6. DER-515 PCB Layout Example using SO-16B D Package. Shows the Location of Critical Components and Loop Areas on the PCB Layout. 

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**LYT5216-5228** 

## **Absolute Maximum Ratings[(1,3)]** 

|DRAIN Pin Voltage:<br>LYT521x............................ -0.3 V to 650 V|
|---|
|LYT522x ........................... -0.3 V to 725 V|
|DRAIN Pin Peak Current**(4)**LYT5225 ........................... 1.95 A (3.16 A)|
|LYT5216 ............................. 3.25 A (4.0 A)|
|LYT5226 ........................... 2.64 A (4.35 A)|
|LYT5218 ............................. 5.06 A (6.3 A)|
|LYT5228 ........................... 4.16 A (6.86 A)|
|BP, DO, DS, OC, L DS, FB Pin Voltage ..........................-0.3 V to 6.5 V|
|Lead Temperature(2).............................................................. 260 °C|
|Storage Temperature ...................................................-65 to 150 °C|
|Operating Junction Temperature .................................. -40 to 150 °C|



## Notes: 

1. All voltages referenced to Source, TA = 25 °C. 

2. 1/16 in.  from case for 5 seconds. 

3. The Absolute Maximum Ratings specified may be applied,  one at a time without causing permanent damage to the product.  Exposure to Absolute Maximum Ratings for extended periods of time may affect product reliability. 

4. The higher peak Drain current (in parentheses) is allowed while the Drain voltage is simultaneously less than 400 V for 725 V integrated MOSFET version, or less than 325 V for 650 V integrated MOSFET version. 

## **Thermal Resistance** 

Thermal Resistance: SO-16B Package: (qJA) ..................................................78 °C/W[(2)] (qJA) ....................................................68 °C/W[(3)] (qJC)[(1)] ...............................................43 °C/W 

## Notes: 

1. Measured per JESD 51-1, MIL-STD-883C-1012.1 and SEMI test method #G43-87. 

2. Soldered to 0.36 sq. inch (232 mm2) 2 oz. (610 g/m2) copper clad, with no external heat sink attached. 

3. Soldered to 1 sq. in. (645 mm[2] ), 2 oz, (610 g/m[2] ) copper clad. 

|**Parameter**|**Symbol**|**Conditions**<br>SOURCE = 0 V<br>TJ= -40 °C to +125 °C<br>(Unless Otherwise Specifed)|**Conditions**<br>SOURCE = 0 V<br>TJ= -40 °C to +125 °C<br>(Unless Otherwise Specifed)|**Min**|**Typ**|**Max**|**Units**|
|---|---|---|---|---|---|---|---|
|**Control Functions**||||||||
|**Maximum**<br>**Output Frequency**|fMAX|TJ= 25 °C|Average|115.3|124|132.7|kHz|
||||Peak-to-Peak Jitter||8||%|
|**Minimum**<br>**Output Frequency**|fMIN|TJ= 0 °C to 125 °C|Average||40||kHz|
||||Peak-to-Peak Jitter||8||%|
|**Frequency Jitter**<br>**Modulation Rate**|fM|See Note A|||1.76||kHz|
|**Maximum On-Time**|TON(MAX)|TJ= 25 °C||5.75|6.25|6.75|ms|
|**Minimum On-Time**|TON(MIN)|TJ= 25 °C||0.95|1.05|1.15|ms|
|**FEEDBACK Pin Voltage**|VFB|TJ= 25 °C||291|300|309|mV|
|**FEEDBACK Pin Voltage**<br>**Triggering Cycle**<br>**Skipping**|VFB(SK)||||600||mV|
|**FEEDBACK Pin**<br>**Overvoltage Threshold**|VFB(OV)||||2000||mV|
|**Feedback Pull-Up Current**|IFB|||-1.3|-1.0|-0.7|mA|



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|**Parameter**|**Symbol**|**Conditions**<br>SOURCE = 0 V<br>TJ= -40 °C to +125 °C<br>(Unless Otherwise Specifed)|**Conditions**<br>SOURCE = 0 V<br>TJ= -40 °C to +125 °C<br>(Unless Otherwise Specifed)|**Conditions**<br>SOURCE = 0 V<br>TJ= -40 °C to +125 °C<br>(Unless Otherwise Specifed)|**Min**|**Typ**|**Max**|**Units**|
|---|---|---|---|---|---|---|---|---|
|**Control Functions (cont.)**|||||||||
|**DRAIN Supply Current**|IS1|VFB(ON)> VFB> VFB(SK)<br>(MOSFET not switching)||||0.8|1.0|mA|
||IS2|MOSFET Switching<br>at fMAX|LYT5225, LYT52x6|||1.1|1.4|mA|
||||LYT5218|||1.2|1.5||
||||LYT5228|||1.3|1.6||
|**BYPASS Pin**<br>**Charge Current**|ICH1|VBP= 0 V,|TJ= 25 °C||-11.5|-9.5|-7.5|mA|
|**BYPASS Pin**<br>**Charge Current**|ICH2|VBP= 4 V,|TJ= 25 °C||-8.8|-6.8|-4.8|mA|
|**BYPASS Pin Voltage**|VBP||||4.75|5.00|5.25|V|
|**BYPASS Pin**<br>**Shunt Voltage**|VSHUNT|IBP=|5 mA||5.1|5.3|5.5|V|
|**BYPASS Pin Power-Up**<br>**Reset Threshold Voltage**|VBP(RESET)||||4.4|4.6|4.8|V|
|**Circuit Protection**|||||||||
|**Current Limit**|ILIMIT|di/dt = 974 mA/ms<br>TJ= 25°C||LYT5225|1232|1325|1418|mA|
|||di/dt = 1403 mA/ms<br>TJ= 25°C||LYT52x6|1767|1900|2033||
|||di/dt = 2239 mA/ms<br>TJ= 25°C||LYT52x8|2860|3075|3290||
|**Leading Edge**<br>**Blanking Time**|tLEB|TJ=|25 °C||130|165||ns|
|**Current Limit Delay**|TILD|TJ= 25 °C<br>See Note A||||160||ns|
|**Thermal Foldback**<br>**Temperature**|TFB|See Note A|||138|142|146|°C|
|**Thermal Shutdown**<br>**Temperature**|TSD|See Note A|||155|160|165|°C|
|**Thermal Shutdown**<br>**Hysteresis**|TSD(H)|See Note A||||75||°C|
|**SOA Switch ON-Time**|TON(SOA)|TJ=|25 °C|||610|690|ns|
|**Auto-Restart Current**<br>**Threshold for Output**<br>**Undervoltage**|IOUV|TJ=|25 °C||40|52|58|mA|
|**Current Threshold for**<br>**Input Voltage**|ILOV+|TJ= 25 °C|Threshold||116|120|124|mA|
||||Hysteresis|||5|||
|**Latch-Off Current**<br>**Threshold for Output**<br>**Overvoltage**|IOOV|TJ=|25 °C||127|134|144|mA|
|**LINE-SENSE Pin Voltage**|VL|IL= 100mA, TJ= 25°C|||2.05|2.25|2.45|V|



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|**Parameter**|**Symbol**|**Conditions**<br>SOURCE = 0 V<br>TJ= -40 °C to +125 °C<br>(Unless Otherwise Specifed)|**Conditions**<br>SOURCE = 0 V<br>TJ= -40 °C to +125 °C<br>(Unless Otherwise Specifed)|**Min**|**Typ**|**Max**|**Units**|
|---|---|---|---|---|---|---|---|
|**Output**||||||||
|**OUTPUT**<br>**COMPENSATION Pin**|VOC|IOC= 100mA<br>TJ= 25°C||2.05|2.25|2.45|V|
|**ON-State**<br>**Resistance**|RDS(ON)|LYT5225<br>ID= 200 mA|TJ= 25°C||3.80|4.35|W|
||||TJ= 100°C||5.70|6.55||
|||LYT52x6<br>ID= 300 mA|TJ= 25°C||2.75|3.15||
||||TJ= 100°C||4.25|4.90||
|||LYT52x8<br>ID= 500 mA|TJ= 25°C||1.75|2.00||
||||TJ= 100°C||2.70|3.10||
|**OFF-State Leakage**|IDSS|VBP= 5.3 V, VFB> VFB(SK), VDS= 580 V<br>TJ= 125 °C||||200|mA|
|**Breakdown Voltage**|BVDSS|VBP= 5.3 V, VFB> VFB(SK)<br>TJ= 25°C|LYT521x|650|||V|
||||LYT522x|725||||



## NOTES: 

A. Guaranteed by design. 

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**LYT5216-5228** 

## **Typical Performance Curves** 

**==> picture [189 x 389] intentionally omitted <==**

**----- Start of picture text -----**<br>
200<br>Scaling Factors:<br>175 LYT5225  1.0<br>LYT5226  1.45<br>150 LYT5228  2.35<br>125 Scaling Factors:<br>LYT5216  1.0<br>LYT5218  1.65<br>100<br>75<br>50<br>725 V<br>25 650 V<br>0<br>0 100 200 300 400 500 600<br>DRAIN Voltage (V)<br>Figure 7.  Power vs. Drain Voltage.<br>1.8<br>1.6<br>1.4<br>1.2<br>1<br>0.8<br>0.6<br>Scaling Factors: 725 V<br>0.4<br>LYT5225  1.0 25 °C<br>0.2 LYT5226  1.45 725 V<br>LYT5228  2.35  125 °C<br>0<br>0 2 4 6 8 10 12 14 16 18 20<br>DRAIN Voltage (V)<br>PI-7757-101615<br>Power (mW)<br>PI-7759-101615<br>DRAIN Current (A)<br>**----- End of picture text -----**<br>


Figure 9. Drain Current vs. Drain Voltage. 

**==> picture [194 x 396] intentionally omitted <==**

**----- Start of picture text -----**<br>
1.2<br>725 V<br>650 V<br>1<br>0.8<br>0.6<br>0.4<br>0.2<br>0<br>0 100 200 300 400 500 600 700 800<br>DRAIN Voltage (V)<br>Figure 8  Maximum Allowable Drain Current vs. Drain Voltage.<br>2.2<br>2<br>1.8<br>1.6<br>1.4<br>1.2<br>1<br>0.8<br>0.6<br>Scaling Factors: 650 V<br>0.4 LYT5216  1.0 25  ° C<br>LYT5218  1.65  650 V<br>0.2 125 °C<br>0<br>0 2 4 6 8 10 12 14 16 18 20<br>DRAIN Voltage (V)<br>PI-7758-101615<br>DRAIN Current<br>(Normalized to Absolute Max Rating)<br>PI-7760-101615<br>DRAIN Current (A)<br>**----- End of picture text -----**<br>


Figure 8 Maximum Allowable Drain Current vs. Drain Voltage. 

Figure 10. Drain Current vs. Drain Voltage. 

**==> picture [187 x 180] intentionally omitted <==**

**----- Start of picture text -----**<br>
10000<br>Scaling Factors:<br>LYT5225  1.0<br>LYT5226  1.45<br>LYT5228  2.35<br>1000 725 V Scaling Factors:<br>650 V LYT5216  1.0<br>LYT5218  1.65<br>100<br>1<br>0 100 200 300 400 500 600<br>DRAIN Voltage (V)<br>PI-7761-101615<br>DRAIN Capacitance (pF)<br>**----- End of picture text -----**<br>


Figure 11. Drain Capacitance vs. DRAIN Pin Voltage. 

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**LYT5216-5228** 

**==> picture [518 x 378] intentionally omitted <==**

**----- Start of picture text -----**<br>
SO-16B<br>3 4<br>0.019 [0.48] 14X 0.050 [1.27]<br>0.013 [0.33]<br>0.010 [0.25] M C A B<br>8 Lead Tips<br>16 9 0.005 [0.13]  C  0.044 [1.10] Ref.<br>2X  0.004 [0.10]  C B H<br>0.010 [0.25]<br>0.153 [3.90] 2 0.239 [6.07]<br>Gauge Plane<br>Seating Plane<br>B 1 8 6 Lead Tips0.005 [0.13]  C  C 08 [º][º]<br>Pin #1 I.D. 0.032 [0.81]<br>(Laser Marked) 0.022 [0.56]<br>0.135 [3.43]<br>Ref.<br>2<br>A 0.390 [9.91]  0.004 [0.10]  C A 2X  DETAIL A<br>TOP VIEW<br>Notes:<br>0.066 [1.69] 1.  Dimensioning and tolerancing per<br>0.057 [1.46] 0.054 [1.38] Ref. Detail A      ASME Y14.5M-1994.<br>2.  Dimensions noted are determined at the<br>     outermost extremes of the plastic body exclusive<br>     of mold flash, tie bar burrs, gate burrs, and<br>     inter-lead flash, but including any mismatch<br>Seating      between the top and bottom of the plastic body.<br>Plane 0.010 [0.25]      Maximum mold protrusion is 0.25 mm per side.<br>C 0.004 [0.10] 3.  Dimensions noted are inclusive of plating<br>0.010 [0.25]      thickness.<br>0.004 [0.10] 0.004 [0.10]  C  4.  Does not include inter-lead flash or protrusions.<br>14 Leads END VIEW 5.  Dimensions in Inches [mm].<br>6.  Datums A and B to be determined in Datum H.<br>SIDE VIEW 7.  JEDEC reference:  MS − 012.<br>PI-7473-061515<br>POD-SO-16B Rev A<br>**----- End of picture text -----**<br>


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**LYT5216-5228** 

**==> picture [517 x 210] intentionally omitted <==**

**----- Start of picture text -----**<br>
PACKAGE MARKING<br>SO-16B<br>B<br>A<br>1545<br>C<br>LYT5228D<br>M4P167A D<br>**----- End of picture text -----**<br>


- A.   Power Integrations Registered Trademark 

- B.   Assembly Date Code (last two digits of year followed by 2-digit work week) 

- C.   Product Identification (Part #/Package Type) 

- D.   Lot Identification Code 

PI-7800-111915 

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**LYT5216-5228** 

## **MSL Table** 

|**Part Number**|**MSL Rating**|
|---|---|
|LYT5225D|3|
|LYT5216D|3|
|LYT5226D|3|
|LYT5218D|3|
|LYT5228D|3|



## **ESD and Latch-Up Table** 

|**ESD and Latch-Up Table**|||
|---|---|---|
|**Test**|**Conditions**|**Results**|
|Latch-up at 125 °C<br>Human Body Model ESD<br>Machine Model ESD|JESD78D<br>JESD22-A114F<br>JESD22-A115A|> ±100 mA or > 2.5 kV (max) on all pins<br>> ±2000 V on all pins<br>> ±200 V on all pins|



## **Part Ordering Information** 

**==> picture [274 x 146] intentionally omitted <==**

**----- Start of picture text -----**<br>
 • LYTSwitch-5 Product Family<br> • Series Number<br> • MOSFET VDS Rating<br>1 650 V<br>2 725 V<br> • Device Size<br> • Package Identifier<br>D SO-16B<br>  • Tape & Reel and Other Options<br>Blank  Tube of 50 pcs.<br>LYT   52   2    5    D- TL TL  Tape & Reel, 2500 pcs min/mult.<br>**----- End of picture text -----**<br>


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|**Revision**|**Notes**|**Date**|
|---|---|---|
|B<br>B<br>B<br>C|Code A Release.<br>Made text corrections to LYTSwitch-5 Output Regulation section and PCB Layout Considerations section. Corrections<br>made to Figures 5 and 6.<br>Updated Figures 1a and 1b. Modifed text in 1st paragraph of Input Filter section on page 4.<br>Corrected IS2, TLEB, TFB, TSD, IOOVparameters. Added IOUVand VLparameters.|11/15<br>12/03/15<br>12/11/15<br>03/16|



## **For the latest updates, visit our website: www.power.com** 

Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability.  Power Integrations does not assume any liability arising from the use of any device or circuit described herein.  POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. 

## **Patent Information** 

The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations.  A complete list of Power Integrations patents may be found at www.power.com.  Power Integrations grants its customers a license under certain patent rights as set forth at http://www.power.com/ip.htm. 

## **Life Support Policy** 

POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS.  As used herein: 

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2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 

The PI logo, TOPSwitch, TinySwitch, LinkSwitch, LYTSwitch, InnoSwitch, DPA-Switch, PeakSwitch, CAPZero, SENZero, LinkZero, HiperPFS, HiperTFS, HiperLCS, Qspeed, EcoSmart, Clampless, E-Shield, Filterfuse, FluxLink, StakFET, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies.  ©2016, Power Integrations, Inc. 

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