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LYT4222E3
Led Driver, 1 Output, Buck-Boost, Flyback, 160VAC-300VAC in, 132kHz switch, eSIP-6
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- Manufacturer: POWER INTEGRATIONS
- Product type: AC / DC LED Driver ICs
- Device Topology:Buck, Buck-Boost, Flyback; Input Voltage Min:160V; Input Voltage Max:300V; Output Voltage Max:-; Output Current Max:-; Switching Frequency:132kHz; No. of Outputs:1O
- MSL: MSL 3 - 168 hours
- SVHC: No SVHC (15-Jan-2018)
- Topology: Buck, Buck-Boost, Flyback
- IC Mounting: Through Hole
- No. of Pins: 6Pins
- Product Range: -
- Qualification: -
- No. of Outputs: 1Outputs
- Device Topology: Buck, Buck-Boost, Flyback
- LED Driver Type: Isolated, Non Isolated
- Driver Case Style: eSIP
- IC Case / Package: eSIP
- Input Voltage Max: 300V
- Input Voltage Min: 160V
- Output Current Max: -
- Output Voltage Max: -
- Switching Frequency: 132kHz
- Switching Frequency Typ: 132kHz
- Operating Temperature Max: 150°C
- Operating Temperature Min: -40°C
- Automotive Qualification Standard: -
| Delivery and price | |
|---|---|
| Units per pack | 1 |
| Price | 0.349 € |
| Current stock | 10+ |
| Lead time | 30 days |
Datasheet
## LYT4211-4218/4311-4318 LYTSwitch-4 **™** High Power LED Driver IC Family
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Single-Stage Accurate Primary-Side Constant Current (CC) Controller with PFC for Low-Line Applications with TRIAC Dimming and Non-Dimming Options
## **Optimized for Different Applications and Power Levels**
|**Part Number**|**Input Voltage Range**|**TRIAC Dimmable**|
|---|---|---|
|LYT4211-LYT4218<br>LYT4311-LYT4318|85-132 VAC<br>85-132 VAC|No<br>Yes|
## **Output Power Table**
|**Product**|**Minimum Output Power**|**Maximum Output Power**|
|---|---|---|
|**LYT4x11E**<br>**LYT4x12E**<br>**LYT4x13E**<br>**LYT4x14E**<br>**LYT4x15E**<br>**LYT4x16E**<br>**LYT4x17E**<br>**LYT4x18E**|2.5 W<br>2.5 W<br>3.8 W<br>4.5 W<br>5.5 W<br>6.8 W<br>8.0 W<br>18 W|12 W<br>15 W<br>18 W<br>22 W<br>25 W<br>35 W<br>50 W<br>78 W|
## LYT4221-4228/4321-4328 LYTSwitch-4 ™ High Power LED Driver IC Family
Single-Stage Accurate Primary-Side Constant Current (CC) Controller with PFC for High-Line Applications with TRIAC Dimming and Non-Dimming Options
## **Optimized for Different Applications and Power Levels**
|**Part Number**|**Input Voltage Range**|**TRIAC Dimmable**|
|---|---|---|
|LYT4221-LYT4228<br>LYT4321-LYT4328|160-300 VAC<br>160-300 VAC|No<br>Yes|
## **Output Power Table**
|**Product**|**Minimum Output Power**|**Maximum Output Power**|
|---|---|---|
|**LYT4x21E**<br>**LYT4x22E**<br>**LYT4x23E**<br>**LYT4x24E**<br>**LYT4x25E**<br>**LYT4x26E**<br>**LYT4x27E**<br>**LYT4x28E**|6 W<br>6 W<br>8 W<br>9 W<br>11 W<br>14 W<br>19 W<br>33 W|12 W<br>15 W<br>18 W<br>22 W<br>25 W<br>35 W<br>50 W<br>78 W|
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## LYT4211-4218/4311-4318 LYTSwitch-4 ™ High Power LED Driver IC Family
Single-Stage Accurate Primary-Side Constant Current (CC) Controller with PFC for Low-Line Applications with TRIAC Dimming and Non-Dimming Options
## Product Highlights
- Better than ±5% CC regulation
- TRIAC dimmable to less than 5% output
- Fast start-up
- <250 ms at full brightness
- <1s at 10% brightness
- High power factor >0.9
- Easily meets EN61000-3-2
- Less than 10% THD in optimized designs
- Up to 92% efficient
- 132 kHz switching frequency for small magnetics
## **High Performance, Combined Driver, Controller, Switch**
The LYTSwitch-4 family enables off-line LED drivers with high power factor which easily meet international requirements for THD and harmonics. Output current is tightly regulated with better than ±5% CC tolerance[1] . Efficiency of up to 92% is easily achieved in typical applications.
## **Supports a Wide Selection of TRIAC Dimmers**
The LYTSwitch-4 family provides excellent turn-on characteristics for leading-edge and trailing-edge TRIAC dimming applications. This results in drivers with a wide dimming range and fast start-up, even when turning on from a low conduction angle – large dimming ratio and low “pop-on” current.
## **Low Solution Cost and Long Lifetime**
LYTSwitch-4 ICs are highly integrated and employ a primary-side control technique that eliminates the optoisolator and reduces component count. This allows the use of low-cost single-sided printed circuit boards. Combining PFC and CC functions into a single-stage also helps reduce cost and increase efficiency. The 132 kHz switching frequency permits the use of small, low-cost magnetics.
LED drivers using the LYTSwitch-4 family do not use primaryside aluminum electrolytic bulk capacitors. This means greatly extended driver lifetime, especially in bulb and other high temperature applications.
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AC<br>IN<br>D V LYTSwitch-4<br>CONTROL<br>BP<br>S R FB<br>PI-6800-050913<br>**----- End of picture text -----**<br>
_Figure 1. Typical Schematic._
## **Optimized for Different Applications and Power Levels**
|**Part Number**|**Input Voltage Range**|**Input Voltage Range**<br>**TRIAC Dimmable**|
|---|---|---|
|LYT4211-LYT4218<br>LYT4311-LYT4318|85-132 VAC<br>85-132 VAC|No<br>Yes|
## **Output Power Table[1,2]**
|**Product 6**|**Minimum Output Power 3 Maximum Output Power**|**Maximum Output Power 4**|
|---|---|---|
|**LYT4x11E5**<br>**LYT4x12E**<br>**LYT4x13E**<br>**LYT4x14E**<br>**LYT4x15E**<br>**LYT4x16E**<br>**LYT4x17E**<br>**LYT4x18E**|2.5 W<br>2.5 W<br>3.8 W<br>4.5 W<br>5.5 W<br>6.8 W<br>8.0 W<br>18 W|12 W<br>15 W<br>18 W<br>22 W<br>25 W<br>35 W<br>50 W<br>78 W|
_Table 1. Output Power Table._ Notes _:_
1. Performance for typical design. See Application Note.
2. Continuous power in an open-frame design with adequate heat sinking; device local ambient of 70 °C. Power level calculated assuming a typical LED string voltage and efficiency >80%.
3. Minimum output power requires CBP = 47 µ F.
4. Maximum output power requires CBP = 4.7 µ F.
_Figure 2. Package Options._
eSIP-7C (E Package)
5. LYT4311 CBP = 47 µ F, LYT4211 CBP = 4.7 µ F.
6. Package: eSIP-7C (see Figure 2).
November 2014
www.power.com
_This Product is Covered by Patents and/or Pending Patent Applications._
**LYT4211-4218/4311-4318**
|**Topology**|**Isolation**<br>|**Effciency**|**Cost**|**THD**|**Output Voltage**|
|---|---|---|---|---|---|
|Isolated Flyback<br>Buck<br>Tapped-Buck<br>Buck-Boost|Yes<br>No<br>No<br>No|88%<br>92%<br>89%<br>90%|High<br>Low<br>Middle<br>Low|Best<br>Good<br>Best<br>Best|Any<br>Limited<br>Any<br>High-Voltage|
_Table 2. Performance of Different Topologies in a Typical Non-Dimmable 10 W Low-Line Design._
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Typical Circuit Schematic Key Features<br>Flyback<br>Benefits<br>• Provides isolated output<br>• Supports widest range of output voltages<br>• Very good THD performance<br>Limitations<br>AC<br>IN D V LYTSwitch-4 • Flyback transformer<br>CONTROL BP • Overall efficiency reduced by parasitic capacitance<br>and inductance in the transformer<br>S R FB<br>• Larger PCB area to meet isolation requirements<br>PI-6800-050913 • Requires additional components (primary clamp and bias)<br>• Higher RMS switch and winding currents increases losses<br>Figure 3a. Typical Isolated Flyback Schematic. and lowers efficiency<br>**----- End of picture text -----**<br>
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Buck<br>Benefits<br>• Highest efficiency<br>• Lowest component count – small size<br>• Simple low-cost power inductor<br>• Low drain source voltage stress<br>AC<br>IN D CONTROLV LYTSwitch-4 Limitations• Best EMI/lowest component count for filter<br>BP<br>• Single input line voltage range<br>S R FB • Output voltage <0.6 × VIN(AC) × 1.41<br>• Output voltage for low THD designs<br>PI-6841-111813 • Non-isolated<br>Figure 3b. Typical Buck Schematic.<br>Tapped-Buck<br>Benefits<br>• Ideal for low output voltage designs (<20 V)<br>• High efficiency<br>• Low component count<br>LYTSwitch-4 • Simple low-cost tapped inductor<br>ACIN D V Limitations<br>CONTROL BP • Designs best suited for single input line voltage<br>S R FB • Requires additional components (primary clamp)<br>• Non-isolated<br>PI-6842-111813<br>Figure 3c. Typical Tapped-Buck Schematic.<br>Buck-Boost<br>Benefits<br>• Ideal for non-isolated high output voltage designs<br>• High efficiency<br>• Low component count<br>• Simple common low-cost power inductor can be used<br>AC<br>IN • Lowest THD<br>D CONTROLV LYTSwitch-4 Limitations<br>BP<br>• Maximum VOUT is limited by MOSFET breakdown voltage<br>S R FB • Single input line voltage range<br>• Non-isolated<br>PI-6859-111813<br>**----- End of picture text -----**<br>
_Figure 3d. Typical Buck-Boost Schematic._
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DRAIN (D)<br>BYPASS (BP) REGULATOR5.9 V<br>BYPASS<br>CAPACITOR SOFT-START<br>SELECT TIMER HYSTERETIC<br>THERMAL<br>SHUTDOWN<br>FAULT<br>ILIM MI AUTO-RESTART PRESENT 5.9 V<br>5.0 V<br>COUNTER<br>BYPASS PIN<br>1 V UNDERVOLTAGE DriverGate<br>VOLTAGE SenseFet<br>MONITOR (V) STOP JITTER<br>LOGIC CLOCK<br>Comparator<br>OSCILLATOR<br>LEB<br>3-VT DCFBMAXOFF<br>OCP<br>OV<br>LINE<br>SENSE<br>FEEDBACK (FB) IV PFC/CC CURRENT LIMITCOMPARATOR ILIM<br>VBG IFB CONTROL MI VSENSE<br>FEEDBACK FBOFF<br>SENSE DCMAX<br>IS<br>REFERENCE (R) REFERENCEBLOCK VBG<br>6.4 V<br>PI-6843-071112 SOURCE (S)<br>+<br>-<br>-<br>+<br>+<br>-<br>**----- End of picture text -----**<br>
_Figure 4. Functional Block Diagram._
## Pin Functional Description
## DRAIN (D) Pin:
This pin is the power FET drain connection. It also provides internal operating current for both start-up and steady-state operation.
## SOURCE (S) Pin:
This pin is the power FET source connection. It is also the ground reference for the BYPASS, FEEDBACK, REFERENCE and VOLTAGE MONITOR pins.
## BYPASS (BP) Pin:
This is the connection point for an external bypass capacitor for the internally generated 5.9 V supply. This pin also provides output power selection through choice of the BYPASS pin capacitor value.
## FEEDBACK (FB) Pin:
The FEEDBACK pin is used for output voltage feedback. The current into the FEEDBACK pin is directly proportional to the output voltage. The FEEDBACK pin also includes circuitry to protect against open load and overload output conditions.
## REFERENCE (R) Pin:
## VOLTAGE MONITOR (V) Pin:
This pin interfaces with an external input line peak detector, consisting of a rectifier, filter capacitor and resistors. The applied current is used to control stop logic for overvoltage (OV), provide feed-forward to control the output current and the remote ON/OFF function.
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E Package (eSIP-7C)<br>(Top View)<br>Exposed Pad<br>(Backside) Internally<br>Connected to<br>SOURCE Pin (see<br>eSIP-7C Package<br>Drawing)<br>PI-7076-062513<br>1 R 2 V 3 FB 4 BP 5 S 7 D<br>**----- End of picture text -----**<br>
_Figure 5. Pin Configuration._
This pin is connected to an external precision resistor and is used to configure for dimming (LYT4311-4318) and non-TRIAC dimming (LYT4211-4218) modes of operation.
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## Functional Description
A LYTSwitch-4 device monolithically combines a controller and high-voltage power FET into one package. The controller provides both high power factor and constant current output in a single-stage. The LYTSwitch-4 controller consists of an oscillator, feedback (sense and logic) circuit, 5.9 V regulator, hysteretic over-temperature protection, frequency jittering, cycle-by-cycle current limit, auto-restart, inductance correction, power factor and constant current control.
## FEEDBACK Pin Current Control Characteristics
The figure shown below illustrates the operating boundaries of the FEEDBACK pin current. Above IFB(SKIP) switching is disabled and below I the device enters into auto-restart. FB(AR)
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I<br>FB(SKIP) Skip-Cycle<br>IFB CC ControlRegion<br>I<br>FB(DCMAXR)<br>Soft-Start and<br>CC Fold-Back<br>Region<br>I<br>FB(AR) Auto-Restart<br>DC10 DCMAX<br>Maximum Duty Cycle<br>PI-5433-060410<br>Figure 6. FEEDBACK Pin Current Characteristic.<br>**----- End of picture text -----**<br>
The FEEDBACK pin current is also used to clamp the maximum duty cycle to limit the available output power for overload and open-loop conditions. This duty cycle reduction characteristic also promotes a monotonic output current start-up characteristic and helps preventing over-shoot.
## REFERENCE Pin
The REFERENCE pin is tied to ground (SOURCE) via an external resistor. The value selected sets the internal references, determining the operating mode for dimming (LYT4311-4318) and non-dimming (LYT4211-4218) operation and the line overvoltage thresholds of the VOLTAGE MONITOR pin.
For non-dimming or PWM dimming applications with LYT42114218, the external resistor should be a 24.9 k W ±1%. For phase angle AC dimming with LYT4311-4318, the external resistor should be a 49.9 k W ±1%. One percent resistors are recommended as the resistor tolerance directly affects the output tolerance. Other resistor values should not be used.
## BYPASS Pin Capacitor Power Gain Selection
LYTSwitch-4 devices have the capability to tailor the internal gain to either full or a reduced output power setting. This allows selection of a larger device to minimize dissipation for both thermal and efficiency reasons. The power gain is selected with the value of the BYPASS pin capacitor. The full power setting is selected with a 4.7 µ F capacitor and the reduced power setting (for higher efficiency) is selected with a 47 µ F capacitor. The BYPASS pin capacitor sets both the internal power gain as well as the over-current protection (OCP) threshold. Unlike the larger devices, the LYT4x11 power gain is not programmable. Use a 47 µ F capacitor for the LYT4x11.
## Switching Frequency
The switching frequency is 132 kHz during normal operation. To further reduce the EMI level, the switching frequency is jittered (frequency modulated) by approximately 2.6 kHz. During start-up the frequency is 66 kHz to reduce start-up time when the AC input is phase angle dimmed. Jitter is disabled in deep dimming.
## Soft-Start
The controller includes a soft-start timing feature which inhibits the auto-restart protection feature for the soft-start period (tSOFT) to distinguish start-up into a fault (short-circuit) from a large output capacitor. At start-up the LYTSwitch-4 clamps the maximum duty cycle to reduce the output power. The total soft-start period is tSOFT.
## Remote ON/OFF and EcoSmart[™]
The VOLTAGE MONITOR pin has a 1 V threshold comparator connected at its input. This voltage threshold is used for remote ON/OFF control. When a signal is received at the VOLTAGE MONITOR pin to disable the output (VOLTAGE MONITOR pin tied to ground through an optocoupler phototransistor) the LYTSwitch-4 will complete its current switching cycle before the internal power FET is forced off.
The remote ON/OFF feature can also be used as an eco-mode or power switch to turn off the LYTSwitch-4 and keep it in a very low power consumption state for indefinite long periods. When the LYTSwitch-4 is remotely turned on after entering this mode, it will initiate a normal start-up sequence with soft-start the next time the BYPASS pin reaches 5.9 V. In the worst case, the delay from remote on to start-up can be equal to the full discharge/charge cycle time of the BYPASS pin. This reduced consumption remote off mode can eliminate expensive and unreliable in-line mechanical switches.
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D V<br>CONTROL<br>BP<br>S R FB<br>PI-5435-052510<br>**----- End of picture text -----**<br>
_Figure 7. Remote ON/OFF VOLTAGE MONITOR Pin Control._
completed. Special consideration must be made to appropriately size the output capacitor to ensure that after the soft-start period (tSOFT) the FEEDBACK pin current is above the IFB(AR) threshold to ensure successful power-supply start-up. After the soft-start time period, auto-restart is activated only when the FEEDBACK pin current falls below IFB(AR).
## Over-Current Protection
The current limit circuit senses the current in the power FET. When this current exceeds the internal threshold (ILIMIT), the power FET is turned off for the remainder of that cycle. A leading edge blanking circuit inhibits the current limit comparator for a short time (tLEB) after the power FET is turned on. This leading edge blanking time has been set so that current spikes caused by capacitance and rectifier reverse recovery will not cause premature termination of the power FET conduction.
## Line Overvoltage Protection
## 5.9 V Regulator/Shunt Voltage Clamp
The internal 5.9 V regulator charges the bypass capacitor connected to the BYPASS pin to 5.9 V by drawing a current from the voltage on the DRAIN pin whenever the power FET is off. The BYPASS pin is the internal supply voltage node. When the power FET is on, the device operates from the energy stored in the bypass capacitor. Extremely low power consumption of the internal circuitry allows LYTSwitch-4 to operate continuously from current it takes from the DRAIN pin. A bypass capacitor value of 47 or 4.7 µ F is sufficient for both high frequency decoupling and energy storage. In addition, there is a 6.4 V shunt regulator clamping the BYPASS pin at 6.4 V when current is provided to the BYPASS pin through an external resistor. This facilitates powering of LYTSwitch-4 externally through a bias winding to increase operating efficiency. It is recommended that the BYPASS pin is supplied current from the bias winding for normal operation.
## Auto-Restart
In the event of an open-loop fault (open FEEDBACK pin resistor or broken path to feedback winding), output short-circuits or an overload condition the controller enters into the auto-restart mode. The controller annunciates both short-circuit and open-loop conditions once the FEEDBACK pin current falls below the IFB(AR) threshold after the soft-start period. To minimize the power dissipation under this fault condition the shutdown/ auto-restart circuit turns the power supply on (same as the soft-start period) and off at an auto-restart duty cycle of typically DCAR for as long as the fault condition persists. If the fault is removed during the auto-restart off-time, the power supply will remain in auto-restart until the full off-time count is
This device includes overvoltage detection to limit the maximum operating voltage detected through the VOLTAGE MONITOR pin. An external peak detector consisting of a diode and capacitor is required to provide input line peak voltage to the VOLTAGE MONITOR pin through a resistor.
The resistor sets line overvoltage (OV) shutdown threshold which, once exceeded, forces the LYTSwitch-4 to stop switching. Once the line voltage returns to normal, the device resumes normal operation. A small amount of hysteresis is provided on the OV threshold to prevent noise-generated toggling. When the power FET is off, the rectified DC high voltage surge capability is increased to the voltage rating of the power FET (725 V), due to the absence of the reflected voltage and leakage spikes on the drain.
## Hysteretic Thermal Shutdown
The thermal shutdown circuitry senses the controller die temperature. The threshold is set at 142 °C typical with a 75 °C hysteresis. When the die temperature rises above this threshold (142 °C) the power FET is disabled and remains disabled until the die temperature falls by 75 °C, at which point the power FET is re-enabled.
## Safe Operating Area (SOA) Protection
The device also features a safe operating area (SOA) protection mode which disables FET switching for 40 cycles in the event the peak switch current reaches the ILIMIT threshold and the switch on-time is less than tON(SOA). This protection mode protects the device under short-circuited LED conditions and at start-up during the soft-start period when auto-restart protection is inhibited. The SOA protection mode remains active in normal operation.
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**LYT4211-4218/4311-4318**
## Application Example
## **20 W TRIAC Dimmable High Power Factor LED Driver Design Example (DER-350)**
The circuit schematic in Figure 8 shows a TRIAC dimmable high power factor LED driver based on LYT4317E from the LYTSwitch-4 family of devices. The design is configurable for non-dimmable only applications by simple component value changes. It was optimized to drive an LED string at a voltage of 36 V with a constant current of 0.7 A ideal for Lumens PAR lamp retro-fit applications. The design operates over an input voltage range of 90 VAC to 132 VAC.
The key goals of this design were compatibility with standard leading edge TRIAC AC dimmers, very wide dimming range (1000:1, 550 mA:0.55 mA), high efficiency (>85%) and high power factor (>0.9). The design is fully protected from faults such as no-load (open load), overvoltage and output shortcircuit or overload conditions and over temperature.
peak drain voltage of U1 below the 725 V rating of the internal power FET. Bridge rectifier BR1 rectifies the AC line voltage. EMI filtering is provided by L1-L3, C1, C4, R2, R24 and R25 together with the safety rated Y class capacitor (CY1) that bridges the safety isolation barrier between primary and secondary. Resistor R2, R24 and R25 act to damp any resonances formed between L1, L2, L3, C1 and the AC line impedance. A small bulk capacitor (C4) is required to provide a low impedance source for the primary switching current. The maximum value of C2 and C4 is limited in order to maintain a power factor of greater than 0.9.
## LYTSwitch-4 Primary
To provide peak line voltage information to U1 the incoming rectified AC peak charges C6 via D2. This is then fed into the VOLTAGE MONITOR pin of U1 as a current via R10. This sensed current is also used by the device to set the line input overvoltage protection threshold. Resistor R9 provides a discharge path for C6 with a time constant much longer than that of the rectified AC to prevent generation of line frequency ripple.
## Circuit Description
The LYTSwitch-4 device (U1- LYT4317E) integrates the power FET, controller and start-up functions into a single package reducing the component count versus typical implementations. Configured as part of an isolated continuous conduction mode flyback converter, U1 provides high power factor via its internal control algorithm together with the small input capacitance of the design. Continuous conduction mode operation results in reduced primary peak and RMS current. This both reduces EMI noise, allowing simpler, smaller EMI filtering components and improves efficiency. Output current regulation is maintained without the need for secondary-side sensing which eliminates current sense resistors and improves efficiency.
## Input Stage
The VOLTAGE MONITOR pin current and the FEEDBACK pin current are used internally to control the average output LED current. For TRIAC phase-dimming applications a 49.9 k W resistor (R14) is used on the REFERENCE pin and 2 M W (R10) on the VOLTAGE MONITOR pin to provide a linear relationship between input voltage and the output current and maximizing the dimming range.
Diode D3, R15 and C7 clamp the drain voltage to a safe level due to the effects of leakage inductance. Diode D4 is necessary to prevent reverse current from flowing through U1 for the period of the rectified AC input voltage that the voltage across C4 falls to below the reflected output voltage (VOR).
Fuse F1 provides protection from component failures while RV1 provides a clamp during differential line surges, keeping the
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C13<br>R26 100 pF<br>30 Ω 200 V<br>DFLU1400-7D9 DFLU1400D2 12 FL1 330 63 VC11 µ F 330 63 VC12 µ F 20 kR23 Ω 550 mA36 V,<br>R24 D7<br>MB6SBR1 47 k1/8 W Ω 510 k1/8 WR9 Ω 200 kR15 Ω 2.2 nF630 VC7 1 FL2 BYW29-200<br>600 V D6 RTN<br>BAV21<br>10<br>D3 R20 C5 C9<br>US1J 39 Ω 100 nF 56 µ F<br>1/8 W 50 V 50 V<br>1/2 W510 R1 220 nF250 VC1 2 MR101% Ω RM8T1 11 20 kR19 Ω<br>100 nF250 VC2 360 kR6 Ω 100 nF250 VC4 2.2 250 VC6 µ F US1DD4 1/8 W<br>47 k1/8 WR25 Ω 1 mHL1 47 k1/8 WR2 Ω 1 mHL2 5 mHL3 D V 1/10 WBAV163 kR17D5 Ω 165 kR181% Ω BAV21D8<br>LYTSwitch-4 CONTROL 1/16 W<br>F1 140 VACRV1 LYT4317EU1 BP<br>5 A 90 - 132 X0202MA2BL2Q1 S R FB MMBT3904Q2 100 nFC15<br>L VAC N 470 nF50 VC3 100 1 WR8 Ω 49.9 k1/16 WR141% Ω 47 16 VC8 µ F 10 nF50 VC14 1/10 W10 R27 Ω 1/10 W1 kR22 Ω 50 V 470 pFCY1<br>250 VAC<br>PI-6875-052213<br>VR4 33 V<br>MAZS3300ML<br>**----- End of picture text -----**<br>
_Figure 8. DER-350 Schematic of an Isolated, TRIAC Dimmable, High Power Factor, 90-132 VAC, 20 W / 36 V / 550 mA LED Driver._
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Diode D6, C5, C9, R19 and R20 create the primary bias supply from an auxiliary winding on the transformer. Capacitor C8 provides local decoupling for the BYPASS pin of U1 which is the supply pin for the internal controller. During start-up C8 is charged to ~6 V from an internal high-voltage current source tied to the device DRAIN pin. This allows the part to start switching at which point the operating supply current is provided from the bias supply via R17. Capacitor C8 also selects the output power mode (47 µ F for reduced power was selected to reduce dissipation in U1 and increase efficiency for this design).
## Feedback
The bias winding voltage is proportional to the output voltage (set by the turns ratio between the bias and secondary windings). This allows the output voltage to be monitored without secondary-side feedback components. Resistor R18 converts the bias voltage into a current which is fed into the FEEDBACK pin of U1. The internal engine within U1 combines the FEEDBACK pin current, the VOLTAGE MONITOR pin current and drain current information to provide a constant output current over a 1.5:1 output voltage variation (LED string voltage variation of ±25%) at a fixed line input voltage.
To limit the output voltage at no-load an output overvoltage protection circuit is set by D8, C15, R22, VR4, R27, C14 and Q2. Should the output load be disconnected then the bias voltage will increase until VR4 conducts, turning on Q2 and reducing the current into the FEEDBACK pin. When this current drops below 10 µ A the part enters auto-restart and switching is disabled for 300 ms allowing time for the output and bias voltages to fall.
## Output Rectification
The transformer secondary winding is rectified by D7 and filtered by C11 and C12. An ultrafast TO-220 diode was selected for efficiency and the combined value of C11 and C12 were selected to give peak-to-peak LED ripple current equal to 30% of the mean value. For designs where lower ripple is desirable the output capacitance value can be increased.
## TRIAC Phase Dimming Control Compatibility
The requirement to provide output dimming with low-cost, TRIAC-based, leading edge phase dimmers introduces a number of trade-offs in the design.
Due to the much lower power consumed by LED based lighting the current drawn by the overall lamp is below the holding current of the TRIAC within the dimmer. This can cause undesirable behaviors such as limited dimming range and/or flickering as the TRIAC fires inconsistently. The relatively large impedance the LED lamp presents to the line allows significant ringing to occur due to the inrush current charging the input capacitance when the TRIAC turns on. This too can cause similar undesirable behavior as the ringing may cause the TRIAC current to fall to zero and turn off.
To overcome these issues simple two circuits, the SCR active damper and R-C passive bleeder, are incorporated. The drawback of these circuits is increased dissipation and therefore reduced efficiency of the supply. For non-dimming applications these components can simply be omitted.
The SCR active damper consists of components R6, C3, and Q1 in conjunction with R8. This circuit limits the inrush current that flows to charge C4 when the TRIAC turns on by placing R8 in series for the first ~1 ms of the TRIAC conduction. After approximately 1 ms, Q1 turns on and bypasses R8. This keeps the power dissipation on R8 low and allows a larger value during current limiting. Resistor R6 and C3 provide the delay on Q1 turn on after the TRIAC conducts. Diode D9 blocks the charge in capacitor C4 from flowing back after the TRIAC turns on which helps in dimming compatibility especially with high power dimmers.
The passive bleeder circuit is comprised of R1 and C1. This helps keep the input current above the TRIAC holding current while the input current corresponding to the effective driver resistance increases during each AC half-cycle.
A small pre-load is provided by R23 which discharges residual charge in output capacitors when turned off.
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## **Modified DER-350 20 W High Power Factor LED Driver for Non-Dimmable and Enhanced Line Regulation**
- For maximum output power column
- Reflected output voltage (VOR) of 65 V
- FEEDBACK pin current of 165 µ A
The circuit schematic in Figure 9 shows a high power factor LED driver based on a LYT4317 from the LYTSwitch-4 family of devices. It was optimized to drive an LED string at a voltage of 36 V with a constant current of 0.55 A, ideal for high lumen PAR lamp retro-fit applications. The design operates over the low-line input voltage range of 90 VAC to 132 VAC and is non-dimming application. A non-dimming application has tighter output current variation with changes in the line voltage than a dimming application. It’s key to note that, although not specified for dimming, no circuit damage will result if the end user does operate the design with a phase controlled dimmer.
## Modification for Non-Dimmable Configuration
The design is configurable for non-dimmable application by simply removing the component for SCR active damper (R6, R8, C3, and Q1), blocking diode D9 and R-C bleeder (R1, C1) changes and replacing the reference resistor R14 with 24.9 k W . (See Figure 9)
## Key Application Considerations
## Power Table
The data sheet power table (Table 1) represents the minimum and maximum practical continuous output power based on the following conditions:
- Efficiency of 80%
- Device local ambient of 70 °C
- Sufficient heat sinking to keep the device temperature below 100 °C
- For minimum output power column
- Reflected output voltage (VOR) of 120 V
- FEEDBACK pin current of 135 µ A
- BYPASS pin capacitor value of 4.7 µ F (LYT4x11 = 4.7 µ F)
Note that input line voltages above 85 VAC do not change the power delivery capability of LYTSwitch-4 devices.
## Device Selection
Select the device size by comparing the required output power to the values in Table 1. For thermally challenging designs, e.g., incandescent lamp replacement, where either the ambient temperature local to the LYTSwitch-4 device is high and/or there is minimal space for heat sinking use the minimum output power column. This is selected by using a 47 µ F BYPASS pin capacitor and results in a lower device current limit and therefore lower conduction losses. For open frame design or designs where space is available for heat sinking then refer to the maximum output power column. This is selected by using a 4.7 µ F BYPASS pin capacitor for all but the LYT4x11 which has only one power setting. In all cases in order to obtain the best output current tolerance maintain the device temperature below 100 °C
## Maximum Input Capacitance
To achieve high power factor, the capacitance used in both the EMI filter and for decoupling the rectified AC (bulk capacitor) must be limited in value. The maximum value is a function of the output power of the design and reduces as the output power reduces. For the majority of designs limit the total capacitance to less than 200 nF with a bulk capacitor value of 100 nF. Film capacitors are recommended compared to ceramic types as they minimize audible noise with operating with leading edge phase dimmers. Start with a value of 10 nF for the capacitance in the EMI filter and increase in value until there is sufficient EMI margin.
- BYPASS pin capacitor value of 47 µ F
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C13<br>R26 100 pF<br>47 k1/8 WR24 Ω DFLU1400D2 12 FL1 30 Ω 200 V 330 63 VC11 µ F 330 63 VC12 µ F 20 kR23 Ω 550 mA36 V,<br>D7<br>MB6SBR1 510 k1/8 WR9 Ω 200 kR15 Ω 2.2 nF630 VC7 1 FL2 BYW29-200<br>600 V D6 RTN<br>BAV21<br>10<br>D3 R20 C5 C9<br>US1J 39 Ω 100 nF 56 µ F<br>1/8 W 50 V 50 V<br>R10 11<br>2 M Ω T1 R19<br>1% RM8 20 k Ω<br>47 k1/8 WR25 Ω 1 mHL1 47 k1/8 WR2 Ω 1 mHL2 100 nF250 VC2 L3 100 nF250 VC4 2.2 250 VC6 µ F US1DD4 D5 1/8 W<br>5 mH BAV16<br>D V 1/10 W3 kR17 Ω 165 kR181% Ω BAV21D8<br>LYTSwitch-4 CONTROL 1/16 W<br>RV1 U1 BP<br>F1 140 VAC LYT4317E<br>5 A 90 - 132 S R FB MMBT3904Q2 100 nFC15<br>L VAC N 24.9 k1/16 WR141% Ω 47 16 VC8 µ F 10 nF50 VC14 1/10 W10 R27 Ω 1/10 W1 kR22 Ω 50 V 470 pFCY1<br>250 VAC<br>PI-6875a-052213<br>VR4 33 V<br>MAZS3300ML<br>**----- End of picture text -----**<br>
_Figure 9. Modified Schematic of RD-350 for Non-Dimmable, Isolated, High Power Factor, 90-132 VAC, 20 W / 36 V LED Driver._
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## REFERENCE Pin Resistance Value Selection
The LYTSwitch-4 family contains phase dimming devices, LYT4311-4318, and non-dimming devices, LYT4211-4218. The non-dimmable devices use a 24.9 k W ±1% REFERENCE pin resistor for best output current tolerance (over AC input voltage changes). The dimmable devices (i.e. LYT4311-4318) use 49.9 k W ±1% to achieve the widest dimming range.
## VOLTAGE MONITOR Pin Resistance Network Selection
For widest AC phase angle dimming range with LYT4311-4318, use a 2 M W (1.7 M W for 100 VAC (Japan)) resistor connected to the line voltage peak detector circuit. Make sure that the resistor’s voltage rating is sufficient for the peak line voltage. If necessary use multiple series connected resistors.
## Primary Clamp and Output Reflected Voltage VOR
A primary clamp is necessary to limit the peak drain to source voltage. A Zener clamp requires the fewest components and board space and gives the highest efficiency. RCD clamps are also acceptable however the peak drain voltage should be carefully verified during start-up and output short-circuits as the clamping voltage varies with significantly with the peak drain current.
For the highest efficiency, the clamping voltage should be selected to be at least 1.5 times the output reflected voltage, VOR, as this keeps the leakage spike conduction time short. This will ensure efficient operation of the clamp circuit and will also keep the maximum drain voltage below the rated breakdown voltage of the FET. An RCD (or RCDZ) clamp provides tighter clamp voltage tolerance than a Zener clamp. The RCD clamp is more cost effective than the Zener clamp but requires more careful design to ensure that the maximum drain voltage does not exceed the power FET breakdown voltage. These VOR limits are based on the BVDSS rating of the internal FET, a VOR of 60 V to 100 V is typical for most designs, giving the best PFC and regulation performance.
## Series Drain Diode
An ultrafast or Schottky diode in series with the drain is necessary to prevent reverse current flowing through the device. The voltage rating must exceed the output reflected voltage, VOR. The current rating should exceed two times the average primary current and have a peak rating equal to the maximum drain current of the selected LYTSwitch-4 device.
## Line Voltage Peak Detector Circuit
LYTSwitch-4 devices use the peak line voltage to regulate the power delivery to the output. A capacitor value of 1 µ F to 4.7 µ F is recommended to minimize line ripple and give the highest power factor (>0.9), smaller values are acceptable but result in lower PF and higher line current distortion.
## Operation with Phase Controlled Dimmers
Dimmer switches control incandescent lamp brightness by not conducting (blanking) for a portion of the AC voltage sine wave. This reduces the RMS voltage applied to the lamp thus reducing the brightness. This is called natural dimming and the LYTSwitch-4 LYT4311-4318 devices when configured for dimming utilize natural dimming by reducing the LED current as the RMS line voltage decreases. By this nature, line regulation performance is purposely decreased to increase the dimming range and more closely mimic the operation of an incandescent lamp. Using a 49.9 k W REFERENCE pin resistance selects natural dimming mode operation.
## Leading Edge Phase Controlled Dimmers
The requirement to provide flicker-free output dimming with lowcost, TRIAC-based, leading edge phase dimmers introduces a number of trade-offs in the design.
Due to the much lower power consumed by LED based lighting the current drawn by the overall lamp is below the holding current of the TRIAC within the dimmer. This causes undesirable behaviors such as limited dimming range and/or flickering. The relatively large impedance the LED lamp presents to the line allows significant ringing to occur due to the inrush current charging the input capacitance when the TRIAC turns on. This too can cause similar undesirable behavior as the ringing may cause the TRIAC current to fall to zero and turn off.
To overcome these issues two circuits, the active damper and passive bleeder, are incorporated. The drawback of these circuits is increased dissipation and therefore reduced efficiency of the supply so for non-dimming applications these components can simply be omitted.
Figure 10a shows the line voltage and current at the input of a leading edge TRIAC dimmer with Figure 10b showing the resultant rectified bus voltage. In this example, the TRIAC conducts at 90 degrees.
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PI-5983-060810<br>**----- End of picture text -----**<br>
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350 0.35<br>Voltage<br>250 0.25<br>Current<br>150 LN7a 0.15<br>50 orA a\ 0.05<br>-50 0 .5 A 50 100 150 200 Oe 250 300 A 350 40 0 -0.05<br>-150 eeet -0.15<br>-250 ee -0.25<br>Gy Ae<br>-350 pOUN ES -0.35<br>Line Voltage (at Dimmer Input) (V) Line Current (Through Dimmer) (A)<br>**----- End of picture text -----**<br>
## **Conduction Angle (°)**
_Figure 10a. Ideal Input Voltage and Current Waveform for a Leading Edge TRIAC Dimmer at 90_ °.
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PI-5984-060810 PI-5986-060810<br>350 0.35 350 0.35<br>Voltage Voltage<br>300 0.3 250 0.25<br>Current Current<br>250 0.25 150 0.15<br>iN [\ dE Ef<br>PONE AEE ) Pp<br>200 0.2 50 0.05<br>pot |<br>150 0.15 -50 0 ea 50 100 150 200 250 300 350 -0.05<br>poi NT TTA ft<br>100 po NR 0.1 -150 eene -0.15<br>50 0.05 -250 -0.25<br>pL ENA ENA 3 po NGee<br>0 0 -350 -0.35<br>peo IN LN! po NI<br>0 50 100 150 200 250 300 350 400<br>Conduction Angle (°)<br>Conduction Angle (°)<br>Rectified Input Voltage (V) Rectified Input Current (A) Dimmer Output Voltage (V) Dimmer Output Current (A)<br>**----- End of picture text -----**<br>
_Figure 10b. Resultant Waveforms Following Rectification of TRIAC Dimmer Output_ .
Figure 11 shows undesired rectified bus voltage and current with the TRIAC turning off prematurely and restarting.
If the TRIAC is turning off before the end of the half-cycle erratically or alternate half AC cycles have different conduction angles then flicker will be observed in the LED light due to variations in the output current. This can be solved by including a bleeder and damper circuit.
Dimmers will behave differently based on manufacturer and power rating, for example a 300 W dimmer requires less dampening and requires less power loss in the bleeder than a 600 W or 1000 W dimmer due to different drive circuits and TRIAC holding current specifications. Multiple lamps in parallel driven from the same dimmer can introduce more ringing due to the increased capacitance of parallel units. Therefore, when testing dimmer operation verify on a number of models, different line voltages and with both a single driver and multiple drivers in parallel.
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350 PI-5985-060810 0.35<br>Voltage<br>300 0.3<br>Current<br>250200 NSwweeeeWAe 0.250.2<br>150 eeeeeee 0.15<br>10050 2PNASeENeOeeeee3 0.10.05<br>0 IN 0<br>IN<br>0 50 100 150 200 250 300 350 400<br>Conduction Angle (°)<br>Rectified Input Current (A)<br>**----- End of picture text -----**<br>
_Figure 12. Ideal Dimmer Output Voltage and Current Waveforms for a Trailing Edge Dimmer at 90° Conduction Angle._
Start by adding a bleeder circuit. Add a 0.44 µ F capacitor and 510 W 1 W resistor (components in series) across the rectified bus (C1 and R1 in Figure 8). If the results in satisfactory operation reduce the capacitor value to the smallest that result in acceptable performance to reduce losses and increase efficiency.
If the bleeder circuit does not maintain conduction in the TRIAC, then add an active damper as shown in Figure 8. This consists of components R6, C3, and Q1 in conjunction with R8. This circuit limits the inrush current that flows to charge C4 when the TRIAC turns on by placing R8 in series for the first 1 ms of the TRIAC conduction. After approximately 1 ms, Q1 turns on and shorts R8. This keeps the power dissipation on R8 low and allows a larger value to be used during current limiting. Increasing the delay before Q1 turns on by increasing the value of resistor R6 will improve dimmer compatibility but cause more power to be dissipated across R8. Monitor the AC line current and voltage at the input of the power supply as you make the adjustments. Increase the delay until the TRIAC operates properly but keep the delay as short as possible for efficiency.
As a general rule the greater the power dissipated in the bleeder and damper circuits, the more types of dimmers will work with the driver.
## Trailing Edge Phase Controlled Dimmers
Figure 11 shows the line voltage and current at the input of the power supply with a trailing edge dimmer. In this example, the dimmer conducts at 90 degrees. Many of these dimmers use back-to-back connected power FETs rather than a TRIAC to control the load. This eliminates the holding current issue of TRIACs and since the conduction begins at the zero crossing, high current surges and line ringing are minimized. Typically these types of dimmers do not require damping and bleeder circuits.
_Figure 11. Example of Phase Angle Dimmer Showing Erratic Firing._
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## Audible Noise Considerations for Use with Leading Edge Dimmers
Noise created when dimming is typically created by the input capacitors, EMI filter inductors and the transformer. The input capacitors and inductors experience high di/dt and dv/dt every AC half-cycle as the TRIAC fires and an inrush current flows to charge the input capacitance. Noise can be minimized by selecting film vs. ceramic capacitors, minimizing the capacitor value and selecting inductors that are physically short and wide.
The transformer may also create noise which can be minimized by avoiding cores with long narrow legs (high mechanical resonant frequency). For example, RM cores produce less audible noise than EE cores for the same flux density. Reducing the core flux density will also reduce the noise. Reducing the maximum flux density (BM) to 1500 Gauss usually eliminates any audible noise but must be balanced with the increased core size needed for a given output power.
## Thermal and Lifetime Considerations
Lighting applications present thermal challenges to the driver. In many cases the LED load dissipation determines the working ambient temperature experienced by the drive so thermal evaluation should be performed with the driver inside the final enclosure. Temperature has a direct impact on driver and LED
lifetime. For every 10 °C rise in temperature, component life is reduced by a factor of 2. Therefore it is important to properly heat sink and to verify the operating temperatures of all devices.
## Layout Considerations
## Primary-Side Connections
Use a single point (Kelvin) connection at the negative terminal of the input filter capacitor for the SOURCE pin and bias returns. This improves surge capabilities by returning surge currents from the bias winding directly to the input filter capacitor. The BYPASS pin capacitor should be located as close to the BYPASS pin and connected as close to the SOURCE pin as possible. The SOURCE pin trace should not be shared with the main power FET switching currents. All FEEDBACK pin components that connect to the SOURCE pin should follow the same rules as the BYPASS pin capacitor. It is critical that the main power FET switching currents return to the bulk capacitor with the shortest path as possible. Long high current paths create excessive conducted and radiated noise.
## Secondary-Side Connections
The output rectifier and output filter capacitor should be as close as possible. The transformer’s output return pin should have a short trace to the return side of the output filter capacitor.
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BYPASS Pin<br>LYT4317E Capacitor Clamp Transformer Output<br>Input EMI Filter Diode<br>Bullk<br>Capacitor<br>\ (9 Oe BPN, e<br>AEE<br>[ee] eeNETSgh<br>Output<br>Capacitor<br>Lee oof C% i) See: rf le<br>REFERENCE Pin<br>Resistor<br>FEEDBACK Pin<br>Resistor Output<br>VOLTAGE MONITOR Pin Capacitors<br>Resistor<br>PI-6904-072313<br>**----- End of picture text -----**<br>
_Figure 13. DER-350 20 W Layout Example, Top Silk / Bottom Layer._
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## Quick Design Checklist
## Maximum Drain Voltage
Verify that the peak VDS does not exceed 725 V under all operating conditions including start-up and fault conditions.
## Maximum Drain Current
Measure the peak drain current under all operation conditions including start-up and fault conditions. Look for signs of transformer saturation (usually occurs at highest operating ambient temperatures). Verify that the peak current is less than the stated Absolute Maximum Rating in the data sheet.
## Thermal Check
At maximum output power, both minimum and maximum line voltage and ambient temperature; verify that temperature specifications are not exceeded for the LYTSwitch-4, transformer, output diodes, output capacitors and drain clamp components.
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## **Absolute Maximum Ratings[(1,4)]**
DRAIN Pin Peak Current[(5)] : LYT4x11 .................................1.37 A Operating Junction Temperature[(2)] .........................-40 to 150 °C LYT4x12 .................................2.08 A LYT4x13 .................................2.72 A Notes: LYT4x14 ................................ 4.08 A 1. All voltages referenced to SOURCE, TA = 65 ° C. LYT4x15 ................................ 5.44 A 2. Normally limited by internal circuitry. LYT4x16 ................................ 6.88 A 3. 1/16 in. from case for 5 seconds. LYT4x17 ................................. 7.73 A 4. Absolute Maximum Ratings specified may be applied, one LYT4x18 ................................ 9.00 A at a time without causing permanent damage to the DRAIN Pin Voltage ……………………… ................. -0.3 to 725 V product. Exposure to Absolute Maximum Ratings for BYPASS Pin Voltage ................................................. -0.3 to 9 V extended periods of time may affect product reliability. BYPASS Pin Current ……………………… ...................... 100 mA 5. Peak DRAIN current is allowed while the DRAIN voltage is VOLTAGE MONITOR Pin Voltage .............................-0.3 to 9 V[(6)] simultaneously less than 400 V. See also Figure 13. FEEDBACK Pin Voltage …….. .................................. -0.3 to 9 V 6. During start-up (the period before the BYPASS pin begins REFERENCE Pin Voltage .......................................... -0.3 to 9 V powering the IC) the VOLTAGE MONITOR pin voltage can Lead Temperature[(3) ] ........................................................260 ° C safely rise to 15 V without damage. Storage Temperature …………………. .................. -65 to 150 °C
## **Thermal Resistance**
Thermal Resistance: E Package Notes: ( q JA) ....................................................105 ° C/W[(1) ] 1. Free standing with no heat sink. ( q JC) .................................................... 2 ° C/W[(2)] 2. Measured at back surface tab.
|**Parameter**|**Symbol**|**Conditions**<br>SOURCE = 0 V; TJ= -20 °C to 125 °C<br>(Unless Otherwise Specifed)|**Conditions**<br>SOURCE = 0 V; TJ= -20 °C to 125 °C<br>(Unless Otherwise Specifed)|**Min**|**Typ**|**Max**|**Units**|
|---|---|---|---|---|---|---|---|
|**Control Functions**||||||||
|**Switching Frequency**|fOSC|TJ= 65 °C|Average|124|132|140|kHz|
||||Peak-Peak Jitter||5.4|||
|**Frequency Jitter**<br>**Modulation Rate**|fM|TJ= 65 °C<br>See Note B|||2.6||kHz|
|**BYPASS Pin**<br>**Charge Current**|ICH1|VBP= 0 V,<br>TJ= 65 °C|LYT4x11|-4.1|-3.4|-2.7|mA|
||||LYT4x12|-7.3|-6.1|-4.9||
||||LYT4x13-4x17|-12|-9.5|-7.0||
||||LYT4x18|-13.3|-10.8|-8.3||
||ICH2|VBP= 5 V,<br>TJ= 65 °C|LYT4x11|-0.85|-0.62|-0.43||
||||LYT4x12|-3.5|-2.4|-1.7||
||||LYT4x13-4x17|-6.5|-4.35|-3.1||
||||LYT4x18|-7.5|-5.5|-4.25||
|**Charging Current**<br>**Temperature Drift**||See Note A, B|||0.7||%/°C|
|**BYPASS Pin Voltage**|VBP|0 °C < TJ< 100 °C||5.75|5.95|6.15|V|
|**BYPASS Pin**<br>**Voltage Hysteresis**|VBP(H)|0 °C < TJ< 100 °C|||0.85||V|
|**BYPASS Pin**<br>**Shunt Voltage**|VBP(SHUNT)|IBP= 4 mA<br>0 °C < TJ< 100 °C||6.1|6.4|6.6|V|
|**Soft-Start Time**|tSOFT|TJ= 65 °C<br>VBP= 5.9 V||55|76||ms|
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|**Parameter**|**Symbol**|**Conditions**<br>SOURCE = 0 V; TJ= -20 °C to 125 °C<br>(Unless Otherwise Specifed)|**Conditions**<br>SOURCE = 0 V; TJ= -20 °C to 125 °C<br>(Unless Otherwise Specifed)|**Min**|**Typ**|**Max**|**Units**|
|---|---|---|---|---|---|---|---|
|**Control Functions (cont.)**||||||||
|**Drain Supply Current**|ICD2|0 °C < TJ< 100 °C<br>FET Not Switching||0.5|0.8|1.2|mA|
||ICD1|0 °C < TJ< 100 °C<br>FET Switching at fOSC||1|2.5|4||
|**VOLTAGE MONITOR Pin**||||||||
|**Line Overvoltage**<br>**Threshold**|IOV|TJ= 65 °C<br>RR= 24.9 kW<br>RR= 49.9 kW|Threshold|115|123|131|µA|
||||Hysteresis||6|||
|**VOLTAGE MONITOR**<br>**Pin Voltage**|VV|0 °C < TJ< 100 °C<br>IV< IOV||2.75|3.0|3.25|V|
|**VOLTAGE MONITOR Pin**<br>**Short-Circuit Current**|<br>IV(SC)|VV= 5 V<br>TJ= 65 °C||165|185|205|µA|
|**Remote ON/OFF**<br>**Threshold**|VV(REM)|TJ= 65 °C||0.5|||V|
|**FEEDBACK Pin**||||||||
|**FEEDBACK Pin Current**<br>**at Onset of Maximum**<br>**Duty Cycle**|IFB(DCMAXR)|0 °C < TJ< 100 °C||||90|µA|
|**FEEDBACK Pin Current**<br>**Skip Cycle Threshold**|<br>IFB(SKIP)|0 °C < TJ< 100 °C||210|||µA|
|**Maximum Duty Cycle**|DCMAX|IFB(DCMAXR)< IFB< IFB(SKIP)<br>0 °C < TJ< 100 °C||90||99.9|%|
|**FEEDBACK Pin Voltage**|VFB|IFB= 150µA<br>0 °C < TJ< 100 °C||2.1|2.3|2.56|V|
|**FEEDBACK Pin**<br>**Short-Circuit Current**|IFB(SC)|VFB= 5 V<br>TJ= 65 °C||320|400|480|µA|
|**Duty Cycle Reduction**|DC10|IFB= IFB(AR), TJ= 65 °C, See Note B||17|||%|
||DC40|IFB= 40µA, TJ= 65 °C|||34|||
||DC60|IFB= 60µA, TJ= 65 °C|||55|||
|**Auto-Restart**||||||||
|**Auto-Restart ON-Time**|tAR|TJ= 65 °C<br>VBP= 5.9 V||55|76||ms|
|**Auto-Restart**<br>**Duty Cycle**|DCAR|TJ= 65 °C<br>See Note B|||25||%|
|**SOA Minimum Switch**<br>**ON-Time**|tON(SOA)|TJ= 65 °C<br>See Note B||||0.875|µs|
|**FEEDBACK Pin Current**<br>**During Auto-Restart**|IFB(AR)|0 °C < TJ< 100 °C|||6.5|10|µA|
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Conditions<br>Parameter Symbol SOURCE = 0 V; TJ = -20 °C to 125 °C Min Typ Max Units<br>(Unless Otherwise Specified)<br>REFERENCE Pin<br>REFERENCE Pin<br>Voltage VR RR = 24.9 k W 1.223 1.245 1.273 V<br>REFERENCE Pin Current IR 0 °C < TJ < 100 °C 48.69 49.94 51.19 µ A<br>Current Limit/Circuit Protection<br>**----- End of picture text -----**<br>
|||||||||
|---|---|---|---|---|---|---|---|
|**Full Power**<br>**Current Limit**<br>**(CBP = 4.7**µ**F)**|ILIMIT(F)<br>TJ= 65 °C|di/dt = 174 mA/µs|LYT4x12|1.00||1.17|A|
|||di/dt = 174 mA/µs|LYT4x13|1.24||1.44||
|||di/dt = 225 mA/µs|LYT4x14|1.46||1.70||
|||di/dt = 320 mA/µs|LYT4x15|1.76||2.04||
|||di/dt = 350 mA/µs|LYT4x16|2.43||2.83||
|||di/dt = 426 mA/µs|LYT4x17|3.26||3.79||
|**Reduced Power**<br>**Current Limit**<br>**(CBP = 47**µ**F)**|ILIMIT(R)<br>TJ= 65 °C|di/dt = 133 mA/µs|LYT4x11|0.74||0.86|A|
|||di/dt = 195 mA/µs|LYT4x12|0.81||0.95||
|||di/dt = 192 mA/µs|LYT4x13|1.00||1.16||
|||di/dt = 240 mA/µs|LYT4x14|1.19||1.38||
|||di/dt = 335 mA/µs|LYT4x15|1.43||1.66||
|||di/dt = 380 mA/µs|LYT4x16|1.76||2.05||
|||di/dt = 483 mA/µs|LYT4x17|2.35||2.73||
|||di/dt = 930 mA/µs|LYT4x18|4.90||5.70||
|**Minimum ON-Time**<br>**Pulse**|tLEB+ tIL(D)|TJ= 65 °C||300|500|700|ns|
|**Leading Edge**<br>**Blanking Time**|tLEB|TJ= 65 °C<br>See Note B||150||500|ns|
|**Current Limit Delay**|tIL(D)|TJ= 65 °C<br>See Note B|||150||ns|
|**Thermal Shutdown**<br>**Temperature**||See Note B||147|155|164|°C|
|**Thermal Shutdown**<br>**Hysteresis**||See Note B|||56||°C|
|**BYPASS Pin Power-Up**<br>**Reset Threshold**<br>**Voltage**|VBP(RESET)|0 °C < TJ< 100 °C||2.25|3.30|4.25|V|
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|**Parameter**|**Symbol**|**Conditions**<br>SOURCE = 0 V; TJ= -20 °C to 125 °C<br>(Unless Otherwise Specifed)|**Conditions**<br>SOURCE = 0 V; TJ= -20 °C to 125 °C<br>(Unless Otherwise Specifed)|**Min**|**Typ**|**Max**|**Units**|
|---|---|---|---|---|---|---|---|
|**Output**||||||||
|**ON-State Resistance**|RDS(ON)|LYT4x11<br>ID= 100 mA|TJ= 65 °C||11.5|13.2|W|
||||TJ= 100 °C||13.5|15.5||
|||LYT4x12<br>ID= 100 mA|TJ= 65 °C||6.9|8.0||
||||TJ= 100 °C||8.4|9.7||
|||LYT4x13<br>ID= 150 mA|TJ= 65 °C||5.3|6.0||
||||TJ= 100 °C||6.3|7.3||
|||LYT4x14<br>ID= 150 mA|TJ= 65 °C||3.4|3.9||
||||TJ= 100 °C||3.9|4.5||
|||LYT4x15<br>ID= 200 mA|TJ= 65 °C||2.5|2.9||
||||TJ= 100 °C||3.0|3.4||
|||LYT4x16<br>ID= 250 mA|TJ= 65 °C||1.9|2.2||
||||TJ= 100 °C||2.3|2.7||
|||LYT4x17<br>ID= 350 mA|TJ= 65 °C||1.7|2.0||
||||TJ= 100 °C||2.0|2.4||
|||LYT4x18<br>ID= 600 mA|TJ= 65 °C||1.3|1.5||
||||TJ= 100 °C||1.6|1.8||
|**OFF-State Drain**<br>**Leakage Current**|IDSS|VBP= 6.4 V<br>VDS= 560 V<br>TJ= 100°C||||50|µA|
|**Breakdown Voltage**|BVDSS|VBP= 6.4 V<br>TJ= 65 °C||725|||V|
|**Minimum Drain**<br>**Supply Voltage**||TJ< 100 °C||36|||V|
|**Rise Time**|tR|Measured in a Typical Flyback<br>See Note B|||100||V|
|**Fall Time**|tF||||50||ns|
## NOTES:
A. For specifications with negative values, a negative temperature coefficient corresponds to an increase in magnitude with increasing temperature and a positive temperature coefficient corresponds to a decrease in magnitude with increasing temperature. B. Guaranteed by characterization. Not tested in production.
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## Typical Performance Characteristics
**==> picture [187 x 407] intentionally omitted <==**
**----- Start of picture text -----**<br>
10000<br>Scaling Factors:<br>LYT4x11 0.18<br>LYT4x12 0.28<br>LYT4x13 0.38<br>LYT4x14 0.56<br>1000 LYT4x15 0.75<br>LYT4x16 1.00<br>LYT4x17 1.16<br>LYT4x18 1.55<br>100<br>10<br>1 100 200 300 400 500 600<br>DRAIN Pin Voltage (V)<br>Figure 14. Drain Capacitance vs. Drain Pin Voltage.<br>5<br>4<br>3<br>Scaling Factors:<br>LYT4x11 0.18<br>LYT4x12 0.28<br>2 LYT4x13 0.38<br>LYT4x14 0.56<br>LYT4x15 0.75<br>LYT4x16 1.00<br>1 LYT4x17 1.16<br>LYT4x18 1.55<br>LYT4x28 TLYT4x28 TCASECASE = 25 = 100 ° C ° C<br>0<br>0 2 4 6 8 10 12 14 16 18 20<br>DRAIN Voltage (V)<br>PI-6715-072313<br>DRAIN Capacitance (pF)<br>PI-6717-071012<br>DRAIN Current (A)<br>**----- End of picture text -----**<br>
_Figure 16. Drain Current vs. Drain Voltage._
**==> picture [186 x 178] intentionally omitted <==**
**----- Start of picture text -----**<br>
300<br>Scaling Factors:<br>LYT4x11 0.18<br>LYT4x12 0.28<br>LYT4x13 0.38<br>LYT4x14 0.56<br>200 LYT4x15 0.75<br>LYT4x16 1.00<br>LYT4x17 1.16<br>LYT4x18 1.55<br>100<br>0<br>0 100 200 300 400 500 600 700<br>DRAIN Voltage (V)<br>PI-6716-071012<br>Power (mW)<br>**----- End of picture text -----**<br>
_Figure 15. Power vs. Drain Voltage._
**==> picture [198 x 194] intentionally omitted <==**
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1.2<br>1<br>0.8<br>0.6<br>0.4<br>0.2<br>0<br>0 100 200 300 400 500 600 700 800<br>DRAIN Voltage (V)<br>PI-6909-110512<br>DRAIN Current<br>(Normalized to Absolute Maximum Rating)<br>**----- End of picture text -----**<br>
_Figure 17. Maximum Allowable Drain Current vs. Drain Voltage._
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## **eSIP-7C (E Package)**
**==> picture [502 x 466] intentionally omitted <==**
**----- Start of picture text -----**<br>
2<br>0.403 (10.24) C<br>0.397 (10.08) 0.264 (6.70)<br>A 0.081 (2.06) Ref.<br>0.077 (1.96)<br>B<br>Detail A<br>2<br>0.325 (8.25) 0.290 (7.37)<br>0.320 (8.13) Ref. 0.198 (5.04) Ref.<br>0.519 (13.18)<br>Ref.<br>Pin #1 0.207 (5.26)<br>I.D. 0.140 (3.56) 0.016 (0.41) 0.187 (4.75)<br>0.120 (3.05) Ref.<br>0.070 (1.78) Ref. 0.047 (1.19) 3 4<br>0.050 (1.27) 0.100 (2.54) 0.033 (0.84) 6×<br>3 0.016 (0.41)0.011 (0.28)6× 0.118 (3.00) 0.010 M 0.25 M C A B0.028 (0.71)<br>0.020 M 0.51 M C<br>FRONT VIEW SIDE VIEW BACK VIEW<br>10 ° Ref. 0.100 (2.54)<br>All Around 0.021 (0.53)<br>0.019 (0.48)<br>0.060 (1.52) 0.020 (0.50) 0.050 (1.27)<br>Ref. 0.050 (1.27)<br>PIN 1<br>0.048 (1.22) 0.059 (1.50) 0.155 (3.93)<br>0.378 (9.60) 0.046 (1.17)<br>Ref. 0.019 (0.48) Ref.<br>0.023 (0.58) PIN 7<br>END VIEW<br>0.027 (0.70)<br>0.059 (1.50)<br>DETAIL A<br>Notes:<br>0.100 (2.54) 0.100 (2.54)<br>1. Dimensioning and tolerancing per ASME Y14.5M-1994.<br>2. Dimensions noted are determined at the outermost extremes of the plastic MOUNTING HOLE PATTERN<br> body exclusive of mold flash, tie bar burrs, gate burrs, and interlead flash, but (not to scale)<br> including any mismatch between the top and bottom of the plastic body.<br> Maximum mold protrusion is 0.007 [0.18] per side.<br>3. Dimensions noted are inclusive of plating thickness.<br>4. Does not include inter-lead flash or protrusions.<br>5. Controlling dimensions in inches (mm).<br>PI-4917-020515<br>**----- End of picture text -----**<br>
## **Part Ordering Information**
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**----- Start of picture text -----**<br>
• LYTSwitch-4 Product Family<br> • 4 Series Number<br> • PFC/Dimming<br>2 PFC No Dimming<br>3 PFC Dimming<br> • Voltage Range<br>1 Low-Line<br> • Device Size<br> • Package Identifier<br>LYT 4 2 1 3 E E eSIP-7C<br>**----- End of picture text -----**<br>
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|**Revision**|**Notes**|**Date**|
|---|---|---|
|A<br>B<br>B<br>C<br>D<br>E|Initial Release.<br>Corrected Min and Typ parameter table values on pages 13 and 14.<br>Updated parameters ICH1, ICH2, ICD1, DCAR, ILIMIT(F), ILIMIT(R), on pages 13, 14 and 15.<br>Updated fgures 1, 3a, 3b, 3c, 3d, 8, 9 and 13.<br>Added Note 6 to Absolute Maximum Ratings section.<br>Removed L pin parts, updated ICH2, BVDSS, Thermal Shutdown Temperature and Hysteresis parameters per PCN-14441.|11/12<br>02/13<br>02/20/13<br>06/13<br>10/13<br>11/11/14|
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## **For the latest updates, visit our website: www.power.com**
Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS.
## Patent Information
The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations patents may be found at www.power.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www.power.com/ip.htm.
## Life Support Policy
POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein:
1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in significant injury or death to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
The PI logo, TOPSwitch, TinySwitch, LinkSwitch, LYTSwitch, InnoSwitch, DPA-Switch, PeakSwitch, CAPZero, SENZero, LinkZero, HiperPFS, HiperTFS, HiperLCS, Qspeed, EcoSmart, Clampless, E-Shield, Filterfuse, FluxLink, StakFET, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. ©2014, Power Integrations, Inc.
## Power Integrations Worldwide Sales Support Locations
## World Headquarters
5245 Hellyer Avenue San Jose, CA 95138, USA. Main: +1-408-414-9200 Customer Service: Phone: +1-408-414-9665 Fax: +1-408-414-9765 e-mail: usasales@power.com
## China (Shanghai)
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## Germany
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## India
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## Taiwan
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## Singapore
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## LYT4221-4228/4321-4328 LYTSwitch-4 ™ High Power LED Driver IC Family
Single-Stage Accurate Primary-Side Constant Current (CC) Controller with PFC for High-Line Applications with TRIAC Dimming and Non-Dimming Options
## Product Highlights
- Better than ±5% CC regulation
- TRIAC dimmable to less than 5% output
- Fast start-up
- <250 ms at full brightness
- <1s at 10% brightness
- High power factor >0.9
- Easily meets EN61000-3-2
- Less than 10% THD in optimized designs
- Up to 92% efficient
- 132 kHz switching frequency for small magnetics
## **High Performance, Combined Driver, Controller, Switch**
The LYTSwitch-4 family enables off-line LED drivers with high power factor which easily meet international requirements for THD and harmonics. Output current is tightly regulated with better than ±5% CC tolerance[1] . Efficiency of up to 92% is easily achieved in typical applications.
## **Supports a Wide Selection of TRIAC Dimmers**
The LYTSwitch-4 family provides excellent turn-on characteristics for leading-edge and trailing-edge TRIAC dimming applications. This results in drivers with a wide dimming range and fast start-up, even when turning on from a low conduction angle – large dimming ratio and low “pop-on” current.
## **Low Solution Cost and Long Lifetime**
LYTSwitch-4 ICs are highly integrated and employ a primary-side control technique that eliminates the optoisolator and reduces component count. This allows the use of low-cost single-sided printed circuit boards. Combining PFC and CC functions into a single-stage also helps reduce cost and increase efficiency. The 132 kHz switching frequency permits the use of small, low-cost magnetics.
LED drivers using the LYTSwitch-4 family do not use primaryside aluminum electrolytic bulk capacitors. This means greatly extended driver lifetime, especially in bulb and other high temperature applications.
**==> picture [254 x 109] intentionally omitted <==**
**----- Start of picture text -----**<br>
AC<br>IN<br>D V LYTSwitch-4<br>al ee<br>CONTROL<br>BP<br>S R FB<br>— PI-6800-050913<br>Figure 1. Typical Schematic.<br>**----- End of picture text -----**<br>
## **Optimized for Different Applications and Power Levels**
|**Part Number**|**Input Voltage Range**|**Input Voltage Range**<br>**TRIAC Dimmable**|
|---|---|---|
|LYT4221-LYT4228<br>LYT4321-LYT4328|160-308 VAC<br>160-308 VAC|No<br>Yes|
## **Output Power Table[1,2]**
|**Product 6**|**Minimum Output Power 3 Maximum Output Power**|**Maximum Output Power**|
|---|---|---|
|**LYT4x21E5**<br>**LYT4x22E**<br>**LYT4x23E**<br>**LYT4x24E**<br>**LYT4x25E**<br>**LYT4x26E**<br>**LYT4x27E**<br>**LYT4x28E**|6 W<br>6 W<br>8 W<br>9 W<br>11 W<br>14 W<br>19 W<br>33 W|12 W<br>15 W<br>18 W<br>22 W<br>25 W<br>35 W<br>50 W<br>78 W|
_Table 1. Output Power Table._ Notes _:_
1. Performance for typical design. See Application Note.
2. Continuous power in an open frame design with adequate heat sinking; device local ambient of 70 °C. Power level calculated assuming a typical LED string voltage and efficiency >80%.
3. Minimum output power requires CBP = 47 µ F.
4. Maximum output power requires CBP = 4.7 µ F.
eSIP-7C (E Package)
5. LYT4321 CBP = 47 µ F, LYT4221 CBP = 4.7 µ F.
6. Package: eSIP-7C (see Figure 2).
_Figure 2. Package Options._
November 2014
www.power.com
_This Product is Covered by Patents and/or Pending Patent Applications._
**LYT4221-4228/4321-4328**
|**Topology**|**Isolation**|**Effciency**|**Cost**|**THD**|**Output Voltage**|
|---|---|---|---|---|---|
|Isolated Flyback<br>Buck<br>Tapped Buck<br>Buck-Boost|Yes<br>No<br>No<br>No|88%<br>92%<br>89%<br>90%|High<br>Low<br>Middle<br>Low|Best<br>Good<br>Best<br>Best|Any<br>Limited<br>Any<br>High-Voltage|
_Table 2. Performance of Different Topologies in a Typical Non-Dimmable 10 W High-Line Design._
## **Typical Circuit Schematic**
**==> picture [191 x 113] intentionally omitted <==**
**----- Start of picture text -----**<br>
AC<br>IN D V LYTSwitch-4<br>CONTROL<br>BP<br>S R FB<br>PI-6800-050913<br>**----- End of picture text -----**<br>
_Figure 3a. Typical Isolated Flyback Schematic._
## **Key Features**
## Flyback
## Benefits
- Provides isolated output
- Supports widest range of output voltages
- Very good THD performance
- Limitations
- Flyback transformer
- Overall efficiency reduced by parasitic capacitance and inductance in the transformer
- Larger PCB area to meet isolation requirements
- Requires additional components (primary clamp and bias)
- Higher RMS switch and winding currents increases losses and lowers efficiency
## Buck
**==> picture [517 x 386] intentionally omitted <==**
**----- Start of picture text -----**<br>
Benefits<br>• Highest efficiency<br>• Lowest component count – small size<br>• Simple low-cost power inductor<br>• Low drain source voltage stress<br>ACIN • Best EMI/lowest component count for filter<br>D CONTROLV LYTSwitch-4 Limitations<br>BP • Single input line voltage range<br>S R FB • Output voltage <0.6 × VIN(AC) × 1.41<br>• Output voltage for low THD designs<br>PI-6841-111813 • Non-isolated<br>Figure 3b. Typical Buck Schematic.<br>Tapped Buck<br>Benefits<br>• Ideal for low output voltage designs (<20 V)<br>• High efficiency<br>• Low component count<br>• Simple low-cost tapped inductor<br>AC LYTSwitch-4 Limitations<br>IN D CONTROLV • Designs best suited for single input line voltage<br>BP • Requires additional components (primary clamp)<br>S R FB • Non-isolated<br>PI-6842-111813<br>Figure 3c. Typical Tapped Buck Schematic.<br>Buck-Boost<br>Benefits<br>• Ideal for non-isolated high output voltage designs<br>• High efficiency<br>• Low component count<br>• Simple common low-cost power inductor can be used<br>AC<br>IN • Lowest THD<br>D CONTROLV LYTSwitch-4 Limitations<br>BP • Maximum VOUT is limited by MOSFET breakdown voltage<br>S R FB • Single input line voltage range<br>• Non-isolated<br>PI-6859-111813<br>**----- End of picture text -----**<br>
_Figure 3d. Typical Buck-Boost Schematic._
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DRAIN (D)<br>BYPASS (BP) REGULATOR5.9 V<br>BYPASS<br>CAPACITOR SOFT-START<br>SELECT TIMER HYSTERETIC<br>THERMAL<br>SHUTDOWN<br>FAULT<br>ILIM MI AUTO-RESTART PRESENT 5.9 V<br>5.0 V<br>COUNTER<br>BYPASS PIN<br>1 V UNDERVOLTAGE DriverGate<br>VOLTAGE SenseFet<br>MONITOR (V) STOP JITTER<br>LOGIC CLOCK<br>Comparator<br>OSCILLATOR<br>LEB<br>3-VT DCFBMAXOFF<br>OCP<br>OV<br>LINE<br>SENSE<br>FEEDBACK (FB) IV PFC/CC CURRENT LIMITCOMPARATOR ILIM<br>VBG IFB CONTROL MI VSENSE<br>FEEDBACK FBOFF<br>SENSE DCMAX<br>IS<br>REFERENCE (R) REFERENCEBLOCK VBG<br>6.4 V<br>PI-6843-071112 SOURCE (S)<br>+<br>-<br>-<br>+<br>+<br>-<br>**----- End of picture text -----**<br>
_Figure 4. Functional Block Diagram._
## Pin Functional Description
## DRAIN (D) Pin:
This pin is the power FET drain connection. It also provides internal operating current for both start-up and steady-state operation.
## SOURCE (S) Pin:
This pin is the power FET source connection. It is also the ground reference for the BYPASS, FEEDBACK, REFERENCE and VOLTAGE MONITOR pins.
## BYPASS (BP) Pin:
This is the connection point for an external bypass capacitor for the internally generated 5.9 V supply. This pin also provides output power selection through choice of the BYPASS pin capacitor value.
## FEEDBACK (FB) Pin:
The FEEDBACK pin is used for output voltage feedback. The current into the FEEDBACK pin is directly proportional to the output voltage. The FEEDBACK pin also includes circuitry to protect against open load and overload output conditions.
## REFERENCE (R) Pin:
## VOLTAGE MONITOR (V) Pin:
This pin interfaces with an external input line peak detector, consisting of a rectifier, filter capacitor and resistors. The applied current is used to control stop logic for overvoltage (OV), provide feed-forward to control the output current and the remote ON/OFF function.
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**----- Start of picture text -----**<br>
E Package (eSIP-7C)<br>(Top View)<br>Exposed Pad<br>(Backside) Internally<br>Connected to<br>SOURCE Pin (see<br>eSIP-7C Package<br>Drawing)<br>PI-7076-062513<br>1 R 2 V 3 FB 4 BP 5 S 7 D<br>**----- End of picture text -----**<br>
_Figure 5. Pin Configuration._
This pin is connected to an external precision resistor and is configured to use only 24.9 k W for non-dimming and dimming.
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## Functional Description
A LYTSwitch-4 device monolithically combines a controller and high-voltage power FET into one package. The controller provides both high power factor and constant current output in a single-stage. The LYTSwitch-4 controller consists of an oscillator, feedback (sense and logic) circuit, 5.9 V regulator, hysteretic over-temperature protection, frequency jittering, cycle-by-cycle current limit, auto-restart, inductance correction, power factor and constant current control.
## FEEDBACK Pin Current Control Characteristics
The figure shown below illustrates the operating boundaries of the FEEDBACK pin current. Above IFB(SKIP) switching is disabled and below I the device enters into auto-restart. FB(AR)
**==> picture [234 x 298] intentionally omitted <==**
**----- Start of picture text -----**<br>
IFB(SKIP) Skip-Cycle<br>IFB CC ControlRegion<br>IFB(DCMAXR)<br>Soft-Start<br>Region<br>IFB(AR) Auto-Restart<br>DC10 DCMAX<br>Maximum Duty Cycle<br>PI-6978-040213<br>Figure 6. FEEDBACK Pin Current Characteristic.<br>**----- End of picture text -----**<br>
The FEEDBACK pin current is also used to clamp the maximum duty cycle to limit the available output power for overload and open-loop conditions. This duty cycle reduction characteristic also promotes a monotonic output current start-up characteristic and helps preventing over-shoot.
## BYPASS Pin Capacitor Power Gain Selection
LYTSwitch-4 devices have the capability to tailor the internal gain to either full or a reduced output power setting. This allows selection of a larger device to minimize dissipation for both thermal and efficiency reasons. The power gain is selected with the value of the BYPASS pin capacitor. The full power setting is selected with a 4.7 µ F capacitor and the reduced power setting (for higher efficiency) is selected with a 47 µ F capacitor. The BYPASS pin capacitor sets both the internal power gain as well as the over-current protection (OCP) threshold. Unlike the larger devices, the LYT4x21 power gain is not programmable. Use a 47 µ F capacitor for the LYT4x21.
## Switching Frequency
The switching frequency is 132 kHz during normal operation. To further reduce the EMI level, the switching frequency is jittered (frequency modulated) by approximately 5.4 kHz. During start-up the frequency is 66 kHz to reduce start-up time when the AC input is phase angle dimmed. Jitter is disabled in deep dimming.
## Soft-Start
The controller includes a soft-start timing feature which inhibits the auto-restart protection feature for the soft-start period (tSOFT) to distinguish start-up into a fault (short-circuit) from a large output capacitor. At start-up the LYTSwitch-4 clamps the maximum duty cycle to reduce the output power. The total soft-start period is tSOFT.
## Remote ON/OFF and EcoSmart[™]
The VOLTAGE MONITOR pin has a 1 V threshold comparator connected at its input. This voltage threshold is used for remote ON/OFF control. When a signal is received at the VOLTAGE MONITOR pin to disable the output (VOLTAGE MONITOR pin tied to ground through an optocoupler phototransistor) the LYTSwitch-4 will complete its current switching cycle before the internal power FET is forced off.
The remote ON/OFF feature can also be used as an eco-mode or power switch to turn off the LYTSwitch-4 and keep it in a very low power consumption state for indefinite long periods. When the LYTSwitch-4 is remotely turned on after entering this mode, it will initiate a normal start-up sequence with soft-start the next time the BYPASS pin reaches 5.9 V. In the worst case, the delay from remote on to start-up can be equal to the full discharge/charge cycle time of the BYPASS pin. This reduced consumption remote off mode can eliminate expensive and unreliable in-line mechanical switches.
## REFERENCE Pin
The REFERENCE pin is tied to ground (SOURCE) via an external resistor. The value selected sets the internal references and it should be 24.9 k W ±1%. One percent resistors are recommended as the resistor tolerance directly affects the output tolerance. Other resistor values should not be used.
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D V<br>CONTROL<br>BP<br>S R FB<br>PI-5435-052510<br>**----- End of picture text -----**<br>
_Figure 7. Remote ON/OFF VOLTAGE MONITOR Pin Control._
completed. Special consideration must be made to appropriately size the output capacitor to ensure that after the soft-start period (tSOFT) the FEEDBACK pin current is above the IFB(AR) threshold to ensure successful power-supply start-up. After the soft-start time period, auto-restart is activated only when the FEEDBACK pin current falls below IFB(AR).
## Over-Current Protection
The current limit circuit senses the current in the power FET. When this current exceeds the internal threshold (ILIMIT), the power FET is turned off for the remainder of that cycle. A leading edge blanking circuit inhibits the current limit comparator for a short time (tLEB) after the power FET is turned on. This leading edge blanking time has been set so that current spikes caused by capacitance and rectifier reverse recovery will not cause premature termination of the power FET conduction.
## Line Overvoltage Protection
## 5.9 V Regulator/Shunt Voltage Clamp
The internal 5.9 V regulator charges the bypass capacitor connected to the BYPASS pin to 5.9 V by drawing a current from the voltage on the DRAIN pin whenever the power FET is off. The BYPASS pin is the internal supply voltage node. When the power FET is on, the device operates from the energy stored in the bypass capacitor. Extremely low power consumption of the internal circuitry allows LYTSwitch-4 to operate continuously from current it takes from the DRAIN pin. A bypass capacitor value of 47 or 4.7 µ F is sufficient for both high frequency decoupling and energy storage. In addition, there is a 6.4 V shunt regulator clamping the BYPASS pin at 6.4 V when current is provided to the BYPASS pin through an external resistor. This facilitates powering of LYTSwitch-4 externally through a bias winding to increase operating efficiency. It is recommended that the BYPASS pin is supplied current from the bias winding for normal operation.
## Auto-Restart
In the event of an open-loop fault (open FEEDBACK pin resistor or broken path to feedback winding), output short-circuits or an overload condition the controller enters into the auto-restart mode. The controller annunciates both short-circuit and open-loop conditions once the FEEDBACK pin current falls below the IFB(AR) threshold after the soft-start period. To minimize the power dissipation under this fault condition the shutdown/ auto-restart circuit turns the power supply on (same as the soft-start period) and off at an auto-restart duty cycle of typically DCAR for as long as the fault condition persists. If the fault is removed during the auto-restart off-time, the power supply will remain in auto-restart until the full off-time count is
This device includes overvoltage detection to limit the maximum operating voltage detected through the VOLTAGE MONITOR pin. An external peak detector consisting of a diode and capacitor is required to provide input line peak voltage to the VOLTAGE MONITOR pin through a resistor.
The resistor sets line overvoltage (OV) shutdown threshold which, once exceeded, forces the LYTSwitch-4 to stop switching. Once the line voltage returns to normal, the device resumes normal operation. A small amount of hysteresis is provided on the OV threshold to prevent noise-generated toggling. When the power FET is off, the rectified DC high voltage surge capability is increased to the voltage rating of the power FET (725 V), due to the absence of the reflected voltage and leakage spikes on the drain.
## Hysteretic Thermal Shutdown
The thermal shutdown circuitry senses the controller die temperature. The threshold is set at 142 °C typical with a 75 °C hysteresis. When the die temperature rises above this threshold (142 °C) the power FET is disabled and remains disabled until the die temperature falls by 75 °C, at which point the power FET is re-enabled.
## Safe Operating Area (SOA) Protection
The device also features a safe operating area (SOA) protection mode which disables FET switching for 40 cycles in the event the peak switch current reaches the ILIMIT threshold and the switch on-time is less than tON(SOA). This protection mode protects the device under short-circuited LED conditions and at start-up during the soft-start period when auto-restart protection is inhibited. The SOA protection mode remains active in normal operation.
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## Application Example
## 20 W TRIAC Dimmable High Power Factor LED Driver Design Example (DER-396)
The circuit schematic in Figure 8 shows a TRIAC dimmable high power factor LED driver based on LYT4324E from the LYTSwitch-4 high-line family of devices. The design is configurable for nondimmable only applications by simply changing the device to a non-dimmable LYTSwitch-4 and removing the damper and bleeder circuit. It was optimized to drive an LED string at a voltage of 36 V with a constant current of 0.550 A ideal for high Lumens PAR lamp retro-fit applications. The design operates over an input voltage range of 185 VAC to 265 VAC.
The key goals of this design were compatibility with standard leading edge TRIAC AC dimmers, very wide dimming range, high efficiency (>85%) and high power factor (>0.9). The design is fully protected from faults such as no-load (open-load), overvoltage and output short-circuit or overload conditions and over-temperature.
## Circuit Description
The LYTSwitch-4 high-line device (U1-LYT4324E) integrates the power FET, controller and start-up functions into a single package reducing the component count versus typical implementations. Configured as part of an isolated continuous conduction mode flyback converter, U1 provides high power factor via its internal control algorithm together with the small input capacitance of the design. Continuous conduction mode operation results in reduced primary peak and RMS current. This both reduces EMI noise, allowing simpler, smaller EMI filtering components and improves efficiency. Output current regulation is maintained without the need for secondary-side sensing which eliminates current sense resistors and improves efficiency.
## Input Stage
Fuse F1 provides protection from component failures while RV1 provides a clamp during differential line surges, keeping the peak drain voltage of U1 below the device absolute maximum rating of the internal power FET. Bridge rectifier BR1 rectifies the AC line voltage. EMI filtering is provided by L1, L2, C4, C5, R3 and R12 together with the safety rated Y class capacitor (CY1) that bridges the safety isolation barrier between primary and secondary. Resistor R3 and R12 damp any resonances formed between L1, L2, C4 and the AC line impedance. A small bulk capacitor (C5) is required to provide a low impedance path for the primary switching current. The maximum value of C4 and C5 is limited in order to maintain a power factor of greater than 0.9.
## LYTSwitch-4 High-Line Primary
To provide peak line voltage information to U1 the incoming rectified AC peak charges C6 via D2. This is then fed into the VOLTAGE MONITOR pin of U1 as a current via R14 and R15. This sensed current is also used by the device to set the line input overvoltage protection threshold. Resistor R13 provides a discharge path for C6 with a time constant much longer than that of the rectified AC to minimize generation of line frequency ripple.
The VOLTAGE MONITOR pin current and the FEEDBACK pin current are used internally to control the average output LED current. For TRIAC phase-dimming or non-dimming applications the same value of resistance 24.9 k W is used on the REFERENCE pin resistor (R18) and 4 M W (R14 + R15) on the VOLTAGE MONITOR pin to provide a linear relationship between input voltage and the output current and maximizing the dimming range.
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C13<br>VR4 30 R25 Ω 100 pF200 V C14 C15<br>SMAJ200A-13-F200 V 1 FL1 330 63 V µ F 330 63 V µ F 7.5 kR26 Ω 550 mA36 V,<br>D8 TP3<br>B10S-G1000 VBR1 R7 510 k1/8 WR13 Ω 2.2 nF630 VC7 7 FL2 BYW29-200 RTN<br>162 k Ω R22 R21 TP4<br>1% 39 Ω 20 k Ω<br>250 VACRV1 1 M1 MR4R5 ΩΩ 162 k1%R8 Ω 2 M2 MR15R141%1% ΩΩ US1JD3 RM7/1T1 68 BAV21D6 1/8 W100 nF50 VC11 1/8 W 56 50 VC9 µ F<br>510 R271%RM5 Ω L1 510 21R281% Ω 34 220 nF400 VC1 12 k1/8 WR3 Ω BAV21D1 47 pF1 kVC2MMBT3906Q2 15 R101N5245B-T Ω 15 VVR1 120 nF400 VC4 31 5 mHL2 42 220 nF400 VC5 LYTSwitch-4 2.2 400 VLYT4324EC6 µ U1F D US1D CONTROL D4 V BP 6.2 kR19 Ω 133 k1/8 WR201% Ω BAV21WS-7-FD7<br>5 AF1 L 510 1%R1 Ω 190 - 265 510 1%R2 VAC Ω N 2.4 MR6 Ω 30.1 k1%R9 Ω 22 nF50 VC3 240 R112 W Ω 47 kR12 Ω S R 24.9 k1/16 WR181% FB Ω 100 10 VC8 µ F MMBT3904LT1G10 nF50 VC10 Q4 1/10 W10 R23 Ω 1/10 W1 kR24 Ω 100 nF50 VC12 CY1<br>TP1 TP2 470 pF<br>250 VAC<br>PI-7088-072913<br>D2<br>DFLU1400-7<br>D5 VR2 33 V<br>BAV16WS-7-F<br>Q1 Q3 MMSZ5256BS-7-F<br>MMBT3906 IRFU320PBF<br>**----- End of picture text -----**<br>
_Figure 8. DER-396 Schematic of an Isolated, TRIAC Dimmable, High Power Factor, 185 – 265 VAC, 20 W / 36 V LED Driver._
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Diode D3, VR4 and C7 clamp the drain voltage to a safe level due to the effects of leakage inductance. Diode D4 is necessary to prevent reverse current from flowing through U1 for the period of the rectified AC input voltage that the voltage across C5 falls to below the reflected output voltage (VOR).
Diode D6, C9, C11, R21 and R22 create the primary bias supply from an auxiliary winding on the transformer. Capacitor C8 provides local decoupling for the BYPASS pin of U1 which is the supply pin for the internal controller. During start-up C8 is charged to ~6 V from an internal high-voltage current source tied to the device DRAIN pin. This allows the part to start switching at which point the operating supply current is provided from the bias supply via R19 and D5. Capacitor C8 also selects the output power mode (47 µ F for reduced power was selected to reduce dissipation in U1 and increase efficiency).
## Feedback
The bias winding voltage is proportional to the output voltage (set by the turn ratio between the bias and secondary windings). This allows the output voltage to be monitored without secondaryside feedback components. Resistor R20 converts the bias voltage into a current which is fed into the FEEDBACK pin of U1. The internal engine within LYTSwitch-4 (U1) combines the FEEDBACK pin current, the VOLTAGE MONITOR pin current and drain current information to provide a constant output current over up to 1.5 : 1 output voltage variation (LED string voltage variation of ±25%) at a fixed line input voltage.
To limit the output voltage at no-load an output overvoltage protection circuit is set by D7, C12, R24, VR2, R23, C10 and Q4. Should the output load be disconnected the bias voltage will increase until VR2 conducts, biasing Q4 to turn on via R23 and pulling down current going into the FEEDBACK pin. When the feedback current drops below 10 µ A the part enters autorestart and the switching of the MOSFET is disabled for 600 ms, allowing time for the output and bias voltages to fall.
## Output Rectification
The transformer secondary winding is rectified by D8 and filtered by C14 and C15. An ultrafast TO-220 diode was selected for efficiency and the combined value of C11 and C12 were selected to give peak-to-peak LED ripple current equal to 30% of the mean value. For designs where lower ripple is desirable the output capacitance value can be increased. A small pre-load is provided by R26 which discharges residual charge in output capacitors when turned off.
## **TRIAC Phase Dimming Control Compatibility**
The requirement to provide output dimming with low cost, TRIAC-based, leading edge phase dimmers introduces a number of trade-offs in the design.
Due to the much lower power consumed by LED based lighting the current drawn by the overall lamp is below the holding current and/or latching of the TRIAC within the dimmer. This can cause undesirable behaviors such as limited dimming range and/or flickering as the TRIAC fires inconsistently. The relatively large impedance the LED lamp presents to the line allows significant ringing to occur due to the inrush current charging the input capacitance when the TRIAC turns on. This too can cause similar undesirable behavior as the ringing may cause the TRIAC current to fall to zero and turn off.
To overcome these issues two simple circuits, the MOSFET active damper and RC passive bleeder were employed. Employing these circuits however comes without penalty, since their purpose is to satisfy the holding and latching current of a TRIAC by providing some low impedance path for the TRIAC current to flow continuously during the turn-on phase will introduce additional dissipation and therefore reduced system efficiency of the supply. For non-dimming applications these circuits can simply be omitted (see Figure 9).
Power Integrations proprietary active damper circuit is used in this design for achieving high efficiency, good dimmer compatibility and line surge protection.
MOSFET Q3 is always on during non-dimming (no TRIAC connected) operation. It bypasses the loss across the damper resistor (R11) via the low RDS(ON) of the MOSFET Q3 thereby maintaining high system efficiency. The gate of Q3 is biased through the divider of R4, R5, and R6 and filtered by C13.
While Q3 is always on during non-dimming operation, MOSFET Q3 operates differently during dimming. When the TRIAC turns on at the beginning of every AC half-line cycle MOSFET Q3 is off initially allowing the resistor (R11) to damp the current ringing due to inrush of current induced by the input bulk capacitance and EMI filter impedance. After approximately 1 ms Q3 turns on and bypasses R11. The effect is increased compatibility with different types of dimmers.
During differential line surge occurrence where a high dv/dt is detected through the RC high-pass filter R7, R8 and C2. Transistor Q2 will turn off Q3 and a voltage proportional to the input current that will develop across the damper resistor will be subtracted from the input thus limiting the voltage stress on the DRAIN pin of U1.
Resistor R9 bleeds the charge from C2 and ensures Q2 is off during normal operation.
The passive bleeder circuit is comprised of R1, R2, R27, R28 and C1. This network helps keep the input current above the TRIAC holding current while the input current corresponding to the effective driver resistance increases during each AC half-cycle.
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## **Modified DER-396 20 W High Power Factor LED Driver for Non-Dimmable and Enhanced Line Regulation**
The circuit schematic in Figure 9 shows a high power factor LED driver based on a LYT4224E from the LYTSwitch-4 nondimming high-line family of devices. It was optimized to drive an LED string at a voltage of 36 V with a constant current of 0.55 A, ideal for high lumens PAR lamp retro-fit applications. The design operates over the high-line input voltage range of 185 VAC to 265 VAC and is non-dimming application. A nondimming application has tighter output current variation with changes in the line voltage than a dimming application. It’s key to note that, although not specified for dimming, no circuit damage will result if the end user does operate the design with a phase controlled dimmer.
## Modification for Non-Dimmable Configuration
The DER-396 is configurable for non-dimmable application by simply removing the components of the MOSFET active damper (R4, R5, R6, R7, R8, R9, R10, R11, D1, Q1, Q2, C3, and VR1) and passive R-C bleeder (R1, R2, R27, R28 and C1) and replacing the IC U1 to LYT4224E, non-dimmable device LYTSwitch-4 nondimming high-line family. For non-dimmable application audible noise is not critical so L1 and L2 can be replaced with a regular off-the-shelf dog bone inductor for cost reduction (See Figure 9).
## Key Application Considerations
## Power Table
The data sheet power table (Table 1) represents the minimum and maximum practical continuous output power based on the following assumed conditions:
- Efficiency of 85%
- Device local ambient of 70 °C
- Sufficient heat sinking to keep the device temperature below 100 °C
- For minimum output power column
- Reflected output voltage (VOR) of 135 V
- FEEDBACK pin current of 135 µ A
- BYPASS pin capacitor value of 47 µ F
- For maximum output power column
- Reflected output voltage (VOR) of 90 V
- FEEDBACK pin current of 165 µ A
- BYPASS pin capacitor value of 4.7 µ F
- (LYT4x21 = 4.7 µ F)
Note that input line voltages above 185 VAC do not change the power delivery capability of LYTSwitch-4 high-line devices.
## Device Selection
Select the device size by comparing the required output power to the values in Table 1. For thermally challenging designs, e.g., incandescent lamp replacement, where either the ambient temperature local to the LYTSwitch-4 high-line device is high and/or there is minimal space for heat sinking use the minimum output power column. This is selected by using a 47 µ F BYPASS pin capacitor and results in a lower device current limit and therefore lower conduction losses. For open frame design or designs where space is available for heat sinking then refer to the maximum output power column. This is selected by using a 4.7 µ F BYPASS pin capacitor for all but the LYT4x21 which has only one power setting. In all cases in order to obtain the best output current tolerance maintain the device temperature below 100 °C.
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C13<br>R25 100 pF<br>VR4 30 Ω 200 V C14 C15<br>SMAJ200A-13-F200 V 1 FL1 330 63 V µ F 330 63 V µ F 7.5 kR26 Ω 550 mA36 V,<br>D8 TP3<br>R13 C7 BYW29-200<br>510 k1/8 W Ω 2.2 nF630 V 7 FL2 RTN<br>R22 R21 TP4<br>39 Ω 20 k Ω<br>1/8 W 1/8 W<br>6<br>BR1 2 MR141% Ω US1JD3 BAV21D6 100 nFC11 56 C9 µ F<br>B10S-G 50 V 50 V<br>1000 V R15 8<br>2 M Ω T1<br>1% RM7/1<br>C4 C5 C6 D4<br>120 nF 220 nF 2.2 µ F US1D<br>RV1 400 V 400 V 400 V<br>250 VAC 6.2 kR19 Ω R20 BAV21WS-7-FD7<br>133 k Ω<br>D V 1%<br>12 k1/8 WR29 Ω 1.5 mHL112 k1/8 WR3 Ω 1.5 mHL3 LYTSwitch-4 LYT4224EU1 CONTROL BP 1/8 W<br>S R FB MMBT3904LT1GQ4 100 nFC12<br>L 5 AF1 190 - 265VAC N 47 k1/8 WR12 Ω 24.9 k1/16 WR181% Ω 47 16 VC8 µ F 10 nF50 VC10 1/10 W10 R23 Ω 1/10 W1 kR24 Ω 50 V CY1<br>TP1 TP2 470 pF<br>L2 250 VAC<br>1.5 mH PI-7089-102313<br>D2<br>DFLU1400-7<br>D5 VR2 33 V<br>BAV16WS-7-F MMSZ5256BS-7-F<br>**----- End of picture text -----**<br>
_Figure 9. Modified Schematic of DER-396 for Non-Dimmable, Isolated, High Power Factor, 185-265 VAC, 20 W / 36 V LED Driver._
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## Maximum Input Capacitance
To achieve high power factor, the capacitance used in both the EMI filter and for decoupling the rectified AC (bulk capacitor) must be limited in value. The maximum value is a function of the output power of the design and reduces as the output power reduces. For the majority of designs limit the total capacitance to less than 220 nF with a bulk capacitor value of 100 nF. Film capacitors are recommended compared to ceramic types as they minimize audible noise with operating with leading edge phase dimmers. Start with a value of 10 nF for the capacitance in the EMI filter and increase in value until there is sufficient EMI margin.
## REFERENCE Pin Resistance Value Selection
The LYTSwitch-4 high-line family contains phase dimming devices, LYT4321-4328, and non-dimming devices, LYT42214228. Both the non-dimmable devices and dimmable devices use 24.9 k W ±1% REFERENCE pin resistor for best output current tolerance (over AC input voltage changes).
## VOLTAGE MONITOR Pin Resistance Network Selection
For widest AC phase angle dimming range with LYT4321-4328, use a 4 M W resistor connected to the line voltage peak detector circuit. Make sure that the resistor’s voltage rating is sufficient for the peak line voltage. If necessary use multiple series connected resistors.
## Primary Clamp and Output Reflected Voltage VOR
A primary clamp is necessary to limit the peak drain to source voltage. A Zener clamp requires the fewest components and board space and gives the highest efficiency. RCD clamps are also acceptable however the peak drain voltage should be carefully verified during start-up and output short-circuits as the clamping voltage varies with significantly with the peak drain current.
For the highest efficiency, the clamping voltage should be selected to be at least 1.5 times the output reflected voltage, VOR, as this keeps the leakage spike conduction time short. When using a Zener clamp in a universal input or high-line only application, a VOR of less than 135 V is recommended to allow for the absolute tolerances and temperature variations of the Zener. This will ensure efficient operation of the clamp circuit and will also keep the maximum drain voltage below the rated breakdown voltage of the FET. An RCD (or RCDZ) clamp provides tighter clamp voltage tolerance than a Zener clamp. The RCD clamp is more cost-effective than the Zener clamp but requires more careful design to ensure that the maximum drain voltage does not exceed the power FET breakdown voltage. These VOR limits are based on the BVDSS rating of the internal FET, a VOR of 90 V to 120 V is typical for most designs, giving the best PFC and regulation performance.
## Series Drain Diode
An ultrafast or Schottky diode in series with the drain is necessary to prevent reverse current flowing through the device. The voltage rating must exceed the output reflected voltage, VOR. The current rating should exceed two times the average primary current and have a peak rating equal to the maximum drain current of the selected LYTSwitch-4 high-line device.
## Line Voltage Peak Detector Circuit
LYTSwitch-4 high-line devices use the peak line voltage to regulate the power delivery to the output. A capacitor value of 1 µ F to 4.7 µ F is recommended to minimize line ripple and give the highest power factor (>0.9), smaller values are acceptable but result in lower PF and higher line current distortion.
## Operation with Phase Controlled Dimmers
Dimmer switches control incandescent lamp brightness by not conducting (blanking) for a portion of the AC voltage sine wave. This reduces the RMS voltage applied to the lamp thus reducing the brightness. This is called natural dimming and the LYTSwitch-4 high-line LYT4321-4328 devices when configured for dimming utilize natural dimming by reducing the LED current as the RMS line voltage decreases. By this nature, line regulation performance is purposely decreased to increase the dimming range and more closely mimic the operation of an incandescent lamp.
## Leading Edge Phase Controlled Dimmers
The requirement to provide flicker-free output dimming with lowcost, TRIAC-based, leading edge phase dimmers introduces a number of trade-offs in the design.
Due to the much lower power consumed by LED based lighting the current drawn by the overall lamp is below the holding current of the TRIAC within the dimmer. This causes undesirable behaviors such as limited dimming range and/or flickering. The relatively large impedance the LED lamp presents to the line allows significant ringing to occur due to the inrush current charging the input capacitance when the TRIAC turns on. This too can cause similar undesirable behavior as the ringing may cause the TRIAC current to fall to zero and turn off.
To overcome these issues two circuits, the active damper and passive bleeder, are incorporated. The drawback of these circuits is increased dissipation and therefore reduced efficiency of the supply so for non-dimming applications these components can simply be omitted.
Figure 10(a) shows the line voltage and current at the input of a leading edge TRIAC dimmer with Figure 10(b) showing the resultant rectified bus voltage. In this example, the TRIAC conducts at 90 degrees.
Figure 11 shows undesired rectified bus voltage and current with the TRIAC turning off prematurely and restarting.
If the TRIAC is turning off before the end of the half-cycle erratically or alternate half AC cycles have different conduction angles then flicker will be observed in the LED light due to variations in the output current. This can be solved by including a bleeder and damper circuit.
Dimmers will behave differently based on manufacturer and power rating, for example a 300 W dimmer requires less dampening and requires less power loss in the bleeder than a 600 W or 1000 W dimmer due to different drive circuits and TRIAC holding current specifications. Line voltage also has a significant impact as at high-line for a given output power the
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350 PI-5983-060810 0.35 350 PI-5985-060810 0.35<br>Voltage Voltage<br>250150 TNZe Current 0.250.15 ee 300250 neeeVee Current 0.30.25<br>50 Joon \ 0.05 200 ee ere e | 0.2<br>-50 0 .5 ee 50 100 150 200 250 300 350 40 0 -0.05 150 eeeeAecee 0.15<br>-150 -0.15 100 0.1<br>-250 -0.25 50 0.05<br>-350 pS -0.35 0 NL UIE NN. 0<br>0 50 100 150 200 250 300 350 400<br>Conduction Angle (°)<br>Conduction Angle (°)<br>Figure 10a. Ideal Input Voltage and Current Waveforms for a Leading Edge<br>TRIAC Dimmer at 90° Conduction Angle. Figure 11. Example of Phase Angle Dimmer Showing Erratic Firing.<br>350 PI-5984-060810 0.35 350 PI-5986-060810 0.35<br>Voltage Voltage<br>300250200 P2FRESE]IAL Current erNEe 0.30.250.2 = [AR 25015050 7a7 Current 0.250.150.05<br>150 PI AE 0.15 -50 0 pe 50 100 150 200 250 300 350 -0.05<br>100 0.1 -150 -0.15<br>50 0.05 -250 -0.25<br>0 FELLREENEEL,NV: 0 = -350 ASNe -0.35<br>0 50 100 150 200 250 300 350 400<br>Conduction Angle (°)<br>Conduction Angle (°)<br>Rectified Input Voltage (V) Rectified Input Current (A)<br>Line Voltage (at Dimmer Input) (V) Line Current (Through Dimmer) (A)<br>Rectified Input Voltage (V) Rectified Input Current (A) Dimmer Output Voltage (V) Dimmer Output Current (A)<br>**----- End of picture text -----**<br>
_Figure 10b. Resultant Waveforms Following Rectification of TRIAC Dimmer Output._
_Figure 12. Ideal Dimmer Output Voltage and Current Waveforms for a Trailing Edge Dimmer at 90° Conduction Angle._
input current and therefore TRIAC current is lower but the peak inrush current when the input capacitance charges is higher creating more ringing. Finally multiple lamps in parallel driven from the same dimmer can introduce more ringing due to the increased capacitance of parallel units. Therefore, when testing dimmer operation verify on a number of models, different line voltages and with both a single driver and multiple drivers in parallel.
Start by adding a bleeder circuit. Add a 0.44 µ F capacitor and 510 W 1 W resistor (components in series) across the rectified bus (C1 and R1, R2, R27, R28 in Figure 8). If the results in satisfactory operation reduce the capacitor value to the smallest that result in acceptable performance to reduce losses and increase efficiency.
If the bleeder circuit does not maintain conduction in the TRIAC, then add an active damper as shown in Figure 8. This circuit limits the inrush current that flows to charge C4 and C5 when the TRIAC turns on by placing the damper resistor (R11, R29) in series for the first 1 ms of the TRIAC conduction. After approximately 1 ms, Q3 turns on and shorts the damper resistor. This keeps the power dissipation on the damper resistor low and allows a larger value to be used during current limiting. Increasing the delay before Q3 turns on by increasing the value of capacitor
C3 will improve dimmer compatibility but cause more power to be dissipated across the damper resistor. Monitor the AC line current and voltage at the input of the power supply as you make the adjustments. Increase the delay until the TRIAC operates properly but keep the delay as short as possible for efficiency.
As a general rule the greater the power dissipated in the bleeder and damper circuits, the more types of dimmers will work with the driver.
## Trailing Edge Phase Controlled Dimmers
Figure 12 shows the line voltage and current at the input of the power supply with a trailing edge dimmer. In this example, the dimmer conducts at 90 degrees. Many of these dimmers use back-to-back connected power FETs rather than a TRIAC to control the load. This eliminates the holding current issue of TRIACs and since the conduction begins at the zero crossing, high current surges and line ringing are minimized. These types of dimmers do not require damping circuits but do require a bleeder. However the bleeder ensures that the AC voltage across the dimmer falls to a low enough level for the dimmer to correctly detect zero crossing. This is used internally by the dimmer for timing.
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## Audible Noise Considerations for use with
## Leading Edge Dimmers
Noise created when dimming is typically created by the input capacitors, EMI filter inductors and the transformer. The input capacitors and inductors experience high di/dt and dv/dt every AC half-cycle as the TRIAC fires and an inrush current flows to charge the input capacitance. Noise can be minimized by selecting film vs. ceramic capacitors, minimizing the capacitor value and selecting inductors that are physically short and wide.
The transformer may also create noise which can be minimized by avoiding cores with long narrow legs (high mechanical resonant frequency). For example, RM cores produce less audible noise than EE cores for the same flux density. Reducing the core flux density will also reduce the noise. Reducing the maximum flux density (BM) to 1500 Gauss usually eliminates any audible noise but must be balanced with the increased core size needed for a given output power.
## Thermal and Lifetime Considerations
Lighting applications present thermal challenges to the driver. In many cases the LED load dissipation determines the working ambient temperature experienced by the drive so thermal evaluation should be performed with the driver inside the final enclosure. Temperature has a direct impact on driver and LED
lifetime. For every 10 °C rise in temperature, component life is reduced by a factor of 2. Therefore it is important to properly heat sink and to verify the operating temperatures of all devices.
## Layout Considerations
## Primary-Side Connections
Use a single point (Kelvin) connection at the negative terminal of the input filter capacitor for the SOURCE pin and bias returns. This improves surge capabilities by returning surge currents from the bias winding directly to the input filter capacitor. The BYPASS pin capacitor should be located as close to the BYPASS pin and connected as close to the SOURCE pin as possible. The SOURCE pin trace should not be shared with the main power FET switching currents. All FEEDBACK pin components that connect to the SOURCE pin should follow the same rules as the BYPASS pin capacitor. It is critical that the main power FET switching currents return to the bulk capacitor with the shortest path as possible. Long high current paths create excessive conducted and radiated noise.
## Secondary-Side Connections
The output rectifier and output filter capacitor should be as close as possible. The transformer’s output return pin should have a short trace to the return side of the output filter capacitor.
**==> picture [478 x 310] intentionally omitted <==**
**----- Start of picture text -----**<br>
BYPASS Pin<br>LYT4224E Capacitor Clamp Transformer Output<br>Input EMI Filter Diode<br>Bullk<br>Capacitor<br>OE 28 Ea 4.<br>ah Sea gle<br>‘on mae {) Sate ar 1A ; UBS<br>Output<br>Capacitor<br>on Mboup |cake 9<br> tn 091 C ‘ayi) Gras 1 ig<br>REFERENCE Pin<br>Resistor<br>FEEDBACK Pin<br>Resistor Output<br>VOLTAGE MONITOR Pin Capacitors<br>Resistor<br>PI-7096-102313<br>**----- End of picture text -----**<br>
_Figure 13. DER-396 20 W Layout Example, Top Silkscreen / Bottom Layer._
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## Quick Design Checklist
## Maximum Drain Voltage
Verify that the peak VDS does not exceed the device absolute maximum rating under all operating conditions including start-up and fault conditions.
## Maximum Drain Current
Measure the peak drain current under all operation conditions including start-up and fault conditions. Look for signs of transformer saturation (usually occurs at highest operating ambient temperatures). Verify that the peak current is less than the stated Absolute Maximum Rating in the data sheet.
## Thermal Check
At maximum output power, both minimum and maximum line voltage and ambient temperature; verify that temperature specifications are not exceeded for the LYTSwitch-4 high-line, transformer, output diodes, output capacitors and drain clamp components.
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## **Absolute Maximum Ratings[(1,4)]**
DRAIN Pin Peak Current[(5)] : LYT4x21 .................................1.37 A Operating Junction Temperature[[(2)]] .........................-40 to 150 °C LYT4x22 .................................2.08 A LYT4x23 .................................2.72 A Notes: LYT4x24 ................................ 4.08 A 1. All voltages referenced to SOURCE, TA = 65 ° C. LYT4x25 ................................ 5.44 A 2. Normally limited by internal circuitry. LYT4x26 ................................ 6.88 A 3. 1/16 in. from case for 5 seconds. LYT4x27 .................................7.33 A 4. Absolute Maximum Ratings specified may be applied, one LYT4x28 ...................................9.0 A at a time without causing permanent damage to the DRAIN Pin Voltage ……………………… ................. -0.3 to 725 V product. Exposure to Absolute Maximum Ratings for BYPASS Pin Voltage ................................................. -0.3 to 9 V extended periods of time may affect product reliability. BYPASS Pin Current ……………………… ...................... 100 mA 5. Peak DRAIN current is allowed while the DRAIN voltage is VOLTAGE MONITOR Pin Voltage .............................-0.3 to 9 V[(6)] simultaneously less than 400 V. See also Figure 10. FEEDBACK Pin Voltage …….. ................................... -0.3 to 9 V 6. During start-up (the period before the BYPASS pin begins REFERENCE Pin Voltage .......................................... -0.3 to 9 V powering the IC) the VOLTAGE MONITOR pin voltage can Lead Temperature[(3) ] ........................................................260 ° C safely rise to 15 V without damage. Storage Temperature …………………. .................. -65 to 150 °C
Operating Junction Temperature[[(2)]] .........................-40 to 150 °C
## **Thermal Resistance**
Thermal Resistance: E Package ( q JA) ....................................................105 ° C/W[(1) ] ( q JC) .................................................... 2 ° C/W[(2)]
## Notes:
1. Free standing with no heat sink. 2. Measured at back surface tab.
|**Parameter**|**Symbol**|**Conditions**<br>SOURCE = 0 V; TJ= -20 °C to 125 °C<br>(Unless Otherwise Specifed)|**Conditions**<br>SOURCE = 0 V; TJ= -20 °C to 125 °C<br>(Unless Otherwise Specifed)|**Min**|**Typ**|**Max**|**Units**|
|---|---|---|---|---|---|---|---|
|**Control Functions**||||||||
|**Switching Frequency**|fOSC|TJ= 65 °C|Average|124|132|140|kHz|
||||Peak-Peak Jitter||5.4|||
|**Frequency Jitter**<br>**Modulation Rate**|fM|TJ= 65 °C<br>See Note B|||2.6||kHz|
|**BYPASS Pin**<br>**Charge Current**|ICH1|VBP= 0 V,<br>TJ= 65 °C|LYT4x21|-6.04|-3.45|-2.59|mA|
||||LYT4x22|-10.89|-6.22|-4.67||
||||LYT4x23|-16.21|-9.26|-6.95||
||||LYT4x24|-21.88|-12.5|-9.38||
||||LYT4x25|-26.25|-15.0|-11.25||
||||LYT4x26|-15.75|-9.00|-6.75||
||||LYT4x27|-17.50|-10.0|-7.50||
||||LYT4x28|-20.65|-11.8|-8.85||
||ICH2|VBP= 5 V,<br>TJ= 65 °C|LYT4x21|-1.23|-0.7|-0.49||
||||LYT4x22|-4.38|-2.5|-1.75||
||||LYT4x23|-8.05|-4.6|-3.22||
||||LYT4x24|-11.64|-6.65|-4.66||
||||LYT4x25|-15.10|-8.63|-6.04||
||||LYT4x26|-7.61|-4.35|-3.05||
||||LYT4x27|-9.22|-5.27|-3.69||
||||LYT4x28|-10.15|-5.8|-4.06||
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**==> picture [515 x 650] intentionally omitted <==**
**----- Start of picture text -----**<br>
Conditions<br>Parameter Symbol SOURCE = 0 V; TJ = -20 °C to 125 °C Min Typ Max Units<br>(Unless Otherwise Specified)<br>Control Functions (cont.)<br>Charging Current<br>See Note A, B 0.7 %/°C<br>Temperature Drift<br>BYPASS Pin Voltage VBP 0 °C < TJ < 100 °C 5.75 5.95 6.15 V<br>BYPASS Pin<br>Voltage Hysteresis VBP(H) 0 °C < TJ < 100 °C 0.85 V<br>BYPASS Pin V IBP = 4 mA 6.1 6.4 6.7 V<br>Shunt Voltage BP(SHUNT) 0 °C < TJ < 100 °C<br>Soft-Start Time tSOFT VTBPJ = 65 °C = 5.9 V 51 72 ms<br>ICD2 0 °C < TFET Not SwitchingJ < 100 °C 0.5 0.8 1.2<br>Drain Supply Current mA<br>ICD1 FET Switching at f0 °C < TJ < 100 °C OSC 1 2.5 4<br>VOLTAGE MONITOR Pin<br>Threshold 105 112 119<br>Line Overvoltage Threshold IOV RTR = 24.9 kJ = 65 °C W Hysteresis 5 µ A<br>VOLTAGE MONITOR Pin Voltage VV 0 °C < T IV < IJ < 100 °C OV LYT4x21-4x28 2.75 3.00 3.25 V<br>VOLTAGE MONITOR Pin Short-Circuit Current IV(SC) TVJ = 65 °CV = 5 V LYT4x27-4x28 150 175 200 µ A<br>Remote ON/OFF<br>Threshold VV(REM) TJ = 65 °C 0.5 V<br>FEEDBACK Pin<br>FEEDBACK Pin Current<br>at Onset of Maximum IFB(DCMAXR) 0 °C < TJ < 100 °C 90 µ A<br>Duty Cycle<br>FEEDBACK Pin Current<br>Skip Cycle Threshold IFB(SKIP) TJ = 65 °C 210 µ A<br>Maximum Duty Cycle DCMAX IFB(DCMAXR) 0 °C < T< IJ < 100 °CFB < IFB(SKIP) 85 99.9 %<br>FEEDBACK Pin Voltage VFB 0 °C <IFB = 150 TJ < 100 °C µ A 2.1 2.3 2.56 V<br>FEEDBACK Pin Short-Circuit Current IFB(SC) TVJ = 65 °CFB = 5 V 320 380 480 µ A<br>DC10 IFB = IFB(AR), TJ = 65 °C, See Note B 13<br>Duty Cycle Reduction DC40 IFB = 40 µ A, TJ = 65 °C 37 %<br>DC60 IFB = 60 µ A, TJ = 65 °C 60<br>Auto-Restart<br>Auto-Restart ON-Time tAR VTBPJ = 65 °C = 5.9 V 51 72 ms<br>**----- End of picture text -----**<br>
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|**Parameter**|**Symbol**|**Conditions**<br>SOURCE = 0 V; TJ= -20 °C to 125 °C<br>(Unless Otherwise Specifed)|**Conditions**<br>SOURCE = 0 V; TJ= -20 °C to 125 °C<br>(Unless Otherwise Specifed)|**Min**|**Typ**|**Max**|**Units**|
|---|---|---|---|---|---|---|---|
|**Auto-Restart (cont.)**||||||||
|**Auto-Restart**<br>**Duty Cycle**|DCAR|TJ= 65 °C<br>See Note B|||12.5||%|
|**SOA Minimum Switch**<br>**ON-Time**|tON(SOA)|TJ= 65 °C<br>See Note B||||0.875|µs|
|**FEEDBACK Pin Current**<br>**During Auto-Restart**|IFB(AR)|0 °C < TJ< 100 °C|||6.5|10|µA|
|**REFERENCE Pin**||||||||
|**REFERENCE Pin**<br>**Voltage**|VR|RR= 24.9 kW<br>0 °C < TJ< 100 °C||1.223|1.245|1.273|V|
|**REFERENCE Pin**<br>**Current**|IR|||48.69|49.94|51.19|µA|
|**Current Limit/Circuit Protection**||||||||
|**Full Power**<br>**Current Limit**<br>**(CBP = 4.7**µ**F)**|ILIMIT(F)<br>TJ= 65 °C|di/dt = 138 mA/µs|LYT4x22|0.79||0.92|A|
|||di/dt = 145 mA/µs|LYT4x23|0.99||1.15||
|||di/dt = 180 mA/µs|LYT4x24|1.18||1.38||
|||di/dt = 227 mA/µs|LYT4x25|1.41||1.63||
|||di/dt = 272 mA/µs|LYT4x26|1.89||2.19||
|||di/dt = 375 mA/µs|LYT4x27|2.61||3.03||
|**Reduced Power**<br>**Current Limit**<br>**(CBP = 47**µ**F)**|ILIMIT(R)<br>TJ= 65 °C|di/dt = 110 mA/µs|LYT4x21|0.59||0.69|A|
|||di/dt = 158 mA/µs|LYT4x22|0.65||0.76||
|||di/dt = 155 mA/µs|LYT4x23|0.8||0.93||
|||di/dt = 188 mA/µs|LYT4x24|0.95||1.11||
|||di/dt = 240 mA/µs|LYT4x25|1.14||1.33||
|||di/dt = 300 mA/µs|LYT4x26|1.38||1.61||
|||di/dt = 415 mA/µs|LYT4x27|1.88||2.18||
|||di/dt = 770 mA/µs|LYT4x28|3.92||4.56||
|**Minimum**<br>**ON-Time Pulse**|tLEB+ tIL(D)|TJ= 65 °C||270|450|630|ns|
|**Leading Edge**<br>**Blanking Time**|tLEB|TJ= 65 °C<br>See Note B||110||375|ns|
|**Current Limit Delay**|tIL(D)|TJ= 65 °C<br>See Note B|||150||ns|
|**Thermal Shutdown**<br>**Temperature**||See Note B|LYT4x21-4x28|147|155|164|°C|
|**Thermal Shutdown**<br>**Hysteresis**||See Note B|||56||°C|
|**BYPASS Pin Power-Up**<br>**Reset Threshold**<br>**Voltage**|VBP(RESET)|0 °C < TJ< 100 °C||2.25|3.30|4.25|V|
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|**Parameter**|**Symbol**|**Conditions**<br>SOURCE = 0 V; TJ= -20 °C to 125 °C<br>(Unless Otherwise Specifed)|**Conditions**<br>SOURCE = 0 V; TJ= -20 °C to 125 °C<br>(Unless Otherwise Specifed)|**Min**|**Typ**|**Max**|**Units**|
|---|---|---|---|---|---|---|---|
|**Output**||||||||
|**ON-State Resistance**|RDS(ON)|LYT4x21<br>ID= 100 mA|TJ= 65 °C||11.5|13.2|W|
||||TJ= 100 °C||13.5|15.5||
|||LYT4x22<br>ID= 100 mA|TJ= 65 °C||6.9|8.0||
||||TJ= 100 °C||8.4|9.7||
|||LYT4x23<br>ID= 150 mA|TJ= 65 °C||5.3|6.0||
||||TJ= 100 °C||6.3|7.3||
|||LYT4x24<br>ID= 150 mA|TJ= 65 °C||3.4|3.9||
||||TJ= 100 °C||3.9|4.5||
|||LYT4x25<br>ID= 200 mA|TJ= 65 °C||2.5|2.9||
||||TJ= 100 °C||3.0|3.4||
|||LYT4x26<br>ID= 250 mA|TJ= 65 °C||1.9|2.2||
||||TJ= 100 °C||2.3|2.7||
|||LYT4x27<br>ID= 350 mA|TJ= 65 °C||1.8|2.0||
||||TJ= 100 °C||2.1|2.5||
|||LYT4x28<br>ID= 600 mA|TJ= 65 °C||1.3|1.5||
||||TJ= 100 °C||1.6|1.9||
|**OFF-State Drain**<br>**Leakage Current**|IDSS|VBP= 6.4 V<br>VDS= 560 V<br>TJ= 100°C||||50|µA|
|**Breakdown Voltage**|BVDSS|VBP= 6.4 V<br>TJ= 65 °C||725|||V|
|**Minimum Drain**<br>**Supply Voltage**||TJ< 100 °C||36|||V|
|**Rise Time**|tR|Measured in a Typical Flyback<br>See Note B|||100||ns|
|**Fall Time**|tF||||50||ns|
## NOTES:
A. For specifications with negative values, a negative temperature coefficient corresponds to an increase in magnitude with increasing temperature and a positive temperature coefficient corresponds to a decrease in magnitude with increasing temperature.
- B. Guaranteed by characterization. Not tested in production.
Note: The parameter values and limits specified herein are based on a limited data set. There is a small likelihood that minor changes may be required based on additional data as they become available.
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## Typical Performance Characteristics
**==> picture [187 x 406] intentionally omitted <==**
**----- Start of picture text -----**<br>
10000<br>Scaling Factors:<br>LYT4x21 0.18<br>LYT4x22 0.28<br>LYT4x23 0.38<br>LYT4x24 0.56<br>1000 LYT4x25 0.75<br>LYT4x26 1.00<br>LYT4x27 1.16<br>LYT4x28 1.55<br>100<br>10<br>1 100 200 300 400 500 600<br>DRAIN Pin Voltage (V)<br>Figure 14. Drain Capacitance vs. Drain Pin Voltage.<br>5<br>4<br>3<br>Scaling Factors:<br>LYT4x21 0.18<br>LYT4x22 0.28<br>2 LYT4x23 0.38<br>LYT4x24 0.56<br>LYT4x25 0.75<br>LYT4x26 1.00<br>1 LYT4x27 1.16<br>LYT4x28 1.55<br>LYT42x8 TLYT42x8 TCASECASE = 25 = 100 ° C ° C<br>0<br>0 2 4 6 8 10 12 14 16 18 20<br>DRAIN Voltage (V)<br>PI-6965-102313<br>DRAIN Capacitance (pF)<br>PI-6967-102313<br>DRAIN Current (A)<br>**----- End of picture text -----**<br>
_Figure 16. Drain Current vs. Drain Voltage._
**==> picture [198 x 407] intentionally omitted <==**
**----- Start of picture text -----**<br>
300<br>Scaling Factors:<br>LYT4x21 0.18<br>LYT4x22 0.28<br>LYT4x23 0.38<br>LYT4x24 0.56<br>200 LYT4x25 0.75<br>LYT4x26 1.00<br>LYT4x27 1.16<br>LYT4x28 1.55<br>100<br>0<br>0 100 200 300 400 500 600 700<br>DRAIN Voltage (V)<br>Figure 15. Power vs. Drain Voltage.<br>1.2<br>1<br>0.8<br>0.6<br>0.4<br>0.2<br>0<br>0 100 200 300 400 500 600 700 800<br>DRAIN Voltage (V)<br>PI-6966-102313<br>Power (mW)<br>PI-6010-060410<br>DRAIN Current<br>(Normalized to Absolute Maximum Rating)<br>**----- End of picture text -----**<br>
_Figure 17. Maximum Allowable Drain Current vs. Drain Voltage._
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## **eSIP-7C (E Package)**
**==> picture [513 x 489] intentionally omitted <==**
**----- Start of picture text -----**<br>
C<br>2<br>A 0.403 (10.24) 0.081 (2.06) 0.264 (6.70)<br>0.397 (10.08) 0.077 (1.96) Ref.<br>B<br>Detail A<br>2<br>0.325 (8.25) 0.290 (7.37)<br>0.320 (8.13) Ref. 0.198 (5.04) Ref.<br>0.519 (13.18)<br>Ref.<br>Pin #1 0.140 (3.56) 0.016 (0.41) 0.207 (5.26)<br>I.D. 0.120 (3.05) Ref. 0.187 (4.75)<br>0.070 (1.78) Ref. 0.047 (1.19) 3 4<br>0.050 (1.27) 0.100 (2.54) 0.033 (0.84) 6×<br>3 0.016 (0.40.011 (0.28)1) 6× 0.118 (3.00) 0.010 M 0.25 M C A B0.028 (0.71)<br>0.020 M 0.51 M C<br>FRONT VIEW SIDE VIEW BACK VIEW<br>10 ° Ref. 0.100 (2.54)<br>All Around<br>0.021 (0.53) 0.060 (1.52) 0.020 (0.50) 0.050 (1.27)<br>0.019 (0.48) Ref. 0.050 (1.27)<br>PIN 1<br>0.048 (1.22) 0.059 (1.50) 0.155 (3.93)<br>0.378 (9.60) 0.046 (1.17)<br>Ref. 0.019 (0.48) Ref.<br>0.023 (0.58) PIN 7<br>END VIEW<br>0.027 (0.70)<br>0.059 (1.50)<br>Notes:<br>1. Dimensioning and tolerancing per ASME Y14.5M-1994. DETAIL A<br>2. Dimensions noted are determined at the outermost 0.100 (2.54) 0.100 (2.54)<br> extremes of the plastic body exclusive of mold flash,<br> tie bar burrs, gate burrs, and interlead flash, but including MOUNTING HOLE PATTERN<br> any mismatch between the top and bottom of the plastic (not to scale)<br> body. Maximum mold protrusion is 0.007 [0.18] per side.<br>3. Dimensions noted are inclusive of plating thickness.<br>4. Does not include inter-lead flash or protrusions.<br>5. Controlling dimensions in inches (mm).<br>PI-4917-061510<br>**----- End of picture text -----**<br>
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## **Part Ordering Information**
**==> picture [224 x 132] intentionally omitted <==**
**----- Start of picture text -----**<br>
• LYTSwitch Product Family<br> • 4 Series Number<br> • PFC/Dimming<br>2 PFC No Dimming<br>3 PFC Dimming<br> • Voltage Range<br>2 High-Line<br> • Device Size<br> • Package Identifier<br>LYT 4 2 2 3 E E eSIP-7C<br>**----- End of picture text -----**<br>
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|**Revision**|**Notes**|**Date**|
|---|---|---|
|A<br>B<br>C|Initial Release.<br>LYT4x27E, LYT4x28E – updated / added parameters: ICH1, ICH2, VV, IV(SC), and ILIMIT(F).<br>Updated ICH1and ICH2, VBP(SHUNT), IOV, VV, IV(SC), IFB(SKIP), IFB(SC), ILIMIT(R), RDS(ON), Duty Cycle Reduction, Thermal Shutdown Temperature<br>and Hysteresis parameters per PCN-14441.|11/13<br>03/11/14<br>11/11/14|
## **For the latest updates, visit our website: www.power.com**
Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS.
## Patent Information
The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations patents may be found at www.power.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www.power.com/ip.htm.
## Life Support Policy
POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein:
1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in significant injury or death to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
The PI logo, TOPSwitch, TinySwitch, LinkSwitch, LYTSwitch, InnoSwitch, DPA-Switch, PeakSwitch, CAPZero, SENZero, LinkZero, HiperPFS, HiperTFS, HiperLCS, Qspeed, EcoSmart, Clampless, E-Shield, Filterfuse, FluxLink, StakFET, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. ©2014, Power Integrations, Inc.
## Power Integrations Worldwide Sales Support Locations
## World Headquarters
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51 Newton Road #19-01/05 Goldhill Plaza Singapore, 308900 Phone: +65-6358-2160 Fax: +65-6358-2015 e-mail: singaporesales@power.com
Updated at April 28, 2026
Power Integrations is a leading innovator in semiconductor technologies dedicated to high-voltage power conversion. Renowned for advancing the clean-power ecosystem, the company designs highly integrated chips that maximize energy efficiency across a vast range of consumer and industrial applications. Through proprietary advancements like PowiGaN gallium-nitride technology and EcoSmart energy-efficiency solutions, their components deliver exceptional performance while significantly reducing global energy waste. A major focus of their product lineup includes discrete semiconductors, particularly fast and ultrafast recovery rectifier diodes. These essential components provide the high-speed switching and exceptional reliability required for modern power supply designs. By minimizing power loss and thermal output, they ensure efficient power transmission in demanding, high-efficiency circuit environments. Furthermore, Power Integrations is a premier manufacturer of specialized LED lighting components. Their advanced AC/DC LED driver ICs offer engineers streamlined, energy-efficient solutions for solid-state lighting applications. By integrating critical control and protection features into a single footprint, these drivers reduce the overall component count and accelerate the development of reliable, high-performance commercial and consumer lighting systems.
About Novapart
Novapart is a B2B electronic component broker specialising in stock shortages and cost reduction. We source hard-to-find parts and identify compliant alternatives across a catalogue of 540,000+ components from 500+ manufacturers.
Learn more →Stock Shortage Specialist
When a component is unavailable, discontinued or has an unacceptable lead time, we tap into our network of vetted European and Asian distributors to source what you need — without compromising on quality or traceability.
Request a quote →Compliant Alternatives
We identify pin-to-pin, electrically equivalent substitutes that meet the same certifications (RoHS, AEC-Q100, REACH) as your original specification — validated against datasheets, not just part numbers. Often at a lower cost.
BOM Analysis service →