LFD2NX-40-7BG196C

## PRODUCT  SELECTOR  GUIDE 

AUGUST 2021 

SOLUTIONS • FPGAs • IP • REFERENCE DESIGNS • DEVELOPMENT KITS • DESIGN TOOLS 

Lattice Semiconductor: The Low Power Programmable Leader 

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The Lattice<br>Advantage<br>**----- End of picture text -----**<br>


## CONTENTS 

|■|Solution Stacks ..................................................................4-11|
|---|---|
|■|FPGA Products ................................................................12-13|
|■|Video Connectivity ...........................................................14-15|
|■|Ultra Low Power ....................................................................16|
|■|Control & Security ............................................................17-19|
|■|IP Cores and Reference Designs .....................................21-25|
|■|Development Kits .............................................................26-35|
|■|Programming Hardware ........................................................36|
|■|Design Software ...............................................................37-38|



2 

Lattice Semiconductor: The Low Power Programmable Leader 

## Lattice sensAI™ Solution Stack 

## **Accelerate Integration of Flexible, Ultra Low Power Inferencing** 

With solutions optimized for ultra low power consumption (under 1 mW – 1 W), small package size (5.5 mm[2] – 100 mm[2] ), customizable performance and accuracy, and interface flexibility (MIPI CSI-2, LVDS, GigE, etc.), the Lattice sensAI stack accelerates integration of scalable, always-on, on-device AI. 

## Lattice mVision™ Solution Stack 

## **Accelerate Implementation of Low Power Embedded Vision Applications** 

With solutions optimized for low power consumption ranging from under 150 mW to 1 W and small package size (2.5 x 2.5 mm to 10 x 10 mm) the Lattice mVision solution stack provides customizable performance and flexible interface connectivity (MIPI CSI-2, LVDS, PCIe, GigE, etc.). Lattice’s mVision solution stack accelerates the integration of scalable Embedded Vision solutions for Smart Factory, Machine Vision, Smart City, and Smart Home applications. 

## Lattice Sentry™ Solution Stack 

## **Software Solution for Platform Firmware Resiliency (PFR) Root of Trust** 

The Lattice Sentry solution stack consists of a complete reference platform, fully validated IP building blocks, easy to use FPGA design tools, reference design/demonstrations, as well as a network of custom design services. In many instances, a fully functioning PFR solution can be developed by modifying the included RISC-V C source code. 

## Lattice Automate™ Solution Stack 

Lattice Automate helps designers accelerate high performance, low power, secure solutions for next generation factory automation solutions. The stack includes modular hardware development boards and software-programmable reference designs and demos that simplify and accelerate implementation of applications like robotics, scalable multi-channel motor control with predictive maintenance, and real-time industrial networking. 

## Lattice SupplyGuard™ 

## **End-to-End Supply Chain Protection Service** 

The Lattice SupplyGuard™ service provides customers with factory-locked ICs. These ICs can only be programmed using a configuration bitstream which has been developed, signed and encrypted by the intended customer. The solution is designed to provide protection against counterfeiting, over-building, malware insertion and IP theft. 

## General Purpose FPGAs 

## **Low Power FPGAs (CertusPro-NX, Certus-NX, ECP, and LatticeXP2 families)** 

Addresses a broad range of connectivity and acceleration applications across multiple markets. 

- Lowest power and smallest package with up to 10G SERDES and 100K LCs 

- Industry-leading reliability and efficient processing (with class-leading on-chip memory and LPDDR4 support) 

## Specialized Families Tailored For Specific Needs 

## **Video Connectivity FPGAs (CrossLink Families)** 

Optimized for high speed video and sensor applications 

- First FPGA with hardened MIPI D-PHY 

- Highest performance at lowest power 

## **Ultra Low Power FPGAs (iCE40 Families)** 

World’s lowest power FPGAs; Optimized for small form factor 

- Static current as low as 25 uA 

- World’s most popular ultra low power FPGA 

## **Control & Security FPGAs (Mach & L-ASC10 Families)** 

Optimized for platform management & security applications 

- Instant-on, non-volatile 

- Highest I/O density 

For more information go to LATTICESEMI.COM 

3 

Solution Stack – Lattice sensAI 

## Ultra Low Power Lattice sensAI[™ ] Stack Delivering Milliwatt AI to the Edge with Flexible FPGAs 

With solutions optimized for ultra low power consumption (under 1 mW – 1 W), small package size (5.5 mm[2] – 100 mm[2] ), customizable performance and accuracy, and interface flexibility (MIPI CSI-2, LVDS, GigE, etc.), the Lattice sensAI stack accelerates integration of scalable, always-on, on-device AI. 

_Complete technology stack for ultra low power flexible inferencing_ 

_Rapid design space exploration - Performance vs Power vs Accuracy tradeoffs_ 

4 

Solution Stack – Lattice sensAI 

## Lattice sensAI Hardware Platforms 

## **CrossLink-NX VIP Sensor Input Board** 

- Key Features: 

- Seamless connectivity to the Embedded Vision Development Kit 

- Optimized for fast prototyping vision-based AI acceleration 

## **Embedded Vision Development Kit** 

- Key Features: 

- ECP5[™] FPGA consuming under 1 W of power consumption 

- Supports MIPI CSI-2, eDP, HDMI[®] , GigE Vision, USB 3.0, etc. 

## **HM01B0 UPduino Shield** 

- Key Features: 

- A complete development kit for implementing AI using vision and sound as sensory inputs 

- iCE40 UltraPlus FPGA based Upduino 2.0 board and HiMax image sensor module 

## Lattice sensAI IP Cores 

|IP Core|OPN|Key Features|
|---|---|---|
|CNN Compact Accelerator|CNN-CPACCEL-UP-U|Optimized for iCE40 UltraPlus FPGA, supports variable quantization|
|CNN Accelerator|CNN-ACCEL-E5-U|Optimized for ECP5 FPGA, supports variable quantization|
|CNN Plus Accelerator|CNNPLUS-ACCEL-CNX-U|For use with CrossLink-NX FPGA, supports compact and high performance modes|



## Lattice sensAI Software Tools 

|Software Tool|Key Features|
|---|---|
|Neural Network Compiler|Supports TensorFlow, Keras and Caffe. No prior RTL experience required.|



## Lattice sensAI Reference Designs 

|Reference Design/Demo|Supported FPGA, HW Platform|Power Consumption|
|---|---|---|
|Human Face Identification|ECP5, Embedded Vision Development Kit|< 1 W|
|Object Counting|ECP5, Embedded Vision Development Kit|< 1 W|
|Object Counting|CrossLink-NX, CrossLink-NX VIP Sensor Input Board|200 mW|
|Human Presence Detection|iCE40 UltraPlus/HiMax HM01B0 UPduino Shield|< 8 mW|
|Key Phrase Detection|iCE40 UltraPlus, iCE40 UltraPlus Mobile Development Platform|< 8 mW|



## Lattice sensAI Stack Custom Design Services 

Have custom AI solution needs? The senseAI stack includes an ecosystem of select, global design service partners that can deliver custom solutions for a range of end applications, including Smart Home, Smart City, Smart Factory, and Smart Cars. Please contact your local sales representative to request more information. 

For more information go to LATTICESEMI.COM/SENSAI 

5 

Solution Stack – Lattice mVision 

## Lattice mVision[™] Solution Stack Accelerate Implementation of Low Power Embedded Vision Applications 

With solutions optimized for low power consumption ranging from under 150 mW to 1 W and small package size (2.5 x 2.5 mm to 10 x 10 mm) Lattice mVision solution stack provides customizable performance and flexible interface connectivity (MIPI CSI-2, LVDS, PCIe, GigE, etc.). Lattice’s mVision solution stack accelerates the integration of scalable Embedded Vision solutions for Smart Factory, Machine Vision, Smart City, and Smart Home applications. 

## Lattice mVision Hardware Platforms 

The Lattice mVision solution stack uses the award-winning Video Interface Platform (VIP) (www.latticesemi.com/vip) which is the ideal hardware for Embedded Vision designs and it provides a highly flexible, smart modular solution for Embedded Vision designers who need to build a prototyping system quickly. 

6 

Solution Stack – Lattice mVision ~~ee~~ 

Lattice mVision IP Cores 

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|||
|---|---|
|CSI-2/DSI D-PHY Receiver|FPD-LINK Receiver|
|CSI-2/DSI D-PHY Transmitter|FPD-LINK Transmitter|
|Ne|
|Byte to Pixel Converter|Color Space Converter|
|Pixel to Byte Converter|Video Frame Buffer|
|SubLVDS Image Sensor Receiver|Gamma Corrector|
|2D Scaler|

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## Lattice mVision Partner IP 

Helion IONOS Image Signal Processing (ISP) ~~ee~~ | Bitec DisplayPort IP | Helion GigE Vision IP ~~ee~~ 

## Lattice mVision Design Tools 

Lattice’s mVision solution stack uses Lattice’s standard Radiant and Diamond FPGA design tools for ease of use and fast system design. 

## Lattice mVision Reference Designs 

N Input to 1 Output MIPI CSI-2 Camera Aggregator Bridge 4 to 1 Image Aggregation with CrossLink-NX SubLVDS to MIPI CSI-2 Image Sensor Bridge 4 to 1 Image MIPI DSI/CSI-2 to OpenLDI LVDS Interface Bridge 

## Lattice mVision Demonstrations 

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||||||
|---|---|---|---|---|
|4 to 1 Image Aggregation Demo for CrossLink-NX Image Input Board|DisplayPort Transmit Demo|
|es|
|||2 to 1 side by side Demo for CrossLink on EVDK|||Helion GigE Vision|||
|3D Depth-Mapping|IONOS ISP from Helion|
|Video over USB 3.0|DisplayPort Receive Demo|
|Video over Ethernet|

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## Lattice mVision Custom Design Services 

Have custom Embedded Vision solutions needs? The Lattice mVision stack includes an ecosystem of select, global design service partners that can deliver custom solutions for a range of end applications, including Factory, Smart Home, Smart City, and Smart Cars. Please contact your local sales representative to request more information. 

For more information go to LATTICESEMI.COM/MVISION 

7 

Solution Stack – Lattice Sentry 

## Lattice Sentry™ Solution Stack Dynamic PFR Solution for Comprehensive Coverage of NIST 800-193 Guidelines 

Complete solution toolkit includes everything needed to create a custom Platform Firmware Resiliency (PFR) Implementation 

Solution allows secure protection of firmware before, during, and after system boot. 

8 

## Solution Stack – Lattice Sentry 

## Proven Lattice Sentry IP Cores 

- QSPI Streamer 

- QSPI Monitor 

- I[2] C Monitor 

- PLD Interface 

- Embedded Security Block Mux 

- RISC-V CPU 

## Easy To Use Lattice Design Tools 

## Plug & Play Lattice Sentry Reference Designs 

- PFR Project Example Code 

- QuickSwitch Schematics for SPI/QSPI 

- Manifest Generator 

- Processor Command Emulator 

## Instructive Lattice Sentry Demonstrations 

- Protection 

- Detection 

- Recovery 

- Attacking Firmware/I[2] C Peripherals 

- Fault Log 

- Implemented on Lattice Sentry Demo Board for MachXO3D 

## Lattice Sentry Custom Design Services 

Have customized PFR needs for your design or market? The Lattice Sentry solution is fully customizable, and Lattice has a global Application Services staff who can perform custom IP development if needed. These customizations can enable a resilient PFR solution across a wide range of end applications, including Communications, Industrial, Client Computing, Automotive and Datacenter. Please contact your local Lattice sales agent to request more information. 

For more information go to LATTICESEMI.COM/SENTRY 

9 

## Solution Stack – Lattice Automate 

## Lattice Automate[™] Solution Stack Accelerating Factory Automation 

_Lattice Automate™ helps designers accelerate high performance, low power, secure solutions for next generation factory automation solutions. The stack includes modular hardware development boards and softwareprogrammable reference designs and demos that simplify and accelerate implementation of applications like robotics, scalable multi-channel motor control with predictive maintenance, and real-time industrial networking._ 

## Hardware Platform 

The Lattice Automate solution stack runs on the Certus-NX Versa development board which supports the main processing subsystem, connections to the Host PC, and also the embedded real time Ethernet links. The Motor Control nodes also utilize the Versa board. 

## IP Cores 

- EtherConnect – Enables compact, low power, modular real-time sense and control over embedded Ethernet connections 

- CNN Processing Unit – Provides AI accelerator for Predictive Maintenance processing 

- PDM Data Collector – Collects data from the Motor Control Nodes for input to the CNN Processing Unit 

## Design Tools 

Lattice’s Automate solution stack uses Lattice’s standard Radiant and Diamond FPGA design tools and Lattice Propel™, enabling RISC-V based SW and HW co-processing for ease of use and fast system design. 

LTTICE RADIANT DESIGN SOFTWARE 

10 

Solution Stack – Lattice Automate 

## Reference Designs & Demos 

Multi-Channel Motor Control with Predictive Maintenance and Embedded Real Time Networking. 

- Muti-Channel BLDC Motor Control 

- AI enabled support for Predictive Maintenance 

- Embedded Real-Time Networking 

- GUI for controlling and monitoring the design 

## Demo Hardware 

- Certus-NX Versa. Platform with 5G PCIe, SGMII, DDR3 Memory and 40k Logic Cells. Main Controller and Nodes use the Certus-NX Versa board. 

- Trenz Pmod compatible motor driver board, 15A 0-30V. 

- Anaheim Automation BLY17 Series Brushless DC Motor. 

- HW RoT Reference Design for Cyber Resiliency using MachXO3D 

   - Demonstrate and test the ability to authenticate firmware of protected devices before boot 

   - Detect and block illegal SPI and Flash operations 

   - Automatically replace compromised firmware in the protected subsystem 

## Lattice Automate Custom Design Services 

Need help putting together solutions for Factory Automation? The Lattice Automate stack includes an ecosystem of select, global design service partners that can deliver custom solutions for a range of end-applications, including factory, smart home, smart city, and smart cars. Please contact your local sales representative to request more information. 

For more information go to LATTICESEMI.COM/AUTOMATE 

11 

FPGA Products 

## **General Purpose FPGAs** 

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Features CertusPro [TM] -NX Certus [TM] -NX<br>Device LFCPNX-50 LFCPNX-100 LFD2NX-17 LFD2NX-40<br>Logic Cells [1]  (k)  52 39 17 39<br>Blocks 96 84 24 84<br>EBR SRAM<br>kbits 1728 1512 432 1512<br>Distributed RAM kbits 344 240 80 240<br>Blocks 4 2 5 2<br>Large RAM (LRAM)<br>kbits 2048 1024 2560 1024<br>Multipliers 18 x 18 96 56 24 56<br>PCIe Hard IP 1 (Gen3, 8 Gbps) 1 (Gen2, 5 Gbps) 1 (Gen2, 5 Gbps)<br>PCIe Lanes 4 1 1<br>SERDES maximum speed Gbps 10 5<br>SGMII (1.25 Gbps) CDR Hard IP 2 5 2 2<br>SGMII (1.25 Gbps) Lanes 2 2 2 2<br>GPLL 3 3 2 3<br>ADC Blocks 2 2 2 2<br>450 MHz High Frequency Oscillator 1 1 1 1<br>128 KHz Low Power Oscillator 1 1 1 1<br>DDR Memory Support (Up to 1066 Mbps) LPDDR4, LPDDR2, DDR3/3L LPDDR2, DDR3/3L<br>Boot Flash External External<br>Dual Boot P P<br>Multiple Boot P P<br>Bitstream Encryption (AES-256) P P<br>Bitstream Authentication (ECDSA) P P<br>Full-chip Configuration Time [2]  (ms) TBD 29 8 14<br>I/O Configuration Time [2]  (ms) TBD 4 3 3<br>Core Vcc 1.0 V 1.0 V<br>C P P<br>Temp. I P P<br>A (AEC-Q100) P<br>0.5 mm Spacing (Package type, #Balls, Size) Total I/O (Wide Range, High Performance, ADC [3] ) / SERDES Lanes Total I/O (Wide Range, High Performance, ADC [3] ) / 5G PCIe Lane<br>csfBGA 121 6 x 6 mm 77 (23, 48, 6) / 0 81 (23, 58, 0) / 1 78 (24, 48, 6) / 0 [4] 82 (24, 58, 0) / 1 [4]<br>0.8 mm Spacing (Package type, #Balls, Size) Total I/O (Wide Range, High Performance, ADC [3] ) / SERDES Lanes Total I/O (Wide Range, High Performance, ADC [3] ) / 5G PCIe Lane<br>196 12 x 12 mm 157 (93, 58, 6) / 0<br>caBGA<br>256 14 x 14 mm 192 (112, 74, 6) / 1 [4]<br>CBG256 256 14 x 14 mm 170 (TBD) / 4 165 (75, 84, 6) / 4<br>BBG484 484 19 x 19 mm 230 (TBD) / 4 305 (167, 132, 6) / 8<br>1.0 mm Spacing (Package type, #Balls, Size) Total I/O (Wide Range, High Performance, ADC [3] ) / SERDES Lanes Total I/O (Wide Range, High Performance, ADC [3] ) / 5G PCIe Lane<br>BFG484 484 23 x 23 mm 230 (TBD) / 4 305 (167, 132, 6) / 4<br>LFG672 672 27 x 27 mm 305 (167, 132, 6) / 8<br>**----- End of picture text -----**<br>


- 1) Logic Cells = LUTs x 1.2 effectiveness 

- 2) QSPI mode at 150 MHz nominal frequency 

- 3) Dedicated inputs for ADC 

- 4) Available in Automotive Grade 

12 

FPGA Products 

## **General Purpose FPGAs** 

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Features ECP5 [TM] -5G ECP5 Automotive ECP5 [TM] LatticeECP3 [TM]<br>Device<br>LUTs 24 k 44 k 84 k 24 k 44 k 12 k 24 k 44 k 84 k 12 k 24 k 44 k 84 k 17 k 33 k 67 k 92 k 149 k<br># of Blocks 56 108 208 56 108 32 56 108 208 32 56 108 208 38 72 240 240 372<br>EBR SRAM<br>kbits 1008 1944 3744 1008 1944 576 1008 1944 3744 576 1008 1944 3744 700 1,327 4,420 4,420 6,850<br>Distrib RAM kbits 194 351 669 194 351 97 194 351 669 97 194 351 669 36 68 145 188 303<br>sysDSP™Blocks Multipliers 28 72 156 28 72 28 28 72 156 28 28 72 156 24 64 128 128 320<br>Max. Chan. 1/2 2/4 1/2 2/4 0 1/2 2/4 0 0 4 12 16<br>SERDES<br>Max. Rate 5 Gbps 3.2 Gbps 3.2 Gbps 3.2 Gbps<br>PLL + DLL 2+2 4+4 2+2 4+4 2+2 2+2 4+4 2+2 2+2 4+4 2+2 4+2 10+2<br>DDR3 800,  DDR3 800,<br>DDR Support LPDDR3 800,  LPDDR3 800,  DDR3 800, LPDDR3 800, DDR3L 800 DDR3 800, DDR2 533, DDR 400<br>DDR3L 800 DDR3L 800<br>Boot Flash External External External External<br>Dual Boot P P P P<br>Multiple Boot P P P<br>Bit-stream Encryption P P P P<br>Core Vcc 1.2 V 1.1 V 1.1 V 1.2 V<br>C P P P<br>Temp. I P P P<br>AEC-Q100 P P<br>I/O Count /  I/O Count /<br>0.5 mm Spacing SERDES SERDES I/O Count / SERDES<br>csfBGA 285 10 x 10 mm 118/2 118/2 118/2 118/2 118/2 118/2 118/0 118/0 118/0 118/0<br>csBGA 328 10 x 10 mm 116/2<br>I/O Count /  I/O Count /<br>0.8 mm Spacing SERDES SERDES I/O Count / SERDES<br>256 14 x 14 mm 197/0 197/0 197/0<br>381 17 x 17 mm 197/2 203/4 205/4 197/2 203/4 197/0 197/2 203/4 205/4 197/0 197/0 203/0 205/0<br>caBGA<br>554 23 x 23 mm 245/4 259/4 245/4 259/4 245/0 259/0<br>756 27 x 27 mm 365/4 365/4 365/0<br>I/O Count /  I/O Count /<br>1.0 mm Spacing SERDES SERDES I/O Count / SERDES<br>ftBGA 256 17 x 17 mm 133/4 133/4<br>484 23 x 23 mm 222/4 295/4 295/4 295/4<br>fpBGA 672 27 x 27 mm 310/4 380/8 380/8 380/8<br>1156 35 x 35 mm 490/12 490/12 586/16<br>LFE5UM5G-25 LFE5UM5G-45 LFE5UM5G-85 LAE5UM-25 LAE5UM-45 LAE5U-12 LFE5UM-25 LFE5UM-45 LFE5UM-85 LFE5U-12 LFE5U-25 LFE5U-45 LFE5U-85 LFE3-17EA LFE3-35EA LFE3-70EA LFE3-95EA LFE3-150EA<br>**----- End of picture text -----**<br>


13 

## Video Connectivity 

## **CrossLink Series – Embedded Vision FPGAs** 

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Features CrossLink ™ CrossLinkPlus ™<br>Device<br>LCs (k) 7 7 7<br>Blocks 20 20 20<br>EBR SRAM<br>kbits 180 180 180<br>Distributed RAM kbits 47 47 47<br>Port 1 2 2 2<br>MIPI D-PHY Lane 4 8 8 8<br>Max Rate 1.5 Gbps 1.5 Gbps 1.5 Gbps<br>GPLL 1 1 1<br>Edge Clock 2 4 4 4<br>Boot Flash External Internal Internal<br>Dual Boot External External External<br>Internal Configuration Memory NVCM Flash Flash<br>C P P P<br>Temp I P P P<br>AEC-Q100 P P P<br>0.4 mm Pitch I/O (Low Speed/High Speed) I/O (L/H)<br>WLCSP 36 2.5 x 2.5 mm 17/10<br>ucfBGA 64 3.5 x 3.5 mm 29/22 29/22<br>0.5 mm Pitch I/O (Low Speed/High Speed) I/O (L/H)<br>csfBGA 81 4.5 x 4.5 mm 37/30 37/30<br>0.65 mm Pitch I/O (Low Speed/High Speed) I/O (L/H)<br>ctfBGA 80 6.5 x 6.5 mm 37/30 37/30<br>ckfBGA 80 7 x 7 mm 37/30 37/30 37/30<br>LIF-MD6000-6UWG36 LIF-MD6000-6UMG64 LIF-MD6000-6MG81 LIF-MD6000-6JMG80 LIF-MD6000-6KMG80 LIA-MD6000-6MG81 LIA-MD6000-6JMG80 LIA-MD6000-6KMG80 LIF-MDF6000-6UMG64 LIF-MDF6000-6KMG80<br>**----- End of picture text -----**<br>


14 

## Video Connectivity 

## **CrossLink Series – Embedded Vision FPGAs** 

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Features CrossLink ™ -NX<br>Device<br>LCs (k) 17 39<br>Blocks 24 84<br>EBR SRAM<br>kbits 432 1512<br>Distributed RAM kbits 80 240<br>Large Memory  Blocks 5 2<br>(LRAM) kbits 2560 1024<br>Multipliers 18 x 18 24 56<br>Port 1 1 2 2 1 2 2 2 2<br>MIPI D-PHY Lane 4 4 8 8 4 8 8 8 8<br>Max Rate 2.5 Gbps<br>Port 1 1 1<br>PCIe (5 Gbps)<br>Lane 1 1 1<br>Channel 2<br>SGMII<br>Max Rate 1.25 Gbps<br>GPLL 2 3<br>Edge Clock 8 8 12 12 8 12 12 12 12<br>DDR Support (Up to 1066 Mbps) LPDDR3 LPDDR3, DDR3/3L<br>Boot Flash External<br>Dual Boot External<br>Multiple Boot P<br>Internal Configuration Memory None<br>Bit-stream Encryption P<br>C P<br>Temp I P<br>A (AEC-Q100) P P P P<br>0.4 mm Pitch I/O (Low Speed/High Speed)<br>WLCSP 72 3.7 x 4.1 mm 16/20<br>0.5 mm Pitch I/O (Low Speed/High Speed)<br>QFN 72 10 x 10 mm 18/22 18/22<br>csfBGA 121 6 x 6 mm 24/48 24/48<br>csBGA 289 9.5 x 9.5 mm 106/74<br>0.8 mm Pitch I/O (Low Speed/High Speed)<br>256 14 x 14 mm 24/48 78/74<br>caBGA<br>400 17 x 17 mm 118/74<br>LIFCL-17-7UWG72 LIFCL-17-7SG72 LIFCL-17-7MG121 LIFCL-17-7BG256 LIFCL-40-7SG72 LIFCL-40-7MG121 LIFCL-40-7MG289 LIFCL-40-7BG256 LIFCL-40-7BG400<br>**----- End of picture text -----**<br>


15 

## Ultra Low Power 

## **iCE40 Series – World’s Smallest FPGAs** 

|**Features**|**Features**|**Features**|**iCE40**<br>**UltraPlus**|**iCE40**<br>**UltraPlus**|**iCE40**<br>**UltraLite**|**iCE40**<br>**UltraLite**|**iCE40 Ultra**|**iCE40 Ultra**|**iCE40 Ultra**|**iCE40 LP**|**iCE40 LP**|**iCE40 LP**|**iCE40 LP**|**iCE40 LP**|**iCE40 HX**|**iCE40 HX**|**iCE40 HX**|
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|**Device**|||**UP3K **|**UP5K **|**UL640 **|**UL1K**|**LP1K**|**LP2K**|**LP4K **|**LP384 **|**LP640 **|**LP1K**|**LP4K**|**LP8K**|**HX1K**|**HX4K**|**HX8K**|
|**Logic**|||2800|5280|640|1248|1100|2048|3520|384|640|1280|3520|7680|1280|3520|7680|
|**NVCM**|||Yes|Yes|Yes|Yes|Yes|Yes|Yes|Yes|Yes|Yes|Yes|Yes|Yes|Yes|Yes|
|**Static Power (µA)**|||75|75|35|35|71|71|71|21|100|100|250|250|296|1140|1140|
|**EBR**|||80 kb|120 kb|56 kb|56 kb|64 kb|80 kb|80 kb|0|64 kb|64 kb|80 kb|128 kb|64 kb|80 kb|128 kb|
|**SPRAM**|||0.5 Mb|1 Mb||||||||||||||
|**PLL**|||1|1|1|1|1|1|1|||1|2|2|1|2|2|
|**I2C core**|||2|2|2|2|2|2|2|||||||||
|**SPI Core**|||2|2|||2|2|2|||||||||
|**Strobe (low)**||||||||||||||||||
|**Strobe (high)**||||||||||||||||||
|**Low Power Oscillator**|||1|1|1|1|1|1|1|||||||||
|**High Frequency Oscillator**|||1|1|1|1|1|1|1|||||||||
|**24 mA Drive**|||3|3|3|3|3|3|3||3|3<br>3||||||
|**100 mA + 400 mA Drive**|||||1|1||||||||||||
|**500 mA Drive**|||||||1|1|1|||||||||
|**Mult 16 x 16, Accum 32 bit**|||4|8|||2|4|4|||||||||
|**PWM Generator**|||Yes|Yes|Yes|Yes|Yes|Yes|No|||||||||
|**0.35 mm Spacing**|||**Total I/Os (Dedicated I/Os)4,5**|||||||||||||||
|**WLCSP**|**16**|**1.40 x 1.40 mm**|||||||||11(1)<br>1|11(1)<br>1||||||
||**16**|**1.40 x 1.48 mm**||||10|10|||||||||||
||**25**|**1.71 x 1.71 mm**||||||||||||||||
||**36**|**2.08 x 2.08 mm**|||||27(1)|27(1)|27(1)|||||||||
|**0.4 mm Spacing**|||**Total I/Os (Dedicated I/Os)4,5**|||||||||||||||
|**WLCSP**|**30**|**2.15 x 2.55 mm**|21|21||||||||||||||
||**36**|**2.5 x 2.5 mm**|||26|26||||27(2)||27(2)<br>1||||||
|**ucBGA**|**49**|**3 x 3 mm**||||||||39(2)||37(2)<br>1||||||
||**81**|**4 x 4 mm**||||||||||65(2)|65(2)<br>2|65(2)<br>2||||
||**121**|**5 x 5 mm**||||||||||97(2)|95(2)|95(2)||||
||**225**|**7 x 7 mm**|||||||||||180(2)|180(2)|||180(2)|
|**0.5 mm Spacing**|||**Total I/Os (Dedicated I/Os)4,5**|||||||||||||||
|**QFN**|**32**|**5 x 5 mm**||||||||23(2)||||||||
||**48**|**7 x 7 mm**||39|||39|39|39|||||||||
||**84**|**7 x 7 mm**||||||||||69(2)<br>1||||||
|**csBGA**|**81**|**5 x 5 mm**||||||||||64(2)<br>1||||||
||**121**|**6 x 6 mm**||||||||||94(2)||||||
||**132**|**8 x 8 mm**|||||||||||||97(2)|97(2)|97(2)|
|**VQFP**|**100**|**14 x 14 mm**|||||||||||||74(2)<br>1|||
|**TQFP**|**144**|**20 x 20 mm**|||||||||||||98(2)|109(2)||
|**0.8 mm Spacing**|||**Total I/Os (Dedicated I/Os)4,5**|||||||||||||||
|**caBGA**|**121**|**9 x 9 mm**|||||||||||||||95(2)|
||**256**|**14 x 14 mm**|||||||||||||||208(2)|



- 1) No PLL available on the 16 WLCSP, 36 ucBGA, 81 csBGA, 84 QFN and 100 VQFP packages. 

- 2) Only one PLL available on the 81 ucBGA package. 

- 3) 24 mA constant current sink available on the 16 WLCSP package only. 

- 4) Total I/Os include dedicated I/Os. 5) Dedicated I/Os are defined to be pins that are dedicated and cannot be used by user logic after configuration. 

16 

## Control and Security 

## **Mach-NX & MachXO3D – Secure Control, Bridging and I/O Expansion FPGAs** 

**==> picture [224 x 403] intentionally omitted <==**

**----- Start of picture text -----**<br>
Features MachXO3D [TM] Mach [TM] -NX<br>Device<br>LCs 5160 11280 11280<br>EBR SRAM # of Blocks 10 48 48<br>kbits 92 432 432<br>Distrib. RAM kbits 34 73 73<br>UFM kbits 367/1122 [4] 1088/2693 [4] 1064/2669 [4]<br>Configuration Memory Dual Flash Dual Flash Dual Flash<br>Dual Boot P6 P6 P6<br>Embedded Function Blocks I [2] C (2), SPI (1), Timer (1)<br>Crypto Key Strength (bits) 256 256 384<br>1 V P<br>Core Vcc 1.2 V P7<br>2.5 - 3.3 V P P<br>Auto P P<br>Temp. Com P P P<br>Ind P P P<br>0.4 mm Spacing<br>36 [1] 2.5 x 2.5 mm<br>WLCSP 49 [1] 3.2 x 3.2 mm<br>81 [1] 3.8 x 3.8 mm<br>0.5 mm Spacing<br>QFN 72 10 x 10 mm 58 58<br>121 [1] 6 x 6 mm<br>csfBGA 256 [1] 9 x 9 mm<br>324 10 x 10 mm<br>0.8 mm Spacing<br>256 14 x 14 mm 2068 2068 200<br>324 15 x 15 mm<br>caBGA<br>400 17 x 17 mm 335<br>484 19 x 19 mm 3838 379<br>MachXO3D-4300 MachXO3D-9400 LFMNX-50<br>**----- End of picture text -----**<br>


- 1) Package is only available for E=1.2 V devices. 

- 2) Package is only available for C=2.5 V/3.3 V devices. 

- 3) Package is available for both E=1.2 V and C=2.5 V/3.3 V devices. 

- 4) When Dual Boot is disabled, image space can be repurposed as extra UFM. 

- 5) Dual Boot supported with external boot Flash. 

- 6) Dual Boot is supported by on chip dual configuration flash memory. 

- 7) Available only in automotive grade 

- 8) Available in automotive grade 

17 

## Control and Security 

## **MachXO3 Series – Control, Bridging and I/O Expansion FPGAs** 

**==> picture [392 x 393] intentionally omitted <==**

**----- Start of picture text -----**<br>
Features MachXO3LF [TM] MachXO3L [TM]<br>Device<br>LUTs 640 1300 2100 4300 6900 9400 640 1300 2100 4300 6900 9400<br>EBR SRAM # of Blocks 7 7 8 10 26 48 7 7 8 10 26 48<br>kbits 64 64 74 92 240 432 64 64 74 92 240 432<br>Distrib. RAM kbits 5 10 16 34 54 73 5 10 16 34 54 73<br>UFM kbits 64 64 80 96 256 448<br>Configuration Memory Flash Internal NVM<br>Dual Boot P5 P5<br>Embedded Function Blocks I [2] C (2), SPI (1), Timer (1) I [2] C (2), SPI (1), Timer (1)<br>Embedded Security Block<br>1.2 V P P<br>Core Vcc<br>2.5 - 3.3 V P       P<br>Auto P P P<br>Temp. Com P P<br>Ind P P<br>0.4 mm Spacing I/O Count<br>36 [1] 2.5 x 2.5 mm 28 28<br>WLCSP 49 [1] 3.2 x 3.2 mm 38 38<br>81 [1] 3.8 x 3.8 mm 63 63<br>0.5 mm Spacing I/O Count<br>QFN 72 10 x 10 mm<br>121 [1] 6 x 6 mm 100 100<br>csfBGA 256 [1] 9 x 9 mm 206 206<br>324 10 x 10 mm 268 [8] 268 [8] 281 268 268 281<br>0.8 mm Spacing I/O Count<br>256 14 x 14 mm 206 [8] 2062 206 [3] 206 [2] 206 [3]<br>324 15 x 15 mm 279 [8] 279 [2] 279 [2]<br>caBGA<br>400 17 x 17 mm 335 [2] 335 [3] 335 [2] 335 [3]<br>484 19 x 19 mm 384 [3] 384 [3]<br>LCMXO3LF-640 LCMXO3LF-1300 LCMXO3LF-2100 LCMXO3LF-4300 LCMXO3LF-6900 LCMXO3LF-9400 LCMXO3L-640 LCMXO3L-1300 LCMXO3L-2100 LCMXO3L-4300 LCMXO3L-6900 LCMXO3L-9400<br>**----- End of picture text -----**<br>


- 1) Package is only available for E=1.2 V devices. 

- 2) Package is only available for C=2.5 V/3.3 V devices. 

- 3) Package is available for both E=1.2 V and C=2.5 V/3.3 V devices. 

- 4) When Dual Boot is disabled, image space can be repurposed as extra UFM. 

- 5) Dual Boot supported with external boot Flash. 

- 6) Dual Boot is supported by on chip dual configuration flash memory. 

- 7) Available only in automotive grade 

- 8) Available in automotive grade 

18 

Control and Security 

## **MachXO2 & LatticeXP2 Series – Bridging and I/O Expansion FPGAs** 

**==> picture [344 x 570] intentionally omitted <==**

**----- Start of picture text -----**<br>
Features MachXO2™ LatticeXP2™<br>Device<br>LUTs 256 640 640 1280 1280 2112 2112 4320 6864 5 k 8 k 17 k 29 k 40 k<br>EBR SRAM # of Blocks 0 2 7 7 8 8 10 10 26 9 12 15 21 48<br>kbits 0 18 64 64 74 74 92 92 240 166 221 276 387 885<br>Distrib. RAM kbits 2 5 5 10 10 16 16 34 54 10 18 35 56 83<br>UFM kbits 0 24 64 64 80 80 96 96 256<br>18x18<br>sysDSP™  Blocks 3 4 5 7 8<br>Blocks<br>Multipliers 12 16 20 28 32<br>PLL + DLL 1+2 2+2 2+0 4+0<br>DDR Support DDR 266, DDR2 266, LPDDR266 DDR/2 400<br>Configuration Memory Internal Flash Internal Flash<br>Dual Boot [4] P P<br>Bit-stream Encryption P<br>Embedded Function Blocks I [2] C (2), SPI (1), Timer (1)<br>1.2 V ZE & HE P<br>Core Vcc 1.8 - 3.3 V<br>2.5 - 3.3 V HC HC<br>C P P<br>Temp. I P P<br>AEC-Q100 P<br>0.4 mm Spacing<br>25 2.5 x 2.5 mm 18 18<br>36 2.5 x 2.5 mm 28<br>WLCSP<br>49 [2] 3.2 x 3.2 mm 38<br>81 3.8 x 3.8 mm 63<br>ucBGA 64 4 x 4 mm 44<br>0.5 mm Spacing<br>32 5 x 5 mm 21 21<br>QFN 48 7 x 7 mm 40 40<br>84 7 x 7 mm 68<br>100 8 x 8 mm<br>csBGA 132 8 x 8 mm 55 79 104 104 104<br>184 [1] 8 x 8 mm 150 [1]<br>132 8 x 8 mm 86<br>100 14 x 14 mm 55 78 79 79<br>TQFP<br>144 20 x 20 mm 107 107 111 114 114 100<br>0.8 mm Spacing<br>256 14 x 14 mm 206 206 206<br>caBGA<br>332 17 x 17 mm 274 278<br>1.0 mm Spacing<br>256 17 x 17 mm 206 206 206 206 172 201<br>ftBGA<br>324 19 x 19 mm<br>484 23 x 23 mm 278 278 334 358 363<br>fpBGA<br>672 27 x 27 mm 472 540<br>LFXP2-5E LFXP2-8E LFXP2-17E LFXP2-30E LFXP2-40E<br>LCMXO2-256 LCMXO2-640 LCMXO2-640U LCMXO2-1200 LCMXO2-1200U LCMXO2-2000 LCMXO2-2000U LCMXO2-4000 LCMXO2-7000<br>**----- End of picture text -----**<br>


- 1) Contact your Lattice sales representative for the support of the 184-ball csBGA package, available with the HE option only. 

- 2) Package is only available for E=1.2 V devices. 

- 3) Package is only available for C=2.5 V/3.3 V devices. 

- 4) Dual Boot supported with external boot Flash. 

19 

Power and Thermal Management Products 

## **Manage power, thermal & control planes in real time** 

**==> picture [291 x 389] intentionally omitted <==**

**----- Start of picture text -----**<br>
Power & Thermal Management<br>Features L-ASC10 LPTM21 LPTM21L<br>Voltage Monitoring Inputs 10 10 10<br>Current Monitoring Inputs 2 2 2<br>Temperature Monitoring Inputs 2 2 2<br>Number of Trimming Channels 4 4 4<br>MOSFET Drives 4 4 4<br>On-Chip Non-Volatile Fault Log P P P<br>Number of LUTs 1280 1280<br>Distributed RAM (kbits) 10 10<br>EBR SRAM (kbits) 64 64<br>Number of EBR Blocks (9 kbits) 7 7<br>Number of PLLs 1 1<br>Number of Macrocells<br>Communication I/F I [2] C I [2] C/JTAG I [2] C/JTAG<br>Programming Interface I [2] C I [2] C/JTAG I [2] C/JTAG<br>Operating Voltage 3.3 V 2.8 V to 12 V 2.8 V to 12 V<br>In-system Update Support P P P<br>I P P P<br>Temp.<br>AEC-Q100<br>Package Options Digital I/Os<br>48-pin QFN (7 x 7 mm) 9 [5]<br>237-Ball ftBGA (1 mm) (17 x 17 mm) 95 + 10 [4]<br>100-pin TQFP (14 x 14 mm)<br>100-Ball caBGA (10 x 10 mm) 32 + 10 [6]<br>48-pin TQFP (7 x 7 mm)<br>32-pin QFN (5 x 5 mm)<br>24-pin QFN (4 x 4 mm)<br>**----- End of picture text -----**<br>


- 1) POWR1220AT8 provides 6 (5 V Tolerant) digital inputs and 16 (5 V Tolerant) open-drain digital outputs 

- 2) POWR1014 & PWOR1014A provide 4 (5 V Tolerant ) digital inputs and 12 (5 V Tolerant ) open-drain digital outputs 

- 3) POWR607 & PWOR605 provide 2 (5 V Tolerant ) digital inputs and 5 (5 V Tolerant ) open drain I/O 

- 4) LPTM21 provides 95 (3.3 V Tolerant ) logic I/Os and 10 (5 V Tolerant) open-drain I/O 

- 5) 5 V Tolerant open drain I/O 

- 6) LPTM21L provides 32 (3.3 V Tolerant ) logic I/Os and 10 (5 V Tolerant) open-drain I/O 

20 

IP Cores and Reference Designs 

## **IP Cores** 

Lattice IP Cores are pre-tested, reusable functions, that allow designers to focus on their unique system architectures. These IP cores provide industry-standard functions such as PCI Express, DDR, Ethernet, CPRI, and embedded microprocessors. In addition, a number of independent IP providers have teamed with Lattice to offer additional high quality, reusable IP cores. Partners are selected for their industry leadership, high development standards, and commitment to customer support. For a complete listing of IP cores from Lattice and its 3rd party partners, please go to latticesemi.com/IP. Note that a Diamond Subscription License and the IP license are required to use the IP for production. 

**==> picture [542 x 602] intentionally omitted <==**

**----- Start of picture text -----**<br>
iCE40<br>IP Core CertusPro-NX Certus-NX CrossLink-NX Mach-NX CrossLink CrossLinkPlus<br>UltraPlus<br>10 Gb Ethernet MAC P<br>Communications SGMII and Gb Ethernet PCS P P P<br>Triple Speed 10/100/1G Ethernet MAC P P P<br>10 Gb Ethernet PCS P<br>GPIO P P P<br>PCI Express x1 Endpoint P P P<br>Connectivity PCI Express x2 Endpoint P<br>PCI Express x4 Endpoint P<br>PCI Express Root Complex Lite x1 P P P<br>PCI Express Root Complex Lite x4 P<br>CORDIC P P P<br>Digital Signal Divider P P P<br>Processing FFT Compiler P P P<br>FIR Filter Generator P P P<br>DDR3 SDRAM Contoller P P P<br>DDR3 SDRAM PHY P P P<br>I [2] C Master P P P<br>I [2] C Slave P P P<br>I [3] C Master P P P P<br>I [3] C Slave P P P P<br>Processor, LPDDR2 SDRAM Controller Lite P P P<br>Controller & LPDDR4 SDRAM Controller P<br>Peripheral<br>Multi-Port Arbiter for DDR3 Memory Controller P P P<br>Scatter Gather DMA P P P<br>SPI Master P P P<br>SPI Slave P P P<br>UART 16550 P P P P<br>Watchdog Timer P P P<br>Neural Network CNN Plus Accelerator P P<br>Accelerators Compact CNN Accelerator P<br>AHB Lite Interconnect Module P P P<br>AHB Lite to APB Bridge Module P P P<br>APB Interconnect Module P P P<br>I [2] C Master P P<br>Lattice Propel RISC-V MC CPU IP P P P<br>RISC-V SM CPU IP P P P<br>SGMII and Gb Ethernet PCS P P<br>System Memory Module P P P<br>UART IP Core P P P<br>2D Scaler P P P<br>4:1 MIPI CSI-2 Bridge P P<br>Byte to Pixel Converter P P P P P<br>Color Space Converter P P P<br>CMOS to MIPI D-PHY Interface Bridge P P<br>1:2 and 1:1 MIPI CSI-2 to CSI-2<br>P P<br>Camera Interface Bridge<br>MIPI CSI-2 Bridge P P<br>CSI-2/DSI D-PHY Receiver P P P P P<br>CSI-2/DSI D-PHY Transmitter P P P P P<br>Deinterlacer P P P<br>DSI to DSI P P<br>Video & Imaging FPD-LINK Receiver P P P P<br>FPD-LINK Transmitter P P P P<br>Gamma Corrector P P P<br>MIPI D-PHY to CMOS P P<br>MIPI DSI Bandwidth Reducer<br>P P<br>Display Interface Bridge<br>MIPI DSI to OpenLDI/FPD-Link/LVDS P P<br>Pixel to Byte Converter P P P<br>SLVS-EC Receiver P<br>SubLVDS Image Sensor Receiver P P P P P<br>SubLVDS to MIPI CSI-2   P P<br>Image Sensor Interface Bridge<br>Video Frame Buffer P P P<br>**----- End of picture text -----**<br>


1) Contact Lattice for version support information. 

21 

## IP Cores and Reference Designs 

**==> picture [542 x 678] intentionally omitted <==**

**----- Start of picture text -----**<br>
IP Core ECP5/ECP5-5G ECP3 ECP2M ECP2 MachXO2 MachXO3D XP2<br>10 Gb Ethernet MAC P P P P<br>2.5 Gb Ethernet MAC P<br>2.5 Gb Ethernet PCS P<br>CPRI P P P<br>Communications CPRI 5G P P<br>SPI4 P P P<br>SGMII and Gb Ethernet PCS P P P P P<br>Triple Speed 10/100/1G Ethernet MAC P P P P P<br>XAUI P P P<br>JESD204A P<br>JESD204B P P<br>JESD207 P P<br>PCI Express x1 Endpoint P P P<br>PCI Express x2 Endpoint P<br>PCI Express x4 Endpoint P P P<br>PCI Express Root Complex Lite x1 P P P<br>PCI Express Root Complex Lite x4 P P P<br>Connectivity PCI Express x1 Endpoint - Optimized for ECP5UM5G P<br>PCI Express x2 Endpoint - Optimized for ECP5UM5G P<br>PIPE P<br>PCI Master/Target 33 P P P P P<br>PCI Master/Target 66 P P P P P<br>PCI Target 33 P P P P P<br>PCI Target 66 P P P P<br>Serial RapidIO P<br>Tri-Rate Serial Digital Interface (SDI) PHY P<br>Block Convolutional Encoder P P P<br>Block Viterbi Decoder P P P<br>Cascaded Integrator-Comb (CIC) Filter P P P<br>CORDIC P P P P<br>Distributed Arithmetic (DA) FIR Filter P P P<br>Divider P P P<br>Digital Signal  Dynamic Block Reed-Solomon Decoder P P P P<br>Processing FFT Compiler P P P P<br>FIR Filter Generator P P P P<br>Interleaver/De-interleaver P P P<br>Machine Learning for ECP5 P<br>Median Filter P<br>Numerically-Controlled Oscillator (NCO) P P P<br>Peak Cancellation Crest Factor Reduction (CFR) P P<br>DDR SDRAM Controller Pipelined P P P P P<br>DDR2 SDRAM Controller Pipelined P P P P P<br>DDR3 SDRAM Contoller P P<br>Processor, DDR3 SDRAM PHY P P<br>Controller & LPDDR SDRAM Controller P<br>Peripheral LPDDR2 SDRAM Controller Lite P<br>LPDDR3 SDRAM Controller P<br>Scatter Gather DMA P P P P P<br>Neural Network<br>CNN Accelerator P P<br>Accelerators<br>AHB Lite Interconnect Module P P<br>AHB Lite to APB Bridge Module P P<br>APB Interconnect Module P P<br>EFB Module  P<br>I [2] C_Monitor P<br>Lattice Propel QSPI_Master_Streamer P<br>QSPI_Monitor P<br>RISC-V MC CPU IP P P<br>RISC-V SM CPU IP P P<br>System Memory Module P P<br>UART IP Core P P<br>2D Edge Detector P P P P<br>2D FIR Filter P P P P<br>2D Scaler P P P P P<br>Color Space Converter P P P P P P<br>Deinterlacer P P P P<br>Video & Imaging Display Interface Mux P<br>DVB-ASI P<br>Gamma Corrector P P P P P<br>Median Filter P P P<br>Video Frame Buffer P P P P P<br>**----- End of picture text -----**<br>


22 

## IP Cores and Reference Designs 

## **Reference Designs** 

Lattice Reference Designs are reusable as-is codes that allow designers to quickly build their unique applications. These reference designs provide functions such as 7:1 LVDS, Barcode Emulation, Sensor Interfacing & Preprocessing, I[2] C, SPI, and MIPI solutions. For a complete listing of reference designs from Lattice, please go to: www.latticesemi.com/referencedesigns. 

**==> picture [519 x 595] intentionally omitted <==**

**----- Start of picture text -----**<br>
Format<br>Reference   ECP5/  Lattice Mach Mach Lattice iCE40 iCE40  iCE40<br>Name VHDL<br>Design No. ECP5-5G ECP3 XO3 XO2 XP2 LP/HX/LM Ultra UltraPlus [Verilog]<br>7:1 LVDS Video Interface RD1030 P P P P P P<br>8:1 Microphone Aggregation UG-02035 P<br>8b/10b Encoder/Decoder RD1012 P P P P P P P<br>ADC Interface RD1089 P P P<br>Audio Interface Bridging UG-02008 P<br>BSCAN - Multiple Boundary Scan Port  RD1001 P P<br>Addressable Buffer (BSCAN1)<br>BSCAN - Multiple Boundary Scan Port Linker  RD1002 P P P<br>(BSCAN 2)<br>Controller Area Network (CAN) Controller RD1170 P P<br>FPGA Loader AN8077 P P<br>GPIO Expander RD1065 P P P P<br>Graphics Acceleration UG-02026 P<br>HDMI/DVI Interface RD1097 P P P P<br>HiSPi-to-Parallel Sensor Bridge RD02062 P P P P P P P<br>Human Face Identification Using CNN  RD02062 P P<br>Accelerator IP<br>Human Presence Detection Using Compact  RD02059 P<br>CNN Accelerator IP<br>I [2] C Bus Controller for Serial EEPROM RD1006 P P P P P P P<br>I [2] C Master Controller RD1005 P P P P P P P<br>I [2] C Master Controller RD1139 P P<br>I [2] C Master with WISHBONE Controller RD1046 P P P P P P P<br>I [2] C Slave Controller RD1140 P P<br>I [2] C Slave Peripheral Using Embedded Function  RD1124 P P P P<br>Block - WISHBONE Compatible<br>I [2] C Slave to SPI Master Bridge RD1094 P P<br>I [2] C Slave/Peripheral RD1054 P P P P P<br>I [2] C to SPI Bridge RD1172 P P P<br>I [2] S Controller RD1101 P P P P<br>I [2] S Controller RD1171 P P P<br>iCE40 Ultra Barcode Emulation Reference Design UG73 P P P<br>iCE40 Ultra Pedometer UG76 P P P<br>iCE40 Ultra RGB LED Controller UG75 P P P<br>iCE40 Ultra Self-Learning IR Remote UG74 P P P<br>iCE40LM Barcode Emulation RD1191 P P<br>iCE40LM Phillips IR Rx RD1192 P P<br>iCE40LM Sensor Interfacing and Preprocessing RD1189 P P P P<br>iCE40LM Sony IR Tx Reference Design RD1190 P P<br>Key Phrase Detection Using Compact CNN  RD02066 P P<br>Accelerator<br>Keypad Scanner RD1180 P P<br>LatticeMico32 - Embedded Processor -<br>P P P P P P P<br>WISHBONE Compatible<br>LatticeMico8 - Embedded Processor -<br>P P P P P P P<br>WISHBONE Compatible<br>LatticeMico8 Microcontroller User’s Guide RD1026 P P P P P<br>LatticeMico8 to WISHBONE Interface Adapter RD1043 P P P<br>LED/OLED Driver RD1103 P P P<br>LPC Bus Controller RD1049 P P P P P<br>MachXO2 Display Interface RD1093 P P P<br>MachXO2 I [2] C Embedded Programming Access  RD1129 P P<br>Firmware - WISHBONE Compatible<br>MachXO2 Soft I [2] C Slave<br>RD1186 P P<br>with Clock Stretching - WISHBONE Compatible<br>MDIO Peripheral - WISHBONE Compatible RD1074 P P P<br>MIPI CSI-2-to-CMOS Parallel Sensor Bridge RD1146 P P P<br>MIPI DPHY Interface IP RD1182 P P P P P<br>MIPI DSI RX to Parallel Bridge RD1185 P P P<br>**----- End of picture text -----**<br>


**Continued on next page** 

23 

## IP Cores and Reference Designs 

**==> picture [541 x 456] intentionally omitted <==**

**----- Start of picture text -----**<br>
Format<br>Reference   ECP5/  Lattice Mach Mach Lattice iCE40 iCE40  iCE40<br>Name CrossLink VHDL<br>Design No. ECP5-5G ECP3 XO3 XO2 XP2 LP/HX/LM Ultra UltraPlus [Verilog]<br>MxN Channel PWM RD1175 P P<br>NAND Flash Controller RD1055 P P P P<br>Object Counting Using CNN Accelerator IP FPGA-RD-02058 P P<br>Object Counting Using CNN Plus  FPGA-RD-02200 P<br>Accelerator IP<br>Panasonic Area Sensor-to-Parallel Bridge RD1121 P P P<br>Parallel to MIPI CSI-2 TX Bridge RD1183 P P P<br>Parallel to MIPI DSI TX Bridge RD1184 P P P<br>PCI Target 32 bit/33 MHz RD1008 P P P P P<br>PCI/WISHBONE Bridge - WISHBONE  RD1045 P P P P<br>Compatible<br>PWM Fan Controller - WISHBONE<br>RD1060 P P P P P<br>Compatible<br>PWM Generator RD1178 P P<br>RAM-Type Interface for Embedded User  RD1126 P<br>Flash Memory - WISHBONE Compatible<br>RC4 Based PRNG Generator RD1179 P P<br>Read and Write Usercode RD1041 P P P P<br>RGMII to GMII Bridge RD1022 P P P P<br>Sensor Data Buffer UG-02011 P<br>SD Flash Controller - WISHBONE<br>RD1048 P P P<br>Compatible<br>SD Host Controller RD1165 P P P<br>SDR SDRAM Controller RD1174 P P P<br>SDR SDRAM Controller – Advanced RD1010 P P P P P P<br>Simple Sigma-Delta ADC RD1066 P P P P<br>SMPTE SDI Dual HD from/to 3G Level-B<br>RD1132 P P<br>Converter<br>SPI Master Controller RD1141 P P<br>SPI Peripheral RD1075 P P<br>SPI Slave Controller RD1142 P P P<br>SPI Slave Peripheral Using the Embedded  RD1125 P P P P<br>Function Block - WISHBONE Compatible<br>SPI Slave Port Expander RD1168 P P<br>SPI to I [2] C Bridge RD1173 P P<br>SPI to MIPI-DSI Bridge P<br>SPI to UART Expander RD1143 P P<br>SPI Wishbone Compatible RD1044 P P P P P<br>Sub-LVDS Serial to CMOS Parallel Sensor<br>RD1130 P P<br>Bridge<br>Sub-LVDS-to-Parallel Sensor Bridge RD1122 P P P P P P<br>UART - WISHBONE Compatible RD1042 P P P P P<br>UART ( Universal Asynchronous Receiver/Transmitter ) RD1011 P P<br>UART 16550 Transceiver RD1138 P P<br>**----- End of picture text -----**<br>


24 

## IP Cores and Reference Designs 

Hardware Management IP that are integrated in the Platform Designer tool simplify implementation of functions, such as Fault Logging, Fan Controller and PMBus Controller through a simple GUI interface. 

Lattice Reference Designs are reusable as-is codes that allow designers to quickly build their unique applications. These reference designs provide functions such as I[2] C, SPI, BSCAN and LPC Bus Controller interface solutions. For a complete listing of reference designs from Lattice, please go to: www.latticesemi.com/referencedesigns. 

**==> picture [542 x 132] intentionally omitted <==**

**----- Start of picture text -----**<br>
Hardware Management IP Format<br>MachXO2+  PLATFORM<br>IP Core L-ASC10 MANAGER 2 VHDL Verilog LogiBuilder Analog Circuit<br>Fault Logging P P P P<br>Hot Swap Controller P P P P P<br>Fan Controller P P P P<br>PMBus Controller P P P P<br>Trim & Margin P P P<br>Power & Reset Sequencing P P P P P<br>Voltage Scaling & VID P P P P P<br>**----- End of picture text -----**<br>


**==> picture [481 x 248] intentionally omitted <==**

**----- Start of picture text -----**<br>
Hardware Management Reference Designs Format<br>Reference  MachXO2+  PLATFORM<br>Name Design No. L-ASC10 MANAGER 2 VHDL Verilog<br>BSCAN - Multiple Boundary Scan Port Addressable  RD1001 P P P P<br>Buffer (BSCAN1)<br>BSCAN - Multiple Boundary Scan Port Linker  RD1002 P P P P<br>(BSCAN 2)<br>FPGA Loader AN8077 P P P P<br>I [2] C Bus Controller for Serial EEPROM RD1006 P P P P<br>I [2] C Master Controller RD1005 P P P P<br>I [2] C Slave Peripheral Using Embedded Function  RD1124 P P P P<br>Block<br>I2S Controller RD1101 P P P P<br>LPC Bus Controller RD1049 P P P P<br>MachXO2 I [2] C Embedded Programming Access  RD1129 P P P P<br>Firmware<br>MachXO2 Soft I [2] C Slave with Clock Stretching RD1186 P P P P<br>NAND Flash Controller RD1055 P P P P<br>PWM Fan Controller RD1060 P P P P<br>RAM-Type Interface for Embedded User Flash  RD1126 P P P P<br>Memory<br>Read and Write Usercode RD1041 P P P P<br>**----- End of picture text -----**<br>


25 

## Development Kits 

## **CrossLink-NX Evaluation Board** 

Prototyping Board with Abundant I/O, PCIe 5G SERDES, Expansion Headers and 40k Logic Cells. 

## **Features** 

   - On-board Boot Flash: 128 Mbit Serial Peripheral Interface (SPI) Flash, with Quad read feature 

- CrossLink-NX FPGA (LIFCL-40-9BG400C) On-board Boot Flash: 128 Mbit Serial • More I/O access: 118 wide range I/O, Peripheral Interface (SPI) Flash, with 37 high-speed differential pair I/O, one Quad read feature PCIe 5G SERDES channel and most • 8 input DIP switches, 4 push buttons, configuration pins accessible 3 Status LEDs and 14 LEDs for demo 

- • Expandable usability: FPGA Mezzanine purposes 

- Expandable usability: FPGA Mezzanine purposes Card (FMC), Raspberry Pi, Digilent • Multiple reference clock sources Peripheral Module (Pmod™), MIPI CSI-2, D-PHY and general purpose I/O expansion headers **Ordering Part Number** 

- • USB-B connection for device programming and Inter-Integrated Circuit (I[2] C) utility LIFCL-40-EVN 

## **CrossLink LIF-MD6000 Master Link Board** 

Enables designers to streamline the **Features** development process and evaluate key • Contains the Lattice CrossLink connectivity features of the CrossLink LIF-MD6000 in 81-ball csfBGA package FPGA. 

LIF-MD6000 in 81-ball csfBGA package 

- Contains four connectors for interfacing to MIPI D-PHY and high speed programmable I/O 

- Includes 0.1” header board, SMA board and LEDs for interfacing and control 

- Provides easy programming interface via USB with FTDI device 

**Ordering Part Number** LIF-MD6000-ML-EVN 

## **CrossLink LIF-MD6000 I/O Link Boards** 

Allows designers to easily interface to the LIF-MD6000 Master Link Board from a variety of signal sources and sinks using standard SMA connectors. 

## **Features** 

- I/O Link Boards for use with Lattice LIF-MD6000 Master Link Board for SMA or low speed peripheral connections 

- Contains one SMA board and one 0.1” header board 

**Ordering Part Number** LIFMD-IOL-EVN 

## **iCE40 UltraPlus Single-Wire Aggregation Board** 

Enables designers to evaluate their **Features** single-wire interface to a prototype system to demonstrate a proof of concept in-system. Design 

- No FPGA tools knowledge necessary 

- Customizable via available Reference Design 

- Up to 7 channels can be aggregated 

- Each channel can be either I[2] C, I2S or GPIO 

- Board set can be configured as a standalone demo or in-system proof of concept 

**Ordering Part Number** ICE40UP5K-SWA-EVN 

26 

## Development Kits 

## **Himax HM01B0 UPduino Shield** 

- A complete development kit for imple- **Features** menting Artificial Intelligence (AI) us• Lattice UltraPlus FPGA with 5.3K LUTs, • HM01B0 low power image sensor ing the iCE40 UltraPlus with vision and 1 Mb SPRAM, 120 kb DPRAM, 8 Multipliers supports 30 fps at 1.1 mW sound as sensory inputs. • FTDI FT232H USB to SPI Device for FPGA • 2 I2S microphones programming • Debug LEDs 

   - 12 MHz Crystal Oscillator Clock Source 

   - 34 GPIO on 0.1” headers for connecting to the adapter board **Ordering Part Number** 

   - • SPI Flash, RGB LED, 3.3 V and 1.2 V voltage regulators ~~a~~ HM01B0-UPD-EVN 

## **iCE40 UltraPlus Mobile Development Platform** 

Enables designers to evaluate key **Features** connectivity features of the iCE40 • x1 MIPI DSI interface up to 108 Mbps UltraPlus FPGA as well as processing • 4x Microphone bridging (2x I2S mics and features utilizing multiple DSPs, 2x PDM mics) integrated RAM, and FPGA fabric. • Compass sensor (LSM303), pressure 

- Compass sensor (LSM303), pressure sensor (BMP180), gyro sensor (LSM330), and accelerometer (LIS2D12) 

- 640 x 480 Image sensor (OVM7692) 

- BLE module to transfer any captured data from iCE40 UltraPlus wirelessly 

• iCE40 UltraPlus can be programmed via on-board SPI Flash or via USB port **Ordering Part Number** iCE40UP5K-MDP-EVN 

## **iCE40 UltraPlus Breakout Board** 

Enables designers to evaluate key **Features** connectivity features of the iCE40 • iCE40 UltraPlus (iCE40UP5K) device in a UltraPlus FPGA. The breakout board 48-pin QFN package brings out all I/O and allows the FPGA to • High-current LED output be programmed over a USB connector. • iCE40UP5K application based current 

- measurements 

- Standard USB cable for device programming 

- RoHS-compliant packaging and process 

- Pre-loaded RGB LED Demo 

- Software run GUI 

- USB Connector Cable 

**Ordering Part Number** iCE40UP5K-B-EVN 

## **iCE40-HX8K Breakout Board** 

A simple, low-cost board with an iCE40HX8K FPGA, and generous I/O access. 

## **Features** 

- iCE40-HX8K CT256 device 

- 8 user-accessible LEDs 

- SPI Flash for programming configuration 

- 40-pin 0.1” header for user connectivity 

- 0.1” holes for user connectivity 

- FTDI 2232H for USB interface 

- 12 MHz oscillator 

- Jumpers to select programming of the SPI Flash or iCE40-HX8K 

- USB Type-A to Type-B (mini) cable for FPGA programming via PC 

- Demo designs available for download 

**Ordering Part Number** 

ICE40HX8K-B-EVN 

27 

## Development Kits 

## **iCE40 Ultra Breakout Board** 

Featuring an ultra-small FGPA optimized for mobile applications. Typical mobile interfaces like RGB, IR and high current Torch LEDs are included, as well as access to every device I/O. 

## **Features** 

- iCE5LP4K FPGA in 0.35 mm pitch, 36-ball WLCSP 

- RGB LED 

- High-brightness “torch” LED 

- Infrared (IR) LED 

- Status LEDs 

- Access to all device I/O 

- On-board 32 Mbit SPI Flash for reconfiguration 

- Windows- & Mac-based GUI for interface to the RGB LED, includes FPGA source code 

- USB Type-A to Type-B (mini) cable for FPGA power and programming via PC 

## **Ordering Part Number** 

ICE5LP4K-B-EVN 

## **iCE40 UltraLite Breakout Board** 

Featuring the world’s smallest FGPA optimized for mobile applications. Typical mobile interfaces like RGB, IR and high current Torch LEDs are included, as well as access to every device I/O. 

## **Features** 

- iCE40UL1K (iCE401K-CM36A) device in a 36-ball BGA package 

- Layout example of a board using 0.40 mm pitch BGA package 

- High current LED output 

- Infrared transmit capability for remote control functions 

- iCE40UL1K application-based current measurements 

- Standard USB cable for device programming 

- RoHS-compliant packaging and process 

- Preloaded RGB LED Demo 

- Software-run GUI 

- USB connector cable 

## **Ordering Part Number** 

iCE40UL1K-B-EVN 

## **iCE40 Ultra Wearable Development Platform** 

Peripheral and sensor-rich development platform with iCE40 Ultra and MachXO2 in a wearable watch form factor. 

## **Features** 

- Approximately (WxLxH) 1.50“ x 1.57“ x 0.87“ form factor with wrist strap 

- iCE40 Ultra iCE5LP4K and MachXO2 LCMXO2-2000ZE 

- LG 1.54” 240 x 240 single-lane MIPI DSI display 

- Bluetooth low-energy module 

- Sensors: Heart-rate/SpO2, skin temperature, pressure and accelerometer/ gyroscope 

- 2 user LEDs, RGB LEDs, high-current white LED and high-current IR LED 

- Stereo MEMs PDM microphones 

- 32 Mbit Quad SPI-flash 

- 27 MHz Oscillator 

- Power via built-in 3.7 V, 250 mAh lithiumpolymer battery or mini-USB cable 

- FTDI 2232HQ USB device allows programming of FPGA and Flash 

- Reference design available for download: 

- Parallel RGB to MIPI DIS bridging 

- Health monitoring* 

- Pedometer* 

- IR transmitter* 

- Flashlight* 

- Reference Android APK available to interface with mobile phone over Bluetooth 

## **Ordering Part Number** 

ICE5LP4K-WDEV-EVN 

28 

## Development Kits 

## **iCE40LP1K Evaluation Kit** 

Featuring our ultra-small FPGA – 1k LUTs in a 16-ball WLCSP package (0.35 mmball pitch), only 1.4 mm x 1.48 mm, RGB LED control, GUI available for PC or Mac interface. 

## **Features** 

- iCE40LP1K in 16-WLCSP package 

- (0.35 mm-ball pitch) 

- High current tri-color LED (RGB) 

- Infrared transmit LED 

- Barcode emulation LED 

- 27 MHz on-board oscillator 

- SMA connector for external clock input 

- SPI configuration Flash 

- USB Type-A to Type-B (mini) cable for FPGA power and programming via PC 

**Ordering Part Number** ICE40LP1K-SWG16-EVN 

## **Lattice Sentry Demo Boards for MachXO3D and Mach-NX** 

The Lattice Sentry Demo Board for MachXO3D or Mach-NX lets you develop, demonstrate and test a NIST 800-193compliant PFR solution on a single board, using the MachXO3D LCMXO3D9400HC-6BG484C, or Mach-NX LFMNX50FBG484C as a Platform Root of Trust, and two Lattice ECP5 FPGAs which act as PFR-protected ICs in the system. 

## **Features** 

- MachXO3D LCMXO3D-9400HC6BG484C 

or 

- Mach-NX FPGA - LFMNX-50FBG484C 

- Power Supply (12 V) 

- Lattice Sentry Solution Stack PFR demo support 

- Lattice Sentry system-level behavior validation 

- USB connection for device programming 

- Two ECP5 FPGA devices on-board with 256 M SPI/QSPI flash devices to simulate protected external devices 

## **Ordering Part Number** 

LCMXO3D-PFR-EVN LFMNX-SENTRY-EVN 

## **MachXO3L / MachXO3LF Starter Kit** 

The MachXO3L(F) Starter Kit is a basic breakout board to allow simple evaluation and development of MachXO3L(F) based designs. It includes the LCMXO3L(F)6900C-5BG256C device. 

## **Features** 

- MachXO3 FPGA – LCMXO3L(F)-6900C5BG256C 

- USB Type-B (mini) connector (program/ power) 

- Pre-programmed example design (available on latticesemi.com) 

- Eight LEDs 

   - 40-hole prototyping area 

   - Four 2 x 20 expansion header landings for general I/O, JTAG and external power 

   - 1 x 8 expansion header landing for JTAG 

   - 1 x 6 expansion header landing for SPI/ I[2] C 

   - SPI Flash for external boot or dual boot 

   - 3.3 V and 1.2 V supply rails 

- 4-position DIP switch 

**Ordering Part Number** LCMXO3L-6900C-S-EVN LCMXO3LF-6900C-S-EVN 

29 

## Development Kits 

## **MachXO3L Breakout Board** 

Focusing on evaluating high-speed source synchronous interfaces with the Lattice MachXO3L-2100 and MachXO3L-6900 products in both 49-ball WLCSP and 256-ball caBGA packages respectively. 

## **Features** 

- Two MachXO3L FPGAs 

- XO3L-6900E in 256caBGA 

- XO3L-2100E in 49WLCSP 

- Two optional configurations: 

- 50-pin Harwin Archer connector for interface to DSI screen (screen not included) 

- 40 SMA connectors for LVDS I/O evaluation 

- Generous prototyping/breakout access 

- Switches and LEDs for user input and feedback 

- Discrete resistors to support SLVS, subLVDS or DPHY Tx, and DPHY Rx, LP mode 

- USB Type-A to Type-B (mini) cable for FPGA power and programming via PC 

- DC jack for supplemental power input 

**Ordering Part Number** MachXO3L SMA LCMXO3L-SMA-EVN Breakout MachXO3L DSI LCMXO3L-DSI-EVN Breakout 

## **MachXO3-9400 Development Board** 

The MachXO3-9400 Development Board is a full-featured board allowing the evaluation of MachXO3 in hardware management with L-ASC10 and I/O expansion applications utilizing the on-board connectors for Arduino and Raspberry Pi. 

## **Features** 

- MachXO3LF-9400C-484caBGA and L-ASC10 devices with multiple prototyping and breakout areas 

- Arduino and Raspberry Pi development board connectors 

- LEDs and switches for demos and evaluation 

- On-board FTDI device supports JTAG programming and I[2] C Interfacing over USB cable 

- Footprint support for CrossLink I/O link connectors and ASC expansion board connectors 

## **Ordering Part Number** 

LCMXO3LF-9400C-ASC-B-EVN 

## **MachXO2 Boards and Kits** 

## **MachXO2 Breakout Board Features** 

- MachXO2 LCMXO2-7000HE 

- Access to all device I/O via four 2 x 20 expansion header landings for I/O, JTAG and external power 

- 60-hole prototype area 

- USB Type-B (mini) connector for power and programming (cable included) 

- Eight general purpose LEDs 

- 3.3 V and 1.2 V supply rails 

## **MachXO2 Pico Development Kit Features** 

- MachXO2 LCMXO2-1200ZE 

- 4-character, 16-segment LCD display 

- 4 capacitive touch sense buttons 

- 1 Mbit SPI Flash 

- I[2] C temperature sensor 

- Current and voltage sensor circuits 

- Expansion header for JTAG, I[2] C 

- Standard USB cable for device programming and I[2] C communication 

- RS-232/USB & JTAG/USB interface 

- RoHS-compliant packaging and process 

- Watch battery 

## **MachXO2 Control Development Kit Features** 

- MachXO2 LCMXO2-4000HC 

- Power Manager II ispPAC-POWR1014A 

- 128 Mbit LPDDR memory, 4Mbit SPI Flash 

- Current and voltage sensor circuits 

- SD memory card socket 

- Microphone 

- Audio amplifier and Delta-Sigma ADC 

- Up to two DVI sources and one DVI output. 

- Up to two Display inputs (7:1 LVDS) and one Display output (7:1 LVDS) 

- Audio output channel 

- Expansion header for JTAG, SPI, I[2] C and PLD I/O. 

- LEDs & switches 

- Standard USB cable for device programming 

- RS-232/USB & JTAG/USB interface 

- RoHS-compliant packaging and process 

- AC adapter (international plugs) 

## **Ordering Part Number** 

Breakout Board LCMXO2-7000HE-B-EVN Pico Development LCMXO2-1200ZE-P1-EVN Kit Control LCMXO2-4000HC-C-EVN Development Kit 

30 

## Development Kits 

## **Certus-NX Versa Evaluation Board** 

Connectivity Platform with 5G PCIe, SGMII, DDR3 Memory and 40k Logic Cells. 

## **Features** 

- Certus-NX FPGA (LFD2NX-40-8BG256C) 

- Connectivity platform with 5G PCIe and SGMII: PCI Express 2.0 endpoint edge connector (x1 lane), two Gigabit Ethernet ports (one SGMII, one RGMII), DDR3 memory (with 1066 Mbps data rate x 16 data width) and two camera sensors (one using soft D-PHY interface, other using parallel interface) 

- • Efficient processing and expandable usability: Features Certus-NX low-power general purpose FPGA with 40k logic cells in a 256-BGA package. Board functions expandable via three Digilent 

Peripheral Module (Pmod™) headers available on the board 

- USB-B connection for device programming and Inter-Integrated Circuit (I[2] C) utility 

- On-board Boot Flash: 128 Mbit Serial Peripheral Interface (SPI) Flash, with Quad read feature 

- Four input DIP switches, five push buttons, eight status LEDs and one 7-segment LED for customer purposes 

- Multiple reference clock sources 

**Ordering Part Number** LFD2NX-VERSA-EVN 

## **ECP5 Evaluation Board** 

Prototyping Board with Abundant Logic, I/O, 5G SERDES and Expansion Headers. 

## **Features** 

- ECP5-5G FPGA 

future capability to support Improved InterIntegrated Circuit (I3C) 

- (LFE5UM5G-85F-8BG381) 

- More I/O access: 178 I/O (including 20 differential pair I/O), four 5G SERDES, and most configuration pins accessible 

   - On-board Boot Flash: 128 Mbit Serial Peripheral Interface (SPI) Flash, with Quad read feature 

   - 8 input DIP switches, 3 push buttons and 8 LEDs for demo purposes 

- Expandable usability: Arduino, Raspberry Pi, Digilent Peripheral Module (Pmod™), 8 LEDs for demo purposes Microphone Daughter Card (MDC) and • Multiple reference clock sources general purpose I/O expansion headers 

- USB-B connection for device programming and Inter-Integrated Circuit (I[2] C) utility and 

**Ordering Part Number** LFE5UM5G-85F-EVN 

## **ECP5 and ECP5-5G Versa Development Kits** 

For evaluation and development with the ECP5 and ECP5-5G FPGAs, including PCI Express, Gigabit Ethernet, DDR3 and generic SERDES performance. 

## **Features** 

- Half-length PCI Express form factor: allows demonstration of PCI Express x1 interconnection 

- Electrical testing of one full-duplex SERDES channel via SMA connections 

- USB Type-B connection for UART and device programming 

- Two RJ45 interfaces to 10/100/1000 Ethernet to RGMII 

- On-board boot Flash:128 Mbit Serial SPI Flash 

- DDR3-1866 memory components (64 Mbit/x16) 

- Expansion mezzanine interconnection for prototyping 

- 14-segment alphanumeric display 

- Switches, LEDs and displays for demo purposes 

- Diamond[®] programming support 

- On-board reference clock sources 

**Ordering Part Number** LFE5UM-45F-VERSA-EVN LFE5UM5G-45F-VERSA-EVN 

## **LatticeECP3 Versa Development Kit** 

Industry’s lowest cost platform for **Features** designing PCI Express and Gigabit Ethernet based systems. The kit includes free demos and reference designs. 

- The LatticeECP3 Versa Evaluation Board: 

- PCI Express 1.1 x1 Edge connector interface 

- • Two Gigabit Ethernet ports (RJ45) • 4 SMA connectors for SERDES access • USB Type-B (mini) for FPGA programming 

- • LatticeECP3 FPGA: LFE3-35EA-FF484 • 64 Mbit Serial Flash memory • 1GB DDR3 Memory • 14 segment alphanumeric display 

- Switches and LEDs for demos 

- SERDES Eye Quality Demo 

- 4 PCI Express Demos 

- Gigabit Ethernet MAC Demo using Mico32 

- DDR3 Memory Controller Demo 

- Available on Windows and Linux platforms 

- USB Type-A to Type-B (mini) cable for FPGA programming via PC 

- 12 V AC power adapter and international plug adapters 

**Ordering Part Number** 

LFE3-35EA-VERSA-EVN 

31 

## Development Kits 

## **LatticeXP2 Brevia2 Development Kit** 

Easy-to-use, low-cost platform for **Features** evaluating and designing with LatticeXP2 

- LatticeXP2 FPGA: LFXP2-5E-6TN144C 

FPGAs. 

- 2 Mbit SPI Flash memory 

- 1 Mbit SRAM 

- Programmed via included mini-USB Cable 

- 2 x 20 and 2 x 5 expansion headers 

- Push buttons for general purpose I/O and reset • 4-bit DIP Switch for user-defined inputs • 8 Status LEDs for user-defined outputs 

**Ordering Part Number** LFXP2-5E-B2-EVN 

## **Embedded Vision Development Kit** 

## **Features** 

Embedded Vision Development Kit with dual-camera to HDMI bridging, features • All-inclusive demo system with on-board CrossLink, ECP5 and SiI1136 devices. video sources The kit’s modular platform simplifies • CrossLink LIF-MD6000 input board with development and offers flexibility for design two Sony IMX 214 high-speed MIPI D-PHY interface camera sensors expansion. 

- All-inclusive demo system with on-board video sources 

- CrossLink LIF-MD6000 input board with 

- ECP5 processor board with pre-loaded high definition Image Signal Processing IP (HD ISP) 

- SiI1136, non-HDCP, output board connects any HDMI 

- Includes 0.1” header prototyping 

- Easy programming interface via USB with FTDI device 

- Modular Video Interface Platform (VIP) allows mixing and matching of input and output boards 

- Develop custom video interface solutions **Ordering Part Number** for embedded vision and machine learning using Lattice Diamond Software LF-EVDK1-EVN 

## **CrossLink-NX VIP Sensor Input Board** 

CrossLink-NX VIP Sensor Input Board, expands multi-sensor connectivity and processing to the Embedded Vision Development Kit. 

## **Features** 

- Four on-board Sony IMX 256 image sensors 

- Three PMOD connectors for flexible sensor connectivity 

- Contains the Lattice CrossLink-NX 

- Optimized for easy sensor aggregation 

- Supports 4K/2K @60 fps or 1080p @60 fps 

- Complements Embedded Vision Development Kit by providing for fast prototyping 

**Ordering Part Number** LIFCL-VIP-SI-EVN 

32 

## Development Kits 

## **DisplayPort VIP Input Board** 

DisplayPort VIP Input Board, expands **Features** video connectivity to the Embedded • Supports DisplayPort 1.4 up to 2.7 Gbps Vision Development Kit with the inclusion • Integrated Texas Instruments SN75DP130 of DisplayPort RX and embedded DisplayPort 1:1 Redriver DisplayPort RX. • Mini DisplayPort (mDP) connector 

- Two 60-pin rugged high-speed headers 

- Modular Video Interface Platform (VIP) with eDP RX feature support 

- Develop custom video interface solutions **Ordering Part Number** for embedded vision and machine learning using Lattice Diamond Software DP-VIP-I-EVN 

## **DisplayPort VIP Output Board** 

- DisplayPort VIP Input Board, expands **Features** video connectivity to the Embedded • Supports DisplayPort 1.4 up to 2.7 Gbps Vision Development Kit with the inclusion • Integrated Texas Instruments SN75DP130 of DisplayPort TX and embedded DisplayPort 1:1 Redriver DisplayPort TX. • Mini DisplayPort (mDP) connector • Two 60-pin rugged high-speed headers • Modular Video Interface Platform (VIP) with eDP TX feature support 

- ese se • Develop custom video interface solutions **Ordering Part Number** 

- “on . = ty : ™ for embedded vision and machine learning using Lattice Diamond Software DP-VIP-O-EVN 

## **USB3-GbE VIP IO Board** 

USB3-GbE VIP IO Board provides USB **Features** 3.1 and Gigabit Ethernet connectivity by • Two Unified 60-pin high speed connectors converting the output of the ECP5 VIP • On board Cypress FX3 USB 3.1 controller Processor Board into a standard USB 3.1 • Compliant with USB 3.1 specification and Gigabit Ethernet interface. revision 1.0 

- Two Unified 60-pin high speed connectors 

- Supports standard USB 3.0 interface 

- On board industrial grade TI DP83867IR Gigabit Ethernet PHY 

- Supports 10/100/1000 Ethernet 

**Ordering Part Number** USB3-VIP-EVN 

33 

Development Kits 

## **Machine Learning Adapter Card** 

## **Features** 

The Machine Learning Adapter Card adds external memory and microphone input to the ECP5 VIP Processor Board. 

- Includes 8 GB MicroSD card 

- Includes Microphone Input 

- Easy connection to ECP5 VIP Processor Board, included in Embedded Vision Development Kit 

## **Ordering Part Number** 

ML-ADP-EVN 

## **HDMI VIP Input Bridge Board** 

The HDMI VIP Input Bridge Board complements the Embedded Vision Development Kit by providing two selectable HDMI input signals for fast 

prototyping. The board converts two unencrypted HDMI input video signals into a parallel RGB video format. 

## **Features** 

- 2 switchable HDMI input signal 

- Contains the Lattice SiI1127A 

- Transfer of non-HDCP input data 

- Support of 1080p @ 60 Hz HDMIcompliant digital audio and video 

- Can be used as stand-alone board or combined with the Embedded Vision Development Kit 

## **Ordering Part Number** 

HDMI-VIP-IB-EVN 

## **Lattice USB 3.0 Video Bridge Development Kit** 

This is a production-ready, high-definition **Features** video capture and conversion system, based on the LatticeECP3[TM] FPGA family. 

- Production-ready USB 3.0 audio/video bridging reference design 

- 1080p video streaming over USB 3.0 @60 fps 

- HDMI 1.4a audio and video capture 

   - Plug and play operations as a video capture device on multiple standard platforms (Windows, MacOS, Linux) 

   - Complete reference design schematics and documentation available 

- SD-, HD-, 3G-SDI audio and video capture 

- Supports video capture from external MIPI CSI-2 , SubLVDS or Parallel sensors 

- Reference design provides fast USB 3.0 UVC and UAC class data packing 

## **Ordering Part Number** 

LFE3-17EA-USB3-EVN 

34 

## Development Kits 

## **Platform Manager 2 Development Kit** 

The Platform Manager 2 Development Kit is a versatile, ready-to-use hardware platform for evaluating and designing with Platform Manager 2 and L-ASC10 devices. This kit includes a board, programming cable, and assorted example designs and documentation available for download. You can implement and debug your hardware management functions (power, thermal and control plane management) and test them out with this kit. 

**==> picture [10 x 53] intentionally omitted <==**

**----- Start of picture text -----**<br>
LPTM21<br>**----- End of picture text -----**<br>


## **Features** 

- LPTM21 (Platform Manager 2 device) & L-ASC10 (Hardware Management expander) 

- Temperature monitoring/measurement, with temperature control using fan (included) 

- Fault logging under various types of hardware management faults 

- 4 potentiometers & 2 POLs for sequencing, VID/Voltage scaling, margining, fault creation 

- Background programming support with Dual boot from golden image stored on the SPI Flash 

- Hardware management expansion through external L-ASC10 boards 

- 3-digit LCD for additional code debug support 

## **L-ASC10 Breakout Board** 

The L-ASC10 (ASC) Breakout Board is a versatile hardware platform for evaluation and desig with L-ASC10 devices. The board is designed to work alongside the Platform Manager 2 Development Kit. 

## **Features** 

- L-ASC10 (Hardware Management Expander) 

- 2 potentiometers for sequencing & fault creation 

- 9 LEDs for sequencing 

- Temperature monitor & measurement with 2 on-board temperature sensors 

- Connector for use with Platform Manager 2 Development Kit 

## **Ordering Part Number** 

Platform Manager 2 LPTM-BPM-EVN Development Kit L-ASC10 Breakout LPTM-ASC-B-EVN Board 

35 

Programming Hardware 

## **Programming Cables** 

Lattice Programming Cables are used to communicate between a PC and a Lattice device on a target board or system. The most common application is to program a Lattice device. Programming Cables can also be used to help debug your hardware designs via Lattice software tools. 

- **USB Programming Cable (HW-USBN-2B – pictured).** The latest-generation Programming Cable adds I[2] C programming and various other features. 

- **Parallel Cable (HW-DLN-3C).** This connects to a PC parallel port and is best for basic JTAG programming. 

**Ordering Part Number** ispDOWNLOAD Parallel Cable HW-DLN-3C USB Programming Cable HW-USBN-2B 

## **Smart Sockets** 

Lattice Smart Sockets are an all-in-one solution for prototype programming of the latest Lattice products. 

These complete solutions include all the functionality of a Desktop Programmer + Socket Adapter combination in a single board. All that’s needed is a simple connection to your PC via USB (cable included). 

More information about Lattice Smart Sockets is on the Lattice website at **www.latticesmi.com/sockets** . 

## **Desktop Programmers** 

Lattice offers two desktop programmers for prototype programming of Lattice products. 

A Socket Adapter is required for the specific device/package you wish to program. These are available separately, and are designed specifically for one Desktop Programmer or the other. 

The Lattice Model 300 Desktop Programmer (pictured) supports most Lattice FPGA and CPLD products. 

The iCEprog Desktop Programmer supports all Lattice iCE products. 

**==> picture [85 x 9] intentionally omitted <==**

**----- Start of picture text -----**<br>
Ordering Part Number<br>**----- End of picture text -----**<br>


Model 300 Desktop Programmer PDS4102-PM300N iCEprog Desktop Programmer ICEPROGM1050-01 

## **Socket Adapters** 

Lattice Socket Adapters are used in conjunction with a Lattice Desktop programmer to facilitate low-volume, manual programming of Lattice devices. 

Socket adapters are generally designed to support a device family/package combination. 

iCE Socket Adapters work only with the iCEprog Desktop Programmer. All other Lattice Socket Adapters work only with the Model300 Desktop Programmer. 

More information and a complete list of Lattice Socket Adapter products is available at **www.latticesmi.com/sockets** . 

36 

## FPGA and CPLD Design Software 

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Best in Class Design  Lattice Radiant  Lattice Diamond [TM] Lattice Diamond [TM] ispLEVERClassic   [TM] iCEcube2 [TM] PAC-Designer Lattice<br>Tools (Free) (Subscription) (Free) (Subscription) (Free) Propel<br>Certus-NX P<br>CrossLink P P<br>CrossLinkPlus P P<br>CrossLink-NX P<br>ECP5UM5G P<br>ECP5U P P<br>ECP5UM P<br>LatticeECP3 P<br>LatticeECP2M/S P<br>LatticeECP2S P<br>Device  MachXO/XO2/XO3 P P<br>Families<br>MachXO3D P P P<br>Mach-NX P P P<br>LatticeXP2 P P<br>LatticeECP2 P P<br>iCE40 P<br>iCE40 UltraPlus P P<br>ispMACH 4000B/C/V/ZE<br>Platform Manager 2 P P<br>L-ASC10 P P<br>Power Manager II P<br>Design Exploration P P P P<br>VHDL & Verilog Support P P P P P<br>Schematic Support P P P P<br>ABEL P P<br>Synopsys [®]  Synplify Pro™ for  P P P P<br>Lattice-Synthesis<br>MachXO/XO2/<br>XO3/XO3D   MachXO/XO2/<br>Lattice Synthesis Engine (LSE) FPGA only Lattice ECP2/ECP3/ECP5/ MachXO3/XO3D  LatticeECP2/ ispMACH 4000 only P<br>ECP5-5G/  ECP5U/XP2<br>ECP2M/XP2<br>Software<br>Features Embedded Security Block FPGA only<br>Security / Encrypted Bit-Stream CrossLink-NX P<br>IP and Module Configuration P P P Module Only Module Only<br>Power Estimation & Calculation P P P P<br>Propel Builder P<br>Propel SDK P<br>Timing Analysis P P P P P<br>Floorplanning P P P P P<br>On-Chip Debug P P P ispXPGA Only<br>TCL Scripting Dictionaries P P P<br>Aldec [®]  Active-HDL Lattice<br>Edition Simulation Windows Only Windows Only Windows Only Windows Only Windows Only<br>Operating  Windows 7/10 (64 bit) P P P P P P<br>Systems Linux (RHEL v6 and v7)(64-bit) P P P P<br>One Year –  One Year –   One Year –  One Year –  One Year –  One Year –<br>License Terms<br>Licensing & Renewable Renewable Renewable Renewable Renewable Renewable<br>Updates Node-Locked License P P P P P P<br>Floating License P P P P<br>**----- End of picture text -----**<br>


## **Neural Network Compiler for sensAI Stack** 

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Microsoft<br>Target Ubuntu Linux Windows CMD Line License<br>CNN Accelerator IP (ECP5) 16.04 7, 10 P P<br>CNN Plus Accelerator IP (CrossLink-NX) 16.04 7, 10 P P<br>Compact CNN Accelerator IP (iCE40) 16.04 7, 10 P P<br>**----- End of picture text -----**<br>


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## FPGA and CPLD Design Software 

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Lattice Propel – Build  Lattice Radiant  Lattice Diamond [TM] Lattice Diamond [TM] ispLEVER [TM] iCEcube2 [TM]<br>FPGA-based Processor  Classic   PAC-Designer<br>(Free) (Subscription) (Free) (Free)<br>System in Minutes (Subscription)<br>Device<br>CrossLink P P<br>Families<br>Design Exploration P P P P<br>VHDL & Verilog Support P P P P P<br>Schematic Support P P P P<br>ABEL P P<br>Synopsys [®]  Synplify Pro™ for  P P P P<br>Lattice-Synthesis<br>MachXO/XO2/XO3/XO3D  MachXO/XO2/<br>Lattice Synthesis Engine (LSE) FPGA only Lattice ECP2/ECP3/ECP5/ECP5-5G/  MachXO3/XO3D  LatticeECP2/ ispMACH 4000 only P<br>ECP2M/XP2 ECP5U/XP2<br>Software<br>Features Embedded Security Block FPGA only<br>Security / Encrypted Bit-Stream CrossLink-NX P<br>IP and Module Configuration P P P Module Only Module Only<br>Power Estimation & Calculation P P P P<br>Timing Analysis P P P P P<br>Floorplanning P P P P P<br>On-Chip Debug P P P ispXPGA Only<br>TCL Scripting Dictionaries P P P<br>Aldec [®]  Active-HDL Lattice<br>Edition Simulation Windows Only Windows Only Windows Only Windows Only Windows Only<br>Operating  Windows 7/10 (64-bit) P P P Windows 7/XP P<br>Systems inux (RHEL v6 and v7)(64-bit) P P P P<br>One Year –  One Year –   One Year –  One Year –  One Year –<br>License Terms<br>Licensing & Renewable Renewable Renewable Renewable Renewable<br>Updates Node-Locked License P P P P P<br>Floating License P P<br>**----- End of picture text -----**<br>


38 

## **Software Licensing** 

Web: latticesemi.com/licensing 

**Technical Support** latticesemi.com/support 

Copyright © 2021 Lattice Semiconductor Corporation, Lattice Semiconductor (& design), Certus-NX, CertusPro-NX, CrossLink, CrossLinkPlus, CrossLinkNX, iCE40, iCE40 Ultra, iCE40 UltraLite, iCE 40 UltraPlus, Mach-NX, MachXO, MachXO2, MachXO3, MachXO3D, MachXO3L, MachXO3H, ispMACH, LatticeXP2, ECP5, ECP5-G, LatticeECP3, LatticeECP2/M, Lattice Diamond, Lattice mVision, Lattice Nexus, Lattice Radiant, Lattice sensAI, Lattice Sentry, Lattice SupplyGuard, Lattice Automate, ispLever, iCEcube, iCEcube2, and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries. MIPI is a licensed trademark of MIPI, Inc. in the U.S. and other jurisdictions. 

**August 2021 • Order #: I0211 Rev. 31**