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LFCPNX-50-8BFG484C — FPGA, SRAM, 263 I/O's, 50 Logic Cells, 28nm, Surface Mount, BGA-484, CertusPro-NX Series
Illustrative purposes only
Manufacturer logotype: LATTICE SEMICONDUCTOR
This product is RoHS compliant

LFCPNX-50-8BFG484C

FPGA, SRAM, 263 I/O's, 50 Logic Cells, 28nm, Surface Mount, BGA-484, CertusPro-NX Series

  • Manufacturer: LATTICE SEMICONDUCTOR
  • Product type: FPGAs
  • SVHC: No SVHC (25-Jun-2025)
  • FPGA Type: SRAM based FPGA
  • IC Mounting: Surface Mount
  • No. of Pins: 484Pins
  • Speed Grade: 8
  • Product Range: CertusPro-NX Series
  • Qualification: -
  • No.of User I/Os: 263I/O's
  • IC Case / Package: BGA
  • No. of Logic Cells: 50Logic Cells
  • Process Technology: 28nm
  • Operating Temperature Max: 85°C
  • Operating Temperature Min: 0°C
Delivery and price
Units per pack 25
Price 73.18 €
Current stock 100+
Lead time 30 days

Updated at April 17, 2026

LATTICE SEMICONDUCTOR logo

Lattice Semiconductor is a premier developer of low-power, programmable design solutions, specializing in Field-Programmable Gate Arrays (FPGAs) and Programmable Logic Devices (PLDs). Recognized for driving innovation in cost-effective and power-efficient architectures, the company provides essential semiconductor components for consumer, mobile, and industrial design applications. Our selection of Lattice Semiconductor products is focused on their highly regarded FPGA integrated circuits. Devices from industry-leading families like the iCE40, MachXO, and LatticeECP series offer designers an exceptional combination of high system integration and industry-low power consumption. These FPGAs are engineered to handle complex tasks such as sensor management, custom connectivity, and advanced video processing while minimizing overall board footprint. To ensure seamless integration from concept to production, Lattice backs its hardware with a comprehensive support ecosystem. Engineers can accelerate their development cycles utilizing intuitive tools like the Lattice Diamond design software, paired with flexible IP cores and reference designs that reduce design risk and increase system reliability.

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