KXCJB-1041

**PART NUMBER: ±  2g / 4g / 8g Tri-axis Digital KXCJB-1041 Accelerometer Specifications Rev. 1.0 Feb-2015** 

## **Product Description** 

The KXCJB is a thin package tri-axis +/-2g, +/-4g or +/-8g silicon micromachined accelerometer.  The sense element is fabricated using Kionix’s proprietary plasma micromachining process technology.  Acceleration sensing is based on the principle of a differential capacitance arising from acceleration-induced motion of the sense element, which further utilizes common mode cancellation to decrease errors from process variation, temperature, and environmental stress.  The sense element is hermetically sealed at the wafer level by bonding a second silicon lid wafer to the device using a glass frit.  A separate ASIC device packaged with the sense element provides signal conditioning and digital communications. 

The accelerometer is delivered in a very thin 3 x 3 x 0.45 mm 

LGA plastic package operating from a 1.8 – 3.6V DC supply.  Voltage regulators are used to maintain constant internal operating voltages over the range of input supply voltages.  This results in stable operating characteristics over the range of input supply voltages and virtually undetectable ratiometric error.  The I[2] C digital protocol is used to communicate with the chip to configure the part and monitor outputs. 

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Page 1 of 31 

**PART NUMBER: ±  2g / 4g / 8g Tri-axis Digital KXCJB-1041 Accelerometer Specifications Rev. 1.0 Feb-2015** 

## **Functional Diagram** 

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X<br>Sensor<br>Y<br>Charge<br>Sensor A/D<br>Amp<br>Z<br>Sensor<br>Vdd 5 Digit al<br>I 2C Filte r<br>IO Vdd 1 : al<br>Digital Engine<br>GND 4<br>6 8 9 10 7<br>RSVD ADDR SCL SDA INT<br>**----- End of picture text -----**<br>


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Kionix’<br>Tene}<br>**----- End of picture text -----**<br>


## **±  2g / 4g / 8g Tri-axis Digital Accelerometer Specifications** 

**PART NUMBER:** 

**KXCJB-1041 Rev. 1.0 Feb-2015** 

## **Product Specifications** 

## **Table 1.  Mechanical** 

(specifications are for operation at 2.6V and T = 25C unless stated otherwise) ~~RR~~ **Parameters Units Min** ~~ns~~ **Typ** ~~I~~ **ical Max** Operating Temperature Range ºC -40 - 85 ~~a~~ Zero-g Offset mg - ±25 ±125 ~~nn~~ Zero-g Offset Variation from RT over Temp. mg/ºC 0.2 ~~a~~ Sensitivity (14-bit)[1,2] GSEL1=1, GSEL0 ~~nn~~ =1 (± 8g) counts/g ~~nD II~~ 922 1024 ~~I~~ 1126 GSEL1=0, GSEL0=0 (± 2g) 922 1024 1126 Sensitivity (12-bit)[1] GSEL1=0, GSEL0=1 (± 4g) counts/g 461 512 563 ~~a~~ GSEL1=1, GSEL0=0 (± 8g) 230 256 282 GSEL1=0, GSEL0=0 (± 2g) 57 64 71 Sensitivity (8-bit)[1] GSEL1=0, GSEL0=1 (± 4g) counts/g 28 32 36 ~~a~~ GSEL1=1, GSEL0=0 (± 8g) 14 16 18 ~~I~~ Sensitivity Variation from RT over Temp. %/ ~~nD~~ ºC ~~I~~ 0.03 1 (x) Self Test Output change on Activation g 0.8 (y) ~~eeee~~ 0.6 (z) ~~ee~~ 3500 (xy) Mechanical Resonance (-3dB)[3] Hz 1800 (z) ~~po~~ Non-Linearity % of FS 0.6 ~~nn~~ Cross Axis Sensitivity ~~ID~~ % ~~UT I~~ 2 

Notes: 

1. Resolution and acceleration ranges are user selectable via I[2] C. 

2. 14-bit Resolution is only available for registers 0x06h – 0x0Bh in the 8g High Resolution mode 

3. Resonance as defined by the dampened mechanical sensor. 

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Page 3 of 31 

**PART NUMBER:** 

|**±  2g / 4g / 8g Tri-axis Digital**<br>**Accelerometer Specifications**<br>**PART NUMBER:**<br>**KXCJB-1041**<br>**Rev. 1.0**<br>**Feb-2015**<br>**Table 2.  Electrical**<br>(specifications areforoperationat2.6VandT = 25C unless stated otherwise)<br>**Parameters**<br>**Units**<br>**Min**<br>**Typical **<br>**Max **<br>Supply Voltage (Vdd)<br>Operating<br>V<br>1.71<br>2.6<br>3.6<br>I/O Pads Supply Voltage (VIO)<br>V<br>1.7<br>Vdd<br>[¢KTonix~~a~~<br>~~esOO~~<br>~~OC~~|**±  2g / 4g / 8g Tri-axis Digital**<br>**Accelerometer Specifications**<br>**PART NUMBER:**<br>**KXCJB-1041**<br>**Rev. 1.0**<br>**Feb-2015**<br>**Table 2.  Electrical**<br>(specifications areforoperationat2.6VandT = 25C unless stated otherwise)<br>**Parameters**<br>**Units**<br>**Min**<br>**Typical **<br>**Max **<br>Supply Voltage (Vdd)<br>Operating<br>V<br>1.71<br>2.6<br>3.6<br>I/O Pads Supply Voltage (VIO)<br>V<br>1.7<br>Vdd<br>[¢KTonix~~a~~<br>~~esOO~~<br>~~OC~~|
|---|---|
|High Resolution Mode (RES=1)<br>135<br>~~es~~||
|Current Consumption<br>A<br>Low Power Mode1 (RES=0)<br>10<br>~~a~~||
|Disabled<br>0.9<br>~~ns~~||
|Output Low Voltage (Vio< 2V)2<br>V<br>-<br>-<br>0.2*Vio<br>~~OC~~||
|Output Low Voltage (Vio> 2V)2<br>V<br>-<br>-<br>0.4<br>Output High Voltage<br>V<br>0.8*Vio<br>-<br>-<br>InputLow Voltage<br>V<br>-<br>-<br>0.2 * Vio<br>~~OC~~<br>~~TTTOTOTOOOOOOOC“‘“R_OUOSO OO~~<br>~~OO~~||
|Input High Voltage<br>V<br>0.8*Vio<br>-<br>-<br>Input Pull-down Current<br>A<br>0<br>Start UpTime3<br>ms<br>2.0<br>650<br>~~OO~~<br>~~rs~~<br>~~rs es~~<br>~~OO~~||
|Power Up Time4<br>ms<br>10<br>I2C Communication Rate<br>MHz<br>3.4<br>Output Data Rate(ODR)5<br>Hz<br>0.781<br>50<br>1600<br>Bandwidth (-3dB)6<br>RES=0<br>Hz<br>800<br>RES=1<br>Hz<br>ODR/2<br>~~OO~~<br>~~TTTOTOTOOOOOOOC“‘“R_OUOSO OO~~<br>~~es~~<br>~~rsPs~~<br>~~a~~<br>~~a~~<br>~~ees ee ees eee eee~~||
|Notes:||
|1. Current varies with Output Data Rate (ODR) see table below.||
|2. For I2C communication, this assumes a minimum 1.5kpull-up resistor on SCL and||
|SDA pins.||
|3. Start up time is from PC1 set to valid outputs.  Time varies with Output Data Rate||
|(ODR); see chart below.||



4. Power up time is from Vdd and IO_Vdd valid to device boot completion. 

5. User selectable through I[2] C. 

6. User selectable and dependent on ODR and RES. 

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Page 4 of 31 

## **±  2g / 4g / 8g Tri-axis Digital Accelerometer Specifications** 

**PART NUMBER: KXCJB-1041 Rev. 1.0 Feb-2015** 

## **Table 3 Current Profile** 

## **KXCJB Representative Current (µA)** 

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1000<br>oe 120 ¢ 120 120<br>100<br>° 57<br>o 29<br>o 16<br>10 9<br>RES = 0<br>° 5<br>o 3.3<br>2 2.2 High Resolution Mode<br>o¢ 1.7 °<br>1<br>0.1 1 10 100 1000 10000<br>ODR (Hz)<br>Current (μA)<br>**----- End of picture text -----**<br>


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PART NUMBER:<br>±  2g / 4g / 8g Tri-axis Digital  KXCJB-1041<br>Accelerometer Specifications  Rev. 1.0<br>Feb-2015<br>**----- End of picture text -----**<br>


**Table 4 Start Up Time Profile** 

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Page 6 of 31 

**PART NUMBER:** 

**±  2g / 4g / 8g Tri-axis Digital KXCJB-1041 Accelerometer Specifications Rev. 1.0** (‘Kionix’ **Feb-2015** 

## **Table 5.  Environmental** 

|**Parameters**|**Parameters**|**Units**|**Min**|**Typical **|**Max **|
|---|---|---|---|---|---|
|Supply Voltage (Vdd)|Absolute Limits|V|-0.5|-|3.63|
|Operating Temperature Range||ºC|-40|-|85|
|Storage Temperature Range||ºC|-55|-|150|
|Mech. Shock (powered and unpowered)||g|-|-|5000 for 0.5ms<br>10000 for 0.2ms|
|ESD|HBM|V|-|-|2000|



Caution:  ESD Sensitive and Mechanical Shock Sensitive Component, improper handling can cause permanent damage to the device. 

This product conforms to Directive 2002/95/EC of the European Parliament and of the Council of the European Union (RoHS). Specifically, this product does not contain lead, mercury, cadmium, hexavalent chromium, polybrominated biphenyls (PBB), or RoHS polybrominated diphenyl ethers (PBDE) above the maximum concentration values (MCV) by weight in any of its homogenous materials. Homogenous materials are "of uniform composition throughout." 

This product is halogen-free per IEC 61249-2-21.  Specifically, the materials used in this HF product contain a maximum total halogen content of 1500 ppm with less than 900-ppm bromine and less than 900-ppm chlorine. 

## **Soldering** 

Soldering recommendations are available upon request or from www.kionix.com. 

## **Floor Life** 

Factory floor life exposure of the KXCJB reels removed from the moisture barrier bag should not exceed a maximum of 168 hours at 30C/60%RH. If this floor life is exceeded, the parts should be dried per the IPC/JEDEC J-STD-033A standard. 

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PART NUMBER:<br>±  2g / 4g / 8g Tri-axis Digital  KXCJB-1041<br>Accelerometer Specifications  Rev. 1.0<br>(‘Kionix’ Feb-2015<br> Application Schematic<br>SDA<br>10<br>IO Vdd 1 9 SCL<br>2 8 ADDR<br>KXCJB<br>C2 3 7 INT<br>4 6<br>5<br>C<br>1<br>Vdd<br>**----- End of picture text -----**<br>


## **Table 6.  KXCJB Pin Descriptions** 

|**Pin**|**Name**|**Description**|
|---|---|---|
|1|IO Vdd|The power supply input for the digital communication bus.  Optionally decouple this pin to ground with<br>a 0.1uF ceramic capacitor.|
|2|DNC|Reserved – Do Not Connect|
|3|DNC|Reserved – Do Not Connect|
|4|GND|Ground|
|5|Vdd|Thepower supplyinput.  Decouple thispin toground with a 0.1uF ceramic capacitor.|
|6|RSVD|Reserved – Connect to Vdd,IO Vdd,or GND|
|7|INT|Physical Interrupt|
|8|ADDR|I2C programmable address bit–Connect toIO_Vdd orGND|
|9|SCL|I2C SerialClock|
|10|SDA|I2C Serial Data|



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**PART NUMBER: ±  2g / 4g / 8g Tri-axis Digital KXCJB-1041 Accelerometer Specifications Rev. 1.0 Feb-2015** ~~Kf~~ **Test Specifications** ! _**Special Characteristics** :_ ~~l~~ 

These characteristics have been identified as being critical to the customer.  Every part is tested to verify its conformance to specification prior to shipment. 

## **Table 7.  Test Specifications** 

Parameter Specification Test Conditions Zero-g Offset @ RT 0 +/- 128 counts 25C, Vdd = 2.6 V ~~—————<———~~ Sensitivity @ RT 1024 +/- 102 counts/g 25C, Vdd = 2.6 V 

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## **±  2g / 4g / 8g Tri-axis Digital Accelerometer Specifications** 

**PART NUMBER: KXCJB-1041 Rev. 1.0 Feb-2015** 

## **Package Dimensions and Orientation** 

3 x 3 x 0.45 mm LGA 

All dimensions and tolerances conform to ASME Y14.5M-1994 

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PART NUMBER:<br>±  2g / 4g / 8g Tri-axis Digital  KXCJB-1041<br>Accelerometer Specifications  Rev. 1.0<br>Feb-2015<br>**----- End of picture text -----**<br>


## **Orientation** 

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Pin 1 +Y<br>+X<br>+Z<br>**----- End of picture text -----**<br>


When device is accelerated in +X, +Y or +Z direction, the corresponding output will increase. 

**Static X/Y/Z Output Response versus Orientation to Earth’s surface (1g):** GSEL1=0, GSEL0=0 (± 2g) 

|**Position **|**1**|**1**|**2**|**2**|**3**|**3**|**4**|**4**|**5**|**5**|**6**|**6**|
|---|---|---|---|---|---|---|---|---|---|---|---|---|
|Diagram<br>~~po~~|||||||||Top<br>Bottom||Bottom<br>Top||
|Resolution(bits)<br>~~po~~|12|8|12|8|12|8|12|8|12|8|12|8|
|X(counts)<br>~~po~~<br>~~po~~<br>~~po~~|0<br>~~po~~|0<br>~~po~~|1024<br>~~po~~|64<br>~~po~~|0<br>~~po~~|0<br>~~po~~|-1024<br>~~po~~|-64<br>~~po~~|0<br>~~po~~|0<br>~~po~~|0<br>~~po~~|0<br>~~po~~|
|Y(counts)<br>~~po~~<br>~~po~~<br>~~po~~|1024<br>~~po~~|64<br>~~po~~|0<br>~~po~~|0<br>~~po~~|-1024<br>~~po~~|-64<br>~~po~~|0<br>~~po~~|0<br>~~po~~|0<br>~~po~~|0<br>~~po~~|0<br>~~po~~|0<br>~~po~~|
|Z(counts)<br>~~po~~<br>~~po~~|0|0|0|0|0|0|0|0|1024|64|-1024|-64|
|~~po~~<br>~~GG~~|~~GG~~||~~GG~~<br>~~Ge~~||~~OC~~<br>~~OC~~||~~OC~~<br>~~OC~~||||||
|X-Polarity<br>~~GG~~<br>~~eG~~|**0**<br>~~GG~~<br>~~eG~~||**+**<br>~~GG ~~<br>~~eG~~<br>~~Ge~~<br>~~Ge~~||**0**<br> ~~OC~~<br>~~eG~~<br>~~OC~~<br>~~OC~~||**-**<br>~~OC~~<br>~~eG~~<br>~~OC~~<br>~~OC~~||**0**<br>~~eG~~||**0**<br>~~eG~~||
|Y-Polarity<br>~~eG~~<br>~~eG~~|**+**<br>~~eG~~<br>~~eG~~||**0**<br>~~eG~~<br>~~Ge~~<br>~~eG~~<br>~~Ge~~||**-**<br>~~eG~~<br>~~OC~~<br>~~eG~~<br>~~OC~~||**0**<br>~~eG~~<br>~~OC~~<br>~~eG~~<br>~~OC~~||**0**<br>~~eG~~<br>~~eG~~||**0**<br>~~eG~~<br>~~eG~~||
|Z-Polarity<br>~~eG~~<br>~~GG~~|**0**<br>~~eG~~<br>~~GG~~||**0**<br>~~eG~~<br>~~Ge~~<br>~~GG~~||**0**<br>~~eG~~<br>~~OC~~<br>~~SG~~||**0**<br>~~eG~~<br>~~OC~~<br>~~SG~~||**+**<br>~~eG~~||**-**<br>~~eG~~||



Earth’s Surface 

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**PART NUMBER: ±  2g / 4g / 8g Tri-axis Digital KXCJB-1041 Accelerometer Specifications Rev. 1.0 Feb-2015** 

**Static X/Y/Z Output Response versus Orientation to Earth’s surface (1g):** GSEL1=0, GSEL0=1 (± 4g) 

|**Position **|**1**|**1**|**2**|**2**|**3**|**3**|**4**|**4**|**5**|**5**|**6**|**6**|
|---|---|---|---|---|---|---|---|---|---|---|---|---|
|Diagram<br>~~po~~|||||||||Top<br>Bottom||Bottom<br>Top||
|Resolution(bits)<br>~~po~~<br>~~po~~|12|8|12|8|12|8|12|8|12|8|12|8|
|X(counts)<br>~~po~~<br>~~po~~<br>~~po~~|0|0|512|32|0|0|-512|-32|0|0|0|0|
|Y(counts)<br>~~po~~<br>~~po~~<br>~~po~~|512|32|0|0|-512|-32|0|0|0|0|0|0|
|Z(counts)<br>~~po~~<br>~~po~~|0|0|0|0|0|0|0|0|512|32|-512|-32|
|~~po~~<br>~~GG~~|~~GG~~||~~GG ~~||~~GC~~||~~GC~~||||||
|X-Polarity<br>~~GG~~|**0**<br>~~GG~~||**+**<br>~~GG ~~||**0**<br> ~~GC~~||**-**<br>~~GC~~||**0**||**0**||
|Y-Polarity<br>~~GG~~|**+**<br>~~GG~~||**0**<br>~~GG ~~||**-**<br> ~~GC~~||**0**<br>~~GC~~||**0**||**0**||
|Z-Polarity<br>~~GG~~|**0**<br>~~GG~~||**0**<br>~~GG ~~||**0**<br> ~~GG~~||**0**<br>~~GG~~||**+**<br>~~GG~~||**-**||



Earth’s Surface 

**Static X/Y/Z Output Response versus Orientation to Earth’s surface (1g):** GSEL1=1, GSEL0=0 (± 8g) 

|~~es~~|||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
|**Position **<br>~~es~~|**1**||**2**||**3**||**4**||**5**||**6**||
|Diagram<br>~~es~~|||||||||Top<br>Bottom||Bottom<br>Top||
|Resolution(bits)<br>~~po~~|12|8|12|8|12|8|12|8|12|8|12|8|
|X(counts)<br>~~po~~<br>~~po~~|0|0|256|16|0|0|-256|-16|0|0|0|0|
|Y(counts)<br>~~po~~<br>~~po~~<br>~~po~~|256|16|0|0|-256|-16|0|0|0|0|0|0|
|Z(counts)<br>~~po~~<br>~~po~~|0|0|0|0|0|0|0|0|256|16|-256|-16|
|~~po~~<br>~~GG~~|~~GG~~||~~GG ~~||~~OC~~||~~OC~~||||||
|X-Polarity<br>~~GG~~|**0**<br>~~GG~~||**+**<br>~~GG ~~||**0**<br> ~~GC~~||**-**<br>~~GC~~||**0**||**0**||
|Y-Polarity<br>~~GG~~|**+**<br>~~GG~~||**0**<br>~~GG ~~||**-**<br> ~~GC~~||**0**<br>~~GC~~||**0**||**0**||
|Z-Polarity<br>~~Sn~~|**0**<br>~~Sn~~||**0**||**0**||**0**||**+**||**-**||



Earth’s Surface 

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PART NUMBER:<br>±  2g / 4g / 8g Tri-axis Digital  KXCJB-1041<br>Accelerometer Specifications  Rev. 1.0<br>Feb-2015<br>**----- End of picture text -----**<br>


## **KXCJB Digital Interface** 

The Kionix KXCJB digital accelerometer has the ability to communicate on the I[2] C digital serial interface bus. This allows for easy system integration by eliminating analog-to-digital converter requirements and by providing direct communication with system micro-controllers. 

The serial interface terms and descriptions as indicated in Table 8 below will be observed throughout this document. 

|**Term**<br>**Description **<br>Transmitter<br>The device that transmits data to the bus.<br>Receiver<br>The device that receives data from the bus.<br>Master<br>The device that initiates a transfer, generates clock signals, and terminates a transfer.<br>Slave<br>The device addressed by the Master.<br>~~—————~~||
|---|---|
|**Table 8.**Serial Interface Terminologies||
|**I2C Serial Interface**||
|As previously mentioned, the KXCJB has the ability to communicate on an I2C bus.  I2C is primarily used for||
|synchronous serial communication between a Master device and one or more Slave devices.  The Master,||
|typically a micro controller, provides the serial clock signal and addresses Slave devices on the bus.  The||
|KXCJB always operates as a Slave device during standard Master-Slave I2C operation.||



I[2] C is a two-wire serial interface that contains a Serial Clock (SCL) line and a Serial Data (SDA) line.  SCL is a serial clock that is provided by the Master, but can be held low by any Slave device, putting the Master into a wait condition.  SDA is a bi-directional line used to transmit and receive data to and from the interface.  Data is transmitted MSB (Most Significant Bit) first in 8-bit per byte format, and the number of bytes transmitted per transfer is unlimited.  The I[2] C bus is considered free when both lines are high.  The I2C interface is compliant with high-speed mode, fast mode and standard mode I2C standards. 

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Page 13 of 31 

**PART NUMBER: ±  2g / 4g / 8g Tri-axis Digital KXCJB-1041 Accelerometer Specifications Rev. 1.0 Feb-2015** 

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SDA SCL IO_Vdd<br>SDA<br>MCU SCL<br>SDA<br>KXCJB<br>SCL<br>ADDR<br>SDA<br>KXCJB<br>SCL<br>ADDR<br>ie<br>1<br>Figure 1.  Multiple KXCJB I [2] C Connection<br>**----- End of picture text -----**<br>


## **I[2] C Operation** 

Transactions on the I[2] C bus begin after the Master transmits a start condition (S), which is defined as a highto-low transition on the data line while the SCL line is held high.  The bus is considered busy after this condition.  The next byte of data transmitted after the start condition contains the Slave Address (SAD) in the seven MSBs (Most Significant Bits), and the LSB (Least Significant Bit) tells whether the Master will be receiving data ‘1’ from the Slave or transmitting data ‘0’ to the Slave.  When a Slave Address is sent, each device on the bus compares the seven MSBs with its internally stored address.  If they match, the device considers itself addressed by the Master.  The KXCJB’s Slave Address is comprised of a programmable part and a fixed part, which allows for connection of multiple KXCJB's to the same I[2] C bus.  The Slave Address associated with the KXCJB is 000111X, where the programmable bit, X, is determined by the assignment of ADDR (pin 8) to GND or IO_Vdd.  Figure 1 above shows how two KXCJB's would be implemented on an I[2] C bus. 

It is mandatory that receiving devices acknowledge (ACK) each transaction.  Therefore, the transmitter must release the SDA line during this ACK pulse.  The receiver then pulls the data line low so that it remains stable low during the high period of the ACK clock pulse.  A receiver that has been addressed, whether it is Master or Slave, is obliged to generate an ACK after each byte of data has been received.  To conclude a transaction, the Master must transmit a stop condition (P) by transitioning the SDA line from low to high while SCL is high. The I[2] C bus is now free. 

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PART NUMBER:<br>±  2g / 4g / 8g Tri-axis Digital  KXCJB-1041<br>Accelerometer Specifications  Rev. 1.0<br>6Kionix’ Feb-2015<br>**----- End of picture text -----**<br>


## **Writing to a KXCJB 8-bit Register** 

Upon power up, the Master must write to the KXCJB’s control registers to set its operational mode.  Therefore, when writing to a control register on the I[2] C bus, as shown Sequence 1 on the following page, the following protocol must be observed:  After a start condition, SAD+W transmission, and the KXCJB ACK has been returned, an 8-bit Register Address (RA) command is transmitted by the Master.  This command is telling the KXCJB to which 8-bit register the Master will be writing the data.  Since this is I[2] C mode, the MSB of the RA command should always be zero (0).  The KXCJB acknowledges the RA and the Master transmits the data to be stored in the 8-bit register.  The KXCJB acknowledges that it has received the data and the Master transmits a stop condition (P) to end the data transfer.  The data sent to the KXCJB is now stored in the appropriate register.  The KXCJB automatically increments the received RA commands and, therefore, multiple bytes of data can be written to sequential registers after each Slave ACK as shown in Sequence 2 on the following page. 

## **Reading from a KXCJB 8-bit Register** 

When reading data from a KXCJB 8-bit register on the I[2] C bus, as shown in Sequence 3 on the next page, the following protocol must be observed:  The Master first transmits a start condition (S) and the appropriate Slave Address (SAD) with the LSB set at ‘0’ to write.  The KXCJB acknowledges and the Master transmits the 8-bit RA of the register it wants to read.  The KXCJB again acknowledges, and the Master transmits a repeated start condition (Sr).  After the repeated start condition, the Master addresses the KXCJB with a ‘1’ in the LSB (SAD+R) to read from the previously selected register.  The Slave then acknowledges and transmits the data from the requested register.  The Master does not acknowledge (NACK) it received the transmitted data, but transmits a stop condition to end the data transfer.  Note that the KXCJB automatically increments through its sequential registers, allowing data to be read from multiple registers following a single SAD+R command as shown below in Sequence 4 on the following page.  The 8-bit register data is transmitted using a left-most format, first bit shifted/clocked out being the MSB bit. 

If a receiver cannot transmit or receive another complete byte of data until it has performed some other function, it can hold SCL low to force the transmitter into a wait state.  Data transfer only continues when the receiver is ready for another byte and releases SCL. 

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**PART NUMBER: ±  2g / 4g / 8g Tri-axis Digital KXCJB-1041 Accelerometer Specifications Rev. 1.0 Feb-2015** ~~KSowf |~~ **Data Transfer Sequences** The following information clearly illustrates the variety of data transfers that can occur on the I[2] C bus and how the Master and Slave interact during these transfers.  Table 9 defines the I[2] C terms used during the data transfers. 

|**Term**|**Definition **|
|---|---|
|S|Start Condition|
|Sr|Repeated Start Condition|
|SAD|Slave Address|
|W|WriteBit|
|R|Read Bit|
|ACK|Acknowledge|
|NACK|NotAcknowledge|
|RA|Register Address|
|Data|Transmitted/Received Data|
|P|Stop Condition|



**Table 9.** I[2] C Terms 

**Sequence 1.** The Master is writing one byte to the Slave. 

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PART NUMBER:<br>±  2g / 4g / 8g Tri-axis Digital  KXCJB-1041<br>Accelerometer Specifications  Rev. 1.0<br>Feb-2015<br>**----- End of picture text -----**<br>


## **KXCJB Embedded Registers** 

The KXCJB has 25 embedded 8-bit registers that are accessible by the user.  This section contains the addresses for all embedded registers and also describes bit functions of each register.  Table 10 below provides a listing of the accessible 8-bit registers and their addresses. 

||~~ee~~|~~ee~~|
|---|---|---|
|**Register Name**<br>~~ee~~|**Type**<br>~~ee~~<br>~~ee~~|**I2C Address**<br>~~ee~~<br>~~ee~~|
||**Read/Write**<br>~~ee~~<br>~~ee~~<br>~~ee~~|**Hex            Binary**<br>~~ee~~<br>~~ee~~|
|Kionix Reserved<br>~~ee~~|-<br>~~ee~~<br>~~ee~~<br>~~ee~~|0x00–0x05<br>-<br>~~ee~~<br>~~ee~~|
|XOUT_L<br>~~es~~|R<br>~~ee~~<br>~~es~~|0x06<br>0000 0110<br>~~es~~|
|XOUT_H<br>~~es~~|R<br>~~es~~|0x07<br>0000 0111<br>~~es~~|
|YOUT_L<br>~~es~~|R<br>~~es~~|0x08<br>00001000<br>~~es~~|
|YOUT_H<br>~~a~~|R|0x09<br>0000 1001|
|ZOUT_L<br>~~a~~|R<br>~~ee~~|0x0A<br>0000 1010|
|ZOUT_H<br>~~ee~~|R<br>~~ee~~<br>~~ee~~|0x0B<br>00001011<br>~~ee~~|
|DCST_RESP<br>~~es~~|R<br>~~ee~~<br>~~es~~|0x0C<br>0000 1100<br>~~es~~|
|Kionix Reserved<br>~~es~~|-<br>~~es~~|0x0D–0x0E<br>-<br>~~es~~|
|WHO_AM_I<br>~~es~~|R<br>~~es~~|0x0F<br>00001111<br>~~es~~|
|Kionix Reserved<br>~~a~~|-|0x10–0x15<br>-|
|INT_SOURCE1<br>~~a~~|R<br>~~ee~~|0x16<br>0001 0110|
|INT_SOURCE2<br>~~ee~~|R<br>~~ee~~<br>~~ee~~|0x17<br>00010111<br>~~ee~~|
|STATUS_REG<br>~~es~~|R<br>~~ee~~<br>~~es~~|0x18<br>0001 1000<br>~~es~~|
|Kionix Reserved<br>~~es~~|-<br>~~es~~|0x19<br>-<br>~~es~~|
|INT_REL<br>~~es~~|R<br>~~es~~|0x1A<br>0001 1010<br>~~es~~|
|CTRL_REG1*<br>~~es~~|R/W<br>~~es~~|0x1B<br>0001 1011<br>~~es~~|
|Kionix Reserved<br>~~es~~|-<br>~~es~~|0x1C<br>0001 1100<br>~~es~~|
|CTRL_REG2*<br>~~a~~|R/W<br>~~ee~~|0x1D<br>0001 1101|
|INT_CTRL_REG1*<br>~~ee~~|R/W<br>~~ee~~<br>~~ee~~|0x1E<br>0001 1110<br>~~ee~~|
|INT_CTRL_REG2*<br>~~es~~|R/W<br>~~ee~~<br>~~es~~|0x1F<br>0001 1111<br>~~es~~|
|Kionix Reserved<br>~~es~~|-<br>~~es~~|0x20<br>0010 0000<br>~~es~~|
|DATA_CTRL_REG*<br>~~es~~|R/W<br>~~es~~|0x21<br>0010 0001<br>~~es~~|
|Kionix Reserved<br>~~es~~|-<br>~~es~~|0x22–0x28<br>-<br>~~es~~|
|WAKEUP_TIMER*<br>~~a~~|R/W<br>~~e~~|0x29<br>0010 1001|
|Kionix Reserved<br>~~e~~|-<br>~~e~~~~**e**~~<br>~~e~~|0x2A–0x39<br>-<br>~~**e**~~|
|SELF_TEST<br>~~es~~|R/W<br>~~e~~<br>~~es~~|0x3A<br>0011 1010<br>~~es~~|
|Kionix Reserved<br>~~es~~|-<br>~~es~~|0x3B–0x69<br>-<br>~~es~~|
|WAKUP_THRESHOLD*<br>~~es~~|R/W<br>~~es~~|0x6A<br>0110 1010<br>~~es~~|



* Note:  When changing the contents of these registers, the PC1 bit in CTRL_REG1 must first be set to “0”. 

**Table 10.** KXCJB Register Map 

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## [¢KIonix 

**PART NUMBER: ±  2g / 4g / 8g Tri-axis Digital KXCJB-1041 Accelerometer Specifications Rev. 1.0 Feb-2015** 

## **KXCJB Register Descriptions** 

## **Accelerometer Outputs** 

These registers contain up to 12-bits of valid acceleration data for each axis depending on the setting of the RES bit in CTRL_REG1, where the acceleration outputs are represented in 12-bit valid data when RES = ‘1’ and 8-bit valid data when RES = ‘0’.  The data is updated every user-defined ODR period, is protected from overwrite during each read, and can be converted from digital counts to acceleration (g) per Table 11 below. The register acceleration output binary data is represented in 2’s complement format. For example, if N = 12 bits, then the Counts range is from -2048 to 2047, and if N = 8 bits, then the Counts range is from -128 to 127. 

||**12-bit**||||
|---|---|---|---|---|
||**Register Data**|**Equivalent**|||
||**(2’s complement)**|**Counts indecimal**|**l**<br>**Range = +/-2g**<br>**Range = +/-4g**|**Range = +/-8g**|
|0111 1111 1111<br>2047<br>+1.999g<br>+3.998g<br>+7.996g<br>0111 1111 1110<br>2046<br>+1.998g<br>+3.996g<br>+7.992g<br>…<br>…<br>…<br>…<br>…<br>0000 0000 0001<br>1<br>+0.001g<br>+0.002g<br>+0.004g<br>0000 0000 0000<br>0<br>0.000g<br>0.000g<br>0.000g<br>1111 1111 1111<br>-1<br>-0.001g<br>-0.002g<br>-0.004g<br>…<br>…<br>…<br>…<br>…<br>1000 0000 0001<br>-2047<br>-1.999g<br>-3.998g<br>-7.996g<br>1000 0000 0000<br>-2048<br>-2.000g<br>-4.000g<br>-8.000g<br>~~es ee es~~<br>~~es ee es~~<br>~~es ee es~~<br>~~es eees es~~<br>~~rs ee es es~~<br>~~es ee er~~<br>~~es~~<br>~~es ee er~~<br>~~es~~<br>~~es ee er~~<br>~~es~~<br>~~ee~~<br>~~ee~~<br>~~es~~|||||
||**8-bit**||||
||**Register Data**|**Equivalent**|||
|**(2’s complement)**<br>0111 1111<br>0111 1110<br>…<br>0000 0001<br>0000 0000<br>1111 1111<br>…<br>1000 0001<br>1000 0000<br>~~es ~~<br>~~es ~~<br>~~es~~<br>~~es~~<br>~~es~~<br>~~es~~<br>~~es~~<br>~~es~~<br>~~ee~~||**Counts indecimal **<br>127<br>126<br>…<br>1<br>0<br>-1<br>…<br>-127<br>-128<br> ~~ee~~<br> ~~ee~~<br>~~ee ers~~<br>~~es~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~es~~|**Range = +/-2g**<br>**Range = +/-4g**<br>+1.984g<br>+3.968g<br>+1.968g<br>+3.936g<br>…<br>…<br>+0.016g<br>+0.032g<br>0.000g<br>0.000g<br>-0.016g<br>-0.032g<br>…<br>…<br>-1.984g<br>-3.968g<br>-2.000g<br>-4.000g<br>~~rs es~~<br>~~rs es~~<br>~~ers~~<br>~~rses~~<br>~~rs es~~<br>~~rs es~~<br>~~rs es~~<br>~~rs es~~<br>~~rses~~|**Range = +/-8g**<br>+7.936g<br>+7.872g<br>…<br>+0.064g<br>0.000g<br>-0.064g<br>…<br>-7.936g<br>-8.000g|



**Table 11.** Acceleration (g) Calculation 

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**PART NUMBER: ±  2g / 4g / 8g Tri-axis Digital KXCJB-1041 Accelerometer Specifications Rev. 1.0 Feb-2015** 

## **XOUT_L** 

X-axis accelerometer output least significant byte 

R R R R R R R R XOUTD3 XOUTD2 XOUTD1 XOUTD0 X X X X Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 ~~eeee~~ I[2] C Address: 0x06h **XOUT_H** X-axis accelerometer output most significant byte 

|R<br>R<br>R<br>R|R|R|R|R|
|---|---|---|---|---|
|XOUTD11 XOUTD10XOUTD9XOUTD8XOUTD7 XOUTD6XOUTD5XOUTD4<br>Bit7<br>Bit6<br>Bit5<br>Bit4<br>Bit3<br>Bit2<br>Bit1<br>Bit0<br>I2CAddress:0x07h<br>~~—ee~~<br>~~oe~~|||||
|**YOUT_L**|||||
|Y-axis accelerometer output least significant byte||Y-axis accelerometer output least significant byte|||



|R<br>R<br>R|R||R|R|R|R|
|---|---|---|---|---|---|---|
|YOUTD3YOUTD2 YOUTD1 YOUTD0<br>X<br>X<br>X<br>X<br>Bit7<br>Bit6<br>Bit5<br>Bit4<br>Bit3<br>Bit2<br>Bit1<br>Bit0<br>I2CAddress:0x08h<br>~~ee~~<br>~~ee~~|||||||
|**YOUT_H**|||||||
|Y-axis accelerometer output most significant byte||Y-axis accelerometer output most significant byte||Y-axis accelerometer output most significant byte|||
|R<br>R<br>R|R||R|R|R|R|
|YOUTD11 YOUTD10YOUTD9Y<br>Bit7<br>Bit6<br>Bit5<br>~~—ee~~|YOUTD8Y<br>Bit4|Y|YOUTD7 Y<br>Bit3|TD7 YOUTD6YOUTD5Y<br>Bit2<br>Bit1<br>I2CAddress:||YOUTD4<br>Bit0<br>:0x09h|



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**PART NUMBER: ±  2g / 4g / 8g Tri-axis Digital KXCJB-1041 Accelerometer Specifications Rev. 1.0 Feb-2015** 

## **ZOUT_L** 

Z-axis accelerometer output least significant byte 

R R R R R R R R ZOUTD3 ZOUTD2 ZOUTD1 ZOUTD0 X X X X Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 ~~eeee~~ I[2] C Address: 0x0Ah **ZOUT_H** Z-axis accelerometer output most significant byte R R R R R R R R ZOUTD11 ZOUTD10 ZOUTD9 ZOUTD8 ZOUTD7 ZOUTD6 ZOUTD5 ZOUTD4 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 ~~—eeoe~~ I[2] C Address: 0x0Bh 

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**PART NUMBER: ±  2g / 4g / 8g Tri-axis Digital KXCJB-1041 Accelerometer Specifications Rev. 1.0 Feb-2015** 

## **DCST_RESP** 

This register can be used to verify proper integrated circuit functionality.  It always has a byte value of 0x55h unless the DCST bit in CTRL_REG3 is set.  At that point this value is set to 0xAAh.  The byte value is returned to 0x55h after reading this register. 

R R R R R R R R DCSTR7 DCSTR6 DCSTR5 DCSTR4 DCSTR3 DCSTR2 DCSTR1 DCSTR0 Reset Value Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 01010101 ~~re~~ I[2] C Address: 0x0Ch **WHO_AM_I** This register can be used for supplier recognition, as it can be factory written to a known byte value. The default value is 0x21h. 

R R R R R R R R WIA7 WIA6 WIA5 WIA4 WIA3 WIA2 WIA1 WIA0 Reset Value Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 00001010 ~~re~~ I[2] C Address: 0x0Fh **Interrupt Source Registers** 

These two registers report interrupt state changes.  This data is updated when a new interrupt event occurs and each application’s result is latched until the interrupt release register is read.  The programmable interrupt engine can be configured to report data in an unlatched manner via the interrupt control registers. 

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## **±  2g / 4g / 8g Tri-axis Digital Accelerometer Specifications** 

**PART NUMBER: KXCJB-1041 Rev. 1.0 Feb-2015** 

## **INT_SOURCE1** 

This register reports which function caused an interrupt. Reading from the interrupt release register (INT_REL, 0x1Ah) will clear the entire contents of this register. 

||R|R|R<br>R<br>R<br>R<br>R<br>R||
|---|---|---|---|---|
|0<br>Bit7<br>~~—~~||0<br>Bit6|0<br>DRDY<br>0<br>0<br>WUFS<br>0<br>Bit5<br>Bit4<br>Bit3<br>Bit2<br>Bit1<br>Bit0<br>I2CAddress:0x16h||
|||**_DRDY_**_- indicates that new acceleration data (at Reg Addr 0x06h to 0x0Bh) is available.  This_|||
||||_bit is cleared when acceleration data is read or the interrupt release register_|_bit is cleared when acceleration data is read or the interrupt release register_|
||||_(INT_REL, 0x1Ah) is read._||



_0 = New acceleration data not available_ 

_1 = New acceleration data available_ 

_**WUFS** - Wake up, This bit is cleared when the interrupt source latch register (INT_REL, ox1Ah) is read._ 

_0 = No motion_ 

_1 = Motion has activated the interrupt_ 

## **INT_SOURCE2** 

This register reports the axis and direction of detected motion per Table 12.  This register is cleared when the interrupt source latch register (INT_REL, 0x1Ah) is read. 

|R<br>R<br>R|R||R<br>R<br>R||R|
|---|---|---|---|---|---|
|0<br>0<br>XNWU<br>XPWU<br>YNWU<br>YPWU<br>ZNWU<br>ZPWU<br>Bit7<br>Bit6<br>Bit5<br>Bit4<br>Bit3<br>Bit2<br>Bit1<br>Bit0<br>I2CAddress:0x17h<br>~~tt~~||||||
||**Bit**<br>**Description **<br>XNWU<br>X Negative (X-)Reported<br>XPWU<br>X Positive (X+)Reported<br>YNWU<br>Y Negative (Y-)Reported<br>YPWU<br>Y Positive (Y+)Reported<br>ZNWU<br>Z Negative (Z-)Reported<br>ZPWU<br>Z Positive (Z+)Reported<br>~~=—~~|||||
||**Table 12.**||**Table 12.**KXCJB Motion Reporting|||
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## **±  2g / 4g / 8g Tri-axis Digital Accelerometer Specifications** 

**PART NUMBER: KXCJB-1041 Rev. 1.0 Feb-2015** 

## **STATUS_REG** 

This register reports the status of the interrupt. 

|R<br>~~—~~|R|R|R|R|R|R|R|
|---|---|---|---|---|---|---|---|
|0<br>~~—~~|0|0|INT|0|0|0|0|
|Bit7<br>~~—~~|Bit6|Bit5|Bit4|Bit3|Bit2|Bit1|Bit0|
||||||I2CAddress:0x18h|||



_**INT** reports the combined (OR) interrupt information of DRDY and WUFS in the interrupt source register (INT_SOURCE1, 0x16h).  This bit is cleared when acceleration data is read or the interrupt release register (INT_REL, 1Ah) is read._ 

_0 = no interrupt event_ 

_1 = interrupt event has occurred_ 

## **INT_REL** 

Latched interrupt source information (INT_SOURCE1, 0x16h and INT_SOURCE2, 0x17h) is cleared and physical interrupt latched pin (7) is changed to its inactive state when this register is read. 

|R<br>~~—~~|R|R|R|R|R|R|R|
|---|---|---|---|---|---|---|---|
|X<br>~~—~~|X|X|X|X|X|X|X|
|Bit7<br>~~—~~|Bit6|Bit5|Bit4|Bit3|Bit2|Bit1|Bit0|
|~~—~~|||||I2CAddress:0x1Ah|||



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**PART NUMBER: ±  2g / 4g / 8g Tri-axis Digital KXCJB-1041 Accelerometer Specifications Rev. 1.0 Feb-2015** 

## **CTRL_REG1** 

Read/write control register that controls the main feature set. 

R/W R/W R/W R/W R/W R/W R/W R/W PC1 RES DRDYE GSEL1 GSEL0 0 WUFE 0 Reset Value Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 00000000 ~~re~~ I[2] C Address: 0x1Bh _**PC1** controls the operating mode of the KXCJB. 0 = disabled mode 1 = operating mode_ _**RES** determines the performance mode of the KXCJB.  Note that to change the value of this bit, the PC1 bit must first be set to “0”._ 

   - _0 = low current, 8-bit valid. Only available for ODR <= 200 Hz.  Bandwidth (Hz) = 800_ 

   - _1 = high resolution, 12-bit or 14-bit valid. Bandwidth (Hz) = ODR/2_ 

- _**DRDYE** enables the reporting of the availability of new acceleration data as an interrupt.  Note that to change the value of this bit, the PC1 bit must first be set to “0”._ 

   - _0 = availability of new acceleration data is not reflected as an interrupt_ 

   - _1 = availability of new acceleration data is reflected as an interrupt_ 

- _**GSEL1, GSEL0** selects the acceleration range of the accelerometer outputs per Table 13. Note that to change the value of this bit, the PC1 bit must first be set to “0”._ 

|**GSEL1**<br>~~===~~|**GSEL0**<br>~~===~~|**Range**<br>~~===~~|
|---|---|---|
|0<br>~~===~~|0<br>~~===~~|+/-2g<br>~~===~~|
|0<br>~~===~~|1<br>~~===~~|+/-4g<br>~~===~~|
|1<br>~~===~~|0<br>~~===~~|+/-8g<br>~~===~~|
|1<br>~~===~~|1<br>~~===~~|+/-8g1<br>~~===~~|



**Table 13.** Selected Acceleration Range 

_**WUFE** enables the Wake Up (motion detect) function. 0= disabled, 1= enabled.  Note that to change the value of this bit, the PC1 bit must first be set to “0”._ 

_0 = Wake Up function disabled_ 

> 1 This is a 14-bit mode available only in High Resolution mode and only for Registers 0x06h-0x0Bh 

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## **±  2g / 4g / 8g Tri-axis Digital Accelerometer Specifications** 

**PART NUMBER: KXCJB-1041 Rev. 1.0 Feb-2015** 

_1 = Wake Up function enabled_ 

## **CTRL_REG2** 

Read/write control register that provides more feature set control.  Note that to properly change the value of this register, the PC1 bit in CTRL_REG1 must first be set to “0”. 

R/W R/W R/W R/W R/W R/W R/W R/W SRST reserved reserved DCST reserved OWUFA OWUFB OWUFC Reset Value Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 00000000 ~~re~~ I[2] C Address: 0x1Dh _**SRST** initiates software reset, which performs the RAM reboot routine. This bit will remain 1 until the RAM reboot routine is finished._ 

_SRST = 0 – no action_ 

_SRST = 1 – start RAM reboot routine_ 

_**DCST** initiates the digital communication self-test function._ 

_DCST = 0 – no action_ 

_DCST = 1 – sets ST_RESP register to 0xAAh and when ST_RESP is read, sets this bit to 0 and sets ST_RESP to 0x55h_ 

_**OWUFA, OWUFB, OWUFC** sets the Output Data Rate for the Wake Up function (motion detection) per Table 14 below_ 

|**OWUFA**|**FAOWUFB**|**FBOWUFC**|**Wake Up function**<br>**Output Data Rate**|
|---|---|---|---|
|0|0|0|0.781Hz|
|0|0|1|1.563Hz|
|0|1|0|3.125Hz|
|0|1|1|6.25Hz|
|1|0|0|12.5Hz|
|1|0|1|25Hz|
|1|1|0|50Hz|
|1|1|1|100Hz|



**Table 14.** Output Data Rate for Wake Up Function 

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## **±  2g / 4g / 8g Tri-axis Digital Accelerometer Specifications** 

**PART NUMBER: KXCJB-1041 Rev. 1.0 Feb-2015** 

## **INT_CTRL_REG1** 

This register controls the settings for the physical interrupt pin (7).  Note that to properly change the value of this register, the PC1 bit in CTRL_REG1 must first be set to “0”. 

R/W R/W R/W R/W R/W R/W R/W R/W 0 0 IEN IEA IEL 0 0 0 Reset Value Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 00010000 ~~re~~ I[2] C Address: 0x1Eh _**IEN** enables/disables the physical interrupt pin (7) IEN = 0 – physical interrupt pin (7) is disabled IEN = 1 – physical interrupt pin (7) is enabled_ _**IEA** sets the polarity of the physical interrupt pin (7)_ 

_IEA = 0 – polarity of the physical interrupt pin (7) is active low_ 

_IEA = 1 – polarity of the physical interrupt pin (7) is active high_ 

_**IEL** sets the response of the physical interrupt pin (7)_ 

_IEL = 0 – the physical interrupt pin (7) latches until it is cleared by reading INT_REL_ 

_IEL = 1 – the physical interrupt pin (7) will transmit one pulse with a period of 0.03 - 0.05ms_ 

## **INT_CTRL_REG2** 

This register controls which axis and direction of detected motion can cause an interrupt. Note that to properly change the value of this register, the PC1 bit in CTRL_REG1 must first be set to “0”. 

|R/W<br>0<br>Bit7<br>~~Co~~|R/W<br>0<br>Bit7<br>~~Co~~|R/W<br>R/W<br>R/W<br>R/W<br>R/W<br>R/W<br>0<br>XNWUE<br>XPWUE<br>YNWUE<br>YPWUE<br>ZNWUE<br>Bit6<br>Bit5<br>Bit4<br>Bit3<br>Bit2<br>Bit1<br>I2CAddress:|R/W<br>ZPWUE<br>Bit0<br>:0x1Fh|ResetValue<br>00111111|
|---|---|---|---|---|
|||**_XNWU_**_- x negative (x-): 0 = disabled, 1 = enabled_|||
|||**_XPWU_**_- x positive (x+): 0 = disabled, 1 = enabled_|||
|||**_YNWU_**_- y negative (y-): 0 = disabled, 1 = enabled_|||
|||**_YPWU_**_- y positive (y+): 0 = disabled, 1 = enabled_|||
|||**_ZNWU_**_- z negative (z-): 0 = disabled, 1 = enabled_|||
|||**_ZPWU_**_- z positive (z+): 0 = disabled, 1 = enabled_|||



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Page 26 of 31 

**PART NUMBER: ±  2g / 4g / 8g Tri-axis Digital KXCJB-1041 Accelerometer Specifications Rev. 1.0 Feb-2015** 

## **DATA_CTRL_REG** 

Read/write control register that configures the acceleration outputs.  Note that to properly change the value of this register, the PC1 bit in CTRL_REG1 must first be set to “0”. 

R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 OSAA OSAB OSAC OSAD Reset Value Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 00000010 ~~a~~ I[2] C Address: 0x21h _**OSAA, OSAB, OSAC, OSAD** sets the output data rate (ODR) for the low-pass filtered acceleration outputs per_ Table 15 _._ 

|**OSAA**|**OSAB**|**OSAC**|**OSAD**|**Output Data Rate**|**LPF Roll-Off**|
|---|---|---|---|---|---|
|1|0|0|0|0.781Hz|0.3905Hz|
|1|0|0|1|1.563Hz|0.781Hz|
|1|0|1|0|3.125Hz|1.563Hz|
|1|0|1|1|6.25Hz|3.125Hz|
|0|0|0|0|12.5Hz|6.25Hz|
|0|0|0|1|25Hz|12.5Hz|
|0|0|1|0|50Hz|25Hz|
|0|0|1|1|100Hz|50Hz|
|0|1|0|0|200Hz|100Hz|
|0|1|0|1|400Hz|200Hz|
|0|1|1|0|800Hz|400Hz|
|0|1|1|1|1600Hz|800Hz|



**Table 15.** Acceleration Output Data Rate (ODR) and LPF Roll-Off 

_Note: Output Data Rates >= 400Hz will force device into High Resolution mode_ 

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## **±  2g / 4g / 8g Tri-axis Digital Accelerometer Specifications** 

**PART NUMBER: KXCJB-1041 Rev. 1.0 Feb-2015** 

## **WAKEUP_TIMER** 

This register sets the time motion must be present before a wake-up interrupt is set.  Every count is calculated as 1/OWUF delay period.  Note that to properly change the value of this register, the PC1 bit in CTRL_REG1 must first be set to “0”. Valid Entries are 1 to 255, zero is excluded. 

R/W R/W R/W R/W R/W R/W R/W R/W WUFC7 WUFC6 WUFC5 WUFC4 WUFC3 WUFC2 WUFC1 WUFC0 Reset Value Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 00000000 ~~re~~ I[2] C Address: 0x29h **SELF_TEST** When 0xCA is written to this register, the MEMS self-test function is enabled.  Electrostatic-actuation of the accelerometer, results in a DC shift of the X, Y and Z axis outputs.  Writing 0x00 to this register will return the accelerometer to normal operation. 

R/W R/W R/W R/W R/W R/W R/W R/W 1 1 0 0 1 0 1 0 Reset Value Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 00000000 ~~re~~ I[2] C Address: 0x3Ah **WAKEUP_THRESHOLD** This register sets the threshold for wake-up (motion detect) interrupt is set. The KXCJB will ship from the factory with this value set to correspond to a change in acceleration of 0.5g.  Note that to properly change the value of this register, the PC1 bit in CTRL_REG1 must first be set to “0”. 

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**PART NUMBER: ±  2g / 4g / 8g Tri-axis Digital KXCJB-1041 Accelerometer Specifications Rev. 1.0 Feb-2015** 

## **KXCJB Embedded Wake Up Function** 

The KXCJB contains an interrupt engine that can be configured by the user to report when qualified changes in acceleration occur.  The user has the option to enable or disable specific axes and specific directions, as well as to specify the delay time.  An example use case for the engine would be to detect motion on any axis to signal an event and wake up the accelerometer or other devices.  This can be achieved by configuring the engine to detect when the acceleration on any axis is greater than the user-defined threshold for a userdefined amount of time.  Equations 1 and 2 show how to calculate the engine threshold (WAKEUP_THRESHOLD) and delay time (WAKEUP_TIMER) register values for the desired result. 

_WAKEUP_THRESHOLD (counts) = Desired Threshold (g) x 16 (counts/g)_ 

**Equation 1.** Wake Up Threshold 

_WAKEUP_TIMER (counts) = Desired Delay Time (sec) x OWUF (Hz)_ 

**Equation 2.** Wake Up Delay Time 

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PART NUMBER:<br>±  2g / 4g / 8g Tri-axis Digital  KXCJB-1041<br>Accelerometer Specifications  Rev. 1.0<br>Feb-2015<br>**----- End of picture text -----**<br>


Figure 2 below shows the latched response of the Wake Up Function with WUF Timer = 10 counts. 

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Typical Wake Up Interrupt Example<br>Acceleration<br>WUF Threshold<br>0g<br>10<br>WUF Timer<br>Ex: Delay Counter = 10<br>Motion<br>Inactive<br>Figure 2.   Latched Motion Interrupt Response<br>then upon a wake-up event the WUF interrupt signal will pulse and return low, but only once. The WUF<br>interrupt output will not reset until a read of the INT_REL latch reset register.<br>[i]<br>**----- End of picture text -----**<br>


The KXCJB-1008 wake-up function is always latched. However, if the INT_CTROL_REG1 is set with IEL = 1, then upon a wake-up event the WUF interrupt signal will pulse and return low, but only once. The WUF interrupt output will not reset until a read of the INT_REL latch reset register. 

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**PART NUMBER: ±  2g / 4g / 8g Tri-axis Digital KXCJB-1041 Accelerometer Specifications Rev. 1.0 Feb-2015** 

**Revision History** 

REVISION DESCRIPTION DATE 1.0 Initial Release 24-Feb-2015 ~~oe~~ 

> "Kionix" is a registered trademark of Kionix, Inc.  Products described herein are protected by patents issued or pending.  No license is granted by implication or otherwise under any patent or other rights of Kionix.  The information contained herein is believed to be accurate and reliable but is not guaranteed.   Kionix does not assume responsibility for its use or distribution.  Kionix also reserves the right to change product specifications or discontinue this product at any time without prior notice.  This publication supersedes and replaces all information previously supplied. 

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