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KX132-1211
MEMS Accelerometer, ± 2g, ± 4g, ± 8g, ± 16g, X, Y, Z, I2C, SPI, LGA, 12 Pins
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- Manufacturer: KIONIX
- Product type: MEMS Accelerometers
- Available until stocks are exhausted
- MSL: MSL 3 - 168 hours
- SVHC: No SVHC (07-Nov-2024)
- No. of Pins: 12Pins
- Sensing Axis: X, Y, Z
- Product Range: -
- Qualification: -
- Sensitivity Max: 2171counts/g, 4342counts/g, 8684counts/g, 17367counts/g
- Sensitivity Min: 1925counts/g, 3850counts/g, 7700counts/g, 15401counts/g
- Sensitivity Typ: 2048counts/g, 4096counts/g, 8192counts/g, 16384counts/g
- Output Interface: I2C, SPI
- Sensor Case Style: LGA
- MEMS Sensor Output: Digital
- Supply Voltage Max: 3.6V
- Supply Voltage Min: 1.7V
- Sensor Case / Package: LGA
- Operating Temperature Max: 105°C
- Operating Temperature Min: -40°C
- Sensing Range - Accelerometer: ± 2g, ± 4g, ± 8g, ± 16g
| Delivery and price | |
|---|---|
| Units per pack | 500 |
| Price | 3.95 € |
| Current stock | 10+ |
| Lead time | 30 days |
**PART NUMBER: ± 2g / 4g / 8g / 16g Tri-axis Digital KX132-1211 Accelerometer Specifications Rev. 4.0 24-Nov-2021** ## **Product Description** The KX132-1211 is a tri-axis ±2g, ±4g, ±8g, or ±16g silicon micromachined accelerometer featuring a user-configurable 3-stage Advanced Data Path (ADP) consisting of a low-pass filter, low-pass/high-pass filter, and RMS calculation engine. The KX132-1211 accelerometer also features an advanced Wake-Up and Back-to-Sleep detection with a high-resolution threshold capability configurable down to 3.9 mg, 512-byte buffer that continues to record data even when being read, as well as embedded engines for orientation, Directional-Tap[TM] /DoubleTap[TM] , and Free fall detection. The sense element is fabricated using Kionix’s proprietary plasma micromachining process technology. Acceleration sensing is based on the principle of a differential capacitance arising from accelerationinduced motion of the sense element, which further utilizes common mode cancellation to decrease errors from process variation, temperature, and environmental stress. The sense element is hermetically sealed at the wafer level by bonding a second silicon lid wafer to the device wafer. A separate ASIC device packaged with the sense element provides signal conditioning and intelligent user-programmable application algorithms. The KX132-1211 accelerometers offer lower noise and improved linearity over of the entire temperature range. The accelerometer is delivered in a 2 x 2 x 0.9 mm LGA 12-pin plastic package operating from a 1.7V – 3.6V (VDD) / 1.2V – 3.6V (IO_VDD) DC supplies. Internal voltage regulators are used to maintain constant internal operating voltages over the range of input supply voltages. This results in stable operating characteristics even if the supply voltage changes. I²C or SPI digital protocol is supported to configure the chip, read acceleration outputs, and check for updates to the orientation, Directional-Tap[TM] /Double-Tap[TM] detection, Free fall detection, and activity monitoring algorithms. Two configurable interrupt pins are also available to show the output of the embedded detection algorithms. ## **Features** - Operating temperature range from -40ºC to +105ºC - Small footprint: 2 x 2 x 0.9 mm LGA 12-pin package - User-configurable g-range up to ±16g and Output Data Rate - up to 25600Hz - A user-configurable 3-stage Advanced Data Path (ADP) consisting of a low-pass filter, low-pass/high-pass filter, and RMS calculation engine. - High resolution Wake-Up / Back-to-Sleep functions with threshold configurable down to 3.9 mg - User accessible manufacturer and part ID registers - Self-test Function - Integrated Free fall, Directional-Tap[TM ] / Double-Tap[TM] , and - Device-orientation algorithms - Improved ODR accuracy in Low Power mode over temperature - Embedded 512-byte FIFO buffer continues to record data even when being read - User-selectable Low Power or High-Performance modes - Internal voltage regulator - Digital I[2] C up to 3.4MHz and Digital SPI up to 10MHz - Excellent temperature performance with high shock survivability - RoHS / REACH compliant 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 1 of 31 **==> picture [499 x 66] intentionally omitted <==** **----- Start of picture text -----**<br> ||| |---|---| |PART NUMBER:| |± 2g / 4g / 8g / 16g Tri-axis Digital|KX132-1211| |Accelerometer Specifications|Rev. 4.0| |6Kionix’| |24-Nov-2021| **----- End of picture text -----**<br> ## **Table of Contents** **==> picture [540 x 551] intentionally omitted <==** **----- Start of picture text -----**<br> ||||| |---|---|---|---| |PRODUCT DESCRIPTION ................................................................................................................................................................... 1| |FEATURES ......................................................................................................................................................................................... 1| |TABLE OF CONTENTS ........................................................................................................................................................................ 2| |FUNCTIONAL DIAGRAM .................................................................................................................................................................... 4| |PRODUCT SPECIFICATIONS ............................................................................................................................................................... 5| |MECHANICAL ............................................................................................................................................................................................. 5| |ELECTRICAL ............................................................................................................................................................................................... 6| |Start Up Time Profile ......................................................................................................................................................................... 7| |Current Profile ................................................................................................................................................................................... 7| |Power-On Procedure ......................................................................................................................................................................... 8| |ENVIRONMENTAL ....................................................................................................................................................................................... 9| |Handling, Mounting, Soldering ......................................................................................................................................................... 9| |Floor Life ............................................................................................................................................................................................ 9| |TERMINOLOGY ......................................................................................................................................................................................... 10| |g ...................................................................................................................................................................................................... 10| |Sensitivity ........................................................................................................................................................................................ 10| |Zero-g offset .................................................................................................................................................................................... 10| |Self-test ........................................................................................................................................................................................... 10| |FUNCTIONALITY ........................................................................................................................................................................................ 11| |Sense element ................................................................................................................................................................................. 11| |ASIC interface .................................................................................................................................................................................. 11| |Factory calibration .......................................................................................................................................................................... 11| |APPLICATION SCHEMATIC .......................................................................................................................................................................... 12| |PIN DESCRIPTION ..................................................................................................................................................................................... 12| |PACKAGE DIMENSIONS AND ORIENTATION .................................................................................................................................................... 13| |Dimensions ...................................................................................................................................................................................... 13| |Orientation ...................................................................................................................................................................................... 14| |DIGITAL INTERFACE ........................................................................................................................................................................ 17| |I|[2]|C|SERIAL INTERFACE................................................................................................................................................................................ 17| |I|[2]|C Operation ................................................................................................................................................................................... 18| |Writing to an 8-bit Register ............................................................................................................................................................. 20| |Reading from an 8-bit Register ....................................................................................................................................................... 20| |Data Transfer Sequences ................................................................................................................................................................. 21| |HS-mode .......................................................................................................................................................................................... 22| |I|[2]|C Timing Diagram ......................................................................................................................................................................... 23| |SPI|COMMUNICATIONS ............................................................................................................................................................................. 24| |4-Wire SPI Interface......................................................................................................................................................................... 24| |4-Wire SPI Timing Diagram ............................................................................................................................................................. 25| |4-Wire Read and Write Registers .................................................................................................................................................... 26| |3-Wire SPI Interface......................................................................................................................................................................... 27| |3-Wire SPI Timing Diagram ............................................................................................................................................................. 28| |3-Wire Read and Write Registers .................................................................................................................................................... 29| **----- End of picture text -----**<br> 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 2 of 31 |**PART NUMBER:**|| |---|---| |**± 2g / 4g / 8g / 16g Tri-axis Digital**<br>**Accelerometer Specifications**<br>**KX132-1211**<br>**Rev. 4.0**<br>**24-Nov-2021**<br>6Kionix’|| |**REVISION HISTORY ......................................................................................................................................................................... 30**|| |**APPENDIX ....................................................................................................................................................................................... 31**|| 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 3 of 31 **PART NUMBER: ± 2g / 4g / 8g / 16g Tri-axis Digital KX132-1211 Accelerometer Specifications Rev. 4.0 24-Nov-2021** ## **Functional Diagram** **==> picture [398 x 259] intentionally omitted <==** **----- Start of picture text -----**<br> X<br>Accel<br>DSP and<br>Buffers<br>Y<br>Accel Charge ADC<br>Amplifier<br>Z<br>Accel<br>Digital Interface<br>Power and<br>Reference<br>VDD GND IO_VDD SDI/SDA TRIG INT1 INT2 nCS<br>SDO/ADDR SCLK/SCL<br>**----- End of picture text -----**<br> 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 4 of 31 «6Kionix’ **PART NUMBER:** **KX132-1211** ## **± 2g / 4g / 8g / 16g Tri-axis Digital Accelerometer Specifications Rev. 4.0** **24-Nov-2021** ## **Product Specifications** ## **Mechanical** = (specifications are for operation at 2.5V and T 25C unless stated otherwise) ~~a~~ **Parameters Units Min Typical Max** ~~a~~ Operating Temperature Range ºC -40 - +105 ~~a~~ Zero-g Offset mg ±25 ±90 ~~Rs~~ Zero-g Offset Variation from RT over Temp. mg/ºC 0.25 ~~a~~ GSEL1=0, GSEL0=0 (±2g) 15401 16384 17367 GSEL1=0, GSEL0=1 (±4g) 7700 8192 8684 Sensitivity[1] (16 bit) counts/g ~~7~~ GSEL1=1, GSEL0=0 (±8g) 3850 4096 4342 ~~eSa~~ GSEL1=1, GSEL0=1 (±16g) ~~a~~ 1925 ~~==~~ 2048 2171 ~~a~~ GSEL1=0, GSEL0=0 (±2g) ~~a~~ 64 Sensitivity GSEL1=0, GSEL0=1 (±4g) 32 counts/g (Buffer 8-bit mode)[1,2] ~~a~~ GSEL1=1, GSEL0=0 (±8g) 16 ~~SSSa~~ GSEL1=1, GSEL0=1 (±16g) ~~a~~ 8 0.01 (xy) Sensitivity Variation from RT over Temperature %/ºC ~~ee~~ 0.03 (z) 0.25 (xy) Positive Self-Test Output change on Activation g 0.5 0.75 ~~eeee~~ 0.2 (z) 4200 (xy) Mechanical Signal Bandwidth (-3dB)[3] Hz ~~eea~~ Non-Linearity % of FS ~~ee~~ 29000.5 (z) Cross Axis Sensitivity % 2 RMS mg 0.7 ~~aS~~ Noise[4] Density µg/√Hz 130 ~~ee~~ **Table 1:** ~~ee~~ Mechanical Specifications ~~ee eee~~ Notes: 1. Resolution and acceleration ranges are user selectable via I[2] C or SPI. Tolerance specified at ±1g stimulus. 2. Sensitivity is proportional to BRES in BUF_CNTL2. 3. Signal bandwidth varies with Output Data Rate (ODR), and Low Pass Filter setting. Measured with ODR = 25600Hz, LPRO = 1 settings. 4. Noise varies with ODR, power mode, and the Average Filter Control (AVC) settings. Measured with RES = 1, ODR = 50Hz, LPRO = 1, GSEL = 0 settings. 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 5 of 31 «6Kionix’ **PART NUMBER: ± 2g / 4g / 8g / 16g Tri-axis Digital KX132-1211 Accelerometer Specifications Rev. 4.0 24-Nov-2021** ## **Electrical** = (specifications are for operation at 2.5V and T 25C unless stated otherwise) ~~a~~ **Parameters Units Min Typical Max** ~~a~~ Supply Voltage (VDD) Operating V 1.7 2.5 3.6 I/O Pads Supply SPI, I[2] C (Fast/Standard mode) 1.2 3.6 V ~~es~~ Voltage (IO_VDD) I[2] C (High Speed mode) 1.7 3.6 Operating (High Performance with Wake-up ~~ee~~ Detection) ODR=400Hz ~~Ol eee~~ 148 ~~ee~~ Current Consumption Operating (Low power with Wake-up detection) 0.53 (Accelerometer Only) ~~ee~~ ODR=0.781Hz[1] ee µA ~~ee ee~~ Operating (Low Power with Wake-up detection 0.67 plus Advanced Data Path) ODR=0.781Hz[7] ~~a ee ee ee a~~ Standby Current Consumption µA 0.5 (IO_VDD < 2V) V - - 0.2 * IO_VDD Output Low Voltage (VOL)[ 2] (IO_VDD ≥ 2V) V - - 0.4 ~~_————— OO~~ Output High Voltage (VOH) V 0.8 * IO_VDD - - ~~OG~~ Input Low Voltage (VIL) V - - 0.2 * IO_VDD ~~a~~ Input High Voltage (VIH) V 0.8 * IO_VDD - - ~~a~~ Start Up Time[3] ms 2 1300 ~~oy~~ Power Up Time[4] ms 20 50 ~~a~~ SPI Communication Rate MHz 10 ~~a~~ I[2] C Communication Rate MHz 0.4 3.4 ~~a~~ I[2] C Slave Address (7-bit) 0x1E / 0x1F WHO_AM_I register value 0x3D ~~ee a~~ Output Data Rate (ODR)[5] Hz 0.781 50 25600 ODR/9 or Output Signal Bandwidth (-3dB)[6] Hz ~~a~~ ODR/2 **Table 2:** Electrical Specifications Notes: 1. Current varies with Output Data Rate (ODR) as shown in Figure 2, types and number of enabled digital engines, the average filter control settings, and VDD. Measured with OWUF<2:0> = 0, OSA<3:0> = 0, AVC<2:0> = 1, LPSTPSEL = 1. 2. For I[2] C communication, this assumes a minimum 1.5kΩ pull-up resistor on SCL and SDA pins. 3. Start up time is from PC1 set to valid outputs. Time varies with ODR, Power Mode, and FSTUP bit setting (see Figure 1). 4. Power up time is from VDD valid to device boot completion. 5. Typical values. ODR is user-selectable via I[2] C or SPI. See ODCNTL register for details. 6. Refers to accelerometer’s raw output data. Additional bandwidth control is available using the Advanced Data Path (ADP) engine. 7. Measured with RMS_AVC<2:0> = 1, OADP<3:0> = 0, LPSTPSEL = 0. 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 6 of 31 ## **PART NUMBER: ± 2g / 4g / 8g / 16g Tri-axis Digital KX132-1211 Accelerometer Specifications Rev. 4.0 24-Nov-2021** ~~eea~~ ## **Start Up Time Profile** **==> picture [151 x 11] intentionally omitted <==** **----- Start of picture text -----**<br> Figure 1: Start Up Time Diagram<br>**----- End of picture text -----**<br> ## **Current Profile** **Figure 2:** Current as a function of Output Data Rate (ODR) and Power Mode Settings 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 7 of 31 **PART NUMBER: ± 2g / 4g / 8g / 16g Tri-axis Digital KX132-1211 Accelerometer Specifications Rev. 4.0 24-Nov-2021** ~~Kf~~ **Power-On Procedure** Proper functioning of power-on reset (POR) is dependent on the specific **VDD, VDDLOW** , **TVDD** (rise time) **,** and **TVDD_OFF** profile of individual applications. It is recommended to minimize **VDDLOW,** and **TVDD** , and maximize **TVDD_OFF** . It is also advised that the **VDD** ramp up time **TVDD** be monotonic. Note that the outputs will not be stable until **VDD** has reached its final value. _To assure proper POR, the application should be evaluated over the customer specified range of VDD, VDDLOW, TVDD, TVDD_OFF and temperature as POR performance can vary depending on these parameters._ Please refer to Technical Note _**TN027 Power-On Procedure**_ for more information. 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 8 of 31 **PART NUMBER: ± 2g / 4g / 8g / 16g Tri-axis Digital KX132-1211 Accelerometer Specifications Rev. 4.0 24-Nov-2021** ## **Environmental** |**Parameters**|**Parameters**|**Units**|**Min**|**Typical**|**Max**| |---|---|---|---|---|---| |Supply Voltage (VDD) Absolute Limits|Supply Voltage (VDD) Absolute Limits|V|-0.3|-|3.60| |Operating Temperature Range||ºC|-40|-|+105| |Storage Temperature Range||ºC|-55|-|+150| |Mech. Shock (powered and unpowered)||g|-|-|5000 for 0.5ms<br>10000 for 0.2ms| |ESD|HBM|V|-|-|2000| **Table 3:** Environmental Specifications Caution: ESD Sensitive and Mechanical Shock Sensitive Component, improper handling can cause permanent damage to the device. This product is in conformance with RoHS directive, REACH regulation, and HF is Halogen-Free. For the current certificate of compliance, visit www.kionix.com website. ## **Handling, Mounting, Soldering** For package handling, mounting, and soldering guidelines, see TN007 Package Handling, Mounting, and Soldering Guidelines technical note. ## **Floor Life** Factory floor life exposure of the KX132-1211 reels removed from the moisture barrier bag should not exceed a maximum of 168 hours at 30C/60%RH. If this floor life is exceeded, the parts should be dried per the IPC/JEDEC J-STD-033D standard (or latest revision). 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 9 of 31 **==> picture [89 x 9] intentionally omitted <==** **----- Start of picture text -----**<br> PART NUMBER:<br>**----- End of picture text -----**<br> **± 2g / 4g / 8g / 16g Tri-axis Digital KX132-1211 Accelerometer Specifications Rev. 4.0** 6Kionix’ **24-Nov-2021** ## **Terminology** ## **g** A unit of acceleration equal to the acceleration of gravity at the earth's surface. _m_ 1 _g_ = 9 .8 2 _s_ One thousandth of a g (0.0098 m/ s[2] ) is referred to as 1 milli-g (1 mg). ## **Sensitivity** The sensitivity of an accelerometer is the change in output per unit of input acceleration at nominal VDD and temperature. The term is essentially the gain of the sensor expressed in counts per g (counts/g) or LSB’s per g (LSB/g). Occasionally, sensitivity is expressed as a resolution, i.e. milli-g per LSB (mg/LSB) or milli-g per count (mg/count). Sensitivity for a given axis is determined by measurements of the formula: **==> picture [215 x 28] intentionally omitted <==** The sensitivity tolerance describes the range of sensitivities that can be expected from a large population of sensors at room temperature and over life. When the temperature deviates from room temperature (25ºC), the sensitivity will vary by the amount shown in Table 1. ## **Zero-g offset** Zero-g offset or 0-g offset describes the actual output of the accelerometer when no acceleration is applied. Ideally, the output would always be in the middle of the dynamic range of the sensor (content of the OUTX, OUTY, OUTZ registers = 00, expressed as a 2’s complement number). However, because of mismatches in the sensor, calibration errors, and mechanical stress, the output can deviate from 00. This deviation from the ideal value is called 0-g offset. The zero-g offset tolerance describes the range of 0-g offsets of a population of sensors over the operating temperature range. ## **Self-test** Self-test allows a functional test of the sensor without applying a physical acceleration to it. When activated, an electrostatic force is applied to the sensor, simulating an input acceleration. The sensor outputs respond accordingly. If the output signals change within the amplitude specified in Table 1, then the sensor is working properly and the parameters of the interface chip are within the defined specifications. 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 10 of 31 **PART NUMBER: ± 2g / 4g / 8g / 16g Tri-axis Digital KX132-1211 Accelerometer Specifications Rev. 4.0** 6Kionix’ **24-Nov-2021** ## **Functionality** ## **Sense element** The sense element is fabricated using Kionix’s proprietary plasma micromachining process technology. This process technology allows Kionix to create mechanical silicon structures, which are essentially mass-spring systems that move in the direction of the applied acceleration. Acceleration sensing is based on the principle of a differential capacitance arising from the acceleration-induced motion. Capacitive plates on the moving mass move relative to fixed capacitive plates anchored to the substrate. The sense element is hermetically sealed at the wafer level by bonding a second silicon lid wafer to the device using a glass frit. ## **ASIC interface** A separate ASIC device packaged with the sense element provides all of the signal conditioning and communication with the sensor. The complete measurement chain is composed by a low-noise capacitance to voltage amplifier, which converts the differential capacitance of the MEMS sensor into an analog voltage that is sent through an analog-to-digital converter. The acceleration data may be accessed through the I[2] C or SPI digital communications provided by the ASIC. In addition, the ASIC contains all of the logic to allow the user to choose data rates, g-ranges, filter settings, and interrupt logic. ## **Factory calibration** Kionix trims the offset and sensitivity of each accelerometer by adjusting gain (sensitivity) and 0-g offset trim codes stored in nonvolatile memory (OTP). Additionally, all functional register default values are also programmed into the nonvolatile memory. Every time the device is turned on or a software reset command is issued, the trimming parameters and default register values are downloaded into the volatile registers to be used during active operation. This allows the device to function without further calibration. 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 11 of 31 **PART NUMBER:** **PART NUMBER: ± 2g / 4g / 8g / 16g Tri-axis Digital KX132-1211 Accelerometer Specifications Rev. 4.0 24-Nov-2021** ~~CS cin oO~~ ## **Application Schematic** ## **Pin Description** |Pin|Name|**Description**|**Description**| |---|---|---|---| |1|SDO/ADDR||Serial Data Out pin during 4-wire SPI communication and part of the device address during I2C communication. Do not leave<br>floating.| |2|SDI/SDA||SPI Data input / I2C Serial Data| |3|IO_VDD||The power supply input for the digital communication bus. Optionally decouple this pin to ground with a 0.1uF ceramic<br>capacitor.| |4|TRIG||Triggerpin for FIFO buffer control. Connect to GND when not usingexternal trigger option.| |5|INT1||Physical Interrupt 1 (Push-Pull). The pin is in High-Z state during POR and is driven LOW following POR. Leave floating if not<br>used.| |6|INT2||Physical Interrupt 2 (Push-Pull). The pin is in High-Z state during POR and is driven LOW following POR. Leave floating if not<br>used.| |7|VDD||Thepower supplyinput. Decouple thispin toground with a 0.1uF ceramic capacitor.| |8|GND||Ground| |9|GND||Ground| |10|nCS||ChipSelect(active LOW)for SPI communication. Connect to IO_VDD for I2C communication. Do not leave floating.| |11|NC||Not InternallyConnected. Can be connected to VDD,IO_VDD,GND or leave floating.| |12|SCLK/SCL||SPI and I2C Serial Clock| **Table 4:** Pin Description 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 12 of 31 **PART NUMBER: KX132-1211 Rev. 4.0 24-Nov-2021** ## **± 2g / 4g / 8g / 16g Tri-axis Digital Accelerometer Specifications** ## **Package Dimensions and Orientation** ## **Dimensions** 2 x 2 x 0.9 mm LGA 12-pin All dimensions and tolerances conform to ASME Y14.5M-1994 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 13 of 31 **PART NUMBER: ± 2g / 4g / 8g / 16g Tri-axis Digital KX132-1211 Accelerometer Specifications Rev. 4.0** 6Kionix’ **24-Nov-2021** ## **Orientation** When device is accelerated in +X, +Y or +Z direction, the corresponding output will increase. **Static X/Y/Z Output Response versus Orientation to Earth’s surface (1g):** GSEL1=0, GSEL0=0 (±2g) |**Position**|**1**|**1**|**2**|**2**|**3**|**3**|**4**|**4**|**5**|**5**|**6**|**6**| |---|---|---|---|---|---|---|---|---|---|---|---|---| |Diagram<br>~~oot~~|~~ootTT~~||~~TT~~||||||Top<br>Bottom||Bottom<br>Top|| |Resolution<br>(bits)<br>~~oot~~|16<br>~~ootTT~~|8<br>~~TT~~|16<br>~~TT~~|8|16|8|16|8|16|8|16|8| |X (counts)<br>~~oot~~<br>~~a~~|+16384<br>~~oot TT~~<br>~~a~~|+64<br>~~TT~~<br>~~a~~|0<br>~~TT~~|0|-16384|-64|0|0|0|0|0|0| |Y(counts)<br>~~a~~|0<br>~~a~~|0<br>~~a~~|-16384|-64|0|0|+16384|+64|0|0|0|0| |Z(counts)<br>~~a~~|0<br>~~a~~|0<br>~~a~~|0|0|0|0|0|0|+16384|+64|-16384|-64| |~~a~~|~~a~~|||||||||||| |X-Polarity<br>~~a~~|**+**<br>~~a~~||**0**||**-**||**0**||**0**||**0**|| |Y-Polarity<br>~~a~~|**0**<br>~~a~~||**-**||**0**||**+**||**0**||**0**|| |Z-Polarity<br>~~a~~|**0**<br>~~a~~||**0**||**0**||**0**||**+**||**-**|| ## Earth’s Surface 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 14 of 31 **PART NUMBER: ± 2g / 4g / 8g / 16g Tri-axis Digital KX132-1211 Accelerometer Specifications Rev. 4.0** [<Kionix’ **24-Nov-2021** **Static X/Y/Z Output Response versus Orientation to Earth’s surface (1g):** GSEL1=0, GSEL0=1 (±4g) |**Position**<br>~~GG~~|**1**<br>~~GG~~|**1**<br>~~GG~~|**2**<br>~~GG~~|**2**<br>~~GG~~|**3**<br>~~GG~~|**3**<br>~~GG~~|**4**<br>~~GG~~|**4**<br>~~GG~~|**5**<br>~~GG~~|**5**<br>~~GG~~|**6**<br>~~GG~~|**6**<br>~~GG~~| |---|---|---|---|---|---|---|---|---|---|---|---|---| |Diagram<br>~~ps~~<br>~~|~~|~~tT~~||||||||Top<br>Bottom||Bottom<br>Top|| |Resolution<br>(bits)<br>~~ps~~<br>~~|~~<br>~~HR~~|16<br>~~tT~~<br>~~ee~~|8<br>~~tT~~<br>~~ee~~|16<br>~~Ge~~|8<br>~~GG~~|16<br>~~GG~~|8|16<br>~~GG~~|8<br>~~GG~~|16<br>~~GG~~|8<br>~~GO~~|16<br>~~GO~~|8| |X (counts)<br>~~ps~~<br>~~|~~<br>~~HR~~<br>~~HR~~|+8192<br>~~tT~~<br>~~ee~~<br>~~ee~~|+32<br>~~tT~~<br>~~ee~~<br>~~ee~~|0<br>~~Ge~~<br>~~Ge~~|0<br>~~GG~~<br>~~GG~~|-8192<br>~~GG~~<br>~~GG~~|-32|0<br>~~GG~~<br>~~GG~~|0<br>~~GG~~<br>~~GG~~|0<br>~~GG~~<br>~~GG~~|0<br>~~GO~~<br>~~GO~~|0<br>~~GO~~<br>~~GO~~|0| |Y(counts)<br>~~HR~~<br>~~HR~~<br>~~PR~~|0<br>~~ee~~<br>~~ee~~<br>~~eG~~|0<br>~~ee~~<br>~~ee~~<br>~~eG~~|-8192<br>~~Ge ~~<br>~~Ge~~<br>~~eG~~|-32<br> ~~GG~~<br>~~GG~~<br>~~GG~~|0<br>~~GG~~<br>~~GG~~<br>~~GG~~|0|+8192<br>~~GG~~<br>~~GG~~<br>~~GG~~|+32<br>~~GG~~<br>~~GG~~<br>~~GG~~|0<br>~~GG~~<br>~~GG~~<br>~~GG~~|0<br>~~GO~~<br>~~GO~~|0<br>~~GO~~<br>~~GO~~|0| |Z(counts)<br>~~HR~~<br>~~PR~~|0<br>~~ee~~<br>~~eG~~|0<br>~~ee~~<br>~~eG~~|0<br>~~Ge ~~<br>~~eG~~|0<br> ~~GG~~<br>~~GG~~|0<br>~~GG~~<br>~~GG~~|0|0<br>~~GG~~<br>~~GG~~|0<br>~~GG~~<br>~~GG~~|+8192<br>~~GG~~<br>~~GG~~|+32<br>~~GO~~|-8192<br>~~GO~~|-32| |~~PR~~<br>~~GG~~<br>~~a~~|~~eG~~<br>~~GG~~<br>||~~eG~~<br>~~GG~~<br>~~GG~~<br>||~~GG~~<br>~~GG~~<br>||~~GG~~<br>~~GG~~<br>~~**G**O~~<br>||~~GG~~<br>~~GG~~<br>~~O~~<br>||~~GG~~|| |X-Polarity<br>~~a ~~<br>~~a~~|**+**<br> ~~GG~~<br>||**0**<br>~~GG~~<br>||**-**<br>~~GG~~<br>||**0**<br>~~GG~~<br>~~**G**O~~<br>~~GO~~||**0**<br>~~GG~~<br>~~O~~<br>~~GO~~||**0**<br>~~GG~~|| |Y-Polarity<br>~~a ~~|**0**<br> ~~G~~||**-**<br>~~G~~||**0**<br>~~G~~||**+**<br>~~**G**O~~<br>~~GGO~~||**0**<br>~~O~~<br>~~GO~~||**0**|| |Z-Polarity<br><br>~~CG~~|**0**<br><br>~~CG~~||**0**<br><br>~~CG~~||**0**<br><br>~~CG~~||**0**<br>~~GO~~<br>~~CG~~||**+**<br>~~GO~~<br>~~CG~~||**-**<br>~~CG~~|| Earth’s Surface **Static X/Y/Z Output Response versus Orientation to Earth’s surface (1g):** GSEL1=1, GSEL0=0 (±8g) |**Position**|**1**|**1**|**2**|**2**|**3**|**3**|**4**|**4**|**5**|**5**|**6**|**6**| |---|---|---|---|---|---|---|---|---|---|---|---|---| |Diagram<br>~~ee~~<br>~~DR~~|~~eee~~||~~eee~~||~~eee~~||~~eee~~<br>~~eee~~||Top<br>Bottom<br>~~eee~~<br>~~eeeeee~~||Bottom<br>Top<br>~~eee~~<br>~~eee~~|| |Resolution<br>(bits)<br>~~ee~~<br>~~DR~~|16<br>~~eee~~|8<br>~~eee~~|16<br>~~eee~~|8<br>~~eee~~|16<br>~~eee~~|8<br>~~eee~~|16<br>~~eee~~<br>~~eee~~|8<br>~~eee~~<br>~~eee~~|16<br>~~eee~~<br>~~eee~~|8<br>~~eee~~<br>~~eee~~|16<br>~~eee~~<br>~~eee~~|8<br>~~eee~~<br>~~eee~~| |X (counts)<br>~~ee~~<br>~~DR~~<br>~~DR~~|+4096<br>~~eee~~<br>~~Gd~~|+16<br>~~eee~~<br>~~Gd~~|+16<br>0<br>~~eee~~|0<br>~~eee~~<br>~~GG~~|-4096<br>~~eee~~<br>~~GG~~|-16<br>~~eee~~<br>~~GG~~|0<br>~~eee~~<br>~~eee~~<br>~~GG~~|0<br>~~eee~~<br>~~eee~~<br>~~GG~~|0<br>~~eee~~<br>~~eee~~<br>~~GO~~|0<br>~~eee~~<br>~~eee~~<br>~~GO~~|0<br>~~eee~~<br>~~eee~~|0<br>~~eee~~<br>~~eee~~| |Y(counts)<br>~~DR~~<br>~~DR~~<br>~~DR~~|0<br>~~Gd~~<br>~~Gd~~|0<br>~~Gd~~<br>~~Gd~~|-4096|-16<br>~~GG~~<br>~~GG~~|0<br>~~GG~~<br>~~GG~~|0<br>~~GG~~<br>~~GG~~|+4096<br>~~eee~~<br>~~GG~~<br>~~GG~~|+16<br>~~eee~~<br>~~GG~~<br>~~GG~~|+16<br>0<br>~~eee ~~<br>~~GO~~<br>~~GO~~|0<br> ~~eee~~<br>~~GO~~<br>~~GO~~|0<br>~~eee~~|0<br>~~eee~~| |Z(counts)<br>~~DR~~<br>~~DR~~|0<br>~~Gd~~<br>~~Gd~~<br>~~Gd~~|0<br>~~Gd~~<br>~~Gd~~<br>~~Gd~~|0|0<br>~~GG~~<br>~~GG~~<br>~~OG~~|0<br>~~GG ~~<br>~~GG~~<br>~~OG~~|0<br> ~~GG~~<br>~~GG~~<br>~~GG~~|0<br>~~GG~~<br>~~GG~~<br>~~GG~~|0<br>~~GG~~<br>~~GG~~<br>~~GG~~|+4096<br>~~GO~~<br>~~GO~~<br>~~CO~~|+16<br>~~GO~~<br>~~GO~~<br>~~CO~~|-4096|-16| |~~DR~~<br>~~a~~|~~Gd~~<br>~~ee~~||~~GG~~<br>~~ee~~||~~GG GG~~<br>~~GG~~||~~GG~~<br>~~GG~~||~~GO~~|||| |X-Polarity<br>~~a ~~|**+**<br> ~~GG~~||**0**<br>~~GG~~||**-**<br>~~GG~~||**0**<br>~~GG~~||**0**<br>~~GG~~||**0**<br>~~GG~~|| |Y-Polarity<br>~~a ~~|**0**<br> ~~GG~~||**-**<br>~~GG~~||**0**<br>~~GG~~||**+**<br>~~GG~~||**0**<br>~~GG~~||**0**<br>~~GG~~|| |Z-Polarity<br>~~Sn~~|**0**<br>~~Sn~~||**0**<br>~~Sn~~||**0**||**0**||**+**||**-**|| Earth’s Surface 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 15 of 31 **PART NUMBER: ± 2g / 4g / 8g / 16g Tri-axis Digital KX132-1211 Accelerometer Specifications Rev. 4.0** 6Kionix’ **24-Nov-2021** **Static X/Y/Z Output Response versus Orientation to Earth’s surface (1g):** GSEL1=1, GSEL0=1 (±16g) **Position 1 2 3 4 5 6** Top Bottom Diagram Bottom Top ~~I~~ Resolution ~~he a~~ 16 8 16 8 16 8 16 8 16 8 16 8 (bits) ~~Pota~~ X (counts) ~~a~~ +2048 ~~a~~ +8 0 0 -2048 -8 0 0 0 0 0 0 ~~a~~ Y (counts) ~~a~~ 0 ~~a~~ 0 -2048 -8 0 0 +2048 +8 0 0 0 0 ~~aa~~ Z (counts) 0 0 0 0 0 0 0 0 +2048 +8 -2048 -8 ~~aa aa~~ X-Polarity **+ 0 - 0 0 0** ~~a~~ Y-Polarity ~~a~~ **0 - 0 + 0 0** Z-Polarity **0 0 0 0 + -** (1g) ~~aa~~ Earth’s Surface 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 16 of 31 |||**PART NUMBER:**| |---|---|---| |**± 2g / 4g / 8g / 16g Tri-axis Digital**|**± 2g / 4g / 8g / 16g Tri-axis Digital**|**KX132-1211**| ||**Accelerometer Specifications**|**Rev. 4.0**| |||**24-Nov-2021**| ## **Digital Interface** The Kionix KX132-1211 digital accelerometer can communicate via the I[2] C and SPI digital serial interface protocols. This allows for easy system integration by eliminating analog-to-digital converter requirements and by providing direct communication with system micro-controllers. Note that if the KX132-1211 is accessed with incomplete I[2] C protocol such as communication without the Stop Condition before SPI communication, it would cause a miss-behavior. For more detail information, please refer the “KX132-1211-Technical-Reference-Manual”. The serial interface terms and descriptions as indicated in Table 5 below will be observed throughout this document. |**Term**<br>**Description**<br>Transmitter<br>The device that transmits data to the bus.<br>Receiver<br>The device that receives data from the bus.<br>Master<br>The device that initiates a transfer, generates clock signals, and terminates a transfer.<br>Slave<br>The device addressed by the Master.<br>~~——<§#$2“~~|| |---|---| |**Table 5:**Serial Interface Terminologies|| |**I2C Serial Interface**|| |As previously mentioned, the KX132-1211 can communicate on an I2C bus. I2C is primarily used for synchronous serial|| |communication between a Master device and one or more Slave devices. The Master, typically a micro controller, provides|| |the serial clock signal and addresses Slave devices on the bus. The KX132-1211 always operates as a Slave device during|| |standard Master-Slave I2C operation.|| I[2] C is a two-wire serial interface that contains a Serial Clock (SCL) line and a Serial Data (SDA) line. SCL is a serial clock that is provided by the Master. SDA is a bi-directional line used to transmit and receive data to and from the interface. Data is transmitted MSB (Most Significant Bit) first in 8-bit per byte format, and the number of bytes transmitted per transfer is unlimited. The I[2] C bus is considered free when both lines are HIGH. The I[2] C interface is compliant with high-speed mode, fast mode and standard mode I[2] C protocols. 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 17 of 31 **==> picture [500 x 66] intentionally omitted <==** **----- Start of picture text -----**<br> PART NUMBER:<br>± 2g / 4g / 8g / 16g Tri-axis Digital KX132-1211<br>Accelerometer Specifications Rev. 4.0<br>[<Kionix’ 24-Nov-2021<br>**----- End of picture text -----**<br> ## **I[2] C Operation** Transactions on the I[2] C bus begin after the Master transmits a start condition (S), which is defined as a HIGH-to-LOW transition on the data line while the SCL line is held HIGH. The bus is considered busy after this condition. The next byte of data transmitted after the start condition contains the Slave Address (SAD) in the seven MSBs (Most Significant Bits), and the LSB (Least Significant Bit) tells whether the Master will be receiving data ‘1’ from the Slave or transmitting data ‘0’ to the Slave. When a Slave Address is sent, each device on the bus compares the seven MSBs with its internally stored address. If they match, the device considers itself addressed by the Master. The KX132-1211 Slave Address is comprised of a user programmable part, a factory programmable part, and a fixed part, which allows for connection of multiple accelerometers to the same I[2] C bus. The Slave Address associated with the KX132-1211 is 00111YX, where the user programmable bit X, is determined by the assignment of ADDR (pin 1) to GND or IO_VDD. Also, the factory programmable bit Y is set at the factory. **For KX132-1211, the factory programmable bit Y is fixed to 1** (contact your Kionix sales representative for list of available devices). Table 6 lists possible I[2] C addresses for KX132-1211. As a result, up to four accelerometers can be implemented on a shared I[2] C bus as shown in Figure 3 (e.g. two KX132-1211 accelerometers and two other accelerometers with factory programmable bit Y set to **0** ). |~~|~~<br>~~a~~|~~|~~<br>~~a~~|~~|~~<br>~~a~~|~~|~~<br>~~a~~|~~|~~<br>~~a~~|~~|~~<br>~~a~~|~~|~~<br>~~a~~|~~|~~<br>~~a~~|~~|~~<br>~~a~~|**Y**<br>~~|~~|**X**|| |---|---|---|---|---|---|---|---|---|---|---|---| |**Description**<br>~~a~~|**ADDR**<br>**pin**<br>~~a~~|**7-bit**<br>**Address**|**Address**|**<7>**|**<6>**<br>~~GD~~|**<5>**<br>~~GD~~|**<4>**<br>~~(GO~~|**<3>**<br>~~|~~<br>~~(GO~~|**<2>**<br>~~|~~|**<1>**|**<0>**| |I2C Wr<br>~~a~~<br>~~DG~~|GND<br>~~a~~<br>~~DG~~|0x1E<br>~~DG~~|0x3C<br>~~DG~~|0<br>~~DG~~|0<br>~~DG~~<br>~~GD~~<br>~~GD~~|1<br>~~DG~~<br>~~GD~~<br>~~GD~~|1<br>~~DG~~<br>~~(GO~~<br>~~(GO~~|1<br>~~|~~<br>~~DG~~<br>~~(GO~~<br>~~(GO~~|1<br>~~|~~<br>~~DG~~|0<br>~~DG~~|0<br>~~DG~~| |I2C Rd<br>~~DG~~<br>~~DG~~|GND<br>~~DG~~<br>~~DG~~|0x1E<br>~~DG~~<br>~~DG~~|0x3D<br>~~DG~~<br>~~DG~~|0<br>~~DG~~<br>~~DG~~|0<br>~~DG~~<br>~~GD~~<br>~~DG~~<br>~~GD~~<br>~~GD~~|1<br>~~DG~~<br>~~GD~~<br>~~DG~~<br>~~GD~~<br>~~GD~~|1<br>~~DG~~<br>~~(GO~~<br>~~DG~~<br>~~(GO~~<br>~~(GO~~|1<br>~~DG~~<br>~~(GO~~<br>~~DG~~<br>~~(GO~~<br>~~(GO~~|1<br>~~DG~~<br>~~DG~~|0<br>~~DG~~<br>~~DG~~|1<br>~~DG~~<br>~~DG~~| |I2C Wr<br>~~DG~~<br>~~DG~~|IO_VDD<br>~~DG~~<br>~~DG~~|0x1F<br>~~DG~~<br>~~DG~~|0x3E<br>~~DG~~<br>~~DG~~|0<br>~~DG~~<br>~~DG~~|0<br>~~DG~~<br>~~GD~~<br>~~DG~~<br>~~GD~~|1<br>~~DG~~<br>~~GD~~<br>~~DG~~<br>~~GD~~|1<br>~~DG~~<br>~~(GO~~<br>~~DG~~<br>~~(GO~~|1<br>~~DG~~<br>~~(GO~~<br>~~DG~~<br>~~(GO~~|1<br>~~DG~~<br>~~DG~~|1<br>~~DG~~<br>~~DG~~|0<br>~~DG~~<br>~~DG~~| |I2C Rd<br>~~DG~~<br>~~po~~|IO_VDD<br>~~DG~~<br>~~po~~|0x1F<br>~~DG~~<br>~~po~~|0x3F<br>~~DG~~<br>~~po~~|0<br>~~DG~~<br>~~po~~|0<br>~~DG~~<br>~~GD~~<br>~~po~~|1<br>~~DG~~<br>~~GD~~<br>~~po~~|1<br>~~DG~~<br>~~(GO~~<br>~~po~~|1<br>~~DG~~<br>~~(GO~~<br>~~po~~|1<br>~~DG~~<br>~~po~~|1<br>~~DG~~<br>~~po~~|1<br>~~DG~~<br>~~po~~| **Table 6:** I[2] C Slave Addresses for KX132-1211 It is mandatory that receiving devices acknowledge (ACK) each transaction. Therefore, the transmitter must release the SDA line during this ACK pulse. The receiver then pulls the data line LOW so that it remains stable LOW during the HIGH period of the ACK clock pulse. A receiver that has been addressed, whether it is Master or Slave, is obliged to generate an ACK after each byte of data has been received. To conclude a transaction, the Master must transmit a stop condition (P) by transitioning the SDA line from LOW to HIGH while SCL is HIGH. The I[2] C bus is now free. Note that if the KX132-1211 is accessed through I[2] C protocol before the startup is finished a NACK signal is sent. 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 18 of 31 **==> picture [361 x 66] intentionally omitted <==** **----- Start of picture text -----**<br> PART NUMBER:<br>± 2g / 4g / 8g / 16g Tri-axis Digital KX132-1211<br>Accelerometer Specifications Rev. 4.0<br>24-Nov-2021<br>**----- End of picture text -----**<br> |**I2C Device**|**Part**<br>**Number**|**ADDR**<br>**Pin**|**Slave**<br>**Address**|**Bit Y (Bit 1 in 7-bit address)**| |---|---|---|---|---| |1|KX132-1211|GND|0x1E|FactorySet to 1| |2|KX132-1211|IO_VDD|0x1F|FactorySet to 1| |3|*KXMMM|GND|0x1C|FactorySet to 0| |4|*KXMMM|IO_VDD|0x1D|FactorySet to 0| - KXMMM – contact Kionix sales representative for list of compatible devices **Figure 3:** Multiple KX132-1211 Accelerometers on a Shared I[2] C Bus 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 19 of 31 **PART NUMBER: ± 2g / 4g / 8g / 16g Tri-axis Digital KX132-1211 Accelerometer Specifications Rev. 4.0** 6Kionix’ **24-Nov-2021** ## **Writing to an 8-bit Register** Upon power up, the Master must write to the KX132’s control registers to set its operational mode. Therefore, when writing to a control register on the I[2] C bus, as shown Sequence 1 on the following page, the following protocol must be observed: After a start condition, SAD+W transmission, and the KX132-1211 ACK has been returned, an 8-bit Register Address (RA) command is transmitted by the Master. This command is telling the KX132-1211 to which 8-bit register the Master will be writing the data. Since this is I[2] C mode, the LSB of the RA command should always be zero (0). The KX132-1211 acknowledges the RA and the Master transmits the data to be stored in the 8-bit register. The KX132-1211 acknowledges that it has received the data and the Master transmits a stop condition (P) to end the data transfer. The data sent to the KX132-1211 is now stored in the appropriate register. The KX132-1211 automatically increments the received RA commands and, therefore, multiple bytes of data can be written to sequential registers after each Slave ACK as shown in Sequence 2 on the following page. Note** If a STOP condition is sent on the least significant bit of write data or the following master acknowledge cycle, the last write operation is not guaranteed and it may alter the content of the affected registers ## **Reading from an 8-bit Register** When reading data from a KX132-1211 8-bit register on the I[2] C bus, as shown in Sequence 3 on the next page, the following protocol must be observed: The Master first transmits a start condition (S) and the appropriate Slave Address (SAD) with the LSB set at ‘0’ to write. The KX132-1211 acknowledges and the Master transmits the 8-bit RA of the register it wants to read. The KX132-1211 again acknowledges, and the Master transmits a repeated start condition (Sr). After the repeated start condition, the Master addresses the KX132-1211 with a ‘1’ in the LSB (SAD+R) to read from the previously selected register. The Slave then acknowledges and transmits the data from the requested register. The Master does not acknowledge (NACK) it received the transmitted data, but transmits a stop condition to end the data transfer. Note that the KX132-1211 automatically increments through its sequential registers, allowing data to be read from multiple registers following a single SAD+R command as shown below in Sequence 4 on the following page. Reading data from a buffer read register is a special case because if register address (RA) is set to buffer read register (BUF_READ) in Sequence 4, the register auto-increment feature is automatically disabled. Instead, the Read Pointer will increment to the next data in the buffer, thus allowing reading multiple bytes of data from the buffer using a single SAD+R command. Note** Accelerometer’s output data should be read in a single transaction using the auto-increment feature to prevent output data from being updated prior to intended completion of the read transaction. 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 20 of 31 **PART NUMBER: ± 2g / 4g / 8g / 16g Tri-axis Digital KX132-1211 Accelerometer Specifications Rev. 4.0 24-Nov-2021** ~~KSewf |~~ **Data Transfer Sequences** The following information illustrates the variety of data transfers that can occur on the I[2] C bus and how the Master and Slave interact during these transfers. Table 7 defines the I[2] C terms used during the data transfers. |**Term**|**Definition**| |---|---| |S|Start Condition| |Sr|Repeated Start Condition| |SAD|Slave Address| |W|Write Bit| |R|Read Bit| |ACK|Acknowledge| |NACK|Not Acknowledge| |RA|Register Address| |Data|Transmitted/Received Data| |P|Stop Condition| **Table 7:** I[2] C Terms **Sequence 1:** The Master is writing one byte to the Slave |Master<br>S<br>SAD + W<br>RA<br>Slave<br>ACK<br>ACK<br>~~—a~~|DATA|ACK|P|||||||| |---|---|---|---|---|---|---|---|---|---|---| |**Sequence 2:**The Master is writing multiple bytes to the Slave|The Master is writing multiple bytes to the Slave|||||||||| |Master<br>S<br>SAD + W<br>RA<br>Slave<br>ACK<br>ACK<br>~~—ee~~|DATA|ACK|DATA||ACK||P|||| |**Sequence 3:**The Master is receiving one byte of data from the Slave||||||||||| |Master<br>S<br>SAD + W<br>RA<br>Slave<br>ACK<br>ACK<br>~~——~~|Sr<br>SAD + R|ACK|DATA||NACK||NACK||P|| **Sequence 4:** The Master is receiving multiple bytes of data from the Slave Master S SAD + W RA Sr SAD + R ACK NACK P ~~——ee~~ Slave ~~ee~~ ACK ACK ACK DATA DATA 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 21 of 31 **PART NUMBER: ± 2g / 4g / 8g / 16g Tri-axis Digital KX132-1211 Accelerometer Specifications Rev. 4.0 24-Nov-2021** ~~(~~ **HS-mode** To enter the 3.4MHz high speed mode of communication, the device must receive the following sequence of conditions from the master: a Start condition followed by a Master code (00001XXX) and a Master Non-acknowledge. Once recognized, the device switches to HS-mode communication. Read/write data transfers then proceed as described in the sequences above. Devices return to the FS-mode after a STOP occurrence on the bus. ## **Sequence 5:** HS-mode data transfer of the Master writing multiple bytes to the Slave |Speed<br>~~SS~~|FS-mode<br>~~SS~~|FS-mode<br>~~SS~~|FS-mode<br>~~SS~~|HS-mode|HS-mode|HS-mode|HS-mode|HS-mode|HS-mode|HS-mode|HS-mode|FS-mode| |---|---|---|---|---|---|---|---|---|---|---|---|---| |Master<br>~~SS~~|S<br>~~SS~~|M-code<br>~~SS~~|NACK|NACK<br>Sr|SAD + W||RA||DATA||P|| |Slave<br>~~SS~~|~~SS~~|~~SS~~||||ACK||ACK||ACK||| ## **Sequence 6:** HS-mode data transfer of the Master receiving multiple bytes of data from the Slave Speed FS-mode HS-mode Master S M-code NACK Sr SAD + W RA ~~es~~ Slave ACK ACK Speed HS-mode FS-mode Master Sr SAD + R NACK P ~~a~~ Slave ACK DATA ACK DATA (n-1) bytes + ack. 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 22 of 31 **PART NUMBER: ± 2g / 4g / 8g / 16g Tri-axis Digital KX132-1211 Accelerometer Specifications Rev. 4.0** Kionix’ **24-Nov-2021** ~~Thon} |~~ **I[2] C Timing Diagram** t0 t2 t3 t4 t6 t1 t5 t7 — a — SCL SDA bit7 bit6 bit0 addr_ack b7 bit7 bit0 addr_nack S Sr t11 P t8 t9 t10 H+ U “IF ~~a~~ **Number Description MIN MAX Units** ~~a~~ t0 SDA LOW to SCL LOW transition (Start event) 50 - ns ~~a~~ t1 SDA LOW to first SCL rising edge 100 - ns ~~a~~ t2 SCL pulse width: HIGH 100 - ns ~~a~~ t3 SCL pulse width: LOW 100 - ns ~~a~~ t4 SCL HIGH before SDA falling edge (Start Repeated) 50 - ns ~~a~~ t5 SCL pulse width: HIGH during a S/Sr/P event 100 - ns ~~a~~ t6 SCL HIGH before SDA rising edge (Stop) 50 - ns ~~a~~ t7 SDA pulse width: HIGH 25 - ns t8 SDA valid to SCL rising edge 50 - ns ~~ee~~ t9 SCL rising edge to SDA invalid 50 - ns ~~ee~~ t10 SCL falling edge to SDA valid (when slave is transmitting) - 100 ns ~~ee~~ t11 SCL falling edge to SDA invalid (when slave is transmitting) 0 - ns Note Recommended I[2] C CLK 2.5 - µs ~~ee~~[[2]] **Table 8:** I[[2]] C Timing (Fast Mode) 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 23 of 31 **==> picture [361 x 66] intentionally omitted <==** **----- Start of picture text -----**<br> PART NUMBER:<br>± 2g / 4g / 8g / 16g Tri-axis Digital KX132-1211<br>Accelerometer Specifications Rev. 4.0<br>24-Nov-2021<br>**----- End of picture text -----**<br> ## **SPI Communications** ## **4-Wire SPI Interface** The KX132-1211 also utilizes an integrated 4-Wire Serial Peripheral Interface (SPI) for digital communication. The SPI interface is primarily used for synchronous serial communication between one Master device and one or more Slave devices. The Master, typically a micro controller, provides the SPI clock signal (SCLK) and determines the state of Chip Select (nCS). The KX132-1211 always operates as a Slave device during standard Master-Slave SPI operation. 4-wire SPI is a synchronous serial interface that uses two control and two data lines. With respect to the Master, the Serial Clock output (SCLK), the Data Output (SDI or MOSI) and the Data Input (SDO or MISO) are shared among the Slave devices. The Master generates an independent Chip Select (nCS) for each Slave device that goes LOW at the start of transmission and goes back HIGH at the end. The Slave Data Output (SDO) line, remains in a high-impedance (hi-z) state when the device is not selected, so it does not interfere with any active devices. This allows multiple Slave devices to share a master SPI port as shown in Figure 4 below. NOTE: if the MOSI line has the code 0x3C, 0x3D, 0x3D or 0x3F, it might cause a misbehavior in the KX132-1211. Please toggle nCS of the KX132-1211 L/H to recover the misbehavior condition. **Figure 4.** 4-wire SPI Connections 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 24 of 31 **==> picture [457 x 238] intentionally omitted <==** **----- Start of picture text -----**<br> ± 2g / 4g / 8g / 16g Tri-axis Digital<br>Accelerometer Specifications<br>« Kionix’<br>Tene)<br>4-Wire SPI Timing Diagram<br>t3 t1 t2 t4<br>nCS<br>qT t8<br>SCLK<br>SDI bit 7 bit 6 bit 1 bit 0 bit 7 bit 6 bit 1 bit 0<br>SDO bit 7 bit 6 bit 1 bit 0<br>t5<br>TE t6 t7 Ir<br>**----- End of picture text -----**<br> **PART NUMBER: KX132-1211** **Rev. 4.0 24-Nov-2021** |**Number**|**Description**|**MIN**|**MAX**|**Units**| |---|---|---|---|---| |t1|CLK pulse width: HIGH|45||ns| |t2|CLK pulse width: LOW|45||ns| |t3|nCS LOW to first CLK rising edge|20||ns| |t4|nCS LOW after the final CLK rising edge to nCS HIGH|20||ns| |t5|SDI valid to CLK rising edge|10||ns| |t6|CLK rising edge to SDI invalid|10||ns| |t7|CLK falling edge to SDO valid||35|ns| |t8|nCS LOW to first CLK falling edge|10||ns| **Table 9:** 4-Wire SPI Timing ## Notes 1. t7 is only present during reads. 2. Timings are for VDD of 1.8V to 3.6V with 1k pull-up resistor and maximum 20pF load capacitor on SDO. 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 25 of 31 **==> picture [361 x 66] intentionally omitted <==** **----- Start of picture text -----**<br> PART NUMBER:<br>± 2g / 4g / 8g / 16g Tri-axis Digital KX132-1211<br>Accelerometer Specifications Rev. 4.0<br>24-Nov-2021<br>**----- End of picture text -----**<br> ## **4-Wire Read and Write Registers** The registers embedded in the KX132-1211 accelerometer have 8-bit addresses. Upon power up, the Master must write to the accelerometer’s control registers to set its operational mode. On the falling edge of nCS, a 2-byte command is written to the appropriate control register. The first byte initiates the write to the appropriate register, and is followed by the userdefined, data byte. The MSB (Most Significant Bit) of the register address byte will indicate “0” when writing to the register and “1” when reading from the register. This operation occurs over 16 clock cycles. All commands are sent MSB first. **The host must return nCS HIGH for at least one clock cycle before the next data request.** However, when data is being read from a buffer read register (BUF_READ), the nCS signal can remain LOW until the buffer is read. Figure 5 below shows the timing diagram for carrying out an 8-bit register write operation. **==> picture [330 x 66] intentionally omitted <==** **Figure 5:** Timing Diagram for 8-Bit Register Write Operation In order to read an 8-bit register, an 8-bit register address must be written to the accelerometer to initiate the read. The MSB of this register address byte will indicate “0” when writing to the register and “1” when reading from the register. Upon receiving the address, the accelerometer returns the 8-bit data stored in the addressed register. This operation also occurs over 16 clock cycles. All returned data is sent MSB first, and the host must return nCS HIGH for at least one clock cycle before the next data request. Figure 6 shows the timing diagram for an 8-bit register read operation. Read Address First 8 bits Second 8 bits Last 8 bits SCLK SDI A7 A6 A5 A4 A3 A2 A1 A0 SDO ~~HI-Z~~ D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D3 D2 D1 D0 ~~HI-Z Ee~~ CS **Figure 6:** Timing Diagram for 8-Bit Register Read Operation 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 26 of 31 **==> picture [361 x 66] intentionally omitted <==** **----- Start of picture text -----**<br> PART NUMBER:<br>± 2g / 4g / 8g / 16g Tri-axis Digital KX132-1211<br>Accelerometer Specifications Rev. 4.0<br>24-Nov-2021<br>**----- End of picture text -----**<br> ## **3-Wire SPI Interface** The KX132-1211 also utilizes an integrated 3-Wire Serial Peripheral Interface (SPI) for digital communication. 3-wire SPI is a synchronous serial interface that uses two control lines and one data line. With respect to the Master, the Serial Clock output (SCLK), the Data Output/Input (SDI) are shared among the Slave devices. The Master generates an independent Chip Select (nCS) for each Slave device that goes LOW at the start of transmission and goes back HIGH at the end. This allows multiple Slave devices to share a master SPI port as shown in Figure 7 below. NOTE: if the MOSI line has the code 0x3C, 0x3D, 0x3D or 0x3F, it might cause a misbehavior in the KX132-1211. Please toggle nCS of the KX132-1211 L/H to recover the misbehavior condition. **Figure 7:** KX132-1211 3-wire SPI Connections 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 27 of 31 **PART NUMBER: ± 2g / 4g / 8g / 16g Tri-axis Digital KX132-1211 Accelerometer Specifications Rev. 4.0** « Kionix’ **24-Nov-2021** ~~Then}~~ **3-Wire SPI Timing Diagram** t3 t1 t2 t4 nCS ~~ee~~ t9 ~~ee ee ee~~ ee SCLK ~~a~~ O ~~e Oe Oe~~ SDI bit 7 bit 6 bit 1 bit 0 bit 7 bit 1 bit 0 ~~Se~~ t5 t6 ~~ee ae ee~~ t7 ~~ee~~ t8 ~~ae ae ae es~~ **Number** ~~ns~~ **Description MIN MAX Units** ~~es~~ t1 ~~nr~~ CLK pulse width: HIGH 45 - ns ~~es~~ t2 ~~nr~~ CLK pulse width: LOW 45 - ns ~~es~~ t3 ~~nr~~ nCS LOW to first CLK rising edge 20 - ns ~~es~~ t4 ~~rs~~ nCS LOW after the final CLK falling edge to nCS HIGH 20 - ns ~~es~~ t5 ~~nD~~ SDI valid to CLK rising edge 10 - ns ~~es~~ t6 ~~nD~~ CLK rising edge to SDI input invalid 10 - ns ~~es~~ t7 ~~nD~~ CLK extra clock cycle rising edge to SDI output becomes - - ns ~~es~~ t8 CLK falling edge to SDI output becomes valid - 35 ns ~~es~~ t9 nCS LOW to first CLK falling edge 10 ns **Table 10:** 3-Wire SPI Timing **PART NUMBER: KX132-1211** **Rev. 4.0 24-Nov-2021** ## Notes 1. t7 and t8 are only present during reads 2. Timings are for VDD of 1.8V to 3.6V with 1k pull-up resistor and maximum 20pF load capacitor on SDI. 3. The SDO/ADDR pin is configured in a high-impedance input-state, and must be externally tied to GND or IO_VDD 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 28 of 31 **==> picture [119 x 52] intentionally omitted <==** **----- Start of picture text -----**<br> 6Kionix’<br>**----- End of picture text -----**<br> **==> picture [361 x 66] intentionally omitted <==** **----- Start of picture text -----**<br> PART NUMBER:<br>± 2g / 4g / 8g / 16g Tri-axis Digital KX132-1211<br>Accelerometer Specifications Rev. 4.0<br>24-Nov-2021<br>**----- End of picture text -----**<br> ## **3-Wire Read and Write Registers** The registers embedded in the KX132-1211 accelerometer have 8-bit addresses. Upon power up, the Master must write to the accelerometer’s control registers to set its operational mode. On the falling edge of nCS, a 2-byte command is written to the appropriate control register. The first byte initiates the write to the appropriate register, and is followed by the userdefined, data byte. The MSB (Most Significant Bit) of the register address byte will indicate “0” when writing to the register and “1” when reading from the register. A read operation and a write operation occurs over 16 clock cycles. All commands are sent MSB first. **The host must return nCS HIGH for at least one clock cycle before the next data request** . However, when data is being read from a buffer read register (BUF_READ), the nCS signal can remain LOW until the buffer is read. Figure 8 below shows the timing diagram for carrying out an 8-bit register write operation. NOTE** If a STOP condition is sent on the least significant bit of write data or the following master acknowledge cycle, the last write operation is not guaranteed and it would cause unexpected register write. **==> picture [306 x 58] intentionally omitted <==** **----- Start of picture text -----**<br> SCLK<br>— P U UU UU UU U UU UU UU U LE<br>SDI A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0<br>DL [OOOOQOOOOCOOOOOOODOXX] (MSB) (MSB)<br>CS a<br>**----- End of picture text -----**<br> **Figure 8:** Timing Diagram for 8-Bit Register Write Operation In order to read an 8-bit register, an 8-bit register address must be written to the accelerometer to initiate the read. The MSB of this register address byte will indicate “0” when writing to the register and “1” when reading from the register. Upon receiving the address, the accelerometer returns the 8-bit data stored in the addressed register. All returned data is sent MSB first, and the host must return nCS HIGH for at least one clock cycle before the next data request. Figure 9 shows the timing diagram for an 8-bit register read operation. **==> picture [292 x 54] intentionally omitted <==** **Figure 9:** Timing Diagram for 8-Bit Register Read Operation 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 29 of 31 |||**PART NUMBER:**| |---|---|---| |**± 2g / 4g / 8g / 16g Tri-axis Digital**|**± 2g / 4g / 8g / 16g Tri-axis Digital**|**KX132-1211**| ||**Accelerometer Specifications**|**Rev. 4.0**| |||**24-Nov-2021**| ## **Revision History** |**Revision**|**Description**|**Date**| |---|---|---| |1.0|Production Release.|31-Jul-2019| |2.0|Added SPI communication maximum rate and I2C communication typical rate in<br>Electrical Specifications table.<br>Updated Note 1 (Sensitivity) under Mechanical Specifications table to indicate that<br>tolerance specified at ±1g stimulus.<br>Revised Noise measurement test condition description.<br>Removed a note under Mechanical Specification table to change the value of STPOL<br>bit to perform the self-test since the POR value of the bit should be used.|06-Feb-2020| |3.0|Updated the “Digital Interface” section description to include I2C transaction without<br>stop condition on a shared bus with another SPI device.<br>Updated the “4-Wire SPI Timing Diagram” to include SCLK start-H condition.<br>Added t8 parameter in the “4-Wire SPI Timing” table.<br>Updated the “Timing Diagram for 8-Bit Register Write Operation” figure to include<br>SCLK start-H condition.<br>Updated the “Timing Diagram for 8-Bit Register Read Operation” figure to include<br>SCLK start-H condition.<br>Updated the “3-Wire SPI Timing Diagram” timing figure to include start-H condition.<br>Added t9 parameter in the “3-Wire SPI Timing” table.<br>Updated description for noise measurement conditions.(GSEL=0)|30-Nov-2020| |4.0|Removed description of SCL clock stretching in I2C Serial Interface.<br>Revised t11 description of Table 8 in I2C Timing Diagram.<br>Revised description and Figure 9 about extra clock in 3-Wire Read and Write<br>Registers.<br>Add Note of SPI communication in 3-Wire SPI Interface and 4-Wire SPI Interface.|24-Nov-2021| "Kionix" is a registered trademark of Kionix, Inc. Products described herein are protected by patents issued or pending. No license is granted by implication or otherwise under any patent or other rights of Kionix. The information contained herein is believed to be accurate and reliable but is not guaranteed. Kionix does not assume responsibility for its use or distribution. Kionix also reserves the right to change product specifications or discontinue this product at any time without prior notice. This publication supersedes and replaces all information previously supplied. 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 30 of 31 |6Kionix’|**± 2g / 4g / 8g / 16g Tri-axis Digital**<br>**Accelerometer Specifications**|**PART NUMBER:**<br>**KX132-1211**<br>**Rev. 4.0**<br>**24-Nov-2021**| |---|---|---| ## **Appendix** The following Notice is included to guide the use of Kionix products in its application and manufacturing processes. Kionix, Inc., is a ROHM Group company. For purposes of this Notice, the name “ROHM” would also imply Kionix, Inc. 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - info@kionix.com © 2021 Kionix – All Rights Reserved 911-13564-2011301504-0.18 Page 31 of 31 ## **Notice** ## **Precaution on using ROHM Products** 1. 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Baking is required before using Products of which storage time is exceeding the recommended storage time period. ## **Precaution for Product Label** A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only. ## **Precaution for Disposition** When disposing Products please dispose them properly using an authorized industry waste company. ## **Precaution for Foreign Exchange and Foreign Trade act** Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign trade act, please consult with ROHM in case of export. ## **Precaution Regarding Intellectual Property Rights** 1. All information and data including but not limited to application example contained in this document is for reference only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. 2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the Products with other articles such as components, circuits, systems or external equipment (including software). 3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to manufacture or sell products containing the Products, subject to the terms and conditions herein. ## **Other Precaution** 1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM. 2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of ROHM. 3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the Products or this document for any military purposes, including but not limited to, the development of mass-destruction weapons. 4. The proper names of companies or products described in this document are trademarks or registered trademarks of ROHM, its affiliated companies or third parties. > **[Notice-PGA-E ]** © 2015 ROHM Co., Ltd. All rights reserved. **Rev.004** Datasheet ## **General Precaution** 1. Before you use our Products, you are requested to carefully read this document and fully understand its contents. ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any ROHM’s Products against warning, caution or note contained in this document. 2. All information contained in this document is current as of the issuing date and subject to change without any prior notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales representative. 3. The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or concerning such information. > **[Notice – WE ]** © 2015 ROHM Co., Ltd. All rights reserved. **Rev.001**
Updated at April 29, 2026
About Novapart
Novapart is a B2B electronic component broker specialising in stock shortages and cost reduction. We source hard-to-find parts and identify compliant alternatives across a catalogue of 410,000+ components from 500+ manufacturers.
Learn more →Stock Shortage Specialist
When a component is unavailable, discontinued or has an unacceptable lead time, we tap into our network of vetted European and Asian distributors to source what you need — without compromising on quality or traceability.
Request a quote →Compliant Alternatives
We identify pin-to-pin, electrically equivalent substitutes that meet the same certifications (RoHS, AEC-Q100, REACH) as your original specification — validated against datasheets, not just part numbers. Often at a lower cost.
BOM Analysis service →