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ISG0616N10NM5HSCATMA1
Dual MOSFET, Dual N Channel, 100 V, 139 A, 4000 µohm
⚠️ Reference pricing provided. In case of supply shortages, we will connect you with our trusted procurement partners to ensure your project's continuity.
- Manufacturer: INFINEON
- Product type: Dual MOSFETs
- SVHC: No SVHC (25-Jun-2025)
- No. of Pins: 10Pins
- Channel Type: Dual N Channel
- Product Range: OptiMOS 5 Series
- Qualification: -
- Transistor Case Style: WHITFN-U01
- Operating Temperature Max: 175°C
- Power Dissipation N Channel: 167W
- Power Dissipation P Channel: -
- Drain Source Voltage Vds N Channel: 100V
- Drain Source Voltage Vds P Channel: -
- Continuous Drain Current Id N Channel: 139A
- Continuous Drain Current Id P Channel: -
- Drain Source On State Resistance N Channel: 4000µohm
- Drain Source On State Resistance P Channel: -
| Delivery and price | |
|---|---|
| Units per pack | 9000 |
| Price | 1.81 € |
| Current stock | 10+ |
| Lead time | 30 days |
Datasheet
## **ISG0616N10NM5HSC** SS[Gefineon] _— **MOSFET OptiMOS[TM]** 5 Power-Transistor, 100 V PG -WHITFN-10-1 **==> picture [492 x 290] intentionally omitted <==** **----- Start of picture text -----**<br> Features 6 7<br>8<br>¢¢ SymmetricalOptimized forHalflow Bridgevoltage drives and battery powered applications tab tab 9<br>¢ Optimized for high performance SMPS<br>¢ N-channel 5 4 10<br>¢ Very low on-resistance R DS(on) 3 2 1<br>¢ Superior thermal resistance<br>* 100% avalanche tested<br>¢ Pb-free lead plating; ROHS compliant<br>* Halogen-free according to IEC61249-2-21<br>Q1 Drain<br>Product validation Q1 Gate la Pin 6-7 n *1 Q1<br>Pin 5<br>Fully qualified according to JEDEC for Industrial Applications ARDY 1 Q1 Source<br>2 Q1 Source<br>3 Q2 Drain<br>4 Q2 Drain<br>tab<br>Q2 Gate *1 Q2<br>Pin 10<br>Table 1 Key Performance Parameters ay<br>Q2 Source<br>Parameter Value Unit Pin 8-9<br>*1: Internal body diode<br>V DS 100 V<br>R DS(on),max 4.0 m Ω<br>I D 139 A<br>Q oss 68 nC<br>Q (0V..10V) 52 nC<br>**----- End of picture text -----**<br> ## **Features** |Type<br>~~/OrderingCode~~|**Package**<br>~~|~~|**Marking**<br>~~|~~|~~ReelatedLinks~~| |---|---|---|---| |ISG0616N10NM5HSC<br>~~/ Ordering Code~~|PG -WHITFN-10-1<br>~~|~~|61610N5HC<br>~~|~~|-<br>~~Reelated Links~~| Final Data Sheet 1 **OptiMOS[TM] 5�Power-Transistor,�100�V ISG0616N10NM5HSC** **==> picture [120 x 53] intentionally omitted <==** ## **Table�of�Contents** Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Final Data Sheet 2 Rev.�2.0,��2023-12-05 **OptiMOS[TM] 5�Power-Transistor,�100�V ISG0616N10NM5HSC** **==> picture [120 x 53] intentionally omitted <==** **1�����Maximum�ratings** at� _T_ A=25�°C,�unless�otherwise�specified ## **Table�2�����Maximum�ratings** |**Table2Maximumratings**||||||| |---|---|---|---|---|---|---| |**Parameter**|**Symbol**||**Values**||**Unit**|**Note/TestCondition**| |||**Min.**|**Typ.**|**Max.**||| |Continuous drain current1)|_I_D|-<br>-<br>-|-<br>-<br>-|139<br>99<br>19|A|_V_GS=10V,_T_C=25°C<br>_V_GS=10V,_T_C=100°C<br>_V_GS=10V,_T_A=25°C,_R_THJA=50°C/W2)| |Pulsed drain current3)|_I_D,pulse|-|-|556|A|_T_A=25°C| |Avalanche energy, single pulse4)|_E_AS|-|-|216|mJ|_I_D=50A,_R_GS=25Ω| |Gate source voltage|_V_GS|-20|-|20|V|-| |Power dissipation|_P_tot|-<br>-|-<br>-|167<br>3.0|W|_T_C=25°C<br>_T_A=25°C,_R_THJA=50°C/W2)| |Operatingand storage temperature|_T_j,_T_stg|-55|-|175|°C|-| ## **2�����Thermal�characteristics** ## **Table�3�����Thermal�characteristics** |**Parameter**|**Symbol**||**Values**|**Values**|**Unit**|**Note/TestCondition**| |---|---|---|---|---|---|---| |||**Min.**|**Typ.**|**Max.**||| |Thermal resistance, junction - case,<br>bottom|_R_thJC|-|0.6|0.9|°C/W|-| |Thermal resistance, junction - case,<br>top|_R_thJC|-|0.40|0.86|°C/W|-| |Thermal resistance, junction - ambient,<br>6 cm² cooling area2)|_R_thJA|-|-|50|°C/W|-| > 1) Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature as specified. For other case temperatures please refer to Diagram 2. De-rating will be required based on the actual environmental conditions. > 2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. > 3) See Diagram 3 for more detailed information > 4) See Diagram 13 for more detailed information Final Data Sheet 3 Rev.�2.0,��2023-12-05 **OptiMOS[TM] 5�Power-Transistor,�100�V ISG0616N10NM5HSC** **==> picture [120 x 53] intentionally omitted <==** ## **3�����Electrical�characteristics** at� _T_ j=25�°C,�unless�otherwise�specified ## **Table�4�����Static�characteristics** |**Parameter**|**Symbol**||**Values**|**Values**|**Unit**|**Note/TestCondition**| |---|---|---|---|---|---|---| |||**Min.**|**Typ.**|**Max.**||| |Drain-source breakdown voltage|_V_(BR)DSS|100|-|-|V|_V_GS=0V,_I_D=1mA| |Gate threshold voltage|_V_GS(th)|2.2|3.0|3.8|V|_V_DS=_V_GS,_I_D=85µA| |Zero gate voltage drain current|_I_DSS|-<br>-|0.1<br>10|1<br>100|µA|_V_DS=100V,_V_GS=0V,_T_j=25°C<br>_V_DS=100V,_V_GS=0V,_T_j=125°C| |Gate-source leakage current|_I_GSS|-|10|100|nA|_V_GS=20V,_V_DS=0V| |Drain-source on-state resistance|_R_DS(on)|-<br>-|3.4<br>4.3|4.0<br>5.5|mΩ|_V_GS=10V,_I_D=50A<br>_V_GS=6V,_I_D=25A| |Gate resistance|_R_G|-|1.1|-|Ω|-| |Transconductance1)|_g_fs|55|-|-|S||_V_DS|≥2|_I_D|_R_DS(on)max,_I_D=50A| ## **Table�5�����Dynamic�characteristics** |**Parameter**|**Symbol**||**Values**|**Values**|**Unit**|**Note/TestCondition**| |---|---|---|---|---|---|---| |||**Min.**|**Typ.**|**Max.**||| |Input capacitance|_C_iss|-|3700|4800|pF|_V_GS=0V,_V_DS=50V,_f_=1MHz| |Output capacitance1)|_C_oss|-|570|740|pF|_V_GS=0V,_V_DS=50V,_f_=1MHz| |Reverse transfer capacitance1)|Crss|-|26|46|pF|_V_GS=0V,_V_DS=50V,_f_=1MHz| |Turn-on delay time|_t_d(on)|-|16|-|ns|_V_DD=50V,_V_GS=10V,_I_D=50A,<br>_R_G,ext=1.6Ω| |Rise time|_t_r|-|10|-|ns|_V_DD=50V,_V_GS=10V,_I_D=50A,<br>_R_G,ext=1.6Ω| |Turn-off delay time|_t_d(off)|-|27|-|ns|_V_DD=50V,_V_GS=10V,_I_D=50A,<br>_R_G,ext=1.6Ω| |Fall time|_t_f|-|7.8|-|ns|_V_DD=50V,_V_GS=10V,_I_D=50A,<br>_R_G,ext=1.6Ω| ## **Table�6�����Gate�charge�characteristics[2)]** |**Table6Gatechargecharacte**|**ristics2)**|||||| |---|---|---|---|---|---|---| |**Parameter**|**Symbol**||**Values**||**Unit**|**Note/TestCondition**| |||**Min.**|**Typ.**|**Max.**||| |Gate to source charge|_Q_gs|-|17|-|nC|_V_DD=50V,_I_D=50A,_V_GS=0to10V| |Gate charge at threshold|_Q_g(th)|-|11|-|nC|_V_DD=50V,_I_D=50A,_V_GS=0to10V| |Gate to drain charge1)|_Q_gd|-|11|16|nC|_V_DD=50V,_I_D=50A,_V_GS=0to10V| |Switchingcharge|_Q_sw|-|17|-|nC|_V_DD=50V,_I_D=50A,_V_GS=0to10V| |Gate charge total1)|_Q_g|-|52|78|nC|_V_DD=50V,_I_D=50A,_V_GS=0to10V| |Gate plateau voltage|_V_plateau|-|4.6|-|V|_V_DD=50V,_I_D=50A,_V_GS=0to10V| |Gate charge total, sync. FET|_Q_g(sync)|-|45|-|nC|_V_DS=0.1V,_V_GS=0to10V| |Output charge1)|_Q_oss|-|68|88|nC|_V_DS=50V,_V_GS=0V| > 1) Defined by design. Not subject to production test. > 2) See ″ Gate charge waveforms ″ for parameter definition Final Data Sheet Rev.�2.0,��2023-12-05 4 **OptiMOS[TM] 5�Power-Transistor,�100�V ISG0616N10NM5HSC** **==> picture [120 x 53] intentionally omitted <==** ## **Table�7�����Reverse�diode** |**Table7Reversediode**||||||| |---|---|---|---|---|---|---| |**Parameter**|**Symbol**||**Values**||**Unit**|**Note/TestCondition**| |||**Min.**|**Typ.**|**Max.**||| |Diode continuous forward current|_I_S|-|-|139|A|_T_C=25°C| |Diode pulse current|_I_S,pulse|-|-|556|A|_T_C=25°C| |Diode forward voltage|_V_SD|-|0.85|1|V|_V_GS=0V,_I_F=50A,_T_j=25°C| |Reverse recoverytime|_t_rr|-|39|-|ns|_V_R=50V,_I_F=50A,d_i_F/d_t_=500A/µs| |Reverse recoverycharge|_Q_rr|-|210|-|nC|_V_R=50V,_I_F=50A,d_i_F/d_t_=500A/µs| Final Data Sheet Rev.�2.0,��2023-12-05 5 **OptiMOS[TM]** 5 Power-Transistor, 100 V **ISG0616N10NM5HSC** **==> picture [539 x 286] intentionally omitted <==** **----- Start of picture text -----**<br> 175 150<br>150 T HREE 125 RR<br>125<br>PIXEL 100 PrN<br>100<br>eT EEA 75 PPP NCE<br>75 TTIN| LIF<br>50<br>50 | EIN IL \<br>25<br>25 PPEEPN) LELEL LAY<br>0 0<br>0 25 50 75 100 125 150 175 0 25 50 75 100 125 150 175<br>T C [°C] T C [°C]<br>O P tot=f( T C) S I D=f( T C OV V GS ≥ S —“‘SOSCOC*CSsSsSSSS<br>P tot I D<br>**----- End of picture text -----**<br> **==> picture [527 x 283] intentionally omitted <==** **----- Start of picture text -----**<br> 10 [3] 10 [1]<br>single pulse<br>1 µs<br>0.01<br>10 µs<br>0.02<br>0.05<br>10 [2] 0.1<br>0.2<br>10 [0] 0.5<br>4 KA N 100 µs eee terre eee Tt<br>10 [1] 1 ms<br>77CUNT<br>SSeeLNW CO | SS T at<br>e ee 10 [-1] rill iiipecat<br>SNS<br>DC<br>10 [0] 10 ms<br>SS NA Ee Pett] CI CUTIE CUTIE TTI FET<br>10 [-2]<br>10 [-1]<br>SSS a a a ee<br>SSS MICECEM CEMIE CEHITT<br>10 [-2] CN CTC 10 [-3] ETHIE EVIE TAINETNATAT<br>10 [-1] 10 [0] 10 [1] 10 [2] 10 [3] 10 [-6] 10 [-5] 10 [-4] 10 [-3] 10 [-2] 10 [-1] 10 [0]<br>V DS [V] t p [s]<br>I D=f( V DS T C D t p Z thJC=f( t p D = t p/ T<br>I D thJC<br>Z<br>**----- End of picture text -----**<br> Final Data Sheet 6 **OptiMOS[TM]** 5 Power-Transistor, 100 V **ISG0616N10NM5HSC** **==> picture [528 x 638] intentionally omitted <==** **----- Start of picture text -----**<br> 600 11<br>10 V 7 V<br>eee / ae ee 10<br>8 V<br>500<br>4.5 V<br>9<br>//An<br>400 s/n) 8 eeee<br>ny Annee 7 eee<br>6 V<br>300<br>5 V<br>6<br>8 fe<br>fe ae DS<br>200 5 eee<br>2myeee [/Ame] 4 7 V 6 V<br>8 V<br>100 2 Ane 5 V 10 V ——<br>3<br>Lod —<br>4.5 V<br>0 Lf 2<br>0 1 2 3 4 0 50 100 150 200 250 300<br>V DS I D<br>[Vv] [A]<br>I D=f( V DS T j V GS R DS(on)=f( I D T j V GS<br>600 11<br>ptee ep<br>10<br>tte tt iAy |<br>500 SB) 25 °C |<br>9<br>PEEP I<br>ff :<br>400 8<br>SCPC LA<br>175 °C 7 175 °C<br>i 300 ceee eeee ee<br>6<br>a<br>ee) ee<br>200 5<br>4<br>peti tia tity | iN |]<br>100<br>25 °C<br>Ceres} CORES<br>3<br>TTA —t<br>0 nn 2 ee<br>2.0 3.0 4.0 5.0 6.0 7.0 3 6 9 12 15<br>V GS V GS<br>[Vv] [Vv]<br>I D=f( V GS V DS|>2| I D| R DS(on)max T j R DS(on)=f( V GS I D T j<br>] Ω<br>I D<br>DS(on)<br>R<br>] Ω<br>I D<br>DS(on)<br>R<br>**----- End of picture text -----**<br> Final Data Sheet 7 **OptiMOS[TM]** 5 Power-Transistor, 100 V **ISG0616N10NM5HSC** **==> picture [528 x 282] intentionally omitted <==** **----- Start of picture text -----**<br> 2.22.0 ey Ey) | Lt yAT 4.0 | tt tt tt Lt<br>3.5<br>SOG000000<br>1.8<br>/ 40) 000. <seeeeene<br>e 3.0 ONE S<br>1.6 FPL CES<br>850 µA<br>TTPE 1.4 / leSE 2.5 EERSTELUNN<br>POO) 1.2 CEP 85 µA aN<br>2.0<br>© 1.0 PUPCPAZEELEA |) SERRE EENSNE<br>1.5<br>0.8 TO JCCEE |) SEE~] tt tt EI N<br>0.6 PAE 1.0 HERRERO—] tt tt et Lt<br>-75 -50 -25 0 25 50 75 100 125 150 175 200 -75 -50 -25 0 25 50 75 100 125 150 175 200<br>T j [°C] T j [°C]<br>R DS(on)=f( T j I D V GS V GS(th=f( T j V GS= V DS I D<br>GS(th)<br>V<br>DS(on)<br>R<br>**----- End of picture text -----**<br> **==> picture [539 x 290] intentionally omitted <==** **----- Start of picture text -----**<br> 10 [4] 10 [3]<br>25 °C<br>175 °C<br>———_——————— _ SSeS<br>a ee<br>a es Ciss ee ee ee ee<br>7 P| | | [| aye | |<br>10 [3] Ne 10 [2] TEL rE | tL<br>he DO | es es ys yA |<br>Coss<br>A =<br>7 > SCE Ra eee<br>NN ERATE<br>10 [2] 10 [1]<br>a , F fF] ff] [| | [| | [ |<br>me otf | iff tf tt<br>10 [1] Pot Crss 10 [0] PEPEEL EL<br>0 20 40 60 80 100 0.4 0.6 0.8 1.0 1.2 1.4<br>V DS V SD<br>OC—C—OSOCCCSCOCOCSCSCS C =f( V DS V GS f C I OCSOSSSTTCSCTTTCCC‘*dY F=f( V SD)<br>[vi [Vv] [Vv]<br>C I F<br>**----- End of picture text -----**<br> Final Data Sheet 8 **OptiMOS[TM] ISG0616N10NM5HSC** **==> picture [526 x 634] intentionally omitted <==** **----- Start of picture text -----**<br> 10 [2] 10<br>20 V<br>50 V<br>9<br>aFANTNs STINT et 80 V Lk<br>8<br>25 °C<br>ETT PN TENTS TIT /7<br>7<br>10 [1] CT ATMINGIN 100 °C NY | Lp [b] [t]<br>, atS 150 °C 65 oT o]od|lUC TO!”<br>x Ath NUTT ra -—A A<br>a a NG 4 e e ee<br>10 [0] aa<br>3<br>YTaTTT TTTee ellTTT 21 fiA | fff<br>10 [-1] cc |} 0 7<br>10 [-1] 10 [0] 10 [1] 10 [2] 10 [3] 0 10 20 30 40 50 60<br>t AV [us] Q gate [nC]<br>I AS=f( t AV R GS Ω T j,start V GS=f( Q gate I D T j V DD<br>Diagram Gate charge waveforms<br>Po<br>108<br>TT LLLLLLLIZA<br>106 ee eee<br>TEEPE 2,<br>104 “LEELA<br>Say oe<br>| 102 [EERE]<br>= TDLLPYOELLe<br>100 “TLE YELLE<br>EEL<br>98<br>ny<br>74 /<br>4<br>96<br>“EEE |) Re [Te Oo<br>94 TOC EEE EE 2. 2.<br>-75 -50 -25 0 25 50 75 100 125 150 175 200<br>T j [°C]<br>V BR(DSS)=f( T j I D<br>I AV V GS<br>BR(DSS)<br>V<br>**----- End of picture text -----**<br> Final Data Sheet 9 **OptiMOS[TM] 5�Power-Transistor,�100�V ISG0616N10NM5HSC** **==> picture [120 x 53] intentionally omitted <==** ## **5�����Package�Outlines** |PACKAGE - GROU<br>NUMBER:|PACKAGE - GROU<br>NUMBER:| |---|---| |**DIMENSIONS**|| |**A**|---| |**A1**|---| |**b**|0.55| |**c**|---| |**D**|| |**D1**|2.00| |**D2**|1.05| |**D3**|| |**D4**|| |**D5**|| |**E**|| |**E1**|3.51| |**E2**|0.80| |**E3**|0.45| |**E4**|| |**E5**|| |**e**|| |**M**|| |**M1**|| |**M2**|| |**M3**|| |**K**|| |**K1**|| ## **Figure�1�����Outline�PG�-WHITFN-10-1,�dimensions�in�mm** Final Data Sheet 10 Rev.�2.0,��2023-12-05 **OptiMOS[TM] ISG0616N10NM5HSC** ## ISG0616N10NM5HSC |Previous Revision|Previous Revision|| |---|---|---| |Revision|Date|Subjects (major changes since last revision)| |2.0|2023-12-05|Release of final version| ## **Trademarks** ## **erratum@infineon.com** ## **Information** ## **Warnings** Final Data Sheet 11
Updated at June 9, 2026
Infineon Technologies is a globally recognized leader in semiconductor solutions, renowned for driving innovation in power management, energy efficiency, and modern mobility. With a strong legacy of engineering excellence, the company provides highly reliable components designed to meet the rigorous demands of industrial, automotive, and advanced commercial applications. The core of our Infineon portfolio is centered on their industry-leading discrete semiconductors. We offer an extensive selection of single and dual MOSFETs, alongside a robust range of single IGBTs and advanced IGBT modules. These flagship power transistors are essential for high-efficiency power conversion and motor control, providing engineers with superior thermal performance and minimized switching losses. Beyond advanced field-effect transistors, the selection includes a comprehensive array of diodes and rectifiers, heavily featuring Schottky diodes, as well as fast-recovery and RF/PIN diodes. This power foundation is further supported by bipolar transistors, intelligent power modules, and thyristor SCR modules, delivering the critical building blocks required for complex power system designs. To support broader system integration, the portfolio also encompasses specialized solutions such as solid-state relays, AC/DC LED driver ICs, and Bluetooth communications modules. From high-power industrial rectifiers to wireless connectivity adapters, Infineon equips designers with the precision components needed to build efficient, scalable, and fully connected electronic systems.
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