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ISA170170N04LMDSXTMA1
Dual MOSFET, Dual N Channel, 40 V, 9.6 A, 0.017 ohm
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- Manufacturer: INFINEON
- Product type: Dual MOSFETs
- SVHC: No SVHC (25-Jun-2025)
- No. of Pins: 8Pins
- Channel Type: Dual N Channel
- Product Range: OptiMOS 3 Series
- Qualification: -
- Transistor Case Style: SOIC
- Operating Temperature Max: 150°C
- Power Dissipation N Channel: 2.5W
- Power Dissipation P Channel: -
- Drain Source Voltage Vds N Channel: 40V
- Drain Source Voltage Vds P Channel: -
- Continuous Drain Current Id N Channel: 9.6A
- Continuous Drain Current Id P Channel: -
- Drain Source On State Resistance N Channel: 0.017ohm
- Drain Source On State Resistance P Channel: -
| Delivery and price | |
|---|---|
| Units per pack | 5000 |
| Price | 0.167 € |
| Current stock | 1000+ |
| Lead time | 30 days |
Datasheet
**Public ISA170170N04LMDS Final datasheet** ## **MOSFET** PG‑DSO‑8 ## OptiMOS™ 3 Power‑Transistor, 40 V ## **Features** - Dual N‑channel, logic level - Very low on‑resistance R - - DS(on) - Superior thermal resistance - - 100% avalanche tested - - Pb‑free lead plating; RoHS compliant - - Halogen‑free according to IEC61249‑2‑21 - 8 7 6 5 1 2 oy 3 4 Source 1 Drain 1 **Product validation** Pin 1 Pin 8 Gate 1 ***1** Drain 1 Qualified according to JEDEC Standard Pin 2 Pin 7 Source 2 Drain 2 **Table 1 Key Performance Parameters** Pin 3 Pin 6 Gate 2 ***1** Drain 2 Parameter Value Unit Pin 4 Pin 5 VDS 40 V _*1: Internal body diode_ R 17 mΩ DS(on),max ID 9.6 A Qoss 7.8 nC QG 6.0 nC === es Js Type/Ordering Code Package Marking Related Links ISA170170N04LMDS PG‑DSO‑8 1717N04L ‑ oF Datasheet https://www.infineon.com Revision 2.0 2024‑10‑02 1 **Public** OptiMOS™ 3 Power‑Transistor, 40 V **ISA170170N04LMDS** **==> picture [108 x 48] intentionally omitted <==** ## **Table of Contents** **Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12** Datasheet https://www.infineon.com Revision 2.0 2024‑10‑02 2 **Public** OptiMOS™ 3 Power‑Transistor, 40 V **ISA170170N04LMDS** **==> picture [108 x 48] intentionally omitted <==** ## **1 Maximum ratings** at TA=25 °C, unless otherwise specified ## **Table 2 Maximum ratings** **==> picture [526 x 228] intentionally omitted <==** **----- Start of picture text -----**<br> Values<br>Parameter Symbol Unit Note/ Test Condition<br>Min. Typ. Max.<br>9.6 VGS=10 V, TC=25 °C<br>6.1 VGS=10 V, TC=100 °C<br>Continuous drain current [1)] ID ‑ ‑ 5.2 A VGS=4.5 V, TC=100 °C<br>7.2 VGS=10 V,TA=25 °C,RthJA=90 °C/W 2)<br>Pulsed drain current [3)] ID,pulse ‑ ‑ 38 A TC=25 °C<br>Avalanche energy, single pulse [4)] EAS ‑ ‑ 36 mJ ID=9.6 A, RGS=25 Ω<br>Gate source voltage VGS ‑20 ‑ 20 V ‑<br>2.5 TC=25 °C<br>Power dissipation Ptot ‑ ‑ 1.4 W TA=25 °C, RthJA=90 °C/W 2)<br>Operating and storage temperature T , Tj stg ‑55 ‑ 150 °C ‑<br>**----- End of picture text -----**<br> 1) Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature as specified. For other case temperatures please refer to Diagram 2. De‑rating will be required based on the actual environmental conditions. 2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 μm thick) copper area for drain connection. PCB is vertical in still air. 3) See Diagram 3 for more detailed information 4) See Diagram 13 for more detailed information Datasheet https://www.infineon.com Revision 2.0 2024‑10‑02 3 **Public** OptiMOS™ 3 Power‑Transistor, 40 V **ISA170170N04LMDS** **==> picture [108 x 48] intentionally omitted <==** ## **2 Thermal characteristics** **Table 3 Thermal characteristics** **==> picture [526 x 177] intentionally omitted <==** **----- Start of picture text -----**<br> Values<br>Parameter Symbol Unit Note/ Test Condition<br>Min. Typ. Max.<br>Thermal resistance, junction ‑ solder point RthJC ‑ ‑ 50 °C/W ‑<br>Thermal resistance, junction ‑<br>ambient, RthJA ‑ ‑ 90 °C/W ‑<br>6 cm² cooling area [5)]<br>Thermal resistance, junction ‑<br>ambient, RthJA ‑ ‑ 150 °C/W ‑<br>minimum footprint<br>**----- End of picture text -----**<br> 5) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 μm thick) copper area for drain connection. PCB is vertical in still air. Datasheet https://www.infineon.com Revision 2.0 2024‑10‑02 4 **Public** OptiMOS™ 3 Power‑Transistor, 40 V **ISA170170N04LMDS** **==> picture [108 x 48] intentionally omitted <==** ## **3 Electrical characteristics** at =25 °C, unless otherwise specifiedTj ## **Table 4 Static characteristics** **==> picture [526 x 208] intentionally omitted <==** **----- Start of picture text -----**<br> Values<br>Parameter Symbol Unit Note/ Test Condition<br>Min. Typ. Max.<br>Drain‑source breakdown voltage V(BR)DSS 40 ‑ ‑ V VGS=0 V, =1 mAID<br>Gate threshold voltage VGS(th) 1.1 ‑ 2.7 V VDS=VGS, =1000 μAID<br>Zero gate voltage drain current IDSS ‑ 0.1 10 1 100 μA VVDSDS=40 V, =40 V, VVGSGS=0 V, =25 °C =0 V, =125 °CTTjj<br>Gate‑source leakage current IGSS ‑ 10 100 nA VGS=20 V, VDS=0 V<br>Drain‑source on‑state resistance R ‑ 13 17 VGS=10 V, =9.6 A ID<br>DS(on)<br>18 23.6 [mΩ] VGS=4.5 V, =8.5 AID<br>Gate resistance RG ‑ 1.1 ‑ Ω ‑<br>Transconductance [6)] gfs 12 25 ‑ S |VDS|≥2|ID|RDS(on)max, =9.6 AID<br>**----- End of picture text -----**<br> - 6) Defined by design. Not subject to production test. **Table 5 Dynamic characteristics** **==> picture [526 x 243] intentionally omitted <==** **----- Start of picture text -----**<br> Values<br>Parameter Symbol Unit Note/ Test Condition<br>Min. Typ. Max.<br>Input capacitance [7)] Ciss ‑ 880 1100 pF VGS=0 V, VDS=20 V, =1 MHzf<br>Output capacitance [7)] Coss ‑ 220 290 pF VGS=0 V, VDS=20 V, =1 MHzf<br>Reverse transfer capacitance [7)] Crss ‑ 15 26 pF VGS=0 V, VDS=20 V, =1 MHzf<br>Turn‑on delay time td(on) ‑ 6.7 ‑ ns VRDD=20 V, =1.6 ΩVGS=4.5 V, =9.6 A, ID<br>G,ext<br>Rise time tr ‑ 5.0 ‑ ns VRDD=20 V, =1.6 ΩVGS=4.5 V, =9.6 A, ID<br>G,ext<br>Turn‑off delay time td(off) ‑ 4.6 ‑ ns VRDD=20 V, =1.6 ΩVGS=4.5 V, =9.6 A, ID<br>G,ext<br>Fall time tf ‑ 4.0 ‑ ns VRDD=20 V, =1.6 ΩVGS=4.5 V, =9.6 A, ID<br>G,ext<br>**----- End of picture text -----**<br> - 7) Defined by design. Not subject to production test. Datasheet https://www.infineon.com Revision 2.0 2024‑10‑02 5 **Public** OptiMOS™ 3 Power‑Transistor, 40 V **ISA170170N04LMDS** **==> picture [108 x 48] intentionally omitted <==** **Table 6 Gate charge characteristics**[8)] **==> picture [526 x 198] intentionally omitted <==** **----- Start of picture text -----**<br> Values<br>Parameter Symbol Unit Note/ Test Condition<br>Min. Typ. Max.<br>Gate to source charge Qgs ‑ 2.7 ‑ nC VDD=20 V, =9.6 A, ID VGS=0 to 4.5 V<br>Gate charge at threshold Qg(th) ‑ 1.5 ‑ nC VDD=20 V, =9.6 A, ID VGS=0 to 4.5 V<br>Gate to drain charge Qgd ‑ 1.6 ‑ nC VDD=20 V, =9.6 A, ID VGS=0 to 4.5 V<br>Switching charge Qsw ‑ 2.8 ‑ nC VDD=20 V, =9.6 A, ID VGS=0 to 4.5 V<br>Gate charge total [9)] Qg ‑ 6.0 9.0 nC VDD=20 V, =9.6 A, ID VGS=0 to 4.5 V<br>Gate plateau voltage Vplateau ‑ 3.1 ‑ V VDD=20 V, =9.6 A, ID VGS=0 to 4.5 V<br>Gate charge total [9)] Qg ‑ 13 19.5 nC VDD=20 V, =9.6 A, ID VGS=0 to 10 V<br>Output charge Qoss ‑ 7.8 ‑ nC VDS=20 V, VGS=0 V<br>**----- End of picture text -----**<br> - 8) See "Gate charge waveforms" for parameter definition - 9) Defined by design. Not subject to production test. ## **Table 7 Reverse diode** **==> picture [526 x 135] intentionally omitted <==** **----- Start of picture text -----**<br> Values<br>Parameter Symbol Unit Note/ Test Condition<br>Min. Typ. Max.<br>Diode continuous forward current IS ‑ ‑ 3.1 A TC=25 °C<br>Diode pulse current IS,pulse ‑ ‑ 38 A TC=25 °C<br>Diode forward voltage VSD ‑ 0.86 1.0 V VGS=0 V, =9.6 A, =25 °CIF Tj<br>Reverse recovery time trr ‑ 13 ‑ ns VR=20 V, =9.6 A, dIF iF/dt=100 A/μs<br>Reverse recovery charge Qrr ‑ 4.3 ‑ nC VR=20 V, =9.6 A, dIF iF/dt=100 A/μs<br>**----- End of picture text -----**<br> Datasheet https://www.infineon.com Revision 2.0 2024‑10‑02 6 **Public** OptiMOS™ 3 Power‑Transistor, 40 V **ISA170170N04LMDS** **==> picture [108 x 48] intentionally omitted <==** ## **4 Electrical characteristics diagrams** **==> picture [529 x 299] intentionally omitted <==** **----- Start of picture text -----**<br> Diagram 1: Power dissipation Diagram 2: Drain current<br>3.00 10<br>2.75<br>9<br>2.50<br>8<br>2.25<br>7<br>2.00<br>6<br>1.75<br>1.50 5<br>1.25<br>4<br>1.00<br>3<br>0.75<br>2<br>0.50<br>1<br>0.25<br>0.00 0<br>0 25 50 75 100 125 150 175 0 25 50 75 100 125 150 175<br>TC [°C] TC [°C]<br>Ptot=f(TC) ID=f(TC); VGS≥10 V<br>[W] [A]<br>Ptot ID<br>**----- End of picture text -----**<br> Diagram 3: Safe operating area Diagram 4: Max. transient thermal impedance **==> picture [529 x 279] intentionally omitted <==** **----- Start of picture text -----**<br> 10 [2] 10 [3]<br>single pulse<br>1 µs 0.01<br>0.02<br>0.05<br>10 [1] 10 [2] 0.1<br>10 µs 0.2<br>0.5<br>10 [0] 10 [1]<br>100 µs<br>10 1 10 [0]<br>1 ms<br>10 2 10 1<br>10 ms<br>DC<br>10 3 10 2<br>10 1 10 [0] 10 [1] 10 [2] 10 6 10 5 10 4 10 3 10 2 10 1 10 [0] 10 [1]<br>VDS [V] tp [s]<br>ID=f(VDS); TC=25 °C; =0; parameter: D tp ZthJC=f(tp); parameter: =D tp/T<br>[A] [K/W]<br>D<br>I<br>thJC<br>Z<br>**----- End of picture text -----**<br> Datasheet https://www.infineon.com Revision 2.0 2024‑10‑02 7 **Public** OptiMOS™ 3 Power‑Transistor, 40 V **ISA170170N04LMDS** **==> picture [108 x 48] intentionally omitted <==** **==> picture [529 x 618] intentionally omitted <==** **----- Start of picture text -----**<br> Diagram 5: Typ. output characteristics Diagram 6: Typ. drain‑source on resistance<br>40 40<br>10 V<br>5 V<br>35 4 V<br>4.5 V 35<br>3.5 V<br>30<br>30<br>25<br>25<br>4 V<br>20<br>20<br>3.5 V 4.5 V<br>15<br>15 5 V<br>10<br>10 V<br>10<br>5<br>3 V<br>0 5<br>0.0 0.5 1.0 1.5 2.0 2.5 3.0 0 2 4 6 8 10 12 14 16 18 20<br>VDS [V] ID [A]<br>ID=f(VDS), =25 °C; parameter: Tj VGS RDS(on)=f(ID), =25 °C; parameter: Tj VGS<br>Diagram 7: Typ. transfer characteristics Diagram 8: Typ. drain‑source on resistance<br>40 40<br>35<br>35<br>30<br>30<br>25<br>25<br>20<br>20<br>150 °C<br>15<br>15<br>10<br>25 °C<br>150 °C 10<br>5<br>25 °C<br>0 5<br>0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 2 4 6 8 10 12 14 16<br>VGS [V] VGS [V]<br>ID=f(VGS), |VDS|>2|ID|RDS(on)max; parameter: Tj RDS(on)=f(VGS), =9.6 A; parameter: ID Tj<br>]<br>[m<br>[A]<br>D<br>I<br>DS(on)<br>R<br>]<br>[m<br>[A]<br>D<br>I<br>DS(on)<br>R<br>**----- End of picture text -----**<br> Datasheet https://www.infineon.com Revision 2.0 2024‑10‑02 8 **Public** OptiMOS™ 3 Power‑Transistor, 40 V **ISA170170N04LMDS** **==> picture [108 x 48] intentionally omitted <==** Diagram 9: Normalized drain‑source on resistance Diagram 10: Typ. gate threshold voltage **==> picture [529 x 280] intentionally omitted <==** **----- Start of picture text -----**<br> 1.8 2.4<br>1.6<br>2.2<br>1.4<br>2.0<br>1.2<br>1.8<br>1.0<br>1.6<br>0.8<br>0.6 1.4<br>75 50 25 0 25 50 75 100 125 150 175 75 50 25 0 25 50 75 100 125 150 175<br>Tj [°C] Tj [°C]<br>RDS(on)=f(Tj), =9.6 A, ID VGS=10 V VGS(th=f(Tj), VGS=VDS; parameter: =1000μAID<br>°C)<br>25<br>to<br>[V]<br>GS(th)<br>V<br>(normalized<br>DS(on)<br>R<br>**----- End of picture text -----**<br> Diagram 11: Typ. capacitances Diagram 12: Forward characteristics of reverse diode **==> picture [529 x 279] intentionally omitted <==** **----- Start of picture text -----**<br> 10 [4] 10 [2]<br>25 °C<br>150 °C<br>10 [3]<br>Ciss<br>10 [1]<br>10 [2]<br>Coss<br>10 [0]<br>10 [1]<br>Crss<br>10 [0] 10 1<br>0 5 10 15 20 25 30 35 40 0.0 0.2 0.4 0.6 0.8 1.0 1.2<br>VDS [V] VSD [V]<br>C=f(VDS); VGS=0 V; =1 MHzf IF=f(VSD); parameter: Tj<br>[pF] [A]<br>F<br>C I<br>**----- End of picture text -----**<br> Datasheet https://www.infineon.com Revision 2.0 2024‑10‑02 9 **Public** OptiMOS™ 3 Power‑Transistor, 40 V **ISA170170N04LMDS** **==> picture [529 x 618] intentionally omitted <==** **----- Start of picture text -----**<br> Diagram 13: Avalanche characteristics Diagram 14: Typ. gate charge<br>ee<br>10 [2] 10<br>8 V<br>20 V<br>9 32 V<br>8<br>7<br>10 [1]<br>25 ° C 6<br>100 °C<br>5<br>Seen: 125 °C va<br>4<br>10 [0]<br>3<br>2<br>1<br>10 1 0<br>10 [0] 10 [1] 10 [2] 10 [3] 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14<br>tAV [µs] Qgate [nC]<br>IAS=f(tAV); RGS=25 Ω; parameter: Tj,start VGS=f(Qgate), =9.6 A pulsed, =25 °C; parameter: ID Tj VDD<br>pe<br>Diagram 15: Drain‑source breakdown voltage Gate charge waveforms<br>ee<br>43<br>42<br>41<br>40<br>39<br>38<br>75 50 25 0 25 50 75 100 125 150 175<br>Tj [°C]<br>e VBR(DSS)=f(Tj); =1 mAID s ‑<br>[A] [V]<br>AV GS<br>I V<br>[V]<br>BR(DSS)<br>V<br>**----- End of picture text -----**<br> Datasheet https://www.infineon.com Revision 2.0 2024‑10‑02 10 **Public** OptiMOS™ 3 Power‑Transistor, 40 V **ISA170170N04LMDS** **==> picture [108 x 48] intentionally omitted <==** ## **5 Package Outlines** |PACKAGE - GROUP<br>NUMBER:|PACKAGE - GROUP<br>NUMBER:|**PG-DSO-8-U02**|**PG-DSO-8-U02**| |---|---|---|---| |**DIMENSIONS**||MIN.<br>MAX.<br>**MILLIMETERS**|| |**A**||0.18|0.25| |**A1**||1.35|1.75| |**b**||0.38|0.51| |**c**||0.254|| |**D**||4.80|5.00| |**E**||5.80|6.20| |**E1**||3.80|4.00| |**e**||1.27|| |**L**||0.48|0.91| |**O**||4°|| |**N**||8|| **Figure 1** Outline PG‑DSO‑8, dimensions in mm Datasheet https://www.infineon.com Revision 2.0 2024‑10‑02 11 **Public** OptiMOS™ 3 Power‑Transistor, 40 V **ISA170170N04LMDS** **==> picture [108 x 48] intentionally omitted <==** ## **Revision History** ISA170170N04LMDS ## **Revision 2024‑10‑02, Rev. 2.0** Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2024‑10‑02 Release of final datasheet ## Trademarks All referenced product or service names and trademarks are the property of their respective owners. We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: erratum@infineon.com Published by Infineon Technologies AG 81726 München, Germany © 2024 Infineon Technologies AG All Rights Reserved. ## Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”) . With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non‑infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. ## Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www. infineon.com). ## Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. The Infineon Technologies component described in this Data Sheet may be used in life‑support devices or systems and/or automotive, aviation and aerospace applications or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life‑support, automotive, aviation and aerospace device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Datasheet https://www.infineon.com Revision 2.0 2024‑10‑02 12
Updated at June 9, 2026
Infineon Technologies is a globally recognized leader in semiconductor solutions, renowned for driving innovation in power management, energy efficiency, and modern mobility. With a strong legacy of engineering excellence, the company provides highly reliable components designed to meet the rigorous demands of industrial, automotive, and advanced commercial applications. The core of our Infineon portfolio is centered on their industry-leading discrete semiconductors. We offer an extensive selection of single and dual MOSFETs, alongside a robust range of single IGBTs and advanced IGBT modules. These flagship power transistors are essential for high-efficiency power conversion and motor control, providing engineers with superior thermal performance and minimized switching losses. Beyond advanced field-effect transistors, the selection includes a comprehensive array of diodes and rectifiers, heavily featuring Schottky diodes, as well as fast-recovery and RF/PIN diodes. This power foundation is further supported by bipolar transistors, intelligent power modules, and thyristor SCR modules, delivering the critical building blocks required for complex power system designs. To support broader system integration, the portfolio also encompasses specialized solutions such as solid-state relays, AC/DC LED driver ICs, and Bluetooth communications modules. From high-power industrial rectifiers to wireless connectivity adapters, Infineon equips designers with the precision components needed to build efficient, scalable, and fully connected electronic systems.
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