IRFP340PBF

**IRFP340** 

## www.vishay.com Vishay Siliconix ~~BR~~ **Power MOSFET** 

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D<br>TO-247AC<br>G<br>e S +<br>D<br>G S<br>N-Channel MOSFET<br>**----- End of picture text -----**<br>


## **FEATURES** 

- Dynamic dV/dt rating 

- Repetitive avalanche rated 

Available 

- Isolated central mounting hole 

- Fast switching 

- Ease of paralleling 

- Simple drive requirements 

- Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 

**Note** 

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||||
|---|---|---|
|PRODUCT SUMMARY|
|VDS (V)|400|
|RDS(on) (Ω)|VGS = 10 V|0.55|
|Qg (max.) (nC)|62|
|Qgs (nC)|10|
|Qgd (nC)|30|
|Configuration|Single|

**----- End of picture text -----**<br>


- This    datasheet    provides    information    about    parts    that    are RoHS-compliant and / or parts that are non RoHS-compliant.  For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for details 

## **DESCRIPTION** 

Third generation Power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The TO-247AC package is preferred for commercial-industrial applications where higher power levels preclude the use of TO-220AB devices. The TO-247AC is similar but superior to the earlier TO-218 package because its isolated mounting hole. It also provides greater creepage distances between pins to meet the requirements of most safety specifications. 

## **ORDERING INFORMATION** 

Package TO-247AC 

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|||||||
|---|---|---|---|---|---|
|Lead (Pb)-free|IRFP340PbF|
|ABSOLUTE MAXIMUM RATINGS|(TC = 25 °C, unless otherwise noted)|
|PARAMETER|SYMBOL|LIMIT|UNIT|
|Drain-source voltage|VDS|400|
|V|
|——<——|Gate-source voltage|VGS|± 20|
|Continuous drain current|VGS at 10 V|TC = 25 °C|ID|11|
|TC = 100 °C|6.9|A|
|ee|Pulsed drain Current|[ a]|ee|IDM|44|
|Linear derating factor|1.2|W/°C|
|Single pulse avalanche energy|[b]|EAS|480|mJ|
|Repetitive avalanche current|[ a]|IAR|11|A|
|Repetitive avalanche energy|[ a]|EAR|15|mJ|
|Maximum power dissipation|TC = 25 °C|PD|150|W|
|Peak diode recovery dV/dt|[c]|dV/dt|4.0|V/ns|
|Operating|junction and storage temperature range|TJ, Tstg|-55 to +150|°C|
|ee|Soldering recommendations (peak temperature)|[d]|for 10 s|300|[d]|
|ee|10|lbf · in|
|Mounting torque|6-32 or M3 screw|
|1.1|N · m|
|Et|
|Notes|
|a.|Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)|
|b.|VDD = 50 V, starting TJ = 25 °C, L = 6.9 mH, Rg = 25 Ω, IAS = 11 A (see fig. 12)|
|c.|ISD|≤ 11 A, dI/dt ≤ 120 A/μs, VDD|≤ VDS, TJ|≤ 150 °C|
|d.|1.6 mm from case|

**----- End of picture text -----**<br>


S22-0051-Rev. C, 24-Jan-2022 

Document Number: 91222 

**1** For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**IRFP340** 

www.vishay.com 

Vishay Siliconix 

## **THERMAL RESISTANCE RATINGS** 

|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|
|---|---|---|---|---|
|**PARAMETER**|**SYMBOL**|**TYP.**|**MAX.**|**UNIT**|
|Maximum junction-to-ambient|RthJA|-|40|°C/W|
|Case-to-sink, flat,greased surface|RthCS|0.24|-||
|Maximum junction-to-case (drain)|RthJC|-|0.83||



|**SPECIFICATIONS**(TJ= 25 °C, unless otherwise noted)|**SPECIFICATIONS**(TJ= 25 °C, unless otherwise noted)|**SPECIFICATIONS**(TJ= 25 °C, unless otherwise noted)|**SPECIFICATIONS**(TJ= 25 °C, unless otherwise noted)|||||
|---|---|---|---|---|---|---|---|
|**PARAMETER**|**SYMBOL**|**TEST CONDITIONS**||**MIN.**|**TYP.**|**MAX.**|**UNIT**|
|**Static**||||||||
|Drain-source breakdown voltage|VDS|VGS= 0 V, ID= 250 μA||400|-|-|V|
|VDStemperature coefficient|ΔVDS/TJ|Reference to 25 °C, ID= 1 mA||-|0.49|-|V/°C|
|Gate-source threshold voltage|VGS(th)|VDS= VGS, ID= 250 μA||2.0|-|4.0|V|
|Gate-source leakage|IGSS|VGS= ± 20 V||-|-|± 100|nA|
|Zero gate voltage drain current|IDSS|VDS= 400 V, VGS= 0 V||-|-|25|μA|
|||VDS= 320 V, VGS= 0 V, TJ= 125 °C||-|-|250||
|Drain-source on-state resistance|RDS(on)|VGS= 10 V|ID= 6.6 Ab|-|-|0.55|Ω|
|Forward transconductance|gfs|VDS= 50 V, ID= 6.6 Ab||7.7|-|-|S|
|**Dynamic**||||||||
|Input capacitance|Ciss|VGS= 0 V,<br>VDS= 25 V,<br>f = 1.0 MHz, see fig. 5||-|1400|-|pF|
|Output capacitance|Coss|||-|400|-||
|Reverse transfer capacitance|Crss|||-|130|-||
|Total Gate charge|Qg|VGS= 10 V|ID= 10 A, VDS= 320 V,<br>see fig. 6 and 13b|-|-|62|nC|
|Gate-source charge|Qgs|||-|-|10||
|Gate-drain charge|Qgd|||-|-|30||
|Turn-on delay time|td(on)|VDD= 200 V, ID= 10 A ,<br>Rg= 9.1Ω, RD= 20Ω, see fig. 10b||-|14|-|ns|
|Rise time|tr|||-|27|-||
|Turn-off delay time|td(off)|||-|50|-||
|Fall time|tf|||-|24|-||
|Internal drain inductance|LD|Between lead,<br>6 mm (0.25") from<br>package and center of<br>die contact<br>D<br>S<br>G||-|5.0|-|nH|
|Internal source inductance|LS|||-|13|-||
|**Drain-Source Body Diode Characteristics**||||||||
|Continuous source-drain diode current|IS|MOSFET symbol<br>showing the<br>integral reverse<br>p - n junction diode<br>S<br>D<br>G||-|-|11|A|
|Pulsed diode forward currenta|ISM|||-|-|44||
|Body diode voltage|VSD|TJ= 25 °C, IS= 11 A, VGS= 0 Vb||-|-|2.0|V|
|Body diode reverse recovery time|trr|TJ= 25 °C, IF= 10 A, dI/dt = 100 A/μsb||-|330|660|ns|
|Body diode reverse recovery charge|Qrr|||-|2.5|5.9|μC|
|Forward turn-on time|ton|Intrinsic turn-on time is negligible (turn-on is dominated by LSand LD)||||||



## **Notes** 

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11) 

b. Pulse width ≤ 300 μs; duty cycle ≤ 2 % 

S22-0051-Rev. C, 24-Jan-2022 

Document Number: 91222 

**2** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**IRFP340** Vishay Siliconix 

## www.vishay.com 

## **TYPICAL CHARACTERISTICS** (25 °C, unless otherwise noted) 

**Fig. 1 - Typical Output Characteristics, TC = 25 °C** 

**Fig. 3 - Typical Transfer Characteristics** 

**Fig. 2 - Typical Output Characteristics, TC = 150 °C** 

**Fig. 4 - Normalized On-Resistance vs. Temperature** 

S22-0051-Rev. C, 24-Jan-2022 

Document Number: 91222 

**3** For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**IRFP340** Vishay Siliconix 

## www.vishay.com 

**Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage** 

**Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage** 

**Fig. 7 - Typical Source-Drain Diode Forward Voltage** 

**Fig. 8 - Maximum Safe Operating Area** 

S22-0051-Rev. C, 24-Jan-2022 

Document Number: 91222 

**4** For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**IRFP340** 

www.vishay.com 

## Vishay Siliconix 

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RD<br>VDS<br>VGS<br>D.U.T.<br>RG +- VDD<br>10 V<br>Pulse width ≤ 1 µs<br>Duty factor ≤ 0.1 %<br> Fig. 10 - Switching Time Test Circuit<br>VDS<br>90 % \,<br>| i—— 1<br>10 % . [\_|<br>VGS<br>ea td(on) tr t la d(off) tf<br>**----- End of picture text -----**<br>


**Fig. 9 - Maximum Drain Current vs. Case Temperature** 

**Fig. 11 - Switching Time Waveforms** 

**Fig. 12 - Maximum Effective Transient Thermal Impedance, Junction-to-Case** 

S22-0051-Rev. C, 24-Jan-2022 

Document Number: 91222 

**5** For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**IRFP340** 

Vishay Siliconix 

www.vishay.com 

**==> picture [190 x 90] intentionally omitted <==**

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L<br>VDS<br>Vary tp to obtain<br>required IAS<br>RG D.U.T. +<br>- [V][DD]<br>Ww IAS<br>10 V<br>tp 0.01 Ω<br>**----- End of picture text -----**<br>


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VDS<br>t<br>/— p —— VDD<br>VDS //\\\\ Lo<br>\<br>IAS i e Le<br>**----- End of picture text -----**<br>


**Fig. 13 - Unclamped Inductive Test Circuit** 

**Fig. 14 - Unclamped Inductive Waveforms** 

**Fig. 15 - Maximum Avalanche Energy vs. Drain Current** 

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Current regulator<br>Same type as D.U.T.<br>QG 50 kΩ<br>10 V 12 V 0.2 µF<br>0.3 µF<br>QGS a QGD D.U.T. +- VDS<br>|<br>VG VGS<br>3 mA<br>Charge — D n]<br>IG ID<br>Current sampling resistors<br> Fig. 16 - Basic Gate Charge Waveform  Fig. 17 - Gate Charge Test Circuit<br>**----- End of picture text -----**<br>


S22-0051-Rev. C, 24-Jan-2022 

Document Number: 91222 

**6** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**IRFP340** Vishay Siliconix 

**==> picture [77 x 10] intentionally omitted <==**

**----- Start of picture text -----**<br>
www.vishay.com<br>**----- End of picture text -----**<br>


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Peak Diode Recovery dV/dt Test Circuit<br>+ Circuit layout considerations<br>D.U.T.<br>•  Low stray inductance<br>•  Ground plane<br>•  Low leakage inductance<br>current transformer<br>-<br>+<br>- - +<br>Rg •  dV/dt controlled by Rg +<br>••   Driver same type as D.U.T.ISD controlled by duty factor “D” - VDD<br>•  D.U.T. - device under test<br>Driver gate drive<br>Period D = P.W.<br>P.W. Period<br>VGS = 10 V [a]<br>D.U.T. lSD waveform<br>Reverse<br>recovery Body diode forward<br>current current dI/dt<br>D.U.T. VDS waveform Diode recovery<br>dV/dt<br>VDD<br>Re-applied<br>voltage<br>Body diode forward drop<br>Inductor current<br>Ripple ≤ 5 % ISD<br>Note<br>a. VGS = 5 V for logic level devices<br>**----- End of picture text -----**<br>


**Fig. 18 - For N-Channel** 

_Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91222._ 

Document Number: 91222 

S22-0051-Rev. C, 24-Jan-2022 

**7** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**Package Information** 

Vishay Siliconix 

www.vishay.com 

## **TO-247AC (High Voltage)** 

## **VERSION 1: FACILITY CODE = 9** 

||**MILLIMETERS**|**MILLIMETERS**||||**MILLIMETERS**|**MILLIMETERS**||
|---|---|---|---|---|---|---|---|---|
|**DIM.**|**MIN.**|**MAX.**|**NOTES**||**DIM.**|**MIN.**|**MAX.**|**NOTES**|
|A|4.83|5.21|||D1|16.25|16.85|5|
|A1|2.29|2.55|||D2|0.56|0.76||
|A2|1.50|2.49|||E|15.50|15.87|4|
|b|1.12|1.33|||E1|13.46|14.16|5|
|b1|1.12|1.28|||E2|4.52|5.49|3|
|b2|1.91|2.39|6||e|5.44 BSC|||
|b3|1.91|2.34|||L|14.90|15.40||
|b4|2.87|3.22|6, 8||L1|3.96|4.16|6|
|b5|2.87|3.18|||Ø P|3.56|3.65|7|
|c|0.55|0.69|6||Ø P1|7.19 ref.|||
|c1|0.55|0.65|||Q|5.31|5.69||
|D|20.40|20.70|4||S|5.54|5.74||



## **Notes** 

> (1) Package reference: JEDEC® TO247, variation AC 

- (2) All dimensions are in mm 

- (3) Slot required, notch may be rounded 

> (4) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the outermost extremes of the plastic body 

> (5) Thermal pad contour optional with dimensions D1 and E1 

> (6) Lead finish uncontrolled in L1 

> (7) Ø P to have a maximum draft angle of 1.5° to the top of the part with a maximum hole diameter of 3.91 mm 

> (8) Dimension b2 and b4 does not include dambar protrusion. Allowable dambar protrusion shall be 0.1 mm total in excess of b2 and b4 dimension at maximum material condition 

Revision: 19-Oct-2020 

Document Number: 91360 

**1** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**Package Information** 

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**----- Start of picture text -----**<br>
www.vishay.com<br>**----- End of picture text -----**<br>


## Vishay Siliconix 

## **VERSION 2: FACILITY CODE = Y** 

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4 A A<br>B E         ØP7 (Datum B)<br>E/2 S A2 Ø k M D B M<br>3  R/2 ØP1<br>A<br>D2<br>Q<br>2 x R 4 4<br>(2) D D1<br>1 2 3 D 4<br>Thermal pad<br>5  L1<br>C L 4<br>E1<br>See view B A 0.01 M D B M<br>2 x b2 C View A - A<br>2 x  e<br>3 x b<br>b4 A1<br>0.10 M C A M<br>Planting (b1, b3, b5) Base metal<br>Lead Assignments<br>1. Gate D D E E<br>2. Drain<br>3. Source C C (c) c1<br>4. Drain<br>(b, b2, b4)<br>(4)<br>Section C - C, D - D, E - E<br>View B<br>**----- End of picture text -----**<br>


||**MILLIMETERS**|**MILLIMETERS**|
|---|---|---|
|**DIM.**|**MIN.**|**MAX.**|
|A|4.58|5.31|
|A1|2.21|2.59|
|A2|1.17|2.49|
|b|0.99|1.40|
|b1|0.99|1.35|
|b2|1.53|2.39|
|b3|1.65|2.37|
|b4|2.42|3.43|
|b5|2.59|3.38|
|c|0.38|0.86|
|c1|0.38|0.76|
|D|19.71|20.82|
|D1|13.08|-|



||**MILLIMETERS**|**MILLIMETERS**||
|---|---|---|---|
|**DIM.**|**MIN.**|**MAX.**|**NOTES**|
|D2|0.51|1.30||
|E|15.29|15.87||
|E1|13.72|-||
|e|5.46 BSC|||
|Ø k|0.254|||
|L|14.20|16.25||
|L1|3.71|4.29||
|Ø P|3.51|3.66||
|Ø P1|-|7.39||
|Q|5.31|5.69||
|R|4.52|5.49||
|S|5.51 BSC|||
|||||



## **Notes** 

> (1) Dimensioning and tolerancing per ASME Y14.5M-1994 

- (2) Contour of slot optional 

> (3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outermost extremes of the plastic body 

> (4) Thermal pad contour optional with dimensions D1 and E1 

- (5) Lead finish uncontrolled in L1 

> (6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154") 

- (7) Outline conforms to JEDEC outline TO-247 with exception of dimension c 

Revision: 19-Oct-2020 

Document Number: 91360 

**2** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**Package Information** 

Vishay Siliconix 

www.vishay.com 

## **VERSION 3: FACILITY CODE = N** 

**==> picture [251 x 280] intentionally omitted <==**

**----- Start of picture text -----**<br>
A<br>B E A P1<br>R/2 P<br>N A2<br>D<br>C<br>C<br>b4 E1<br>b2b e A1 0.01 M D B M<br>0.10 M C A M<br>b1, b3, b5<br>Base metal<br>b, b2, b4<br>Plating<br>D2<br>Q S<br>M<br>R D B<br>D1<br>D M<br>K<br>L1<br>L<br>c c1<br>**----- End of picture text -----**<br>


||**MILLIMETERS**|**MILLIMETERS**|||**MILLIMETERS**|**MILLIMETERS**|
|---|---|---|---|---|---|---|
|**DIM.**|**MIN.**|**MAX.**||**DIM.**|**MIN.**|**MAX.**|
|A|4.65|5.31||D2|0.51|1.35|
|A1|2.21|2.59||E|15.29|15.87|
|A2|1.17|1.37||E1|13.46|-|
|b|0.99|1.40||e|5.46 BSC||
|b1|0.99|1.35||k|0.254||
|b2|1.65|2.39||L|14.20|16.10|
|b3|1.65|2.34||L1|3.71|4.29|
|b4|2.59|3.43||N|7.62 BSC||
|b5|2.59|3.38||P|3.56|3.66|
|c|0.38|0.89||P1|-|7.39|
|c1|0.38|0.84||Q|5.31|5.69|
|D|19.71|20.70||R|4.52|5.49|
|D1|13.08|-||S|5.51 BSC||
|ECN: E20-0545-Rev. F, 19-Oct-2020<br>DWG: 5971|||||||



ECN: E20-0545-Rev. F, 19-Oct-2020 DWG: 5971 

## **Notes** 

> (1) Dimensioning and tolerancing per ASME Y14.5M-1994 

- (2) Contour of slot optional 

> (3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outermost extremes of the plastic body 

> (4) Thermal pad contour optional with dimensions D1 and E1 

- (5) Lead finish uncontrolled in L1 

> (6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154") 

Revision: 19-Oct-2020 

Document Number: 91360 

**3** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**Legal Disclaimer Notice** Vishay 

www.vishay.com 

## **Disclaimer** 

ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 

Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 

Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special, consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular purpose, non-infringement and merchantability. 

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_**© 2022 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED**_ 

Revision: 01-Jan-2022 

Document Number: 91000 

**1**