IRF9Z34SPBF

**IRF9Z34S, SiHF9Z34S** 

~~—~~ www.vishay.com 

Vishay Siliconix 

## **Power MOSFET** 

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S<br>D [2] PAK (TO-263)<br>G<br>G [D]<br>S D<br>P-Channel MOSFET<br>**----- End of picture text -----**<br>


## **PRODUCT SUMMARY** 

|**PRODUCT SUMMARY**|**PRODUCT SUMMARY**|**PRODUCT SUMMARY**|
|---|---|---|
|VDS(V)|-60||
|RDS(on)()|VGS= -10 V|0.14|
|Qgmax. (nC)|34||
|Qgs(nC)|9.9||
|Qgd(nC)|16||
|Configuration|Single||



## **FEATURES** 

- Advanced process technology 

- Surface mount (IRF9Z34S, SiHF9Z34S) 

- 175 °C operating temperature 

Available Available 

- Fast switching 

- P-channel 

- Fully avalanche rated 

- Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 

**Note** 

- This    datasheet    provides    information    about    parts    that    are RoHS-compliant and / or parts that are non RoHS-compliant.  For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for details 

## **DESCRIPTION** 

Third generation power MOSFETs from Vishay utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. 

The D[2] PAK is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D[2] PAK is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0 W in a typical surface mount application. 

## **ORDERING INFORMATION** 

|Package|D2PAK (TO-263)|D2PAK (TO-263)|D2PAK (TO-263)|
|---|---|---|---|
|Lead (Pb)-free and Halogen-free|-|SiHF9Z34STRL-GE3a|SiHF9Z34STRR-GE3a|
|Lead (Pb)-free|IRF9Z34SPbF|IRF9Z34STRLPbFa|IRF9Z34STRRPbFa|



## **Note** 

a. See device orientation 

|**ABSOLUTE MAXIMUM RATINGS**(TC= 25 °C,unless otherwise noted)<br>~~pC~~|**ABSOLUTE MAXIMUM RATINGS**(TC= 25 °C,unless otherwise noted)<br>~~pC~~|**ABSOLUTE MAXIMUM RATINGS**(TC= 25 °C,unless otherwise noted)<br>~~pC~~|**ABSOLUTE MAXIMUM RATINGS**(TC= 25 °C,unless otherwise noted)<br>~~pC~~|**ABSOLUTE MAXIMUM RATINGS**(TC= 25 °C,unless otherwise noted)<br>~~pC~~|**ABSOLUTE MAXIMUM RATINGS**(TC= 25 °C,unless otherwise noted)<br>~~pC~~|
|---|---|---|---|---|---|
|**PARAMETER**<br>~~a~~|||**SYMBOL**<br>~~a~~<br>~~eo~~|**LIMIT**<br>~~a~~<br>~~eo~~|**UNIT**<br>~~a~~<br>~~ie~~|
|Drain-Source Voltage<br>~~a~~<br>~~es~~|||VDS<br>~~a~~<br>~~es~~<br>~~eo~~|-60<br>~~a~~<br>~~es~~<br>~~eo~~|V<br>~~a~~<br>~~es~~<br>~~ie~~<br>~~ee~~|
|Gate-Source Voltage<br>~~es~~<br>~~ee~~|||VGS<br>~~es~~<br>~~eo~~<br>~~ee~~|± 20<br>~~es~~<br>~~eo~~<br>~~ee~~||
|Continuous Drain Current<br>~~rr~~|VGSat -10 V<br>~~rr~~<br>~~ee~~|TC= 25 °C<br>~~rr~~<br>~~ee~~|ID<br>~~eo~~<br>~~rr~~<br>~~ee~~|-18<br>~~eo~~<br>~~rr~~<br>~~ee~~|A<br>~~ie~~<br>~~rr~~<br>~~ee~~|
|||TC= 100 °C<br>~~rr~~<br>~~ee~~||-13<br>~~rr~~<br>~~ee~~||
|Pulsed Drain Currenta, e<br>~~rr~~<br>~~ee~~<br>~~Oe~~|||IDM<br>~~rr~~<br>~~ee~~<br>~~Oe~~|-72<br>~~rr~~<br>~~ee~~<br>~~Oe~~||
|Linear DeratingFactor<br>~~ee ~~<br>~~Oe~~|||~~ee~~<br>~~Oe~~|0.59<br>~~ee~~<br>~~Oe~~|W/°C<br>~~ee~~<br>~~Oe~~|
|Single Pulse Avalanche Energyb, e<br>~~a~~|||EAS<br>~~a~~|370<br>~~a~~|mJ<br>~~a~~|
|Avalanche Currenta<br>~~a~~<br>~~a~~|||IAR<br>~~a~~<br>~~a~~|-18<br>~~a~~<br>~~a~~|A<br>~~a~~<br>~~a~~|
|Repetitive Avalanche Energya<br>~~a~~<br>~~a~~|||EAR<br>~~a~~<br>~~a~~|8.8<br>~~a~~<br>~~a~~|mJ<br>~~a~~<br>~~a~~|
|Maximum Power Dissipation<br>~~a~~<br>~~eee~~|TC= 25 °C<br>~~a~~<br>~~eee~~||PD<br>~~a~~<br>~~eee~~|88<br>~~a~~<br>~~eee~~|W<br>~~a~~<br>~~eee~~|
||TA= 25 °C<br>~~eee~~|||3.7<br>~~eee~~||
|Peak Diode Recovery dV/dtc, e<br>~~OO~~|||dV/dt<br>~~OO~~|-4.5<br>~~OO~~|V/ns<br>~~OO~~|
|OperatingJunction and Storage Temperature Range<br>~~so~~|||TJ, Tstg<br>~~so~~|-55 to +175<br>~~so~~|°C<br>~~so~~|
|SolderingRecommendations (Peak temperature)d<br>~~so~~|for 10 s<br>~~so~~||~~so~~|300<br>~~so~~||



e. Uses IRF9Z34, SiHF9Z34 data and test conditions 

S21-0943-Rev. F, 20-Sep-2021 

Document Number: 91093 

**1** For technical questions, contact: hvm@vishay.com 

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**IRF9Z34S, SiHF9Z34S** 

www.vishay.com 

Vishay Siliconix 

## **THERMAL RESISTANCE RATINGS** 

|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|
|---|---|---|---|---|
|**PARAMETER**|**SYMBOL**|**TYP.**|**MAX.**|**UNIT**|
|Maximum Junction-to-Ambient (PCB<br>mounted, steady-state)a|RthJA|-|40|°C/W|
|Maximum Junction-to-Case (Drain)|RthJC|-|1.7||



## **Note** 

a. When mounted on 1" square PCB (FR-4 or G-10 material) 

|**SPECIFICATIONS**(TJ= 25 °C,unless otherwise noted)|**SPECIFICATIONS**(TJ= 25 °C,unless otherwise noted)|**SPECIFICATIONS**(TJ= 25 °C,unless otherwise noted)|**SPECIFICATIONS**(TJ= 25 °C,unless otherwise noted)|||||
|---|---|---|---|---|---|---|---|
|**PARAMETER**|**SYMBOL**|**TEST CONDITIONS**||**MIN.**|**TYP.**|**MAX.**|**UNIT**|
|**Static**||||||||
|Drain-Source Breakdown Voltage|VDS|VGS= 0 V, ID= -250 μA||-60|-|-|V|
|VDSTemperature Coefficient|VDS/TJ|Reference to 25 °C, ID= -1 mAc||-|-0.06|-|V/°C|
|Gate-Source Threshold Voltage|VGS(th)|VDS= VGS, ID= -250 μA||-2.0|-|-4.0|V|
|Gate-Source Leakage|IGSS|VGS= ± 20 V||-|-|± 100|nA|
|Zero Gate Voltage Drain Current|IDSS|VDS= -60 V, VGS= 0 V||-|-|-100|μA|
|||VDS= -48 V, VGS= 0 V, TJ= 150 °C||-|-|-500||
|Drain-Source On-State Resistance|RDS(on)|VGS= -10 V|ID= -11 Ab|-|-|0.14||
|Forward Transconductance|gfs|VDS= -25 V, ID= -11 Ac||5.9|-|-|S|
|**Dynamic**||||||||
|Input Capacitance|Ciss|VGS= 0 V,<br>VDS= -25 V,<br>f = 1.0 MHz, see fig. 5c||-|1100|-|pF|
|Output Capacitance|Coss|||-|620|-||
|Reverse Transfer Capacitance|Crss|||-|100|-||
|Total Gate Charge|Qg|VGS= -10 V|ID= -18 A, VDS= -48 V,<br>see fig. 6 and 13b, c|-|-|34|nC|
|Gate-Source Charge|Qgs|||-|-|9.9||
|Gate-Drain Charge|Qgd|||-|-|16||
|Turn-On Delay Time|td(on)|VDD= -30 V, ID= -18 A,<br>Rg= 12, RD= 1.5, see fig. 10b, c||-|18|-|ns|
|Rise Time|tr|||-|120|-||
|Turn-Off Delay Time|td(off)|||-|20|-||
|Fall Time|tf|||-|58|-||
|Gate Input Resistance|Rg|f = 1 MHz, open drain||0.7|-|3.9||
|**Drain-Source Body Diode Characteristics**||||||||
|Continuous Source-Drain Diode Current|IS|MOSFET symbol<br>showing the<br>integral reverse<br>p -n junction diode<br>S<br>D<br>G||-|-|-18|A|
|Pulsed Diode Forward Currenta|ISM|||-|-|-72||
|Body Diode Voltage|VSD|TJ= 25 °C, IS= -18 A, VGS= 0 Vb||-|-|-6.3|V|
|Body Diode Reverse Recovery Time|trr|TJ= 25 °C, IF= -18 A, dI/dt = 100 A/μsb, c||-|100|200|ns|
|Body Diode Reverse Recovery Charge|Qrr|||-|280|520|nC|
|Forward Turn-On Time|ton|Intrinsic turn-on time is negligible (turn-on is dominated by LSand LD)||||||



## **Notes** 

b. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11) 

c. Pulse width  300 μs; duty cycle  2 % 

d. Uses IRF9Z34, SiHF9Z34 data and test conditions 

S21-0943-Rev. F, 20-Sep-2021 

Document Number: 91093 

**2** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**IRF9Z34S, SiHF9Z34S** 

Vishay Siliconix 

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www.vishay.com<br>**----- End of picture text -----**<br>


## **TYPICAL CHARACTERISTICS** (25 °C, unless otherwise noted) 

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10 [2] VGS<br>Top - 15 V<br>- 10 V<br>- 8.0 V<br>- 7.0 V<br>- 6.0 V<br>- 5.5 V<br>10 [1] Bottom - 5.0 V- 4.5 V<br>- 4.5 V<br>10 [0]<br>20 µs Pulse Width<br>TC = 25  ° C<br>10 [-1] 10 [0] 10 [1]<br>91093_01 - VDS, Drain-to-Source Voltage (V)<br>, Drain Current (A)<br>D<br>- I<br>**----- End of picture text -----**<br>


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2.5<br>ID = - 18 A<br>V GS = - 10 V<br>2.0<br>1.5<br>1.0<br>0.5<br>0.0<br>- 60 - 40- 20 0 20 40 60 80 100 120140 160 180<br>91093_04 TJ, Junction Temperature (°C)<br>(Normalized)<br>, Drain-to-Source On Resistance<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


**Fig. 1 - Typical Output Characteristics** 

**Fig. 4 - Normalized On-Resistance vs. Temperature** 

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10 [2] 2000<br>V GS VGS = 0 V, f = 1 MHz<br>Top - 15 V C iss  = C gs  + C gd , C ds  Shorted<br>- 10 V 1600 Crss = Cgd<br>- 8.0 V Coss = Cds + Cgd<br>- 7.0 V<br>- 6.0 V<br>10 [1] - 5.5 V 1200 Ciss<br>- 5.0 V<br>Bottom - 4.5 V<br>- 4.5 V 800 C oss<br>400<br>10 [0]<br>20 µs Pulse Width C rss<br>T C  = 175 °C 0<br>10 [-1] 10 [0] 10 [1] 10 [0] 10 [1]<br>91093_02 - VDS, Drain-to-Source Voltage (V) 91093_05 - VDS, Drain-to-Source Voltage (V)<br> Fig. 2 - Typical Output Characteristics  Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage<br>20<br>ID = - 18 A<br>VDS = - 48 V<br>25 °C 16<br>175 °C VDS = - 30 V<br>10 [1] 12<br>8<br>4<br>10 [0] 20 µs Pulse Width For test circuit<br>VDS = - 25 V see figure 13<br>0<br>4 5 6 7 8 9 10 0 5 10 15 20 25 30 35<br>91093_03 - VGS, Gate-to-Source Voltage (V) 91093_06 QG, Total Gate Charge (nC)<br>, Drain Current (A)D Capacitance (pF)<br>- I<br>, Drain Current (A)<br>D<br>- I<br>, Gate-to-Source Voltage (V)<br>GS<br>- V<br>**----- End of picture text -----**<br>


**Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage** 

**Fig. 3 - Typical Transfer Characteristics** 

**Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage** 

Document Number: 91093 

S21-0943-Rev. F, 20-Sep-2021 

**3** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**IRF9Z34S, SiHF9Z34S** 

www.vishay.com 

Vishay Siliconix 

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10 [1] 175 °C<br>25  ° C<br>10 [0]<br>V GS = 0 V<br>0.0 1.0 2.0 3.0 4.0 5.0<br>91093_07 - VSD, Source-to-Drain Voltage (V)<br>, Reverse Drain Current (A)<br>SD<br>- I<br>**----- End of picture text -----**<br>


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20<br>16<br>12<br>8<br>4<br>0<br>25 50 75 100 125 150 175<br>91093_09 TC, Case Temperature (°C)<br>, Drain Current (A)<br>D<br>- I<br>**----- End of picture text -----**<br>


**Fig. 7 - Typical Source-Drain Diode Forward Voltage** 

**Fig. 9 - Maximum Drain Current vs. Case Temperature** 

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RD<br>VDS<br>VGS<br>D.U.T.<br>R<br>g +- VDD<br>- 10 V<br>Pulse width ≤ 1 µs<br>Duty factor ≤ 0.1 %<br>**----- End of picture text -----**<br>


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10 [3]<br>Operation in this area limited<br>5 by RDS(on)<br>2<br>10 [2]<br>10 µs<br>5<br>100 µs<br>2<br>10 1 ms<br>5<br>TC = 25  ° C 10 ms<br>2 T J  = 175  ° C<br>Single Pulse<br>10.1<br>0.1 2 5 1 2 5 10 2 5 1022 2 5 10 [[3]]<br>91093_08 - VDS, Drain-to-Source Voltage (V)DS, Drain-to-Source Voltage (V), Drain-to-Source Voltage (V)<br>, Drain Current (A)<br>D<br>- I<br>**----- End of picture text -----**<br>


**Fig. 10a - Switching Time Test Circuit** 

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Single Pulse td(on) tr td(off) tf<br>10.1 2 5 1 2 5 10 2 5 1022 2 5 10 [[3]] VGS<br>10 %<br>- VDS, Drain-to-Source Voltage (V)DS, Drain-to-Source Voltage (V), Drain-to-Source Voltage (V)<br> Fig. 8 - Maximum Safe Operating Area<br>90 %<br>VDS<br> Fig. 10b - Switching Time Waveforms<br>10<br>1 D = 0.5<br>0.2<br>PDM<br>0.1<br>0.1 0.05 t1<br>0.02 Single Pulse t2<br>0.01 (Thermal Response) Notes:<br>1.  Duty Factor, D = t 1 /t 2<br>2.  Peak Tj = PDM x ZthJC + TC<br>10 [-2]<br>10 [-5] 10 [-4] 10 [-3] 10 [-2] 0.1 1 10<br>91093_11 t1, Rectangular Pulse Duration (s)<br>)thJC<br>Thermal Response (Z<br>**----- End of picture text -----**<br>


**Fig. 8 - Maximum Safe Operating Area** 

**Fig. 10b - Switching Time Waveforms** 

**Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case** 

S21-0943-Rev. F, 20-Sep-2021 

Document Number: 91093 

**4** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**IRF9Z34S, SiHF9Z34S** 

Vishay Siliconix 

www.vishay.com 

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L<br>VDS IAS<br>Vary tp to obtain<br>required IAS<br>Rg D.U.T. VDS<br>+ [-] [V] DD<br>IAS VDD<br>- 10 V tp<br>tp 0.01 Ω<br>VDS<br>**----- End of picture text -----**<br>


**Fig. 12a - Unclamped Inductive Test Circuit** 

**Fig. 12b - Unclamped Inductive Waveforms** 

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1200<br>ID<br>Top - 7.3 A<br>1000 - 13 A<br>Bottom - 18 A<br>800<br>600<br>400<br>200<br>0 VDD = - 25 V<br>25 50 75 100 125 150 175<br>91093_12c Starting TJ, Junction Temperature (°C)<br>, Single Pulse Energy (mJ)<br>AS<br>E<br>**----- End of picture text -----**<br>


**Fig. 12c - Maximum Avalanche Energy vs. Drain Current** 

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Current regulator<br>Same type as D.U.T.<br>QG 50 kΩ<br>- 10 V 12 V 0.2 µF<br>0.3 µF<br>QGS QGD -<br>D.U.T. + VDS<br>VG VGS<br>- 3 mA<br>Charge<br>IG ID<br>Current sampling resistors<br>**----- End of picture text -----**<br>


**Fig. 13 - Maximum Avalanche Energy vs. Drain Current** 

**Fig. 13b - Gate Charge Test Circuit** 

S21-0943-Rev. F, 20-Sep-2021 

Document Number: 91093 

**5** For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**IRF9Z34S, SiHF9Z34S** 

Vishay Siliconix 

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www.vishay.com<br>**----- End of picture text -----**<br>


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Peak Diode Recovery dV/dt Test Circuit<br>**----- End of picture text -----**<br>


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D.U.T.<br>+<br>Circuit layout considerations<br>• Low stray inductance<br>• Ground plane<br>• Low leakage inductance<br>current transformer<br>-<br>+<br>-<br>Rg • dV/dt controlled by Rg +<br>• • ID.U.T. - device under testSD controlled by duty factor “D” - VDD<br>Note<br>• Compliment N-Channel of D.U.T. for driver<br>- +<br>**----- End of picture text -----**<br>


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Driver gate drive<br>P.W.<br>Period D =<br>P.W. Period<br>VGS = - 10 V [a]<br>D.U.T. lSD waveform<br>Reverse<br>recovery Body diode forward<br>current current<br>dI/dt<br>D.U.T. VDS waveform<br>Diode recovery<br>dV/dt<br>VDD<br>Re-applied<br>voltage<br>Body diode forward drop<br>Inductor current<br>Ripple ≤ 5 % ISD<br>Note<br>a. VGS = - 5 V for logic level and - 3 V drive devices<br>**----- End of picture text -----**<br>


**Fig. 14 - For P-Channel** 

_Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data see www.vishay.com/ppg?91093._ 

Document Number: 91093 

S21-0943-Rev. F, 20-Sep-2021 

**6** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**Package Information** 

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## Vishay Siliconix 

## **TO-263AB (HIGH VOLTAGE)** 

|L1<br>L2<br>D<br>4<br>(Datum A|L1<br>L2<br>D<br>4<br>(Datum A|L1<br>L2<br>D<br><br>(Datum A|L1<br>L2<br>D<br><br>(Datum A|)|3<br>|4|4|4|4|4|4|4|4|4|
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
||||||E<br><br>||||||||||
||||1||4||||||||||
||||D||1<br>2<br>C|3<br><br>C|||||||||
||||2||**B**<br>e||||||||||
|||||**B**|||||||||||
|||||2 x|||||||||||
||||||||||||||||
||||||||||||||||
||||||||||||||||
|||||Lead tip||||Section B - B and C - C<br>Scale: none|||||||
||||||||||||||||
||||**MILLIMETERS**||||**INCHES**<br>**MIN.**<br>**MAX.**<br>0.160<br>0.190<br>0.000<br>0.010<br>0.020<br>0.039<br>0.020<br>0.035<br>0.045<br>0.070<br>0.045<br>0.068<br>0.015<br>0.029<br>0.015<br>0.023<br>0.045<br>0.065<br>0.330<br>0.380||||**MILLIMETERS**||**INCHES**||
|**DIM.**|**MIN.**||||**MA**|**X.**|**MIN.**|||**DIM.**|**MIN.**|**MAX.**|**MIN.**|**MAX.**|
|A|4.06||||4.8|3|0.160|||D1|6.86|-|0.270|-|
|A1|0.00||||0.2|5|0.000|||E|9.65|10.67|0.380|0.420|
|b|0.51||||0.9|9|0.020|||E1|6.22|-|0.245|-|
|b1|0.51||||0.8|9|0.020|||e|2.54 BSC||0.100 BSC||
|b2|1.14||||1.7|8|0.045|||H|14.61|15.88|0.575|0.625|
|b3|1.14||||1.7|3|0.045|||L|1.78|2.79|0.070|0.110|
|c|0.38||||0.7|4|0.015|||L1|-|1.65|-|0.066|
|c1|0.38||||0.5|8|0.015|||L2|-|1.78|-|0.070|
|c2|1.14||||1.6|5|0.045|||L3|0.25 BSC||0.010 BSC||
|D|8.38||||9.6|5|0.330|||L4|4.78|5.28|0.188|0.208|
|ECN: S-82110-Rev. A, 15-Sep-08<br>DWG: 5970|||||||||||||||



ECN: S-82110-Rev. A, 15-Sep-08 DWG: 5970 

## **Notes** 

1. Dimensioning and tolerancing per ASME Y14.5M-1994. 

2. Dimensions are shown in millimeters (inches). 

3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outmost extremes of the plastic body at datum A. 

4. Thermal PAD contour optional within dimension E, L1, D1 and E1. 

5. Dimension b1 and c1 apply to base metal only. 

6. Datum A and B to be determined at datum plane H. 

7. Outline conforms to JEDEC outline to TO-263AB. 

Document Number: 91364 Revision: 15-Sep-08 

www.vishay.com 

1 

**AN826** 

## **Vishay Siliconix** 

## RECOMMENDED MINIMUM PADS FOR D[2] PAK:  3-Lead 

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0.420<br>(10.668)<br>mil<br>0.145<br>(3.683)<br>0.135<br>(3.429)<br>0.200 0.050<br>| rt<br>— (5.080) (1.257)<br>Recommended Minimum Pads<br>Dimensions in Inches/(mm)<br>0.355 (9.017)<br>0.635<br>(16.129)<br>**----- End of picture text -----**<br>


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Document Number:   73397 11-Apr-05 

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**Legal Disclaimer Notice** Vishay 

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Revision: 09-Jul-2021 

Document Number: 91000 

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