IRF840LCPBF

**IRF840LC** 

Vishay Siliconix 

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www.vishay.com<br>**----- End of picture text -----**<br>


## **Power MOSFET** 

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D<br>TO-220AB<br>G<br> > 7<br>S<br>D<br>G S<br>N-Channel MOSFET<br>**----- End of picture text -----**<br>


|**PRODUCT SUMMARY**|**PRODUCT SUMMARY**|**PRODUCT SUMMARY**|
|---|---|---|
|VDS(V)|500||
|RDS(on)(Ω)|VGS= 10 V|0.85|
|Qgmax. (nC)|39||
|Qgs(nC)|10||
|Qgd(nC)|19||
|Configuration|Single||



## **FEATURES** 

- Ultra low gate charge 

- Reduced gate drive requirement 

Available Available RoHS 

- Enhanced 30 V VGS rating 

- Reduced Ciss, Coss, Crss 

- Extremely high frequency operation 

- Repetitive avalanche rated 

- Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 

- **Note** 

- This    datasheet    provides    information    about    parts    that    are RoHS-compliant and / or parts that are non RoHS-compliant.  For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for details 

## **DESCRIPTION** 

This new series of low charge power MOSFETs achieve significantly lower gate charge over conventional MOSFETs. Utilizing the new LCDMOS technology, the device improvements are achieved without added product cost, allowing for reduced gate drive requirements and total system savings. In addition, reduced switching losses and improved efficiency are achievable in a variety of high frequency applications. Frequencies of a few MHz at high current are possible using the new low charge MOSFETs. 

These device improvements combined with the proven ruggedness and reliability that are characteristic of Power MOSFETs offer the designer a new standard in power transistors for switching applications. 

## **ORDERING INFORMATION** 

|**ABSOLUTE MAXIMUM RATINGS**(TC= 25 °C,unless otherwise noted)<br>~~Cn~~|**ABSOLUTE MAXIMUM RATINGS**(TC= 25 °C,unless otherwise noted)<br>~~Cn~~|**ABSOLUTE MAXIMUM RATINGS**(TC= 25 °C,unless otherwise noted)<br>~~Cn~~|**ABSOLUTE MAXIMUM RATINGS**(TC= 25 °C,unless otherwise noted)<br>~~Cn~~|**ABSOLUTE MAXIMUM RATINGS**(TC= 25 °C,unless otherwise noted)<br>~~Cn~~|**ABSOLUTE MAXIMUM RATINGS**(TC= 25 °C,unless otherwise noted)<br>~~Cn~~|
|---|---|---|---|---|---|
|**PARAMETER**<br>~~ee~~<br>~~ee~~|||**SYMBOL**<br>~~ee~~|**LIMIT**<br>~~ee~~|**UNIT**<br>~~ee~~|
|Drain-source voltage<br>~~ee~~|||VDS|500|V|
|Gate-source voltage<br>~~ee~~|||VGS|± 30||
|Continuous drain current<br>~~ee~~|VGSat 10 V<br>~~ee~~|TC= 25 °C<br>~~ee~~|ID|8.0|A|
|||TC= 100 °C||5.1||
|Pulsed drain currenta<br>~~ee~~|||IDM<br>~~ee~~|28<br>~~ee~~||
|Linear deratingfactor||||1.0|W/°C|
|Singlepulse avalanche energy b<br>~~a~~|||EAS<br>~~a~~|510<br>~~a~~|mJ<br>~~a~~|
|Repetitive avalanche currenta<br>~~a~~|||IAR<br>~~a~~|8.0<br>~~a~~|A<br>~~a~~|
|Repetitive avalanche energy a<br>~~a~~|||EAR<br>~~a~~|13<br>~~a~~|mJ<br>~~a~~|
|Maximumpower dissipation<br>~~eC~~|TC= 25 °C<br>~~eC~~||PD<br>~~eC~~|125<br>~~eC~~|W<br>~~eC~~|
|Peak diode recoverydV/dtc<br>~~a~~<br>~~nenn~~|||dV/dt<br>~~a~~|3.5<br>~~a~~<br>~~ee~~|V/ns<br>~~a~~<br>~~ee~~|
|Operating junction and storage temperature range<br>~~nenn~~|||TJ, Tstg|-55 to +150<br>~~ee~~|°C<br>~~ee~~<br>~~eee~~|
|Solderingrecommendations(peak temperature) d<br>~~ne~~|For 10 s<br>~~nn~~<br>~~ee~~|||300<br>~~ee~~<br>~~eee~~||
|Mounting torque<br>~~ne~~<br>~~ee~~|6-32 or M3 screw<br>~~nn~~<br>~~ee~~<br>~~ee~~||~~ee~~|10<br>~~ee~~<br>~~ee~~<br>~~eee~~|lbf · in<br>~~ee~~<br>~~ee~~<br>~~eee~~|
|||||1.1<br>~~ee~~<br>~~eee~~|N · m<br>~~ee~~<br>~~eee~~|



S21-0852-Rev. C, 16-Aug-2021 

Document Number: 91067 

**1** For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**IRF840LC** 

Vishay Siliconix 

www.vishay.com 

|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|**THERMAL RESISTANCE RATINGS**|
|---|---|---|---|---|
|**PARAMETER**|**SYMBOL**|**TYP.**|**MAX.**|**UNIT**|
|Maximum junction-to-ambient|RthJA|-|62|°C/W|
|Case-to-sink, flat,greased surface|RthCS|0.50|-||
|Maximum junction-to-case (drain)|RthJC|-|1.0||



|**SPECIFICATIONS**(TJ= 25 °C,unless otherwise noted)|**SPECIFICATIONS**(TJ= 25 °C,unless otherwise noted)|**SPECIFICATIONS**(TJ= 25 °C,unless otherwise noted)|**SPECIFICATIONS**(TJ= 25 °C,unless otherwise noted)|||||
|---|---|---|---|---|---|---|---|
|**PARAMETER**|**SYMBOL**|**TEST CONDITIONS**||**MIN.**|**TYP.**|**MAX.**|**UNIT**|
|**Static**||||||||
|Drain-source breakdown voltage|VDS|VGS= 0 V, ID= 250 μA||500|-|-|V|
|VDStemperature coefficient|ΔVDS/TJ|Reference to 25 °C, ID= 1 mA||-|0.63|-|V/°C|
|Gate-source threshold voltage|VGS(th)|VDS= VGS, ID= 250 μA||2.0|-|4.0|V|
|Gate-source leakage|IGSS|VGS= ± 20 V||-|-|± 100|nA|
|Zero gate voltage drain current|IDSS|VDS= 500 V, VGS= 0 V||-|-|25|μA|
|||VDS= 400V, VGS= 0 V, TJ= 125 °C||-|-|250||
|Drain-source on-state resistance|RDS(on)|VGS= 10 V|ID= 4.8 Ab|-|-|0.85|Ω|
|Forward transconductance|gfs|VDS= 50 V, ID= 4.8 Ab||4.0|-|-|S|
|**Dynamic**||||||||
|Drain-source breakdown voltage|Ciss|VGS= 0 V,<br>VDS= 25 V,<br>f = 1.0 MHz, see fig. 5||-|1100|-|pF|
|VDStemperature coefficient|Coss|||-|170|-||
|Gate-source threshold voltage|Crss|||-|18|-||
|Gate-source leakage|Qg|VGS= 10 V|ID= 8.0 A, VDS= 400 V<br>see fig. 6 and 13b|-|-|39|nC|
|Zero gate voltage drain current|Qgs|||-|-|10||
||Qgd|||-|-|19||
|Drain-source on-state resistance|td(on)|VDD= 250 V, ID= 8.0 A,<br>Rg= 9.1Ω, RD= 30Ω<br>see fig. 10b||-|12|-|ns|
|Forward transconductance|tr|||-|25|-||
|Drain-source breakdown voltage|td(off)|||-|27|-||
|VDStemperature coefficient|tf|||-|19|-||
|Gate input resistance|Rg|f = 1 MHz, open drain||0.7|-|3.7|Ω|
|Internal drain inductance|LD|Between lead,<br>6 mm (0.25") from<br>package and center of<br>die contact<br>D<br>S<br>G||-|4.5|-|nH|
|Internal source inductance|LS|||-|7.5|-||
|**Drain-Source Body Diode Characteristics**||||||||
|Continuous source-drain diode current|IS|MOSFET symbol<br>showing the<br>integral reverse<br>p - n junction diode<br>S<br>D<br>G||-|-|8.0|A|
|Pulsed diode forward currenta|ISM|||-|-|28||
|Body diode voltage|VSD|TJ= 25 °C, IS= 8.0 A, VGS= 0 Vb||-|-|2.0|V|
|Body diode reverse recovery time|trr|TJ= 25 °C, IF= 8.0 A,<br>dI/dt = 100 A/μsb||-|490|740|ns|
|Body diode reverse recovery charge|Qrr|||-|3.0|4.5|μC|
|Forward turn-on time|ton|Intrinsic turn-on time is negligible (turn-on is dominated by LSand LD)||||||



## **Notes** 

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11) 

b. Pulse width ≤ 300 μs; duty cycle ≤ 2 % 

S21-0852-Rev. C, 16-Aug-2021 

Document Number: 91067 

**2** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**IRF840LC** 

Vishay Siliconix 

www.vishay.com 

## **TYPICAL CHARACTERISTICS** (25 °C, unless otherwise noted) 

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V GS<br>Top 15 V<br>10 [1] 10 V<br>8.0 V<br>7.0 V<br>6.0 V<br>5.5 V<br>5.0 V<br>10 [0] Bottom 4.5 V<br>4.5 V<br>10 [-1] 20 µs Pulse Width<br>TC = 25 °C<br>10 [-1] 10 [0] 10 [1]<br>91067_01 VDS, Drain-to-Source Voltage (V)<br>, Drain Current (A)<br>ID<br>**----- End of picture text -----**<br>


**Fig. 1 - Typical Output Characteristics, TC = 25 °C** 

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3.0<br>ID = 8.0 A<br>VGS = 10 V<br>2.5<br>2.0<br>1.5<br>1.0<br>0.5<br>0.0<br>- 60 - 40 - 20 0 20 40 60 80 100 120 140 160<br>91067_04 TJ, Junction Temperature (°C)<br>(Normalized)<br>, Drain-to-Source On Resistance<br>DS(on)<br>R<br>**----- End of picture text -----**<br>


**Fig. 4 - Normalized On-Resistance vs. Temperature** 

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VGS<br>10 [1] Top 15 V<br>10 V<br>8.0 V<br>7.0 V<br>6.0 V<br>5.5 V 4.5 V<br>5.0 V<br>10 [0]<br>Bottom 4.5 V<br>10 [-1] 20 µs Pulse Width<br>TC = 150 °C<br>10 [-1] 10 [0] 10 [1]<br>91067_02 VDS, Drain-to-Source Voltage (V)<br>, Drain Current (A)<br>ID<br>**----- End of picture text -----**<br>


**Fig. 2 - Typical Output Characteristics, TC = 150 °C** 

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10 [1]<br>150 °C<br>25 °C<br>10 [0]<br>20 µs Pulse Width<br>V DS  = 50 V<br>4 5 6 7 8 9 10<br>91067_03 VGS, Gate-to-Source Voltage (V)<br>, Drain Current (A)<br>ID<br>**----- End of picture text -----**<br>


**Fig. 3 - Typical Transfer Characteristics** 

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2400<br>VGS = 0 V, f = 1 MHz<br>Ciss = Cgs + Cgd, Cds Shorted<br>2000 C rss  = C gd<br>C oss  = C ds  + C gd<br>1600<br>C iss<br>1200<br>800 Coss<br>400 Crss<br>0<br>10 [0] 10 [1]<br>91067_05 VDS, Drain-to-Source Voltage (V)<br>Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage<br>20<br>ID = 8.0 A<br>16 VDS = 400 V<br>V DS  = 250 V<br>12 VDS = 100 V<br>8<br>4<br>For test circuit<br>see figure 13<br>0<br>0 8 16 24 32 40 48<br>91067_06 QG, Total Gate Charge (nC)<br>Capacitance (pF)<br>, Gate-to-Source Voltage (V)<br>GS<br>V<br>**----- End of picture text -----**<br>


**Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage** 

**Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage** 

S21-0852-Rev. C, 16-Aug-2021 

Document Number: 91067 

**3** For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**IRF840LC** 

Vishay Siliconix 

www.vishay.com 

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150 °C<br>10 [1]<br>25 °C<br>10 [0] VGS = 0 V<br>0.6 0.8 1.0 1.2 1.4 1.6<br>91067_07 VSD, Source-to-Drain Voltage (V)<br>, Reverse Drain Current (A)<br>ISD<br>**----- End of picture text -----**<br>


**Fig. 7 - Typical Source-Drain Diode Forward Voltage** 

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8.0<br>6.0<br>4.0<br>2.0<br>0.0<br>25 50 75 100 125 150<br>91067_09 TC, Case Temperature (°C)<br>, Drain Current (A)<br>ID<br>**----- End of picture text -----**<br>


**Fig. 9 - Maximum Drain Current vs. Case Temperature** 

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10 [3]<br>5 Operation in this area limitedby RDS(on)<br>2<br>10 [2]<br>5<br>2 10 µs<br>10<br>5 100 µ s<br>2 1 ms<br>1<br>5 TC = 25  ° C 10 m s<br>2 T J  = 150  ° C<br>Single Pulse<br>0.1<br>1 2 5 10 2 5 10 [2] 2 5 10 [3]<br>91067_08 VDS, Drain-to-Source Voltage (V)<br>, Drain Current (A)<br>ID<br>**----- End of picture text -----**<br>


**Fig. 8 - Maximum Safe Operating Area** 

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RD<br>VDS<br>VGS<br>D.U.T.<br>RG +- VDD<br>10 V<br>Pulse width ≤ 1 µs<br>Duty factor ≤ 0.1 %<br>Fig. 10a - Switching Time Test Circuit<br>VDS<br>90 %<br>10 %<br>VGS<br>td(on) tr td(off) tf<br>**----- End of picture text -----**<br>


**Fig. 10b - Switching Time Waveforms** 

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10<br>1<br>D = 0.5<br>P DM<br>0.2<br>0.1 0.1 t1<br>0.05 t2<br>Notes:<br>0.02<br>0.01 Single Pulse 1.  Duty Factor, D = t 1 /t 2<br>(Thermal Response) 2.  Peak Tj = PDM x ZthJC + TC<br>10 [-2]<br>10 [-5] 10 [-4] 10 [-3] 10 [-2] 0.1 1 10<br>91067_11 t1, Rectangular Pulse Duration (s)<br>)thJC<br>Thermal Response (Z<br>**----- End of picture text -----**<br>


**Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case** 

S21-0852-Rev. C, 16-Aug-2021 

Document Number: 91067 

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For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**IRF840LC** 

Vishay Siliconix 

www.vishay.com 

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L<br>VDS<br>Vary tp to obtain<br>required IAS<br>R G D.U.T. +<br>- [V][DD]<br>IAS<br>10 V<br>tp 0.01 Ω<br>**----- End of picture text -----**<br>


**Fig. 12a - Unclamped Inductive Test Circuit** 

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VDS<br>t<br>p<br>VDD<br>VDS<br>IAS<br>**----- End of picture text -----**<br>


**Fig. 12b - Unclamped Inductive Waveforms** 

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1200<br>ID<br>Top 3.6 A<br>1000 5.1 A<br>Bottom 8.0 A<br>800<br>600<br>400<br>200<br>0 VDD = 50 V<br>25 50 75 100 125 150<br>91067_12c Starting TJ, Junction Temperature (°C)<br>, Single Pulse Energy (mJ)<br>AS<br>E<br>**----- End of picture text -----**<br>


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QG<br>10 V<br>QGS QGD<br>VG<br>Charge<br>Fig. 13a - Basic Gate Charge Waveform<br>Current regulator<br>Same type as D.U.T.<br>50 kΩ<br>12 V 0.2 µF<br>0.3 µF<br>+<br>D.U.T. - VDS<br>VGS<br>3 mA<br>IG ID<br>Current sampling resistors<br>**----- End of picture text -----**<br>


**Fig. 13a - Basic Gate Charge Waveform** 

**Fig. 13b - Gate Charge Test Circuit** 

**Fig. 12c - Maximum Avalanche Energy vs. Drain Current** 

S21-0852-Rev. C, 16-Aug-2021 

Document Number: 91067 

**5** For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

**IRF840LC** 

Vishay Siliconix 

**==> picture [77 x 10] intentionally omitted <==**

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www.vishay.com<br>**----- End of picture text -----**<br>


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Peak Diode Recovery dv/dt Test Circuit<br>+ Circuit layout considerations<br>D.U.T.<br>   •  Low stray inductance<br>3  •  Ground plane<br> •  Low leakage inductance<br>current transformer<br>-<br>+<br>2<br>- - 4 +<br>1<br>Rg •  dv/dt controlled by Rg +<br>•  I•  Driver same type as D.U.T.SD controlled by duty factor “D” - VDD<br>•  D.U.T. - device under test<br>1 Driver gate drive<br>P.W.<br>Period D =<br>P.W. Period<br>VGS = 10 V  [a]<br>2 D.U.T. ISD waveform<br>Reverse<br>recovery Body diode forward<br>current current<br>di/dt<br>3 D.U.T. VDS waveform Diode recovery<br>dv/dt<br>VDD<br>Re-applied<br>voltage<br>Body diode forward drop<br>Inductor current<br>4<br>Ripple ≤ 5 % ISD<br>Note<br>a. VGS = 5 V for logic level devices<br>**----- End of picture text -----**<br>


**Fig. 14 - For N-Channel** 

_Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91067._ 

Document Number: 91067 

S21-0852-Rev. C, 16-Aug-2021 

**6** 

For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 

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## **Disclaimer** 

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Revision: 01-Jan-2023 

Document Number: 91000 

**1**