IAM-20680

## ‘TDK InvenSense 

## _**IAM-20680**_ 

## High Performance Automotive 6-Axis MotionTracking Device 

## **GENERAL DESCRIPTION** 

## **APPLICATIONS** 

The IAM-20680 is a 6-axis MotionTracking device for Automotive applications that combines a 3-axis gyroscope and a 3-axis accelerometer in a small 3x3x0.75mm (16-pin LGA) package. It also features a 512byte FIFO that can lower the traffic on the serial bus interface and reduce power consumption by allowing the system processor to burst read sensor data and then go into a low-power mode. IAM-20680, with its 6-axis integration, enables manufacturers to eliminate the costly and complex selection, qualification, and system level integration of discrete devices, guaranteeing optimal motion performance. 

The gyroscope has a programmable full-scale range of ±250 dps, ±500 dps, ±1000 dps, and ±2000 dps. The accelerometer has a user-programmable accelerometer full-scale range of ±2 _g_ , ±4 _g_ , ±8 _g_ , and ±16 _g_ . Factorycalibrated initial sensitivity of both sensors reduces production-line calibration requirements. 

Other industry-leading features include on-chip 16-bit ADCs, programmable digital filters, an embedded temperature sensor, and programmable interrupts. The device features I[2] C and SPI serial interfaces, a VDD operating range of 1.71V to 3.6V, and a separate digital IO supply, VDDIO from 1.71V to 3.6V. 

## **BLOCK DIAGRAM** 

**==> picture [204 x 160] intentionally omitted <==**

**----- Start of picture text -----**<br>
IAM-20680<br>INT<br>Self test X Accel ADC Interrupt<br>Status<br>Register<br>NCS<br>Self test Y Accel ADC FIFO Slave I2C and SPI Serial Interface SDOSCLK<br>Self test Z Accel ADC User & Config  SDI<br>Registers FSYNC<br>Self test X Gyro AD C Sensor<br>HS a Registers<br>Self test Y Gyro ADC<br>E+}<br>Self test Z Gyro AD C<br>= Temp Sensor ADC<br>Charge  Bias & LDOs<br>Pump<br>is a<br>VDD GND REGOUT<br>Signal Conditioning<br>**----- End of picture text -----**<br>


- Navigation Systems Aids for Dead Reckoning 

- Lift Gate Motion Detections 

- Accurate Location for Vehicle to Vehicle and Infrastructure 

- 360º View Camera Stabilization 

- Car Alarm 

- Telematics 

- Insurance Vehicle Tracking 

## **ORDERING INFORMATION** 

**PART AXES TEMP RANGE PACKAGE MSL*** IAM-20680[†] X,Y,Z -40°C to +85°C 16-Pin LGA 3 ~~a~~ †Denotes RoHS and Green-compliant package 

* Moisture sensitivity level of the package 

## **FEATURES** 

- Digital-output X-, Y-, and Z-axis angular rate sensors (gyroscopes) with a user-programmable full-scale range of ±250 dps, ±500 dps, ±1000 dps, and ±2000 dps and integrated 16-bit ADCs 

- Digital-output X-, Y-, and Z-axis accelerometer with a programmable full scale range of ±2 _g_ , ±4 _g_ , ±8 _g_ , and ±16 _g_ and integrated 16-bit ADCs 

- User-programmable digital filters for gyroscope, accelerometer, and temperature sensor 

- • Self-test 

- Wake-on-motion interrupt for low power operation of applications processor 

- Reliability testing performed according to AEC–Q100 

   - PPAP and qualification data available upon request 

## **TYPICAL OPERATING CIRCUIT** 

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**----- Start of picture text -----**<br>
1.8 – 3.3VDC<br>VDD<br>C2, 0.1 µF C4, 2.2 µF REGOUT<br>F t 16 15 14<br>C1, 0.47 µF<br>1.8 – 3.3 VDC VDDIO 1 13 GND<br>A<br>C3, 10 nF SCL SCL/SPC 2 12 RESV<br>SDA SDA/SDI 3 IAM-20680 11 RESV<br>AD0 SA0/SDO 4 10 RESV<br>VDDIO CS 5 9 RESV<br>6 7 8<br>|<br>RESV<br>INT RESV FSYNC<br>**----- End of picture text -----**<br>


Document Number: DS-000196 Revision: 1.1 Rev. Date: 01/30/2018 

**TDK Corporation** 1745 Technology Drive, San Jose, CA 95110 U.S.A +1(408) 988–7339 

InvenSense reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. 

www.invensense.com 

_**IAM-20680**_ 

## **TABLE OF CONTENTS** 

||General Description ............................................................................................................................................. 1|General Description ............................................................................................................................................. 1|
|---|---|---|
||Block Diagram ...................................................................................................................................................... 1|Block Diagram ...................................................................................................................................................... 1|
||Applications ......................................................................................................................................................... 1||
||Ordering Information ........................................................................................................................................... 1||
||Features ............................................................................................................................................................... 1||
||Typical Operating Circuit ...................................................................................................................................... 1||
|1|Introduction ......................................................................................................................................................... 7||
||1.1|Purpose and Scope .................................................................................................................................... 7|
||1.2|Product Overview...................................................................................................................................... 7|
||1.3|Applications ............................................................................................................................................... 7|
|2|Features ............................................................................................................................................................... 8||
||2.1|Gyroscope Features .................................................................................................................................. 8|
||2.2|Accelerometer Features ............................................................................................................................ 8|
||2.3|Additional Features ................................................................................................................................... 8|
|3|Electrical Characteristics ...................................................................................................................................... 9||
||3.1|Gyroscope Specifications .......................................................................................................................... 9|
||3.2|Accelerometer Specifications .................................................................................................................. 10|
||3.3|Electrical Specifications ........................................................................................................................... 11|
||3.4|I2C Timing Characterization ..................................................................................................................... 14|
||3.5|SPI Timing Characterization .................................................................................................................... 15|
||3.6|Absolute Maximum Ratings .................................................................................................................... 16|
||3.7|Thermal Information ............................................................................................................................... 16|
|4|Applications Information ................................................................................................................................... 17||
||4.1|Pin Out Diagram and Signal Description ................................................................................................. 17|
||4.2|Typical Operating Circuit ......................................................................................................................... 18|
||4.3|Bill of Materials for External Components .............................................................................................. 18|
||4.4|Block Diagram ......................................................................................................................................... 19|
||4.5|Overview ................................................................................................................................................. 19|
||4.6|Three-Axis MEMS Gyroscope with 16-bit ADCs and Signal Conditioning ............................................... 20|
||4.7|Three-Axis MEMS Accelerometer with 16-bit ADCs and Signal Conditioning ......................................... 20|
||4.8|I2C and SPI Serial Communications Interfaces ........................................................................................ 20|
||4.9|Self-Test................................................................................................................................................... 21|
||4.10|Clocking ............................................................................................................................................... 21|
||4.11|Sensor Data Registers ......................................................................................................................... 21|
||4.12|FIFO ..................................................................................................................................................... 22|
||4.13|Interrupts ............................................................................................................................................ 22|
||4.14|Digital-Output Temperature Sensor ................................................................................................... 22|
||4.15|Bias and LDOs ..................................................................................................................................... 22|
||4.16|Charge Pump ...................................................................................................................................... 22|



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Document Number: DS-000196 Revision: 1.1 

_**IAM-20680**_ 

|‘TDK|‘TDK|<br>**_IAM-20680_**<br>‘TDK InvenSense|
|---|---|---|
||4.17|Standard Power Modes ...................................................................................................................... 22|
||4.18|Sensor Initialization and Basic Configuration ..................................................................................... 22|
|5|Programmable Interrupts .................................................................................................................................. 24||
||5.1|Wake-on-Motion Interrupt ..................................................................................................................... 24|
|6|Digital Interface ................................................................................................................................................. 25||
||6.1|I2C and SPI Serial Interfaces .................................................................................................................... 25|
||6.2|I2C Interface ............................................................................................................................................. 25|
||6.3|IC Communications Protocol ................................................................................................................... 25|
||6.4|I2C Terms ................................................................................................................................................. 27|
||6.5|SPI Interface ............................................................................................................................................ 27|
|7|Serial Interface Considerations .......................................................................................................................... 29||
||7.1|IAM-20680 Supported Interfaces ............................................................................................................ 29|
|8|Register Map ...................................................................................................................................................... 30||
|9|Register Descriptions ......................................................................................................................................... 32||
||9.1|Registers 0 to 2 – Gyroscope Self-Test Registers .................................................................................... 32|
||9.2|Registers 13 to 15 – Accelerometer Self-Test Registers .......................................................................... 32|
||9.3|Register 19 – Gyro Offset Adjustment Register ...................................................................................... 33|
||9.4|Register 20 – Gyro Offset Adjustment Register ...................................................................................... 33|
||9.5|Register 21 – Gyro Offset Adjustment Register ...................................................................................... 33|
||9.6|Register 22 – Gyro Offset Adjustment Register ...................................................................................... 33|
||9.7|Register 23 – Gyro Offset Adjustment Register ...................................................................................... 33|
||9.8|Register 24 – Gyro Offset Adjustment Register ...................................................................................... 34|
||9.9|Register 25 – Sample Rate Divider .......................................................................................................... 34|
||9.10|Register 26 – Configuration ................................................................................................................ 34|
||9.11|Register 27 – Gyroscope Configuration .............................................................................................. 35|
||9.12|Register 28 – Accelerometer Configuration ....................................................................................... 35|
||9.13|Register 29 – Accelerometer Configuration 2..................................................................................... 36|
||9.14|Register 30 – Low Power Mode Configuration ................................................................................... 37|
||9.15|Register 31 – Wake-on Motion Threshold (Accelerometer) ............................................................... 37|
||9.16|Register 35 – FIFO Enable ................................................................................................................... 38|
||9.17|Register 54 – FSYNC Interrupt Status.................................................................................................. 38|
||9.18|Register 55 – INT/DRDY Pin / Bypass Enable Configuration ............................................................... 38|
||9.19|Register 56 – Interrupt Enable ............................................................................................................ 39|
||9.20|Register 58 – Interrupt Status ............................................................................................................. 39|
||9.21|Registers 59 to 64 – Accelerometer Measurements .......................................................................... 39|
||9.22|Registers 65 and 66 – Temperature Measurement ............................................................................ 40|
||9.23|Registers 67 to 72 – Gyroscope Measurements ................................................................................. 40|
||9.24|Register 104 – Signal Path Reset ......................................................................................................... 41|
||9.25|Register 105 – Accelerometer Intelligence Control ............................................................................ 41|
||9.26|Register 106 – User Control ................................................................................................................ 42|



Page 3 of 52 

Document Number: DS-000196 Revision: 1.1 

_**IAM-20680**_ 

|‘TDK|‘TDK|<br>**_IAM-20680_**<br>‘TDK InvenSense|
|---|---|---|
||9.27|Register 107 – Power Management 1 ................................................................................................ 42|
||9.28|Register 108 – Power Management 2 ................................................................................................ 43|
||9.29|Registers 114 and 115 – FIFO Count Registers ................................................................................... 43|
||9.30|Register 116 – FIFO Read Write .......................................................................................................... 44|
||9.31|Register 117 – Who Am I .................................................................................................................... 44|
||9.32|Registers 119, 120, 122, 123, 125, 126 Accelerometer Offset Registers ............................................ 44|
|10|Assembly ............................................................................................................................................................ 46||
||10.1|Orientation of Axes ............................................................................................................................. 46|
||10.2|Package Dimensions ........................................................................................................................... 47|
|11|Part Number Package Marking .......................................................................................................................... 49||
|12|Reference ........................................................................................................................................................... 50||
|13|Revision History ................................................................................................................................................. 51||



Page 4 of 52 

Document Number: DS-000196 Revision: 1.1 

_**IAM-20680**_ 

## **LIST OF FIGURES** 

|Figure 1. I|Figure 1. I2C Bus Timing Diagram ............................................................................................................................................................. 14|
|---|---|
|Figure 2. SPI Bus Timing Diagram ............................................................................................................................................................. 15|Figure 2. SPI Bus Timing Diagram ............................................................................................................................................................. 15|
|Figure 3. Pin out Diagram for IAM-20680 3.0x3.0x0.75mm LGA ............................................................................................................. 17|Figure 3. Pin out Diagram for IAM-20680 3.0x3.0x0.75mm LGA ............................................................................................................. 17|
|Figure 4. IAM-20680 LGA Application Schematic .................................................................................................................................... 18|Figure 4. IAM-20680 LGA Application Schematic .................................................................................................................................... 18|
|Figure 5. IAM-20680 Block Diagram ........................................................................................................................................................ 19|Figure 5. IAM-20680 Block Diagram ........................................................................................................................................................ 19|
|Figure 6. IAM-20680 Solution Using I|Figure 6. IAM-20680 Solution Using I2C Interface .................................................................................................................................... 20|
|Figure 7. IAM-20680 Solution Using SPI Interface ................................................................................................................................... 21|Figure 7. IAM-20680 Solution Using SPI Interface ................................................................................................................................... 21|
|Figure 8. START and STOP Conditions ...................................................................................................................................................... 25|Figure 8. START and STOP Conditions ...................................................................................................................................................... 25|
|Figure 9. Acknowledge on the I|Figure 9. Acknowledge on the I2C Bus ..................................................................................................................................................... 26|
|Figure 10. Complete I|Figure 10. Complete I2C Data Transfer ..................................................................................................................................................... 26|
|Figure 11. Typical SPI Master/Slave Configuration .................................................................................................................................. 28|Figure 11. Typical SPI Master/Slave Configuration .................................................................................................................................. 28|
|Figure 12. I/O Levels and Connections ..................................................................................................................................................... 29|Figure 12. I/O Levels and Connections ..................................................................................................................................................... 29|
|Figure 14. Orientation of Axes of Sensitivity and Polarity of Rotation .................................................................................................... 46|Figure 14. Orientation of Axes of Sensitivity and Polarity of Rotation .................................................................................................... 46|
|Figure 15. Package Dimensions................................................................................................................................................................ 47|Figure 15. Package Dimensions................................................................................................................................................................ 47|
|Figure 16. Part Number Package Marking ............................................................................................................................................... 49|Figure 16. Part Number Package Marking ............................................................................................................................................... 49|



Page 5 of 52 

Document Number: DS-000196 Revision: 1.1 

_**IAM-20680**_ 

## **LIST OF TABLES** 

|**LIST OF TABLES**|**LIST OF TABLES**|
|---|---|
|Table 1. Gyroscope Specifications ............................................................................................................................................................. 9|Table 1. Gyroscope Specifications ............................................................................................................................................................. 9|
|Table 2. Accelerometer Specifications ..................................................................................................................................................... 10|Table 2. Accelerometer Specifications ..................................................................................................................................................... 10|
|Table 3. D.C. Electrical Characteristics ..................................................................................................................................................... 11|Table 3. D.C. Electrical Characteristics ..................................................................................................................................................... 11|
|Table 4. A.C. Electrical Characteristics ..................................................................................................................................................... 13|Table 4. A.C. Electrical Characteristics ..................................................................................................................................................... 13|
|Table 5. Other Electrical Specifications .................................................................................................................................................... 13|Table 5. Other Electrical Specifications .................................................................................................................................................... 13|
|Table 6. I|Table 6. I2C Timing Characteristics ........................................................................................................................................................... 14|
|Table 7. SPI Timing Characteristics (8 MHz Operation) ........................................................................................................................... 15|Table 7. SPI Timing Characteristics (8 MHz Operation) ........................................................................................................................... 15|
|Table 8. Absolute Maximum Ratings ....................................................................................................................................................... 16|Table 8. Absolute Maximum Ratings ....................................................................................................................................................... 16|
|Table 9. Thermal Information .................................................................................................................................................................. 16|Table 9. Thermal Information .................................................................................................................................................................. 16|
|Table 10. Signal Descriptions ................................................................................................................................................................... 17|Table 10. Signal Descriptions ................................................................................................................................................................... 17|
|Table 11. Bill of Materials ........................................................................................................................................................................ 18|Table 11. Bill of Materials ........................................................................................................................................................................ 18|
|Table 12. Standard Power Modes for IAM-20680 ................................................................................................................................... 22|Table 12. Standard Power Modes for IAM-20680 ................................................................................................................................... 22|
|Table 13. Table of Interrupt Sources ........................................................................................................................................................ 24|Table 13. Table of Interrupt Sources ........................................................................................................................................................ 24|
|Table 14. Serial Interface ......................................................................................................................................................................... 25|Table 14. Serial Interface ......................................................................................................................................................................... 25|
|Table 15. I|Table 15. I2C Terms .................................................................................................................................................................................. 27|
|Table 16. Configuration............................................................................................................................................................................ 35|Table 16. Configuration............................................................................................................................................................................ 35|
|Table 17. Accelerometer Data Rates and Bandwidths (Low-noise mode) ............................................................................................... 36|Table 17. Accelerometer Data Rates and Bandwidths (Low-noise mode) ............................................................................................... 36|
|Table 18. Accelerometer Filter Bandwidths, Noise, and Current Consumption ...................................................................................... 36|Table 18. Accelerometer Filter Bandwidths, Noise, and Current Consumption ...................................................................................... 36|
|Table 19. Example Configurations of Gyroscope Low Power Mode ........................................................................................................ 37|Table 19. Example Configurations of Gyroscope Low Power Mode ........................................................................................................ 37|
|Table 20. Package Dimensions ................................................................................................................................................................. 48|Table 20. Package Dimensions ................................................................................................................................................................. 48|
|Table 21. Part Number Package Marking ................................................................................................................................................ 49|Table 21. Part Number Package Marking ................................................................................................................................................ 49|



Page 6 of 52 

Document Number: DS-000196 Revision: 1.1 

_**IAM-20680**_ 

## _**1 INTRODUCTION**_ 

## **1.1 PURPOSE AND SCOPE** 

This document is a product specification, providing description, specifications, and design related information on the IAM-20680 Automotive MotionTracking device. The device is housed in a small 3x3x0.75 mm 16-pin LGA package. 

## **1.2 PRODUCT OVERVIEW** 

The IAM-20680 is a 6-axis MotionTracking device for Automotive applications, that combines a 3-axis gyroscope and a 3-axis accelerometer in a small 3x3x0.75 mm (16-pin LGA) package. It also features a 512-byte FIFO that can lower the traffic on the serial bus interface and reduce power consumption by allowing the system processor to burst read sensor data and then go into a lowpower mode. IAM-20680, with its 6-axis integration, enables manufacturers to eliminate the costly and complex selection, qualification, and system level integration of discrete devices, guaranteeing optimal motion performance. 

The gyroscope has a programmable full-scale range of ±250 dps, ±500 dps, ±1000 dps, and ±2000 dps. The accelerometer has a userprogrammable accelerometer full-scale range of ±2 _g_ , ±4 _g_ , ±8 _g_ , and ±16 _g_ . Factory-calibrated initial sensitivity of both sensors reduces production-line calibration requirements. 

Other industry-leading features include on-chip 16-bit ADCs, programmable digital filters, an embedded temperature sensor, and programmable interrupts. The device features I[2] C and SPI serial interfaces, a VDD operating range of 1.71V to 3.6V, and a separate digital IO supply, VDDIO from 1.71V to 3.6V. 

Communication with all registers of the device is performed using either I[2] C at 40 0kHz or SPI at 8 MHz. 

By leveraging its patented and volume-proven CMOS-MEMS fabrication platform, which integrates MEMS wafers with companion CMOS electronics through wafer-level bonding, InvenSense has driven the package size down to a footprint and thickness of 3x3x0.75 mm (16-pin LGA), to provide a very small yet high-performance, low-cost package. The device provides high robustness by supporting 10,000 _g_ shock reliability. 

## **1.3 APPLICATIONS** 

- Navigation Systems Aids for Dead Reckoning 

- Lift Gate Motion Detections 

- Accurate Location for Vehicle to Vehicle and Infrastructure 

- 360º View Camera Stabilization 

- Car Alarm 

- Telematics 

- Insurance Vehicle Tracking 

Page 7 of 52 

Document Number: DS-000196 Revision: 1.1 

_**IAM-20680**_ 

## _**2 FEATURES**_ 

## **2.1 GYROSCOPE FEATURES** 

The triple-axis MEMS gyroscope in the IAM-20680 includes a wide range of features: 

- Digital-output X-, Y-, and Z-axis angular rate sensors (gyroscopes) with a user-programmable full-scale range of ±250 dps, ±500 dps, ±1000 dps, and ±2000 dps and integrated 16-bit ADCs 

- Digitally-programmable low-pass filter 

- Low-power gyroscope operation 

- Factory calibrated sensitivity scale factor 

- Self-test 

## **2.2 ACCELEROMETER FEATURES** 

The triple-axis MEMS accelerometer in IAM-20680 includes a wide range of features: 

- Digital-output X-, Y-, and Z-axis accelerometer with a programmable full scale range of ±2 _g_ , ±4 _g_ , ±8 _g_ and ±16 _g_ and integrated 16-bit ADCs 

- User-programmable interrupts 

- Wake-on-motion interrupt for low power operation of applications processor 

- Self-test 

## **2.3 ADDITIONAL FEATURES** 

The IAM-20680 includes the following additional features: 

- Smallest and thinnest LGA package for portable devices: 3x3x0.75 mm (16-pin LGA) 

- Minimal cross-axis sensitivity between the accelerometer and gyroscope axes 

- 512-byte FIFO buffer enables the applications processor to read the data in bursts 

- Digital-output temperature sensor 

- User-programmable digital filters for gyroscope, accelerometer, and temperature sensor 

- 10,000 _g_ shock tolerant 

- 400 kHz Fast Mode I[2] C for communicating with all registers 

- 8 MHz SPI serial interface for communicating with all registers 

- MEMS structure hermetically sealed and bonded at wafer level 

- RoHS and Green compliant 

Page 8 of 52 

Document Number: DS-000196 Revision: 1.1 

&“T DK InvenSense 

_**IAM-20680**_ 

## _**3 ELECTRICAL CHARACTERISTICS**_ 

## **3.1 GYROSCOPE SPECIFICATIONS** 

Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA = 25°C, unless otherwise noted. 

All Zero-rate output, sensitivity, and noise specifications include board soldering effects. 

|**PARAMETER**<br>~~I~~|**CONDITIONS**<br>~~I~~<br>~~GO~~<br>~~a~~|**MIN**<br>~~I~~<br>~~GO~~<br>~~a~~|**TYP**<br>~~I~~<br>~~(OG~~<br>~~a~~|**MAX**<br>~~I~~<br>~~(OG~~<br>~~me~~|**UNITS**<br>~~I~~<br>~~(~~|**NOTES**<br>~~I~~|
|---|---|---|---|---|---|---|
|**GYROSCOPE SENSITIVITY**<br>~~GO~~<br>~~(OG (~~<br>~~a~~<br>~~aaa~~<br>~~me~~|||||||
|Full-Scale Range<br>~~a~~|FS_SEL=0<br>~~a~~<br>~~a~~|~~a~~<br>~~a~~|±250<br>~~a~~<br>~~a~~|~~a~~<br>~~me~~|dps<br>~~a~~|3<br>~~a~~|
|~~ee~~|FS_SEL=1<br>~~a ~~<br>~~ee~~|~~a ~~<br>~~ee~~|±500<br> ~~a~~<br>~~ee~~|~~me~~<br>~~ee~~|dps<br>~~ee~~|3<br>~~ee~~|
|~~ee~~|FS_SEL=2<br>~~ee~~|~~ee~~|±1000<br>~~ee~~|~~ee~~|dps<br>~~ee~~|3<br>~~ee~~|
|~~es~~|FS_SEL=3<br>~~es~~|~~es~~|±2000<br>~~es~~|~~es~~|dps<br>~~es~~|3<br>~~es~~|
|Gyroscope ADC Word Length<br>~~es~~|~~es~~|~~es~~|16<br>~~es~~|~~es~~|bits<br>~~es~~|3<br>~~es~~|
|SensitivityScale Factor<br>~~———~~|FS_SEL=0<br>~~———~~|~~———~~|131<br>~~———~~|~~———~~|LSB/(dps)<br>~~———~~|3<br>~~———~~|
|~~———~~|FS_SEL=1<br>~~———~~|~~———~~|65.5<br>~~———~~|~~———~~|LSB/(dps)<br>~~———~~|3<br>~~———~~|
|~~a~~|FS_SEL=2<br>~~a~~|~~a~~|32.8<br>~~a~~|~~a~~|LSB/(dps)<br>~~a~~|3<br>~~a~~|
|~~a~~|FS_SEL=3<br>~~a~~|~~a~~|16.4<br>~~a~~|~~a~~|LSB/(dps)<br>~~a~~|3<br>~~a~~|
|Nonlinearity<br>~~es~~|Best fit straight line;25°C<br>~~es~~|~~es~~|±0.1<br>~~es~~|~~es~~|%<br>~~es~~|1<br>~~es~~|
|Cross-Axis Sensitivity<br>~~es~~|25°C<br>~~es~~|~~es~~|±5<br>~~es~~|~~es~~|%<br>~~es~~|1<br>~~es~~|
|**ZERO-RATE OUTPUT (ZRO)**<br>~~a~~|||||||
|Initial ZRO Tolerance<br>~~a~~|25°C<br>~~a~~|~~a~~|-0.8<br>~~a~~|~~a~~|dps<br>~~a~~|2<br>~~a~~|
|ZRO Variation Over Temperature<br>~~a~~<br>~~NN~~|-40°C to +85°C<br>~~a~~<br>~~NN~~|~~a~~|±1<br>~~a~~|~~a~~|dps<br>~~a~~<br>~~ooo~~|1<br>~~a~~<br>~~ooo~~|
|**GYROSCOPE NOISE PERFORMANCE(FS_SEL=0)**<br>~~a~~<br>~~NN~~<br>~~ooo~~|||||||
|Rate Noise Spectral Density<br>~~NN~~<br>~~OTT~~|-40°C to +85°C<br>~~NN~~<br>~~OTT~~|~~OTT~~|0.005<br>~~OTT~~|~~OTT~~|dps/√Hz<br>~~ooo~~<br>~~OTT~~|1,4<br>~~ooo~~<br>~~OTT~~|
||-40°C to +85°C, including<br>lifetime drift<br>~~NN~~<br>~~OTT~~<br>~~I~~|~~OTT~~<br>~~(~~|0.010<br>~~OTT~~<br>~~(~~|~~OTT~~<br>~~(~~|dps/√Hz<br>~~ooo~~<br>~~OTT~~|1,4<br>~~ooo~~<br>~~OTT~~|
|Gyroscope Mechanical Frequencies<br>~~nD~~|~~nD~~<br>~~I~~|25<br>~~nD~~<br>~~(~~|27<br>~~nD~~<br>~~(~~|29<br>~~nD~~<br>~~(~~|KHz<br>~~nD~~|2<br>~~nD~~|
|Low Pass Filter Response<br>~~a~~|Programmable Range<br>~~I~~<br>~~a~~|5<br>~~(~~<br>~~a~~|~~(~~<br>~~a~~|250<br>~~(~~<br>~~a~~|Hz<br>~~a~~|3<br>~~a~~|
|Gyroscope Start UpTime<br>~~a~~|From Sleepmode<br>~~a~~|~~a~~|35<br>~~a~~|~~a~~|ms<br>~~a~~|1<br>~~a~~|
|Output Data Rate<br>~~TLL~~|Programmable, Normal<br>(Filtered)mode<br>~~TLL~~|4<br>~~TLL~~|~~TLL~~|8000<br>~~TLL~~|Hz<br>~~TLL~~|1<br>~~TLL~~|



- **Notes** : 1. Derived from validation or characterization of parts, not guaranteed in production. 

   2. Tested in production. 

   3. Guaranteed by design. 

   4. Calculated from Total RMS Noise. 

Page 9 of 52 

Document Number: DS-000196 Revision: 1.1 

_**IAM-20680**_ 

## **3.2 ACCELEROMETER SPECIFICATIONS** 

Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA = 25°C, unless otherwise noted. 

All Zero-g output, sensitivity, and noise specifications include board soldering effects. 

|**PARAMETER**|**CONDITIONS**|**MIN**|**TYP**|**MAX**|**UNITS**|**NOTES**|
|---|---|---|---|---|---|---|
|**ACCELEROMETER SENSITIVITY**<br>~~C0Ee~~|||||||
|Full-Scale Range<br>~~C0~~<br>~~———~~<br>~~———___—_—~~|AFS_SEL=0<br>~~Ee~~|~~Ee~~|±2<br>~~Ee~~|~~Ee~~|_g_<br>~~Ee~~|3<br>~~Ee~~|
||AFS_SEL=1<br>~~Ee~~|~~Ee~~|±4<br>~~Ee~~|~~Ee~~|_g_<br>~~Ee~~|3<br>~~Ee~~|
||AFS_SEL=2<br>~~Ee~~<br>~~nD~~<br>~~a~~|~~Ee~~<br>~~nD~~<br>~~a~~|±8<br>~~Ee~~<br>~~nD~~|~~Ee~~<br>~~nD~~|_g_<br>~~Ee~~<br>~~nD~~|3<br>~~Ee~~<br>~~nD~~|
||AFS_SEL=3<br>~~Ee~~<br>~~———~~<br>~~a~~<br>~~———___—_—~~|~~Ee~~<br>~~———~~<br>~~a~~<br>~~———___—_—~~|±16<br>~~Ee~~<br>~~———~~<br>~~———___—_—~~|~~Ee~~<br>~~———~~<br>~~———___—_—~~|_g_<br>~~Ee~~<br>~~———~~<br>~~———___—_—~~|3<br>~~Ee~~<br>~~———~~<br>~~———___—_—~~|
|ADC Word Length<br>~~C0 ~~<br>~~———~~<br>~~———___—_—~~|Output in two’s complement format<br> ~~Ee~~<br>~~———~~<br>~~a~~<br>~~———___—_—~~|~~Ee~~<br>~~———~~<br>~~a~~<br>~~———___—_—~~|16<br>~~Ee~~<br>~~———~~<br>~~———___—_—~~|~~Ee~~<br>~~———~~<br>~~———___—_—~~|bits<br>~~Ee~~<br>~~———~~<br>~~———___—_—~~|3<br>~~Ee~~<br>~~———~~<br>~~———___—_—~~|
|Sensitivity Scale Factor<br>~~———___—_—~~|AFS_SEL=0<br>~~a~~<br>~~———___—_—~~|~~a~~<br>~~———___—_—~~|16,384<br>~~———___—_—~~|~~———___—_—~~|LSB/_g_<br>~~———___—_—~~|3<br>~~———___—_—~~|
||AFS_SEL=1<br>~~———___—_—~~|~~———___—_—~~|8,192<br>~~———___—_—~~|~~———___—_—~~|LSB/_g_<br>~~———___—_—~~|3<br>~~———___—_—~~|
||AFS_SEL=2<br>~~———___—_—~~<br>~~—————~~|~~———___—_—~~<br>~~—————~~|4,096<br>~~———___—_—~~<br>~~—————~~|~~———___—_—~~<br>~~—————~~|LSB/_g_<br>~~———___—_—~~<br>~~—————~~|3<br>~~———___—_—~~<br>~~—————~~|
||AFS_SEL=3<br>~~———___—_—~~<br>~~—————~~|~~———___—_—~~<br>~~—————~~|2,048<br>~~———___—_—~~<br>~~—————~~|~~———___—_—~~<br>~~—————~~|LSB/_g_<br>~~———___—_—~~<br>~~—————~~|3<br>~~———___—_—~~<br>~~—————~~|
|Nonlinearity<br>~~———___—_—~~|Best Fit Straight Line for 2g,25°C<br>~~———___—_—~~|-0.25<br>~~———___—_—~~|~~———___—_—~~|+0.25<br>~~———___—_—~~|%<br>~~———___—_—~~|1<br>~~———___—_—~~|
|Cross-Axis Sensitivity|25°C||±5||%|1|
|**ZERO-G OUTPUT**|||||||
|Initial Tolerance<br>~~——————~~|All axes,25°C<br>~~——————~~|~~——————~~|±50<br>~~——————~~|~~——————~~|m_g_<br>~~——————~~|1<br>~~——————~~|
|Zero-G Level Change vs. Temperature<br>~~——————~~|-40°C to +85°C<br>~~——————~~|~~——————~~|±50<br>~~——————~~|~~——————~~|m_g_<br>~~——————~~|1<br>~~——————~~|
|**NOISE PERFORMANCE**<br>~~a~~<br>~~II~~<br>~~ee cesee~~|||||||
|Power Spectral Density<br>~~ee ces~~|Low noise mode,-40°C to +85°C<br>~~a~~<br>~~ces~~|~~I~~<br>~~ee~~|135<br>~~I~~||µ_g_/√Hz|1,4|
||Low noise mode, -40°C to +85°C, including<br>lifetime drift<br>~~a~~<br>~~ces~~|~~I~~<br>~~ee~~|190<br>~~I~~||µ_g_/√Hz|1,4|
|Low Pass Filter Response<br>~~ee ces~~<br>~~Pf~~<br>~~SS~~|Programmable Range<br>~~a~~<br>~~ces ~~<br>~~Pf~~<br>~~————~~|5<br>~~I ~~<br> ~~ee~~<br>~~Pf~~<br>~~————~~|~~I~~<br>~~Pf~~|218<br>~~Pf~~|Hz<br>~~Pf~~|3<br>~~Pf~~|
|Accelerometer Startup Time<br>~~SS~~|From Sleepmode<br>~~————~~|~~————~~||20|ms|1|
||From Cold Start,1ms VDDramp<br>~~————~~|~~————~~||30|ms|1|
|Output Data Rate<br>~~SS ~~<br>~~EE~~|Lowpower(duty-cycled)<br> ~~————~~<br>~~EE~~|0.24<br>~~————~~<br>~~EE~~|~~EE~~|500<br>~~EE~~|Hz<br>~~EE~~|1|
||Low noise(active)<br>~~EE~~|4<br>~~EE~~|~~EE~~|4000<br>~~EE~~|Hz<br>~~EE~~||



**Table 2. Accelerometer Specifications** 

Please contact TDK-InvenSense for a datasheet with maximum and minimum performance values over temperature and lifetime. 

## **Notes** : 

1. Derived from validation or characterization of parts, not guaranteed in production. 

2. Tested in production. 

3. Guaranteed by design. 

4. Calculated from Total RMS Noise. 

Page 10 of 52 

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## **3.3 ELECTRICAL SPECIFICATIONS** 

## **D.C. Electrical Characteristics** 

Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA = 25°C, unless otherwise noted. 

|**PARAMETER**<br>~~rs~~<br>~~Cn~~|**CONDITIONS**<br>~~QO~~<br>|**MIN**<br>~~QO~~<br>|**TYP**<br>~~QO~~<br>|**MAX**<br>~~QO~~<br>|**UNITS**<br>|**NOTES**<br>|
|---|---|---|---|---|---|---|
|**SUPPLY VOLTAGES**<br>~~rs~~<br>~~QO~~<br>~~Cn~~|||||||
|VDD<br>~~CnRs~~<br>~~rs~~|~~Rs~~<br>~~rs~~|1.71<br>~~Rs~~<br>~~Qs~~|1.8<br>~~Rs~~|3.6<br>~~Rs~~|V<br>~~Rs~~|1<br>~~Rs~~|
|VDDIO<br>~~rs~~<br>~~Cn~~|~~rs~~<br>|1.71<br>~~Qs~~<br>|1.8<br>|3.6<br>|V<br>|1<br>|
|**SUPPLY CURRENTS & BOOT TIME**<br>~~rs rsQs~~<br>~~Cn~~|||||||
|Normal Mode<br>~~CneS~~<br>~~ee ee~~|6-axis Gyroscope + Accelerometer<br>~~eS~~|~~eS~~|3<br>~~eS~~|~~eS~~|mA<br>~~eS~~|1<br>~~eS~~|
||3-axis Gyroscope<br>~~eS~~<br>~~Ps~~|~~eS~~<br>~~Ps~~|2.6<br>~~eS~~<br>~~Ps~~|~~eS~~<br>~~Ps~~|mA<br>~~eS~~<br>~~Ps~~|1<br>~~eS~~<br>~~Ps~~|
||3-axis Accelerometer,4 kHz ODR<br>~~eS~~<br>~~Ps~~<br>~~DD~~<br>~~ee~~|~~eS~~<br>~~Ps~~<br>~~DD~~<br>~~ee~~|390<br>~~eS~~<br>~~Ps~~<br>~~DD~~<br>~~ee~~|~~eS~~<br>~~Ps~~<br>~~DD~~<br>~~ee~~|µA<br>~~eS~~<br>~~Ps~~<br>~~DD~~<br>~~ee~~|1<br>~~eS~~<br>~~Ps~~<br>~~DD~~<br>~~ee~~|
|Accelerometer Low -Power Mode<br>~~ee ee~~|100 Hz ODR, 1x averaging<br>~~DD~~<br>~~ee~~<br>~~Ge~~|~~DD~~<br>~~ee~~<br>~~Ge~~|57<br>~~DD~~<br>~~ee~~|~~DD~~<br>~~ee~~|µA<br>~~DD~~<br>~~ee~~|2<br>~~DD~~<br>~~ee~~|
|Gyroscope Low-Power Mode<br>~~ee ee~~<br>~~rs~~|100 Hz ODR,1x averaging<br>~~DD~~<br>~~ee ~~<br>~~rs~~<br>~~Ge~~|~~DD~~<br> ~~ee ~~<br>~~rs~~<br>~~Ge~~|1.6<br>~~DD~~<br> ~~ee ~~<br>~~rs~~|~~DD~~<br> ~~ee ~~<br>~~rs~~|mA<br>~~DD~~<br> ~~ee~~<br>~~rs~~|2<br>~~DD~~<br>~~ee~~<br>~~rs~~|
|6-Axis Low-Power Mode<br>(Gyroscope Low-Power Mode;<br>Accelerometer Low-Noise Mode)<br>~~rs~~<br>~~Cn~~|100 Hz ODR, 1x averaging<br>~~rs~~<br>~~Ge~~<br>~~nr~~<br>|~~rs~~<br>~~Ge~~<br>~~(Rs~~<br>|1.92<br>~~rs~~<br>~~nD~~<br>|~~rs~~<br>~~I~~<br>|mA<br>~~rs~~<br>~~I~~<br>|2<br>~~rs~~<br>|
|Full-ChipSleepMode<br>~~errs~~<br>~~Cn~~|~~errs~~<br>~~nr~~<br>|~~errs~~<br>~~(Rs~~<br>|6<br>~~errs~~<br>~~nD~~<br>|~~errs~~<br>~~I~~<br>|µA<br>~~errs~~<br>~~I~~<br>|1<br>~~errs~~<br>|
|**TEMPERATURE RANGE**<br>~~nr~~<br>~~(RsnDI~~<br>~~I~~<br>~~Cn~~<br>~~ee~~<br>~~eeeeee~~<br>~~eee~~|||||||
|Specified Temperature Range<br>~~Cnee~~|Performance parameters are not applicable<br>beyond Specified Temperature Range<br>~~nr~~<br>~~ee~~<br>~~ee~~|-40<br>~~(Rs ~~<br>~~ee~~<br>~~ee~~|~~nD ~~<br>~~ee~~<br>~~ee~~|+85<br> ~~I~~<br>~~ee~~<br>~~ee~~|°C<br>~~I~~<br>~~ee~~<br>~~eee~~|1<br>~~ee~~<br>~~eee~~|



2. Based on simulation. 

Page 11 of 52 

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_**IAM-20680**_ 

## **A.C. Electrical Characteristics** 

Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA = 25°C, unless otherwise noted. 

|**PARAMETER**|**CONDITIONS**|**MIN**|**TYP**|**MAX**|**UNITS**|**NOTES**|
|---|---|---|---|---|---|---|
|**SUPPLIES**|||||||
|Supply Ramp Time (TRAMP)<br>~~es~~<br>~~SSSSoonaoqEmemamaamamamamsqqsmspmmmsqm»mMNMe~~|Monotonic ramp. Ramp<br>rate is 10% to 90% of the<br>final value<br>~~es~~<br>~~SSSSoonaoqEmemamaamamamamsqqsmspmmmsqm»mMNMe~~|0.01<br>~~es~~<br>~~SSSSoonaoqEmemamaamamamamsqqsmspmmmsqm»mMNMe~~|~~es~~<br>~~SSSSoonaoqEmemamaamamamamsqqsmspmmmsqm»mMNMe~~|100<br>~~es~~<br>~~OSS~~|ms<br>~~es~~<br>~~OS~~|1<br>~~es~~<br>~~OS~~|
|**TEMPERATURE SENSOR**<br>~~es~~<br>~~SSSSoonaoqEmemamaamamamamsqqsmspmmmsqm»mMNMe~~<br>~~OSSOS~~|||||||
|OperatingRange<br>~~SSSSoonaoqEmemamaamamamamsqqsmspmmmsqm»mMNMe~~|Ambient<br>~~SSSSoonaoqEmemamaamamamamsqqsmspmmmsqm»mMNMe~~|-40<br>~~SSSSoonaoqEmemamaamamamamsqqsmspmmmsqm»mMNMe~~|~~SSSSoonaoqEmemamaamamamamsqqsmspmmmsqm»mMNMe~~|85<br>~~OSS~~|°C<br>~~OS~~|1<br>~~OS~~|
|Room Temperature Offset<br>~~SSSSoonaoqEmemamaamamamamsqqsmspmmmsqm»mMNMe~~<br>~~SE~~|25°C<br>~~SSSSoonaoqEmemamaamamamamsqqsmspmmmsqm»mMNMe~~<br>~~SE~~|~~SSSSoonaoqEmemamaamamamamsqqsmspmmmsqm»mMNMe~~<br>~~SE~~|0<br>~~SSSSoonaoqEmemamaamamamamsqqsmspmmmsqm»mMNMe~~<br>~~SE~~|~~OSS ~~<br>~~SE~~|°C<br> ~~OS~~<br>~~SE~~|1<br>~~OS~~<br>~~SE~~|
|Sensitivity<br>~~SE~~|Untrimmed<br>~~SE~~|~~SE~~|326.8<br>~~SE~~|~~SE~~|LSB/°C<br>~~SE~~|1<br>~~SE~~|
|**POWER-ON RESET**<br>~~cr~~|||||||
|SupplyRampTime(TRAMP)<br>~~cr~~<br>~~a~~|Validpower-on RESET<br>~~cr~~<br>~~ee~~|0.01<br>~~cr~~|~~cr~~|100<br>~~cr~~|ms|1|
|Start-up time for register read/write<br>~~a~~<br>~~a~~|Frompower-up<br>~~ee~~||11|100|ms|1|
||From sleep<br>~~ee~~<br>~~ee~~|~~ee~~|~~ee~~|5<br>~~es~~|ms<br>~~es~~|1|
|**I2C ADDRESS**<br>~~a~~<br>~~a~~|SA0 = 0<br>SA0 = 1<br>~~ee~~<br>~~ee~~|~~ee~~|1101000<br>1101001<br>~~ee~~|~~es~~|~~es~~||
|**DIGITAL INPUTS(FSYNC, SA0, SPC, SDI, CS)**<br>~~a~~<br>~~ee ee ee~~<br>~~es es~~<br>~~|———~~<br>~~eeeeeo~~|||||||
|VIH,High Level Input Voltage<br>~~|———~~|~~ee~~|0.7*VDDIO<br>~~ee~~|~~ee~~|~~eo~~|V<br>~~eo~~|1|
|VIL,Low Level Input Voltage<br>~~———~~<br>~~$NA~~|~~ee~~<br>~~$NA~~|~~ee~~<br>~~1~~|~~ee~~<br>~~_____~~|0.3*VDDIO<br>~~eo~~<br>~~_____~~|V<br>~~eo~~||
|CI,Input Capacitance<br>~~———~~<br>~~$NA~~|~~ee~~<br>~~$NA~~|~~ee~~<br>~~1~~|< 10<br>~~ee~~<br>~~_____~~|~~eo~~<br>~~_____~~|pF<br>~~eo~~||
|**DIGITAL OUTPUT(SDO, INT)**<br>~~———~~<br>~~ee ee eo~~<br>~~$NA~~<br>~~1_____~~|||||||
|VOH,High Level Output Voltage<br>~~$NA~~<br>~~SE~~|RLOAD=1 MΩ;<br>~~$NA~~<br>~~SE~~|0.9*VDDIO<br>~~1 ~~<br>~~SE~~|~~_____~~<br>~~SE~~|~~_____~~<br>~~SE~~|V<br>~~SE~~|1|
|VOL1,LOW-Level Output Voltage<br>~~SE~~|RLOAD=1 MΩ;<br>~~SE~~<br>~~ee~~|~~SE~~<br>~~es~~|~~SE~~<br>~~es~~|0.1*VDDIO<br>~~SE~~<br>~~es~~|V<br>~~SE~~<br>~~ee~~||
|VOL.INT, INT Low-Level Output Voltage<br>~~ee~~|OPEN=1, 0.3mA sink<br>Current<br>~~ee~~<br>~~ee~~|~~ee~~<br>~~es~~|~~ee~~<br>~~es~~|0.1<br>~~ee~~<br>~~es~~|V<br>~~ee~~<br>~~ee~~||
|Output Leakage Current<br>~~ee~~<br>~~hh~~|OPEN=1<br>~~ee~~<br>~~ee~~<br>~~hh~~|~~ee~~<br>~~es~~<br>~~hh~~|100<br>~~ee~~<br>~~es~~<br>~~hh~~|~~ee~~<br>~~es ~~<br>~~hh~~|nA<br>~~ee~~<br> ~~ee~~<br>~~hh~~||
|tINT,INT Pulse Width<br>~~hh~~<br>~~——e—e———————————E————~~|LATCH_INT_EN=0<br>~~hh~~<br>~~——e—e———————————E————~~|~~hh~~<br>~~——e—e———————————E————~~|50<br>~~hh~~<br>~~eee~~|~~hh~~<br>~~eee~~|µs<br>~~hh~~<br>~~eee~~||
|**I2C I/O (SCL, SDA)**<br>~~——e—e———————————E————~~<br>~~eee~~|||||||
|VIL,LOW Level Input Voltage<br>~~——e—e———————————E————~~<br>~~———f+-~~|~~——e—e———————————E————~~<br>~~ee~~<br>~~———f+-~~|-0.5V<br>~~——e—e———————————E————~~<br>~~es~~|~~eee~~<br>~~es~~|0.3*VDDIO<br>~~eee~~<br>~~es~~|V<br>~~eee~~<br>~~ee~~|1|
|VIH, HIGH-Level Input Voltage<br>~~——e—e———————————E————~~<br>~~ee~~<br>~~———f+-~~|~~——e—e———————————E————~~<br>~~ee~~<br>~~ee~~<br>~~———f+-~~|0.7*VDDIO<br>~~——e—e———————————E————~~<br>~~ee~~<br>~~es~~|~~eee~~<br>~~ee~~<br>~~es~~|VDDIO + 0.5<br>V<br>~~eee~~<br>~~ee~~<br>~~es~~|V<br>~~eee~~<br>~~ee~~<br>~~ee~~||
|Vhys,Hysteresis<br>~~ee~~<br>~~———f+-~~|~~ee~~<br>~~ee~~<br>~~———f+-~~<br>~~pt~~|~~ee~~<br>~~es~~<br>~~pt~~|0.1*VDDIO<br>~~ee~~<br>~~es~~<br>~~pt~~|~~ee~~<br>~~es~~|V<br>~~ee~~<br>~~ee~~||
|VOL,LOW-Level Output Voltage<br>~~———f+-~~|3 mA sink current<br>~~ee~~<br>~~———f+-~~<br>~~pt~~<br>~~ee Gs~~|0<br>~~es~~<br>~~pt~~<br>~~Gs~~|~~es~~<br>~~pt~~<br>~~ee~~|0.4<br>~~es~~<br>~~es~~|V<br>~~ee~~||
|IOL, LOW-Level Output Current<br>~~———f+-~~<br>~~ee~~|VOL=0.4V<br>VOL=0.6V<br>~~ee ~~<br>~~———f+-~~<br>~~ee~~<br>~~ee Gs~~|~~es ~~<br>~~ee~~<br>~~Gs~~|3<br>6<br> ~~es ~~<br>~~ee~~<br>~~ee~~|~~es ~~<br>~~ee~~<br>~~es~~|mA<br>mA<br> ~~ee~~<br>~~ee~~||
|Output Leakage Current<br>~~DO~~|~~ee Gs~~<br>~~DO~~<br>~~ee~~|~~Gs ~~<br>~~DO~~<br>~~es~~|100<br> ~~ee~~<br>~~DO~~<br>~~ee~~|~~es~~<br>~~DO~~<br>~~es~~|nA<br>~~DO~~<br>~~ee~~||
|tof, Output Fall Time from VIHmaxto<br>VILmax<br>~~ee~~|Cbbus capacitance in pf<br>~~ee~~<br>~~ee~~|20+0.1Cb<br>~~ee~~<br>~~es~~|~~ee~~<br>~~ee~~|300<br>~~ee~~<br>~~es~~|ns<br>~~ee~~<br>~~ee~~||



Page 12 of 52 

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~~|~~ **INTERNAL CLOCK SOURCE** FCHOICE_B=1,2,3 32 kHz 2 ~~ee~~ SMPLRT_DIV=0 FCHOICE_B=0; DLPFCFG=0 or 7 8 kHz 2 Sample Rate SMPLRT_DIV=0 ~~ee~~ FCHOICE_B=0; ~~ee ee ee~~ DLPFCFG=1,2,3,4,5,6; 1 kHz 2 SMPLRT_DIV=0 ~~ee~~ CLK_SEL=0, 6 or gyro ~~ee~~ -5 +5 % 1 inactive; 25°C Clock Frequency Initial Tolerance CLK_SEL=1,2,3,4,5 and gyro -1 +1 % 1 ~~eee~~ active; 25°C ~~ee~~ ~~**e** eeee ee ee~~ CLK_SEL=0,6 or gyro -10 +10 % 1 Frequency Variation over inactive Temperature CLK_SEL=1,2,3,4,5 and gyro -1 +1 % 1 ~~eeeee~~ active ~~ee ee ee~~ **Table 4. A.C. Electrical Characteristics Notes** : 1. Derived from validation or characterization of parts, not guaranteed in production. 

2. Guaranteed by design. 

## **Other Electrical Specifications** 

Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA = 25°C, unless otherwise noted. 

|**PARAMETER**|**CONDITIONS**|**MIN**|**TYP**|**MAX**|**UNITS**|**NOTES**|
|---|---|---|---|---|---|---|
|**SERIAL INTERFACE**|||||||
|SPI Operating Frequency, All<br>Registers Read/Write|Low Speed Characterization||100<br>±10%||kHz|1|
||High Speed Characterization||1|8|MHz|1,2|
|SPI Modes|||Modes 0<br>and 3||||
|I2C Operating Frequency|All registers,Fast-mode|||400|kHz|1|
||All registers,Standard-mode|||100|kHz|1|



## **Table 5. Other Electrical Specifications** 

**Notes** : 

1. Derived from validation or characterization of parts, not guaranteed in production. 

2. SPI clock duty cycle between 45% and 55% should be used for 8 MHz operation. 

Page 13 of 52 

Document Number: DS-000196 Revision: 1.1 

EX i DIK InvenSense 

_**IAM-20680**_ 

## **3.4 I[2] C TIMING CHARACTERIZATION** 

Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA = 25°C, unless otherwise noted. 

|**PARAMETERS**<br>~~PO~~|**CONDITIONS**<br>~~PO~~|**MIN**<br>~~PO~~|**TYP**<br>~~PO~~|**MAX**<br>~~PO~~|**UNITS**<br>~~PO~~|**NOTES**<br>~~PO~~|
|---|---|---|---|---|---|---|
|**I2C TIMING**<br>~~PO~~<br>~~eG~~<br>~~RD~~|**I2C FAST-MODE**<br>~~PO~~<br>~~eG~~<br>~~QO~~|~~PO~~<br>~~eG~~<br>~~QO~~|~~PO~~<br>~~eG~~<br>~~QO~~|~~PO~~<br>~~eG~~|~~PO~~<br>~~eG~~|~~PO~~<br>~~eG~~|
|fSCL,SCL Clock Frequency<br>~~eG~~<br>~~RD~~|~~eG~~<br>~~QO~~|~~eG~~<br>~~QO~~|~~eG~~<br>~~QO~~|400<br>~~eG~~|kHz<br>~~eG~~|1<br>~~eG~~|
|tHD.STA, (Repeated) START Condition Hold Time<br>~~RD~~<br>~~fe~~<br>~~RD~~|~~QO~~<br>~~fe~~<br>~~Qf~~|0.6<br>~~QO~~<br>~~fe~~<br>~~Qf~~|~~QO~~<br>~~fe~~<br>~~Qf~~|~~fe~~|µs<br>~~fe~~|1<br>~~fe~~|
|tLOW,SCL Low Period<br>~~RD~~|~~Qf~~<br>~~QD~~|1.3<br>~~Qf~~<br>~~QD~~|~~Qf~~||µs|1|
|tHIGH,SCL High Period<br>~~RD~~<br>~~es~~|~~Qf~~<br>~~es~~<br>~~QD~~|0.6<br>~~Qf~~<br>~~es~~<br>~~QD~~|~~Qf~~<br>~~es~~|~~es~~|µs<br>~~es~~|1<br>~~es~~|
|tSU.STA, Repeated START Condition SetupTime<br>~~rs~~|~~QD~~<br>~~rs~~|0.6<br>~~QD~~<br>~~rs~~|~~rs~~|~~rs~~|µs<br>~~rs~~|1<br>~~rs~~|
|tHD.DAT,SDA Data Hold Time<br>~~RG~~|~~RG~~|0<br>~~RG~~|~~RG~~|~~RG~~|µs<br>~~RG~~|1<br>~~RG~~|
|tSU.DAT,SDA Data SetupTime<br>~~Qe~~<br>~~RD~~|~~Qe~~<br>~~QO~~|100<br>~~Qe~~<br>~~QO~~|~~Qe~~<br>~~QO~~|~~Qe~~|ns<br>~~Qe~~|1<br>~~Qe~~|
|tr,SDA and SCL Rise Time<br>~~RD~~|Cbbus cap. from 10 to 400pF<br>~~QO~~<br>~~QD~~|20+0.1Cb<br>~~QO~~<br>~~QD~~|~~QO~~|300|ns|1|
|tf,SDA and SCL Fall Time<br>~~RD~~<br>~~es~~|Cbbus cap. from 10 to 400pF<br>~~QO~~<br>~~es~~<br>~~QD~~|20+0.1Cb<br>~~QO~~<br>~~es~~<br>~~QD~~|~~QO~~<br>~~es~~|300<br>~~es~~|ns<br>~~es~~|1<br>~~es~~|
|tSU.STO, STOP Condition Setup Time|~~QD~~|0.6<br>~~QD~~|||µs|1|
|tBUF, Bus Free Time Between STOP and START<br>Condition||1.3|||µs|1|
|Cb,Capacitive Load for each Bus Line<br>~~GG~~|~~GG~~|~~GG~~|< 400<br>~~GG~~|~~GG~~|pF<br>~~GG~~|1<br>~~GG~~|
|tVD.DAT,Data Valid Time<br>~~GG~~<br>~~GQ~~|~~GG~~<br>~~GQ~~|~~GG~~<br>~~GQ~~|~~GG~~<br>~~GQ~~|0.9<br>~~GG~~<br>~~GQ~~|µs<br>~~GG~~<br>~~GQ~~|1<br>~~GG~~<br>~~GQ~~|
|tVD.ACK,Data Valid Acknowledge Time<br>~~GQ~~<br>~~Qf~~|~~GQ~~<br>~~Qf~~|~~GQ~~<br>~~Qf~~|~~GQ~~<br>~~Qf~~|0.9<br>~~GQ~~<br>~~Qf~~|µs<br>~~GQ~~<br>~~Qf~~|1<br>~~GQ~~<br>~~Qf~~|



**Table 6. I[2] C Timing Characteristics** 

**Notes** : 1. Based on characterization of 5 parts over temperature and voltage as mounted on evaluation board or in sockets. 

**==> picture [474 x 144] intentionally omitted <==**

**----- Start of picture text -----**<br>
tf tr tSU.DAT<br>SDA 7 70% : 70% n n es tt lar<br>30% 30%<br>tf continued below at  A<br>7 N tr x: cece cc c cc cne’ tVD.DAT +e so e<br>SCL 70% tHD.DAT 70%<br>30% 30%<br>tHD.STA 1/fSCL tLOW 9 [th]  clock cycle<br>S 1 [st]  clock cycle tHIGH<br>tBUF<br>SDA 70%<br>A 30%<br>tSU.STA tHD.STA tVD.ACK tSU.STO<br>SCL 70%<br>30%<br>Sr 9 [th]  clock cycle P S<br>**----- End of picture text -----**<br>


**Figure 1. I[2] C Bus Timing Diagram** 

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_**IAM-20680**_ 

## **3.5 SPI TIMING CHARACTERIZATION** 

Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA = 25°C, unless otherwise noted. 

|**PARAMETERS**|**CONDITIONS**|**MIN**|**TYP**|**MAX**|**UNITS**|**NOTES**|
|---|---|---|---|---|---|---|
|**SPI TIMING**|||||||
|fSPC, SPC Clock Frequency||||8|MHz|1|
|tLOW, SPC Low Period||56|||ns|1|
|tHIGH, SPC High Period||56|||ns|1|
|tSU.CS, CS Setup Time<br>~~pf~~|~~rs~~<br>~~pf~~|2<br>~~Qs~~<br>|~~QO~~<br>|~~QO~~<br>|ns<br>|1|
|tHD.CS, CS Hold Time<br>~~rr~~<br>~~pf~~|~~rr~~<br>~~rs~~<br>~~pf—_____f_f~~|63<br>~~rr~~<br>~~Qs~~<br>~~—_____f_f~~|~~rr~~<br>~~QO~~<br>~~—_____f_f_}~~|~~rr~~<br>~~QO~~<br>~~_}+f~~|ns<br>~~rr~~<br>~~+f~~|1<br>~~rr~~|
|tSU.SDI, SDI Setup Time<br>~~rr~~<br>~~pf~~|~~rr~~<br>~~rs~~<br>~~pf—_____f_f~~|3<br>~~rr~~<br>~~Qs~~<br>~~—_____f_f~~|~~rr~~<br>~~QO~~<br>~~—_____f_f_}~~|~~rr~~<br>~~QO~~<br>~~_}+f~~|ns<br>~~rr~~<br>~~+f~~|1<br>~~rr~~|
|tHD.SDI, SDI Hold Time<br>~~pf~~|~~rs~~<br>~~pf—_____f_f~~|7<br>~~Qs~~<br>~~—_____f_f~~<br>~~+f~~|~~QO~~<br>~~—_____f_f_}~~<br>~~+f~~|~~QO~~<br>~~_}+f~~<br>~~+ffF~~|ns<br>~~+f~~<br>~~fF~~|1<br>~~fF~~|
|tVD.SDO, SDO Valid Time<br>~~pf~~<br>~~[f+~~|Cload= 20 pF<br>~~rs~~<br>~~pf —_____f_f~~<br>~~[f+~~|~~Qs~~<br>~~—_____f_f~~<br>~~[f+~~<br>~~+f~~|~~QO~~<br>~~—_____f_f _}~~<br>~~[f+~~<br>~~+f~~|40<br>~~QO~~<br>~~_} +f~~<br>~~[f+~~<br>~~+ffF~~|ns<br>~~+f~~<br>~~[f+~~<br>~~fF~~|1<br>~~[f+~~<br>~~fF~~|
|tHD.SDO, SDO Hold Time<br>~~[f+~~<br>~~;~~|Cload= 20 pF<br>~~[f+~~<br>|6<br>~~[f+~~<br>~~+f~~<br>|~~[f+~~<br>~~+f~~<br>~~QO~~<br>|~~[f+~~<br>~~+ffF~~<br>~~QO~~<br>|ns<br>~~[f+~~<br>~~fF~~<br>|1<br>~~[f+~~<br>~~fF~~<br>|
|tDIS.SDO, SDO Output Disable Time<br>~~(OD~~<br>~~;~~|~~(OD~~<br>|~~+f~~<br>~~(OD~~<br><br>~~_f~~|~~+f~~<br>~~(OD~~<br>~~QO~~<br><br>~~_ffff~~|20<br>~~+f fF~~<br>~~(OD~~<br>~~QO~~<br><br>~~fff~~|ns<br>~~fF~~<br>~~(OD~~<br><br>~~fff~~|1<br>~~fF~~<br>~~(OD~~<br><br>~~fff~~|
|tFall, SCLK Fall Time<br>~~;ff~~|~~ff~~|~~ff~~<br>~~_f~~|~~QO~~<br>~~ff~~<br>~~_ffff~~|6.5<br>~~QO~~<br>~~ff~~<br>~~fff~~|ns<br>~~ff~~<br>~~fff~~|2<br>~~ff~~<br>~~fff~~|
|tRise, SCLK Rise Time<br>~~;ff~~|~~ff~~|~~ff~~<br>~~_f~~|~~QO~~<br>~~ff~~<br>~~_ffff~~|6.5<br>~~QO~~<br>~~ff~~<br>~~fff~~|ns<br>~~ff~~<br>~~fff~~|2<br>~~ff~~<br>~~fff~~|



**Table 7. SPI Timing Characteristics (8 MHz Operation)** 

## **Notes** : 

1. Based on characterization of 5 parts over temperature and voltage as mounted on evaluation board or in sockets 

**==> picture [490 x 190] intentionally omitted <==**

**----- Start of picture text -----**<br>
2. Based on other parameter values<br>CS 70%<br>30%<br>tFall tRise tHD;CS<br>ee tSU;CS tHIGH 1/fCLK<br>SCLK 70%<br>30%<br>tSU;SDI tHD;SDI tLOW<br>SDI 70% MSB IN LSB IN<br>30%<br>_— tVD;SDO tHD;SDO tDIS;SDO a<br>SDO 70%<br>MSB OUT LSB OUT<br>30%<br>a Aaa) cs axGl<br>Figure 2. SPI Bus Timing Diagram<br>**----- End of picture text -----**<br>


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## **3.6 ABSOLUTE MAXIMUM RATINGS** 

Stress above those listed as “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied.  Exposure to the absolute maximum ratings conditions for extended periods may affect device reliability. 

|**PARAMETER**|**RATING**|
|---|---|
|SupplyVoltage,VDD|-0.5V to 4V|
|SupplyVoltage,VDDIO|-0.5V to 4V|
|REGOUT|-0.5V to 2V|
|Input Voltage Level(SA0,FSYNC,SCL,SDA)|-0.5V to VDDIO + 0.5V|
|Acceleration(AnyAxis,unpowered)|10,000_g_for 0.2 ms|
|OperatingTemperature Range|-40°C to +85°C|
|Storage Temperature Range|-40°C to +125°C|
|Electrostatic Discharge (ESD) Protection|2 kV (HBM);<br>250V(MM)|
|Latch-up|JEDEC Class II (2),125°C<br>±100 mA|



**Table 8. Absolute Maximum Ratings** 

## **3.7 THERMAL INFORMATION** 

|**THERMAL METRIC**|**DESCRIPTION**|**VALUE**|
|---|---|---|
|θJA|Junction-to-ambient thermal resistance|84.58 °C/W|
|ψJT|Junction-to-topcharacterizationparameter|7 °C/W|



**Table 9. Thermal Information** 

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_**IAM-20680**_ 

## _**4 APPLICATIONS INFORMATION**_ 

## **4.1 PIN OUT DIAGRAM AND SIGNAL DESCRIPTION** 

|**PIN NUMBER**<br>~~es (~~<br>~~ee~~|**PIN NAME**<br>~~(~~|**PIN DESCRIPTION**<br>~~(~~|
|---|---|---|
|1<br>~~es (~~<br>~~ee~~<br>~~es~~|VDDIO<br>~~(~~<br>~~es~~|Digital I/O supplyvoltage.<br>~~(~~|
|2<br>~~ee~~<br>~~es~~<br>~~ee~~|SCL/SPC<br>~~es~~<br>~~es~~|I2C serial clock(SCL);SPI serial clock(SPC).|
|3<br>~~es~~<br>~~ee~~<br>~~es~~|SDA/SDI<br>~~es~~<br>~~es~~<br>~~es~~|I2C serial data(SDA);SPI serial data input(SDI).|
|4<br>~~ee~~<br>~~es~~|SA0/SDO<br>~~es~~<br>~~es~~|I2C slave address LSB(SA0);SPI serial data output(SDO).|
|5<br>~~es~~<br>~~Gn~~<br>~~ee~~|CS<br>~~es~~<br>~~Gn~~<br>~~es~~|Chipselect(0 = SPI mode;1 = I2C mode).<br>~~Gn~~|
|6<br>~~ee~~<br>~~es es~~|INT<br>~~es~~<br>~~es~~|Interrupt digital output(totempole or open-drain).|
|7<br>~~ee~~<br>~~es es~~<br>~~es~~|RESV<br>~~es~~<br>~~es~~<br>~~es~~|Reserved. Do not connect.|
|8<br>~~es es~~<br>~~es~~<br>~~es~~|FSYNC<br>~~es~~<br>~~es~~|Synchronization digital input(optional). Connect to GND if unused.|
|9<br>~~es~~<br>~~es~~<br>~~es~~|RESV<br>~~es~~<br>~~es~~|Reserved. Connect to GND.|
|10<br>~~es~~<br>~~es~~<br>~~re es~~|RESV<br>~~es~~<br>~~es~~|Reserved. Connect to GND.|
|11<br>~~es~~<br>~~re es~~<br>~~es~~|RESV<br>~~es~~<br>~~es~~<br>~~es~~|Reserved. Connect to GND.<br>~~Ge~~|
|12<br>~~re es~~<br>~~es~~<br>~~es~~|RESV<br>~~es~~<br>~~es~~<br>~~es~~|Reserved. Connect to GND.<br>~~Ge~~|
|13<br>~~es ~~<br>~~es~~|GND<br> ~~es~~<br>~~es~~|Connect to GND.<br>~~Ge~~|
|14<br>~~es~~<br>~~Gn~~<br>~~es es~~|REGOUT<br>~~es~~<br>~~Gn~~<br>~~es~~|Regulator filter capacitor connection.<br>~~Gn~~|
|15<br>~~Gn~~<br>~~es es~~<br>~~ee es~~|RESV<br>~~Gn~~<br>~~es~~<br>~~es~~|Reserved. Connect to GND.<br>~~Gn~~|
|16<br>~~es es~~<br>~~ee es~~|VDD<br>~~es~~<br>~~es~~|Power Supply.|



**Table 10. Signal Descriptions** 

**Note** : Power up with SCL/SPC and CS pins held low is not a supported use case. In case this power up approach is used, software reset is required using the PWR_MGMT_1 register, prior to initialization. 

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16 15 14<br>VDDIO 1 13 GND<br>+Z<br>SCL/SPC 2 12 RESV<br>SDA/SDI 3 IAM-20680 11 RESV<br>SA0/SDO 4 10 RESV<br>CS 5 9 RESV<br>ae +Y > +X a<br>6 7 8<br>IAM-20680<br>VDD RESV REGOUT<br>INT RESV FSYNC<br>**----- End of picture text -----**<br>


**LGA Package (Top View) 16-pin, 3mm x 3mm x 0.75mm Orientation of Axes of Sensitivity and Polarity of Rotation Typical Footprint and thickness** 

**Figure 3. Pin out Diagram for IAM-20680 3.0x3.0x0.75mm LGA** 

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**4.2 TYPICAL OPERATING CIRCUIT** 

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1.8 – 3.3VDC<br>VDD<br>C2, 0.1 µF C4, 2.2 µF<br>REGOUT<br>16 15 14<br>ToL<br>VDDIO GND 1 C1, 0.47 µF<br>1.8 – 3.3 VDC 1 13<br>C3, 10 nF SCL/SPC RESV<br>| SCLSDA SDA/SDI 23 IAM-20680 1211 RESV<br>AD0 SA0/SDO 4 10 RESV<br>VDDIO<br>CS RESV<br>5 9<br>6 7 8<br>|<br>RESV<br>INT RESV FSYNC<br>**----- End of picture text -----**<br>


**Figure 4. IAM-20680 LGA Application Schematic** 

**Note** : I[2] C lines are open drain and pullup resistors (e.g. 10kΩ) are required. 

## **4.3 BILL OF MATERIALS FOR EXTERNAL COMPONENTS** 

|**COMPONENT**|**LABEL**|**SPECIFICATION**|**QUANTITY**|
|---|---|---|---|
|REGOUT Capacitor|C1|X7R, 0.47 µF ±10%|1|
|VDD Bypass Capacitors|C2|X7R, 0.1 µF ±10%|1|
||C4|X7R, 2.2 µF ±10%|1|
|VDDIO Bypass Capacitor|C3|X7R, 10 nF ±10%|1|



**Table 11. Bill of Materials** 

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## **4.4 BLOCK DIAGRAM** 

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IAM-20680<br>INT<br>Self<br>X Accel ADC<br>test Interrupt<br>(Ho Status  ]<br>Register<br>CS<br>Self test Y Accel ADC Slave I2C and  SA0 / SDO<br>— = FIFO a SPI Serial  e<br>Interface SCL / SPC<br>Self  SDA / SDI<br>test Z Accel ADC User & Config<br>HOS) Registers ==<br>FSYNC<br>Self<br>test X Gyro AD C Sensor<br>C H L = eS<br>IHD — Registers<br>Self<br>test Y Gyro ADC<br>e - _ }-<br>Self<br>test Z Gyro AD C<br>= os<br>Temp Sensor ADC<br>H o<br>Charge  Bias & LDOs<br>Pump<br>VDD GND REGOUT<br>Signal Conditioning<br>**----- End of picture text -----**<br>


**Figure 5. IAM-20680 Block Diagram** 

## **4.5 OVERVIEW** 

The IAM-20680 is comprised of the following key blocks and functions: 

- Three-axis MEMS rate gyroscope sensor with 16-bit ADCs and signal conditioning 

- Three-axis MEMS accelerometer sensor with 16-bit ADCs and signal conditioning 

- Primary I[2] C and SPI serial communications interfaces 

- Self-Test 

- Clocking 

- Sensor Data Registers 

- FIFO 

- Interrupts 

- Digital-Output Temperature Sensor 

- Bias and LDOs 

- Charge Pump 

- Standard Power Modes 

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## **4.6 THREE-AXIS MEMS GYROSCOPE WITH 16-BIT ADCS AND SIGNAL CONDITIONING** 

The IAM-20680 consists of three independent vibratory MEMS rate gyroscopes, which detect rotation about the X-, Y-, and Z- Axes. When the gyros are rotated about any of the sense axes, the Coriolis Effect causes a vibration that is detected by a capacitive pickoff. The resulting signal is amplified, demodulated, and filtered to produce a voltage that is proportional to the angular rate. This voltage is digitized using individual on-chip 16-bit Analog-to-Digital Converters (ADCs) to sample each axis. The full-scale range of the gyro sensors may be digitally programmed to ±250, ±500, ±1000, or ±2000 degrees per second (dps). The ADC sample rate is programmable from 8,000 samples per second, down to 3.9 samples per second, and user-selectable low-pass filters enable a wide range of cut-off frequencies. 

## **4.7 THREE-AXIS MEMS ACCELEROMETER WITH 16-BIT ADCS AND SIGNAL CONDITIONING** 

The IAM-20680’s 3-Axis accelerometer uses separate proof masses for each axis. Acceleration along a particular axis induces displacement on the corresponding proof mass, and capacitive sensors detect the displacement differentially. The IAM-20680’s architecture reduces the accelerometers’ susceptibility to fabrication variations as well as to thermal drift. When the device is placed on a flat surface, it will measure 0 _g_ on the X- and Y-axes and +1 _g_ on the Z-axis. The accelerometers’ scale factor is calibrated at the factory and is nominally independent of supply voltage. Each sensor has a dedicated sigma-delta ADC for providing digital outputs. The full scale range of the digital output can be adjusted to ±2 _g_ , ±4 _g_ , ±8 _g_ , or ±16 _g_ . 

## **4.8 I[2] C AND SPI SERIAL COMMUNICATIONS INTERFACES** 

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The IAM-20680 communicates to a system processor using either a SPI or an I [2] C serial interface. The IAM-20680 always acts as a<br>slave when communicating to the system processor. The LSB of the I [2] C slave address is set by pin 4 (SA0).<br>IAM-20680 Solution Using I [2] C Interface<br>In Figure 6, the system processor is an I [2] C master to the IAM-20680.<br>Interrupt Status  INT Isensor data from MPU [2] C Processor Bus: for reading all<br>Register<br>IAM-20680 SA0<br>VDDIO or GND<br>Slave I [2] C<br>or SPI  SCL SCL<br>Serial  System<br>Interface SDA SDA Processor<br>FIFO<br>User & Config<br>Registers<br>Sensor<br>Register<br>Factory<br>Calibration<br>Bias & LDOs<br>on<br>VDD GND REGOUT<br>Figure 6. IAM-20680 Solution Using I [2] C Interface<br>**----- End of picture text -----**<br>


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## **IAM-20680 Solution Using SPI Interface** 

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In Figure 7, the system processor is an SPI master to the IAM-20680. Pins 2, 3, 4, and 5 are used to support the SPC, SDI, SDO, and CS<br>signals for SPI communications.<br>Processor SPI Bus: for reading all<br>data from MPU and for configuring<br>MPU<br>Interrupt<br>Status  INT<br>Register<br>CS nCS<br>IAM-20680 SDO SDI<br>Slave I [2] C  System<br>or SPI  SPC SPC Processor<br>Serial<br>Interface SDI SDO<br>FIFO<br>Config<br>Register<br>Sensor<br>Register<br>Factory<br>Calibration<br>Bias & LDOs<br>7<br>VDD GND REGOUT<br>Figure 7. IAM-20680 Solution Using SPI Interface<br>**----- End of picture text -----**<br>


## **4.9 SELF-TEST** 

Self-test allows for the testing of the mechanical and electrical portions of the sensors. The self-test for each measurement axis can be activated by means of the gyroscope and accelerometer self-test registers (registers 27 and 28). 

When the self-test is activated, the electronics cause the sensors to be actuated and produce an output signal. The output signal is used to observe the self-test response. 

The self-test response is defined as follows: 

## SELF-TEST RESPONSE = SENSOR OUTPUT WITH SELF-TEST ENABLED – SENSOR OUTPUT WITH SELF-TEST DISABLED 

When the value of the self-test response is within the specified min/max limits of the product specification, the part has passed selftest. When the self-test response exceeds the min/max values, the part is deemed to have failed self-test. 

## **4.10 CLOCKING** 

The IAM-20680 has a flexible clocking scheme, allowing a variety of internal clock sources to be used for the internal synchronous circuitry. This synchronous circuitry includes the signal conditioning and ADCs, and various control circuits and registers. An on-chip PLL provides flexibility in the allowable inputs for generating this clock. 

Allowable internal sources for generating the internal clock are: 

- a) An internal relaxation oscillator 

- b) Auto-select between internal relaxation oscillator and gyroscope MEMS oscillator to use the best available source 

The only setting supporting specified performance in all modes is option b). It is recommended that option b) be used. 

## **4.11 SENSOR DATA REGISTERS** 

The sensor data registers contain the latest gyroscope, accelerometer, and temperature measurement data. They are read-only registers, and are accessed via the serial interface. Data from these registers may be read anytime. 

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## **4.12 FIFO** 

The IAM-20680 contains a 512-byte FIFO register that is accessible via the Serial Interface. The FIFO configuration register determines which data are written into the FIFO. Possible choices include gyro data, accelerometer data, temperature readings, and FSYNC input. A FIFO counter keeps track of how many bytes of valid data are contained in the FIFO. The FIFO register supports burst reads. The interrupt function may be used to determine when new data are available. 

The IAM-20680 allows FIFO read in low-power accelerometer mode. 

## **4.13 INTERRUPTS** 

Interrupt functionality is configured via the Interrupt Configuration register. Items that are configurable include the INT pin configuration, the interrupt latching and clearing method, and triggers for the interrupt. Items that can trigger an interrupt are (1) Clock generator locked to new reference oscillator (used when switching clock sources); (2) new data are available to be read (from the FIFO and Data registers); (3) accelerometer event interrupts; (4) FIFO overflow. The interrupt status can be read from the Interrupt Status register. 

## **4.14 DIGITAL-OUTPUT TEMPERATURE SENSOR** 

An on-chip temperature sensor and ADC are used to measure the IAM-20680 die temperature. The readings from the ADC can be read from the FIFO or the Sensor Data registers. 

## **4.15 BIAS AND LDOS** 

The bias and LDO section generates the internal supply and the reference voltages and currents required by the IAM-20680. Its two inputs are an unregulated VDD and a VDDIO logic reference supply voltage. The LDO output is bypassed by a capacitor at REGOUT. For further details on the capacitor, please refer to the Bill of Materials for External Components. 

## **4.16 CHARGE PUMP** 

An on-chip charge pump generates the high voltage required for the MEMS oscillator. 

## **4.17 STANDARD POWER MODES** 

Table 12 lists the user-accessible power modes for IAM-20680. 

|**MODE**|**NAME**|**GYRO**|**ACCEL**|
|---|---|---|---|
|1|SleepMode|Off|Off|
|2|StandbyMode|Drive On|Off|
|3|Accelerometer Low-Power Mode|Off|Duty-Cycled|
|4|Accelerometer Low-Noise Mode|Off|On|
|5|Gyroscope Low-Power Mode|Duty-Cycled|Off|
|6|Gyroscope Low-Noise Mode|On|Off|
|7|6-Axis Low-Noise Mode|On|On|
|8|6-Axis Low-Power Mode|Duty-Cycled|On|



**Table 12. Standard Power Modes for IAM-20680** 

## **Notes:** 

1. Power consumption for individual modes can be found in section 3.3.1. 

## **4.18 SENSOR INITIALIZATION AND BASIC CONFIGURATION** 

The basic configuration of the IAM-20680 includes the following steps: 

- Sensor initialization and clock source selection 

- Output data rate (i.e. sampling frequency) selection 

- Full scale range selection 

- Filter frequency selection 

- Power mode selection 

## **Sensor Initialization and Clock Source Selection** 

To initialize the sensor, perform a reset and let the IAM-20680 select the best clock source by setting the register PWR_MGMT1 (address 0x6B) to 0x81 (see section 9.27). 

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## **Output Data Rate Selection** 

To set the output data rate (ODR) to the desired frequency, select the sample rate divider by setting the register SMPLRT_DIV(address 0x19) to the desired value (see section 9.9). For instance, to set the output data rate to 100 Hz, write 0x09 into SMPLRT_DIV. 

## **Full Scale Range Selection** 

To set the full-scale range (FSR) of the accelerometer, set the register ACCEL_CONFIG (address 0x1C) to the desired value (see section 9.12). For instance, to set the FSR of the accelerometer to 2g, write 0x00 into ACCEL_CONFIG. 

To set the FSR of the gyroscope, set the register GYRO_CONFIG (address 0x1B) to the desired value (see section 9.11). For instance, to set the FSR of the gyroscope to 250 dps, write 0x00 into GYRO_CONFIG. 

## **Filter Selection** 

To set the corner frequency of the digital low-pass filter (DLPF) of the accelerometer, set the register ACCEL_CONFIG2 (address 0x1D) to the desired value (see section 9.13). For instance, to set the corner frequency of the DLPF of the accelerometer to 10.2 Hz, write 0x05 into ACCEL_CONFIG2. 

To set the corner frequency of the DLPF of the gyroscope, set the register CONFIG (address 0x1A) to the desired value (see section 9.10). For instance, to set the corner frequency of the DLPF of the gyroscope to 10 Hz, write 0x05 into CONFIG. 

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## _**5 PROGRAMMABLE INTERRUPTS**_ 

The IAM-20680 has a programmable interrupt system which can generate an interrupt signal on the INT pin. Status flags indicate the source of an interrupt. Interrupt sources may be enabled and disabled individually. 

|**INTERRUPT NAME**|**MODULE**|
|---|---|
|Motion Detection|Motion|
|FIFO Overflow|FIFO|
|Data Ready|Sensor Registers|



## **Table 13. Table of Interrupt Sources** 

## **5.1 WAKE-ON-MOTION INTERRUPT** 

The IAM-20680 provides motion detection capability. A qualifying motion sample is one where the high passed sample from any axis has an absolute value exceeding a user-programmable threshold. The following steps explain how to configure the Wake-on-Motion Interrupt. 

## _**Step 1: Ensure that Accelerometer is running**_ 

- In PWR_MGMT_1 register (0x6B) set CYCLE = 0, SLEEP = 0, and GYRO_STANDBY = 0 

- In PWR_MGMT_2 register (0x6C) set STBY_XA = STBY_YA = STBY_ZA = 0, and STBY_XG = STBY_YG = STBY_ZG = 1 

## _**Step 2: Accelerometer Configuration**_ 

- In ACCEL_CONFIG2 register (0x1D) set ACCEL_FCHOICE_B = 0 and A_DLPF_CFG[2:0] = 1 (b001) 

## _**Step 3: Enable Motion Interrupt**_ 

- In INT_ENABLE register (0x38) set WOM_INT_EN = 111 to enable motion interrupt 

## _**Step 4: Set Motion Threshold**_ 

- Set the motion threshold in ACCEL_WOM_THR register (0x1F) 

## _**Step 5: Enable Accelerometer Hardware Intelligence**_ 

- In ACCEL_INTEL_CTRL register (0x69) set ACCEL_INTEL_EN = ACCEL_INTEL_MODE = 1; Ensure that bit 0 is set to 0 

## _**Step 6: Set Frequency of Wake-Up**_ 

- In SMPLRT_DIV register (0x19) set SMPLRT_DIV[7:0] = 3.9 Hz – 500 Hz 

## _**Step 7: Enable Cycle Mode (Accelerometer Low-Power Mode)**_ 

- In PWR_MGMT_1 register (0x6B) set CYCLE = 1 

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## _**6 DIGITAL INTERFACE**_ 

## **6.1 I[2] C AND SPI SERIAL INTERFACES** 

The internal registers and memory of the IAM-20680 can be accessed using either I[2] C at 400 kHz or SPI at 8 MHz. SPI operates in four-wire mode. 

**==> picture [331 x 59] intentionally omitted <==**

**----- Start of picture text -----**<br>
||||||
|---|---|---|---|---|
|PIN NUMBER|PIN NAME|PIN DESCRIPTION|
|1|VDDIO|Digital I/O supply voltage.|
|4|SA0 / SDO|I|[2]|C Slave Address LSB (SA0); SPI serial data output (SDO).|
|2|SCL / SPC|I|[2]|C serial clock (SCL); SPI serial clock (SPC).|
|3|SDA / SDI|I|[2]|C serial data (SDA); SPI serial data input (SDI).|

**----- End of picture text -----**<br>


**Table 14. Serial Interface** 

**Note** : To prevent switching into I2C mode when using SPI, the I2C interface should be disabled by setting the I2C_IF_DIS configuration bit. Setting this bit should be performed immediately after waiting for the time specified by the “Start-Up Time for Register Read/Write” in section 3.3.2. 

For further information regarding the _I2C_IF_DIS_ bit, please refer to sections 8 and 9 of this document. 

## **6.2 I[2] C INTERFACE** 

I[2] C is a two-wire interface comprised of the signals serial data (SDA) and serial clock (SCL). In general, the lines are open-drain and bidirectional. In a generalized I[2] C interface implementation, attached devices can be a master or a slave. The master device puts the slave address on the bus, and the slave device with the matching address acknowledges the master. 

The IAM-20680 always operates as a slave device when communicating to the system processor, which thus acts as the master. SDA and SCL lines typically need pull-up resistors to VDD. The maximum bus speed is 400 kHz. 

The slave address of the IAM-20680 is b110100X which is 7 bits long. The LSB bit of the 7-bit address is determined by the logic level on pin SA0. This allows two IAM-20680s to be connected to the same I[2] C bus. When used in this configuration, the address of one of the devices should be b1101000 (pin SA0 is logic low) and the address of the other should be b1101001 (pin SA0 is logic high). 

## **6.3 IC COMMUNICATIONS PROTOCOL** 

## _START (S) and STOP (P) Conditions_ 

Communication on the I[2] C bus starts when the master puts the START condition (S) on the bus, which is defined as a HIGH-to-LOW transition of the SDA line while SCL line is HIGH (see figure below). The bus is considered to be busy until the master puts a STOP condition (P) on the bus, which is defined as a LOW to HIGH transition on the SDA line while SCL is HIGH (see Figure 8). 

Additionally, the bus remains busy if a repeated START (Sr) is generated instead of a STOP condition. 

**==> picture [364 x 84] intentionally omitted <==**

**----- Start of picture text -----**<br>
SDA<br>SCL<br>S P<br>START condition STOP condition<br>**----- End of picture text -----**<br>


**Figure 8. START and STOP Conditions** 

## _Data Format / Acknowledge_ 

I[2] C data bytes are defined to be 8-bits long. There is no restriction to the number of bytes transmitted per data transfer. Each byte transferred must be followed by an acknowledge (ACK) signal. The clock for the acknowledge signal is generated by the master, while the receiver generates the actual acknowledge signal by pulling down SDA and holding it low during the HIGH portion of the acknowledge clock pulse. 

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If a slave is busy and cannot transmit or receive another byte of data until some other task has been performed, it can hold SCL LOW, thus forcing the master into a wait state. Normal data transfer resumes when the slave is ready, and releases the clock line (refer to the following figure). 

**==> picture [418 x 145] intentionally omitted <==**

**----- Start of picture text -----**<br>
DATA OUTPUT BY<br>TRANSMITTER (SDA)<br>not acknowledge<br>DATA OUTPUT BY<br>RECEIVER (SDA)<br>ers<br>acknowledge<br>SCL FROM<br>1 2 8 9<br>MASTER<br>clock pulse for<br>START  acknowledgement<br>condition<br>**----- End of picture text -----**<br>


**Figure 9. Acknowledge on the I[2] C Bus** 

## _Communications_ 

After beginning communications with the START condition (S), the master sends a 7-bit slave address followed by an 8[th] bit, the read/write bit. The read/write bit indicates whether the master is receiving data from or is writing to the slave device. Then, the master releases the SDA line and waits for the acknowledge signal (ACK) from the slave device. Each byte transferred must be followed by an acknowledge bit. To acknowledge, the slave device pulls the SDA line LOW and keeps it LOW for the high period of the SCL line. Data transmission is always terminated by the master with a STOP condition (P), thus freeing the communications line. However, the master can generate a repeated START condition (Sr), and address another slave without first generating a STOP condition (P). A LOW to HIGH transition on the SDA line while SCL is HIGH defines the stop condition. All SDA changes should take place when SCL is low, with the exception of start and stop conditions. 

**==> picture [402 x 113] intentionally omitted <==**

**----- Start of picture text -----**<br>
SDA<br>SCL 1 – 7 8 9 1 – 7 8 9 1 – 7 8 9<br>S P<br>START  ADDRESS R/W ACK DATA ACK DATA ACK STOP<br>condition condition<br>**----- End of picture text -----**<br>


**Figure 10. Complete I[2] C Data Transfer** 

To write the internal IAM-20680 registers, the master transmits the start condition (S), followed by the I[2] C address and the write bit (0). At the 9[th] clock cycle (when the clock is high), the IAM-20680 acknowledges the transfer. Then the master puts the register address (RA) on the bus. After the IAM-20680 acknowledges the reception of the register address, the master puts the register data onto the bus. This is followed by the ACK signal, and data transfer may be concluded by the stop condition (P). To write multiple bytes after the last ACK signal, the master can continue outputting data rather than transmitting a stop signal. In this case, the IAM20680 automatically increments the register address and loads the data to the appropriate register. The following figures show single and two-byte write sequences. 

_Single-Byte Write Sequence_ 

|Master<br>~~FE~~|S<br>~~FE~~|AD+W||RA||DATA||P|
|---|---|---|---|---|---|---|---|---|
|Slave<br>~~FE~~|~~FE~~||ACK||ACK||ACK||



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_Burst Write Sequence_ 

|Master<br>~~——~~|S<br>~~——~~|AD+W||RA||DATA||DATA||P|
|---|---|---|---|---|---|---|---|---|---|---|
|Slave<br>~~——~~|~~——~~||ACK||ACK||ACK||ACK||



To read the internal IAM-20680 registers, the master sends a start condition, followed by the I[2] C address and a write bit, and then the register address that is going to be read. Upon receiving the ACK signal from the IAM-20680, the master transmits a start signal followed by the slave address and read bit. As a result, the IAM-20680 sends an ACK signal and the data. The communication ends with a not acknowledge (NACK) signal and a stop bit from master. The NACK condition is defined such that the SDA line remains high at the 9[th] clock cycle. The following figures show single and two-byte read sequences. 

_Single-Byte Read Sequence_ 

Master S AD+W RA S AD+R NACK P Slave ACK ACK ACK DATA ~~ee ee~~ _Burst Read Sequence_ Master S AD+W RA S AD+R ACK NACK P Slave ACK ACK ACK DATA DATA ~~a~~ **6.4 I[2] C TERMS** 

_Burst Read Sequence_ 

|**SIGNAL**|**DESCRIPTION**|
|---|---|
|S|Start Condition: SDA goes from high to low while SCL is high|
|AD|Slave I2C address|
|W|Write bit (0)|
|R|Read bit (1)|
|ACK|Acknowledge: SDA line is low while the SCL line is high at the 9thclock cycle|
|NACK|Not-Acknowledge: SDA line stays high at the 9thclock cycle|
|RA|IAM-20680 internal register address|
|DATA|Transmit or received data|
|P|Stopcondition: SDAgoingfrom low to high while SCL is high|



**Table 15. I[2] C Terms** 

## **6.5 SPI INTERFACE** 

SPI is a 4-wire synchronous serial interface that uses two control lines and two data lines. The IAM-20680 always operates as a Slave device during standard Master-Slave SPI operation. 

With respect to the Master, the Serial Clock output (SPC), the Serial Data Output (SDO) and the Serial Data Input (SDI) are shared among the Slave devices. Each SPI slave device requires its own Chip Select (CS) line from the master. 

CS goes low (active) at the start of transmission and goes back high (inactive) at the end. Only one CS line is active at a time, ensuring that only one slave is selected at any given time. The CS lines of the non-selected slave devices are held high, causing their SDO lines to remain in a high-impedance (high-z) state so that they do not interfere with any active devices. 

_SPI Operational Features_ 

1. Data are delivered MSB first and LSB last 

2. Data are latched on the rising edge of SPC 

3. Data should be transitioned on the falling edge of SPC 

4. The maximum frequency of SPC is 8 MHz 

5. SPI read and write operations are completed in 16 or more clock cycles (two or more bytes). The first byte contains the SPI Address, and the following byte(s) contain(s) the SPI data. The first bit of the first byte contains the Read/Write bit and indicates the Read (1) or Write (0) operation. The following 7 bits contain the Register Address. In cases of multiplebyte Read/Writes, data are two or more bytes: 

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_SPI Address format_ 

**MSB LSB** ~~a~~ R/W A6 A5 A4 A3 A2 A1 A0 **MSB LSB** D7 D6 D5 D4 D3 D2 D1 D0 ~~oo~~ 

_SPI Data format_ 

6. Supports Single or Burst Read/Writes. 

**==> picture [190 x 127] intentionally omitted <==**

**----- Start of picture text -----**<br>
SPC<br>SDI<br>SPI Master SDO SPI Slave 1<br>CS1  CS<br>CS2<br>SPC<br>SDI<br>SDO<br>SPI Slave 2<br>CS<br>**----- End of picture text -----**<br>


**Figure 11. Typical SPI Master/Slave Configuration** 

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## _**7 SERIAL INTERFACE CONSIDERATIONS**_ 

## **7.1 IAM-20680 SUPPORTED INTERFACES** 

The IAM-20680 supports I[2] C communications on its serial interface **.** 

The IAM-20680’s I/O logic levels are set to be VDDIO. 

Figure 12 depicts a sample circuit of IAM-20680. It shows the relevant logic levels and voltage connections. 

**==> picture [352 x 185] intentionally omitted <==**

**----- Start of picture text -----**<br>
VDDIO<br>VDD_IO<br>(0V - VDDIO) SYSTEM BUS<br>System<br>VDD Processor IO<br>VDDIO<br>VDD INT (0V - VDDIO)<br>SDA (0V - VDDIO)<br>(0V - VDDIO) SCL (0V - VDDIO)<br>SYNC<br>VDDIO<br>IAM-20680<br>VDDIO<br>(0V, VDDIO)<br>SA0<br>**----- End of picture text -----**<br>


**Figure 12. I/O Levels and Connections** 

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## _**8 REGISTER MAP**_ 

The following table lists the register map for the IAM-20680. 

|**Addr**<br>**(Hex)**<br>~~Oe~~|**Addr**<br>**(Dec.)**<br>~~Oe~~|**Register Name**<br>~~Oe~~|**Serial I/F**<br>~~Oe~~|**Accessible**<br>**(writable) in**<br>**Sleep Mode**<br>~~Oe~~|**Bit7**<br>~~Oe~~<br>~~ee~~|**Bit6**<br>~~Oe~~|**Bit5**<br>~~Oe~~|**Bit4**<br>~~Oe~~|**Bit3**<br>~~Oe~~|**Bit2**<br>~~Oe~~|**Bit1**<br>~~Oe~~|**Bit0**<br>~~Oe~~|
|---|---|---|---|---|---|---|---|---|---|---|---|---|
|00<br>~~Oe~~<br>~~es~~|00<br>~~Oe~~<br>~~es~~|SELF_TEST_X_GYRO<br>~~Oe~~<br>~~es~~|R/W<br>~~Oe~~<br>~~es~~|N<br>~~Oe~~<br>~~es~~|XG_ST_DATA[7:0]<br>~~Oe~~<br>~~ee~~<br>~~es~~||||||||
|01<br>~~I~~|01<br>~~I~~|SELF_TEST_Y_GYRO<br>~~I~~|R/W<br>~~I~~|N<br>~~I~~|YG_ST_DATA[7:0]<br>~~I~~||||||||
|02<br>~~I~~|02<br>~~I~~|SELF_TEST_Z_GYRO<br>~~I~~|R/W<br>~~I~~|N<br>~~I~~|ZG_ST_DATA[7:0]<br>~~I~~||||||||
|0D<br>~~a~~|13<br>~~a~~|SELF_TEST_X_ACCEL<br>~~a~~|R/W<br>~~a~~|N<br>~~a~~|XA_ST_DATA[7:0]<br>~~a~~||||||||
|0E<br>~~a~~|14<br>~~a~~|SELF_TEST_Y_ACCEL<br>~~a~~|R/W<br>~~a~~|N<br>~~a~~|YA_ST_DATA[7:0]<br>~~a~~||||||||
|0F<br>~~a~~<br>~~a~~|15<br>~~a~~<br>~~a~~|SELF_TEST_Z_ACCEL<br>~~a~~<br>~~a~~|R/W<br>~~a~~<br>~~a~~|N<br>~~a~~<br>~~a~~|ZA_ST_DATA[7:0]<br>~~a~~<br>~~a~~||||||||
|13<br>~~a~~|19<br>~~a~~|XG_OFFS_USRH<br>~~a~~|R/W<br>~~a~~|N<br>~~a~~|X_OFFS_USR [15:8]<br>~~a~~||||||||
|14<br>~~a~~|20<br>~~a~~|XG_OFFS_USRL<br>~~a~~|R/W<br>~~a~~|N<br>~~a~~|X_OFFS_USR [7:0]<br>~~a~~||||||||
|15<br>~~a~~|21<br>~~a~~|YG_OFFS_USRH<br>~~a~~|R/W<br>~~a~~|N<br>~~a~~|Y_OFFS_USR [15:8]<br>~~a~~||||||||
|16<br>~~a~~|22<br>~~a~~|YG_OFFS_USRL<br>~~a~~|R/W<br>~~a~~|N<br>~~a~~|Y_OFFS_USR [7:0]<br>~~a~~||||||||
|17<br>~~a~~|23<br>~~a~~|ZG_OFFS_USRH<br>~~a~~|R/W<br>~~a~~|N<br>~~a~~|Z_OFFS_USR [15:8]<br>~~a~~||||||||
|18<br>~~a~~<br>~~i~~|24<br>~~a~~<br>~~i~~|ZG_OFFS_USRL<br>~~a~~<br>~~i~~|R/W<br>~~a~~<br>~~i~~|N<br>~~a~~<br>~~i~~|Z_OFFS_USR [7:0]<br>~~a~~<br>~~i~~||||||||
|19<br>~~i~~|25<br>~~i~~|SMPLRT_DIV<br>~~i~~|R/W<br>~~i~~|N<br>~~i~~|SMPLRT_DIV[7:0]<br>~~i~~||||||||
|1A<br>~~a~~|26<br>~~a~~|CONFIG<br>~~a~~<br>~~ee~~|R/W<br>~~a~~<br>~~ee~~|N<br>~~a~~<br>~~ee~~|-<br>~~a~~<br>~~ee~~|FIFO_<br>MODE<br>~~a~~<br>~~ee~~|EXT_SYNC_SET[2:0]<br>~~a~~<br>~~ee~~|||DLPF_CFG[2:0]<br>~~a~~<br>~~ee~~|||
|1B|27|GYRO_CONFIG|R/W|N|XG_ST|YG_ST|ZG_ST|FS_SEL [1:0]||-|FCHOICE_B[1:0]||
|1C|28|ACCEL_CONFIG|R/W|N|XA_ST|YA_ST|ZA_ST|ACCEL_FS_SEL[1:0]||-|||
|1D<br>~~a~~|29<br>~~a~~|ACCEL_CONFIG 2<br>|R/W<br>|N<br>|-<br>||DEC2_CFG<br>||ACCEL_FCHOI<br>CE_B<br>|A_DLPF_CFG<br>|||
|1E<br>~~ee~~|30<br>~~ee~~|LP_MODE_CFG<br>~~ee~~|R/W<br>~~ee~~|N<br>~~ee~~|GYRO_CYCL<br>E<br>~~ee~~|G_AVGCFG[2:0]<br>~~ee~~|||-<br>~~ee~~||||
|1F<br>~~a~~<br>~~Ba~~|31<br>|ACCEL_WOM_THR<br>|R/W<br>|N<br>|WOM_THR[7:0]<br>||||||||
|23<br>~~a~~<br>~~BaPo~~|35<br>~~Po~~|FIFO_EN<br>|R/W<br>|N<br>|TEMP<br>_FIFO_EN<br>|XG_FIFO_EN<br>|YG_FIFO_EN<br>|ZG_FIFO_EN<br>|ACCEL_FIFO_<br>EN<br>|-<br>|-<br>|-<br>|
|36<br>~~BaPo~~|54<br>~~Po~~|FSYNC_INT<br>|R/C<br>|N<br>|FSYNC_INT<br>|-<br>|-<br>|-<br>|-<br>|-<br><br>~~ee~~|-<br><br>~~ee~~|-<br><br>~~ee~~|
|37<br>~~Poee~~|55<br>~~Poee~~|INT_PIN_CFG<br>~~ee~~|R/W<br>~~ee~~|Y<br>~~ee~~|INT_LEVEL<br>~~ee~~|INT_OPEN<br>~~ee~~|LATCH<br>_INT_EN<br>~~ee~~|INT_RD<br>_CLEAR<br>~~ee~~|FSYNC_INT_L<br>EVEL<br>~~ee~~|FSYNC<br>_INT_MODE_<br>EN<br>~~ee~~<br>~~ee~~<br>~~ee~~|-<br>~~ee~~<br>~~ee~~<br>~~ee~~|-<br>~~ee~~<br>~~ee~~<br>~~ee~~|
|38<br>~~ee~~|56<br>~~ee~~|INT_ENABLE<br>~~ee~~|R/W<br>~~ee~~|Y<br>~~ee~~|WOM_INT_EN[7:5]<br>~~ee~~|||FIFO<br>_OFLOW<br>_EN<br>~~ee~~|-<br>~~ee~~|GDRIVE_INT_<br>EN<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|-<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|DATA_RDY_I<br>NT_EN<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|
|3A<br>~~ee~~|58<br>~~ee~~|INT_STATUS<br>~~ee~~|R/C<br>~~ee~~|N<br>~~ee~~|WOM_INT[7:5]<br>~~ee~~|||FIFO<br>_OFLOW<br>_INT<br>~~ee~~|-<br>~~ee~~|GDRIVE_INT<br>~~ee~~<br>~~ee~~<br>~~ee~~|-<br>~~ee~~<br>~~ee~~<br>~~ee~~|DATA<br>_RDY_INT<br>~~ee~~<br>~~ee~~<br>~~ee~~|
|3B<br>~~ee~~<br>~~a~~|59<br>~~ee~~<br>~~a~~|ACCEL_XOUT_H<br>~~ee~~<br>~~a~~|R<br>~~ee~~<br>~~a~~|N<br>~~ee~~<br>~~a~~|ACCEL_XOUT_H[15:8]<br>~~ee~~<br>~~ee~~<br>~~a~~||||||||
|3C<br>~~a~~|60<br>~~a~~|ACCEL_XOUT_L<br>~~a~~|R<br>~~a~~|N<br>~~a~~|ACCEL_XOUT_L[7:0]<br>~~a~~||||||||
|3D<br>~~a~~|61<br>~~a~~|ACCEL_YOUT_H<br>~~a~~|R<br>~~a~~|N<br>~~a~~|ACCEL_YOUT_H[15:8]<br>~~a~~||||||||
|3E<br>~~a~~|62<br>~~a~~|ACCEL_YOUT_L<br>~~a~~|R<br>~~a~~|N<br>~~a~~|ACCEL_YOUT_L[7:0]<br>~~a~~||||||||
|3F<br>~~a~~<br>~~eT~~|63<br>~~a~~<br>~~eT~~|ACCEL_ZOUT_H<br>~~a~~<br>~~eT~~|R<br>~~a~~<br>~~eT~~|N<br>~~a~~<br>~~eT~~|ACCEL_ZOUT_H[15:8]<br>~~a~~<br>~~eT~~||||||||
|40<br>~~eT~~|64<br>~~eT~~|ACCEL_ZOUT_L<br>~~eT~~|R<br>~~eT~~|N<br>~~eT~~|ACCEL_ZOUT_L[7:0]<br>~~eT~~||||||||
|41<br>~~eT~~|65<br>~~eT~~|TEMP_OUT_H<br>~~eT~~|R<br>~~eT~~|N<br>~~eT~~|TEMP_OUT[15:8]<br>~~eT~~||||||||
|42<br>~~eT~~|66<br>~~eT~~|TEMP_OUT_L<br>~~eT~~|R<br>~~eT~~|N<br>~~eT~~|TEMP_OUT[7:0]<br>~~eT~~||||||||
|43<br>~~ee~~|67<br>~~ee~~|GYRO_XOUT_H<br>~~ee~~|R<br>~~ee~~|N<br>~~ee~~|GYRO_XOUT[15:8]<br>~~ee~~||||||||
|44<br>~~ee~~|68<br>~~ee~~|GYRO_XOUT_L<br>~~ee~~|R<br>~~ee~~|N<br>~~ee~~|GYRO_XOUT[7:0]<br>~~ee~~||||||||
|45<br>~~ee~~|69<br>~~ee~~|GYRO_YOUT_H<br>~~ee~~|R<br>~~ee~~|N<br>~~ee~~|GYRO_YOUT[15:8]<br>~~ee~~||||||||
|46<br>~~ee~~|70<br>~~ee~~|GYRO_YOUT_L<br>~~ee~~|R<br>~~ee~~|N<br>~~ee~~|GYRO_YOUT[7:0]<br>~~ee~~||||||||
|47<br>~~I~~|71<br>~~I~~|GYRO_ZOUT_H<br>~~I~~|R<br>~~I~~|N<br>~~I~~|GYRO_ZOUT[15:8]<br>~~I~~||||||||
|48<br>~~I~~|72<br>~~I~~|GYRO_ZOUT_L<br>~~I~~|R<br>~~I~~|N<br>~~I~~|GYRO_ZOUT[7:0]<br>~~I~~||||||||
|68<br>~~a~~|104<br>~~a~~|SIGNAL_PATH_RESET<br>~~a~~<br>~~a~~|R/W<br>~~a~~<br>~~a~~|N<br>~~a~~<br>~~a ee~~|-<br>~~a~~<br>~~ee~~|-<br>~~a~~<br>~~ee~~|-<br>~~a~~<br>~~ee~~|-<br>~~a~~<br>~~ee~~|-<br>~~a~~<br>~~ee~~|-<br>~~a~~<br>~~ee~~|ACCEL<br>_RST<br>~~a~~<br>~~ee~~|TEMP<br>_RST<br>~~a~~<br>~~ee~~|
|69<br>~~a~~|105<br>~~a~~|ACCEL_INTEL_CTRL|R/W|N|ACCEL_INTE<br>L_EN|ACCEL_INTEL<br>_MODE|-||||||
|6A<br>~~a~~|106<br>~~a~~|USER_CTRL<br>~~ee~~|R/W<br>~~ee~~|N<br>~~ee~~|-<br>~~ee~~|FIFO_EN<br>~~ee~~|-<br>~~ee~~|I2C_IF<br>_DIS<br>~~ee~~|-<br>~~ee~~|FIFO<br>_RST<br>~~ee~~|-<br>~~ee~~|SIG_COND<br>_RST<br>~~ee~~|
|6B<br>~~a~~|107<br>~~a~~|PWR_MGMT_1|R/W|Y|DEVICE_RES<br>ET|SLEEP|ACCEL_CYCLE|GYRO_<br>STANDBY|TEMP_DIS|CLKSEL[2:0]|||



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_**IAM-20680**_ 

|**Addr**<br>**(Hex)**<br>~~Pi;~~|**Addr**<br>**(Dec.)**<br>~~Pi;~~|**Register Name**<br>~~Pi;~~<br>~~tT~~|**Serial I/F**<br>~~tTrE~~|**Accessible**<br>**(writable) in**<br>**Sleep Mode**<br>~~rEEE~~|**Bit7**<br>~~EE~~|**Bit6**<br>~~EE~~|**Bit5**|**Bit4**|**Bit3**|**Bit2**|**Bit1**|**Bit0**|
|---|---|---|---|---|---|---|---|---|---|---|---|---|
|6C<br>~~Pi;~~<br>~~a~~<br>~~a~~|108<br>~~Pi;~~<br>~~es~~<br>~~a~~|PWR_MGMT_2<br>~~Pi;~~<br>~~tT~~<br>~~se~~<br>~~ee re~~|R/W<br>~~tT rE~~<br>~~se~~<br>~~re~~|Y<br>~~rE EE~~<br>~~Ge~~<br>~~Qe~~|FIFO_LP_EN<br>~~EE~~<br>~~GD~~<br>~~Qe~~|-<br>~~EE~~<br>~~QQ~~<br>~~Qe~~|STBY_XA<br>~~QQ~~|STBY_YA<br>~~GO~~|STBY_ZA|STBY_XG<br>~~QO~~|STBY_YG<br>~~QO~~|STBY_ZG|
|72<br>~~a~~<br>~~a~~<br>~~a~~|114<br>~~es~~<br>~~a~~<br>~~es~~|FIFO_COUNTH<br>~~se~~<br>~~ee re~~<br>~~se~~|R<br>~~se~~<br>~~re~~<br>~~se~~|N<br>~~Ge~~<br>~~Qe~~<br>~~GG~~|-<br>~~GDQQ~~<br>~~Qe~~<br>~~GG~~|||FIFO_COUNT[12:8]<br>~~GO~~<br>~~QO~~<br>~~GG~~|||||
|73<br>~~a~~<br>~~a~~<br>~~a~~|115<br>~~a~~<br>~~es~~<br>~~a~~|FIFO_COUNTL<br>~~ee re~~<br>~~se~~<br>~~es ee~~|R<br>~~re~~<br>~~se~~<br>~~ee~~|N<br>~~Qe~~<br>~~GG~~<br>~~eG~~|FIFO_COUNT[7:0]<br>~~Qe~~<br>~~GG~~<br>~~eG~~||||||||
|74<br>~~a~~<br>~~a~~<br>~~a~~|116<br>~~es~~<br>~~a~~<br>~~a~~|FIFO_R_W<br>~~se~~<br>~~es ee~~<br>~~es~~|R/W<br>~~se~~<br>~~ee~~<br>~~ee~~|N<br>~~GG~~<br>~~eG~~<br>~~ee~~|FIFO_DATA[7:0]<br>~~GG~~<br>~~eG~~<br>~~Gn~~||||||||
|75<br>~~a ~~<br>~~a~~<br>~~a~~|117<br> ~~a~~<br>~~a~~<br>~~a~~|WHO_AM_I<br>~~es ee~~<br>~~es~~<br>~~es~~|R<br>~~ee~~<br>~~ee~~<br>~~ee~~|N<br>~~eG~~<br>~~ee~~<br>~~ee~~|WHOAMI[7:0]<br>~~eG~~<br>~~Gn~~||||||||
|77<br>~~a ~~<br>~~a~~<br>~~a~~|119<br> ~~a~~<br>~~a~~<br>~~es~~|XA_OFFSET_H<br>~~es ~~<br>~~es~~<br>~~ee~~|R/W<br> ~~ee~~<br>~~ee~~<br>~~ee~~|N<br>~~ee~~<br>~~ee~~<br>~~eG~~|XA_OFFS [14:7]<br>~~Gn~~<br>~~eG~~||||||||
|78<br>~~a ~~<br>~~a~~<br>~~a~~|120<br> ~~a~~<br>~~es~~<br>~~a~~|XA_OFFSET_L<br>~~es ~~<br>~~ee~~<br>~~es~~|R/W<br> ~~ee~~<br>~~ee~~<br>~~ee~~|N<br>~~ee~~<br>~~eG~~<br>~~eG~~|XA_OFFS [6:0]<br>~~eG~~<br>~~eG~~|||||||-<br>~~eG~~<br>~~eG~~|
|7A<br>~~a~~<br>~~a~~<br>~~a~~|122<br>~~es~~<br>~~a~~<br>~~a~~|YA_OFFSET_H<br>~~ee~~<br>~~es~~<br>~~ee~~|R/W<br>~~ee~~<br>~~ee~~<br>~~eG~~|N<br>~~eG~~<br>~~eG~~<br>~~eG~~|YA_OFFS [14:7]<br>~~eG~~<br>~~eG~~<br>~~eG~~||||||||
|7B<br>~~a ~~<br>~~a~~<br>~~a~~|123<br> ~~a~~<br>~~a~~<br>~~a~~|YA_OFFSET_L<br>~~es ~~<br>~~ee~~<br>~~es~~|R/W<br> ~~ee~~<br>~~eG~~<br>~~ee~~|N<br>~~eG~~<br>~~eG~~<br>~~ee~~|YA_OFFS [6:0]<br>~~eG~~<br>~~eG~~|||||||-<br>~~eG~~<br>~~eG~~|
|7D<br>~~a~~<br>~~a~~<br>~~a~~|125<br>~~a~~<br>~~a~~<br>~~es~~|ZA_OFFSET_H<br>~~ee~~<br>~~es~~<br>~~se~~|R/W<br>~~eG~~<br>~~ee~~<br>~~se~~|N<br>~~eG~~<br>~~ee~~<br>~~GG~~|ZA_OFFS [14:7]<br>~~eG~~<br>~~GG~~||||||||
|7E<br>~~a ~~<br>~~a~~|126<br> ~~a ~~<br>~~es~~|ZA_OFFSET_L<br> ~~es ~~<br>~~se~~|R/W<br> ~~ee~~<br>~~se~~|N<br>~~ee~~<br>~~GG~~|ZA_OFFS [6:0]<br>~~GG~~|||||||-<br>~~GG~~|



**Note** : Register Names ending in _H and _L contain the high and low bytes, respectively, of an internal register value. 

In the detailed register tables that follow, register names are in capital letters, while register values are in capital letters and italicized.  For example, the ACCEL_XOUT_H register (Register 59) contains the 8 most significant bits, _ACCEL_XOUT_ [15:8], of the 16bit X-Axis accelerometer measurement, _ACCEL_XOUT_ . 

The reset value is 0x00 for all registers other than the registers below, also the self-test registers contain pre-programmed values and will not be 0x00 after reset. 

- Register 107 (0x40) Power Management 1 

- Register 117 (0xA9) WHO_AM_I 

Page 31 of 52 

Document Number: DS-000196 Revision: 1.1 

‘TDI InvenSense 

_**IAM-20680**_ 

## _**9 REGISTER DESCRIPTIONS**_ 

This section describes the function and contents of each register within the IAM-20680. 

**Note** : The device will come up in sleep mode upon power-up. 

## **9.1 REGISTERS 0 TO 2 – GYROSCOPE SELF-TEST REGISTERS** 

## **Register Name: SELF_TEST_X_GYRO, SELF_TEST_Y_GYRO, SELF_TEST_Z_GYRO** 

## **Type: READ/WRITE** 

## **Register Address: 00, 01, 02 (Decimal); 00, 01, 02 (Hex)** 

|**REGISTER**|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|---|
|SELF_TEST_X_GYRO|[7:0]|XG_ST_DATA[7:0]|The value in this register indicates the self-test output generated during<br>manufacturing tests. This value is to be used to check against<br>subsequent self-test outputsperformed bythe end user.|
|SELF_TEST_Y_GYRO|[7:0]|YG_ST_DATA[7:0]|The value in this register indicates the self-test output generated during<br>manufacturing tests. This value is to be used to check against<br>subsequent self-test outputsperformed bythe end user.|
|SELF_TEST_Z_GYRO|[7:0]|ZG_ST_DATA[7:0]|The value in this register indicates the self-test output generated during<br>manufacturing tests. This value is to be used to check against<br>subsequent self-test outputsperformed bythe end user.|



The equation to convert self-test codes in OTP to factory self-test measurement is: 

**==> picture [210 x 14] intentionally omitted <==**

where ST_OTP is the value that is stored in OTP of the device, FS is the Full Scale value, and ST_code is based on the Self-Test value (ST_ FAC) determined in InvenSense’s factory final test and calculated based on the following equation: 

**==> picture [253 x 31] intentionally omitted <==**

## **9.2 REGISTERS 13 TO 15 – ACCELEROMETER SELF-TEST REGISTERS** 

## **Register Name: SELF_TEST_X_ACCEL, SELF_TEST_Y_ACCEL, SELF_TEST_Z_ACCEL Type: READ/WRITE** 

## **Register Address: 13, 14, 15 (Decimal); 0D, 0E, 0F (Hex)** 

|**REGISTER**|**BITS**|**NAME**|**FUNCTION**|
|---|---|---|---|
|SELF_TEST_X_ACCEL|[7:0]|XA_ST_DATA[7:0]|The value in this register indicates the self-test output generated<br>during manufacturing tests. This value is to be used to check against<br>subsequent self-test outputsperformed bythe end user.|
|SELF_TEST_Y_ACCEL|[7:0]|YA_ST_DATA[7:0]|The value in this register indicates the self-test output generated<br>during manufacturing tests. This value is to be used to check against<br>subsequent self-test outputsperformed bythe end user.|
|SELF_TEST_Z_ACCEL|[7:0]|ZA_ST_DATA[7:0]|The value in this register indicates the self-test output generated<br>during manufacturing tests. This value is to be used to check against<br>subsequent self-test outputsperformed bythe end user.|



The equation to convert self-test codes in OTP to factory self-test measurement is: 

_ST_  OTP_ = (2620 / 2 _FS_ ) *.101( _ST_  code_ − 1) (lsb) 

where ST_OTP is the value that is stored in OTP of the device, FS is the Full Scale value, and ST_code is based on the Self-Test value (ST_ FAC) determined in InvenSense’s factory final test and calculated based on the following equation: 

**==> picture [253 x 31] intentionally omitted <==**

Page 32 of 52 

Document Number: DS-000196 Revision: 1.1 

_**IAM-20680**_ 

## **9.3 REGISTER 19 – GYRO OFFSET ADJUSTMENT REGISTER** 

**Register Name: XG_OFFS_USRH Register Type: READ/WRITE Register Address: 19 (Decimal); 13 (Hex)** 

|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|[7:0]|X_OFFS_USR[15:8]|Bits 15 to 8 of the 16-bit offset of X gyroscope (2’s complement). This register is<br>used to remove DC bias from the sensor output. The value in this register is<br>added to thegyroscope sensor value beforegoinginto the sensor register.|



## **9.4 REGISTER 20 – GYRO OFFSET ADJUSTMENT REGISTER** 

**Register Name: XG_OFFS_USRL** 

**Register Type: READ/WRITE** 

**Register Address: 20 (Decimal); 14 (Hex) BIT NAME FUNCTION** Bits 7 to 0 of the 16-bit offset of X gyroscope (2’s complement). This register is [7:0] X_OFFS_USR[7:0] used to remove DC bias from the sensor output. The value in this register is added to the gyroscope sensor value before going into the sensor register. ~~a~~ **9.5 REGISTER 21 – GYRO OFFSET ADJUSTMENT REGISTER** 

## **9.5 REGISTER 21 – GYRO OFFSET ADJUSTMENT REGISTER** 

**Register Name: YG_OFFS_USRH** 

**Register Type: READ/WRITE** 

**Register Address: 21 (Decimal); 15 (Hex) BIT NAME FUNCTION** Bits 15 to 8 of the 16-bit offset of Y gyroscope (2’s complement). This register is [7:0] Y_OFFS_USR[15:8] used to remove DC bias from the sensor output. The value in this register is added to the gyroscope sensor value before going into the sensor register. ~~i~~ **9.6 REGISTER 22 – GYRO OFFSET ADJUSTMENT REGISTER** 

## **9.6 REGISTER 22 – GYRO OFFSET ADJUSTMENT REGISTER** 

**Register Name: YG_OFFS_USRL Register Type: READ/WRITE Register Address: 22 (Decimal); 16 (Hex) BIT NAME FUNCTION** Bits 7 to 0 of the 16-bit offset of Y gyroscope (2’s complement). This register is [7:0] Y_OFFS_USR[7:0] used to remove DC bias from the sensor output. The value in this register is added to the gyroscope sensor value before going into the sensor register. ~~a~~ **9.7 REGISTER 23 – GYRO OFFSET ADJUSTMENT REGISTER** 

## **9.7 REGISTER 23 – GYRO OFFSET ADJUSTMENT REGISTER** 

**Register Name: ZG_OFFS_USRH** 

**Register Type: READ/WRITE Register Address: 23 (Decimal); 17 (Hex) BIT NAME FUNCTION** Bits 15 to 8 of the 16-bit offset of Z gyroscope (2’s complement). This register is [7:0] Z_OFFS_USR[15:8] used to remove DC bias from the sensor output. The value in this register is added to the gyroscope sensor value before going into the sensor register. ~~i~~ 

Page 33 of 52 

Document Number: DS-000196 Revision: 1.1 

_**IAM-20680**_ 

## **9.8 REGISTER 24 – GYRO OFFSET ADJUSTMENT REGISTER** 

**Register Name: ZG_OFFS_USRL Register Type: READ/WRITE Register Address: 24 (Decimal); 18 (Hex)** 

|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|[7:0]|Z_OFFS_USR[7:0]|Bits 7 to 0 of the 16-bit offset of Z gyroscope (2’s complement).  This register is<br>used to remove DC bias from the sensor output.  The value in this register is<br>added to thegyroscope sensor value beforegoinginto the sensor register.|



## **9.9 REGISTER 25 – SAMPLE RATE DIVIDER** 

**Register Name: SMPLRT_DIV Register Type: READ/WRITE** 

**Register Address: 25 (Decimal); 19 (Hex)** 

|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|[7:0]|SMPLRT_DIV[7:0]|Divides the internal sample rate (see register CONFIG) to generate the sample rate that<br>controls sensor data output rate, FIFO sample rate.<br>**Note**: This register is only effective when FCHOICE_B register bits are 2’b00, and (0 < DLPF_CFG < 7).<br>This is the update rate of the sensor register:<br>SAMPLE_RATE = INTERNAL_SAMPLE_RATE / (1 + SMPLRT_DIV)<br>Where INTERNAL_SAMPLE_RATE = 1 kHz|



## **9.10 REGISTER 26 – CONFIGURATION** 

**Register Name: CONFIG Register Type: READ/WRITE** 

**Register Address: 26 (Decimal); 1A (Hex)** 

|**BIT**<br>~~——~~|**NAME**<br>~~——~~|**FUNCTION**<br>~~——~~|
|---|---|---|
|[7]<br>~~——~~|-<br>~~——~~|Always set to 0.<br>~~——~~|
|[6]<br>~~——~~|FIFO_MODE<br>~~——~~|When set to ‘1’, when the FIFO is full, additional writes will not be written to FIFO.<br>When set to ‘0’, when the FIFO is full, additional writes will be written to the FIFO, replacing<br>the oldest data.<br>~~——~~|
|[5:3]|EXT_SYNC_SET[2:0]|Enables the FSYNCpin data to be sampled.<br>**EXT_SYNC_SET**<br>**FSYNC bit location**<br>0<br>function disabled<br>1<br>TEMP_OUT_L[0]<br>2<br>GYRO_XOUT_L[0]<br>3<br>GYRO_YOUT_L[0]<br>4<br>GYRO_ZOUT_L[0]<br>5<br>ACCEL_XOUT_L[0]<br>6<br>ACCEL_YOUT_L[0]<br>7<br>ACCEL_ZOUT_L[0]<br>FSYNC will be latched to capture short strobes. This will be done such that if FSYNC toggles,<br>the latched value toggles, but won’t toggle again until the new latched value is captured by<br>the sample rate strobe.|
|[2:0]<br>~~ee~~|DLPF_CFG[2:0]<br>~~ee~~|For the DLPF to be used, FCHOICE_B[1:0] is 2’b00.<br>See Table 16.<br>~~ee~~|



The DLPF is configured by _DLPF_CFG,_ when _FCHOICE_B_ [1:0] = 2b’00. The gyroscope and temperature sensor are filtered according to the value of _DLPF_CFG_ and _FCHOICE_B_ as shown in Table 16. 

Page 34 of 52 

Document Number: DS-000196 Revision: 1.1 

_**IAM-20680**_ 

|**FCHOICE_B**<br>~~ee~~<br>~~|~~<br>~~es~~|**FCHOICE_B**<br>~~ee~~<br>~~|~~<br>~~es~~|**DLPF_CFG**<br>~~||~~<br>~~ee~~<br>|**Gyroscope**<br>~~eee~~<br>~~|~~<br>~~|~~<br>~~ft~~|**Gyroscope**<br>~~eee~~<br>~~|~~<br>~~|~~<br>~~ft~~|**Gyroscope**<br>~~eee~~<br>~~|~~<br>~~|~~<br>~~ft~~|**Temperature**<br>**Sensor**<br>~~eee~~|
|---|---|---|---|---|---|---|
|**<1>**<br>~~|~~<br>~~es~~<br>~~es~~|**<0>**<br>~~||~~<br>~~ee~~<br>||**3-dB BW**<br>**(Hz)**<br>~~|~~<br>~~|~~<br>~~Ge~~|**Noise BW**<br>**(Hz)**<br>~~ft~~|**Rate**<br>**(kHz)**<br>~~ft~~|**3-dB BW (Hz)**|
|X<br><br>~~es~~<br>~~es~~<br>~~es~~|1<br>~~|~~<br>~~ee~~<br>~~ee~~<br>|X<br>~~||~~<br>~~ee~~<br>~~ee~~<br>|8173<br>~~|~~<br>~~|~~<br>~~Ge~~<br>~~Ge~~<br>|8595.1<br>~~ft~~|32<br>~~ft~~|4000|
|1<br><br>~~es ~~<br>~~es~~<br>~~es ee~~<br>~~es~~|0<br>~~|~~<br> ~~ee~~<br>~~ee~~<br>~~ee~~<br>|X<br>~~| |~~<br>~~ee~~<br>~~ee~~<br>~~es~~<br>|3281<br>~~|~~<br>~~|~~<br>~~Ge~~<br>~~Ge~~<br>~~es~~<br>|3451.0<br>~~ft~~<br>|32<br>~~ft~~|4000|
|0<br> <br>~~es ~~<br>~~es ee~~<br>~~es~~<br>~~es~~|0<br> ~~ee~~<br> ~~ee~~<br>~~ee~~<br>~~eee~~<br>|0<br>~~ee~~<br>~~ee~~<br>~~es~~<br>~~ers~~<br>|250<br>~~Ge~~<br>~~Ge~~<br>~~es~~<br>~~es~~<br>|306.6<br>~~es~~<br>|8|4000|
|0<br> <br>~~es ee~~<br>~~es~~<br>~~es~~<br>~~es~~|0<br> ~~ee~~<br>~~ee~~<br>~~eee~~<br>~~eee~~|1<br>~~ee~~<br>~~es~~<br>~~ers~~<br>~~ers~~|176<br>~~Ge~~<br>~~es~~<br>~~es~~<br>~~es~~|177.0<br>~~es~~<br>~~es~~|1|188|
|0<br>~~ee~~<br>~~es ~~<br>~~es~~<br>~~es~~|0<br>~~ee ~~<br> ~~eee~~<br>~~eee~~|2<br> ~~es~~<br>~~ers~~<br>~~ers~~|92<br>~~es~~<br>~~es~~<br>~~es~~|108.6<br>~~es~~<br>~~es~~|1|98|
|0<br> <br>~~es ~~<br>~~es~~<br>~~es~~<br>~~es~~|0<br> ~~eee ~~<br> ~~eee~~<br>~~ee~~<br>|3<br> ~~ers ~~<br>~~ers~~<br>~~Ge~~<br>~~ee~~<br>|41<br> ~~es~~<br>~~es~~<br>~~Ge~~<br>~~Ge~~<br>|59.0<br>~~es~~<br>~~es~~|1|42|
|0<br> <br>~~es~~<br>~~es~~<br>~~es ee~~<br>~~es~~|0<br> ~~eee ~~<br>~~ee~~<br>~~ee~~<br>|4<br> ~~ers ~~<br>~~Ge~~<br>~~ee~~<br>~~es~~<br>|20<br> ~~es~~<br>~~Ge~~<br>~~Ge~~<br>~~es~~<br>|30.5<br>~~es~~<br>|1|20|
|0<br>~~es ~~<br>~~es ee~~<br>~~es~~<br>~~es~~|0<br> ~~ee~~<br>~~ee~~<br>~~eee~~|5<br>~~Ge~~<br>~~ee~~<br>~~es~~<br>~~ers~~|10<br>~~Ge~~<br>~~Ge~~<br>~~es~~<br>~~es~~|15.6<br>~~es~~|1|10|
|0<br> <br>~~es ee~~<br>~~es~~<br>~~es~~|0<br> ~~ee~~<br>~~ee~~<br>~~eee~~|6<br>~~ee ~~<br>~~es~~<br>~~ers~~|5<br> ~~Ge~~<br>~~es~~<br>~~es~~|8.0<br>~~es~~|1|5|
|0<br>~~ee~~<br>~~es ~~<br>~~es~~|0<br>~~ee ~~<br> ~~eee~~<br>~~Ge~~|7<br> ~~es~~<br>~~ers~~<br>~~Ge ~~|3281<br>~~es~~<br>~~es~~<br> ~~GG~~|3451.0<br>~~es~~<br>~~GG~~|8<br>~~GG~~|4000<br>~~GG~~|



**Table 16. Configuration** 

## **9.11 REGISTER 27 – GYROSCOPE CONFIGURATION** 

## **Register Name: GYRO_CONFIG Register Type: READ/WRITE Register Address: 27 (Decimal); 1B (Hex)** 

|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|[7]|XG_ST|X Gyro self-test.|
|[6]|YG_ST|Y Gyro self-test.|
|[5]|ZG_ST|Z Gyro self-test.|
|[4:3]|FS_SEL[1:0]|Gyro Full Scale Select:<br>00 = ±250 dps<br>01= ±500 dps<br>10 = ±1000 dps<br>11 = ±2000 dps|
|[2]|-|Reserved.|
|[1:0]|FCHOICE_B[1:0]|Used to bypass DLPF as shown in Table 16 above.|



## **9.12 REGISTER 28 – ACCELEROMETER CONFIGURATION** 

## **Register Name: ACCEL_CONFIG** 

**Register Type: READ/WRITE Register Address: 28 (Decimal); 1C (Hex)** 

|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|[7]|XA_ST|X Accel self-test.|
|[6]|YA_ST|Y Accel self-test.|
|[5]|ZA_ST|Z Accel self-test.|
|[4:3]|ACCEL_FS_SEL[1:0]|Accel Full Scale Select:<br>±2g (00),±4g (01),±8g (10),±16g (11)|
|[2:0]|-|Reserved.|



Page 35 of 52 

Document Number: DS-000196 Revision: 1.1 

_**IAM-20680**_ 

## **9.13 REGISTER 29 – ACCELEROMETER CONFIGURATION 2** 

**Register Name: ACCEL_CONFIG2 Register Type: READ/WRITE Register Address: 29 (Decimal); 1D (Hex)** 

**==> picture [425 x 267] intentionally omitted <==**

**----- Start of picture text -----**<br>
|||||||||
|---|---|---|---|---|---|---|---|
|BIT|NAME|FUNCTION|
|[7:6]|-|Reserved.|
|Averaging filter settings for Low Power Accelerometer mode:|
|0 = Average 4 samples|
|[5:4]|DEC2_CFG[1:0]|1 = Average 8 samples|
|2 = Average 16 samples|
|3 = Average 32 samples|
|[3]|ACCEL_FCHOICE_B|Used to bypass DLPF as shown in Table 17.|
|[2:0]|A_DLPF_CFG|Accelerometer low pass filter setting as shown in Table 17.|
|Accelerometer|
|ACCEL_FCHOICE_B|A_DLPF_CFG|3-dB BW|Noise BW|Rate|
|(Hz)|(Hz)|(kHz)|
|1|X|1046.0|1100.0|4|
|eseee|es|
|es|0|es|0|es|218.1|235.0|1|
|es|0|es|1|es|218.1|235.0|1|
|es|0|2|99.0|121.3|1|
|0|3|44.8|61.5|1|
|Be|eee|es|ee|
|es|0|ee|4|es|21.2|31.0|1|
|es|0|es|5|es|10.2|15.5|1|
|es|0|6|5.1|7.8|1|
|0|7|420.0|441.6|1|
|Be|eee|es|ee|

**----- End of picture text -----**<br>


**Table 17. Accelerometer Data Rates and Bandwidths (Low-noise mode)** 

The data output rate of the DLPF filter block can be further reduced by a factor of 1/(1+SMPLRT_DIV), where SMPLRT_DIV is an 8-bit integer. Following is a small subset of ODRs that are configurable for the accelerometer in the low-noise mode in this manner (Hz): 3.91, 7.81, 15.63, 31.25, 62.50, 125, 250, 500, 1K. 

Table 18 lists the accelerometer filter bandwidths, noise, and current consumption available in the low-power mode of operation. In the low-power mode of operation, the accelerometer is duty-cycled. 

**==> picture [398 x 216] intentionally omitted <==**

**----- Start of picture text -----**<br>
|||||||||||
|---|---|---|---|---|---|---|---|---|---|
|ACCEL_FCHOICE_B|1|0|0|0|0|
|||es|ee|ee|ee|
|A_DLPF_CFG|x|7|7|7|7|
|||ee|es|ee ee|
|DEC2_CFG|x|0|1|2|3|
|||ee|ee|ee ee|
|Averages|1x|4x|8x|16x|32x|
|||ee|es|es|ee|
|Ton (ms)|1.084|1.84|2.84|4.84|8.84|
|||ee|es|es|ee|
|Noise BW (Hz)|1100.0|441.6|235.4|121.3|61.5|
|||es|ee|ee|ee|
|Noise (mg) TYP based on 250 µg/|√|Hz|8.3|5.3|3.8|2.8|2.0|
|ee|ee|ee ee|ee|
|SMPLRT_DIV|ODR (Hz)|Current Consumption (µA) TYP|
|255|3.9|8.4|9.4|10.8|13.6|19.2|
|Bsrs|Gs|
|127|7.8|9.8|11.9|14.7|20.3|31.4|
|BsrsGs|
|63|15.6|12.8|17.0|22.5|33.7|55.9|
|ee|
|31|31.3|18.7|27.1|38.2|60.4|104.9|
|Pe|es|rsGs(|
|15|62.5|30.4|47.2|69.4|113.9|202.8|
|er|es|rs es|Ge|
|es|7|rs|125.0|es|57.4|87.5|132.0|220.9|N/A|
|es|3|es|250.0|es|100.9|168.1|257.0|N/A|
|es|1|500.0|es|ee|194.9|329.3|N/A|

**----- End of picture text -----**<br>


**Table 18. Accelerometer Filter Bandwidths, Noise, and Current Consumption** 

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Document Number: DS-000196 Revision: 1.1 

_**IAM-20680**_ 

## **9.14 REGISTER 30 – LOW POWER MODE CONFIGURATION** 

**Register Name: LP_MODE_CFG Register Type: READ/WRITE** 

## **Register Address: 30 (Decimal); 1E (Hex)** 

|**FCHOICE_B **<br>|<br>~~i~~|**FCHOICE_B **<br>|<br>~~i~~|0<br>~~Re~~<br>~~a~~|0<br>~~re~~<br>~~es es~~|0<br>~~rs~~<br>~~es ee~~|0<br>~~Gr~~<br>~~ee~~|0<br>~~ee~~|0|0|0|
|---|---|---|---|---|---|---|---|---|---|
|**G_AVGCFG**<br>|<br>~~i~~<br>|||0<br>~~Re ~~<br>~~a~~<br>~~es~~|1<br> ~~re ~~<br>~~es es~~<br>~~es es~~|2<br> ~~rs~~<br>~~es ee~~<br>~~es~~|3<br>~~Gr~~<br>~~ee~~|4<br>~~ee~~|5|6|7|
|**Averages**<br>~~i ~~<br>|<br>|||1x<br> ~~a~~<br>~~es~~<br>~~Rs~~|2x<br>~~es es~~<br>~~es es~~<br>~~es~~|4x<br>~~es ee~~<br>~~es~~<br>~~rs~~|8x<br>~~ee~~<br>~~Gr~~|16x<br>~~ee~~|32x|64x|128x|
|**Ton(ms)**<br>|<br>|<br>|||1.73<br>~~es~~<br>~~Rs~~<br>~~rs~~|2.23<br>~~es es~~<br>~~es~~<br>~~ee~~|3.23<br>~~es~~<br>~~rs~~<br>~~rs~~|5.23<br>~~Gr~~<br>~~Ge~~|9.23|17.23|33.23|65.23|
|**Noise BW(Hz)**<br>|<br>|||650.8<br>~~Rs~~<br>~~rs~~|407.1<br>~~es ~~<br>~~ee~~|224.2<br> ~~rs~~<br>~~rs~~|117.4<br>~~Gr~~<br>~~Ge~~|60.2|30.6|15.6|8.0|
|**Noise (dps) TYP based on**<br>**0.008 dps/**√**Hz**<br>|||0.20<br>~~rs~~<br>~~a~~|0.16<br>~~ee ~~|0.12<br> ~~rs~~|0.09<br>~~Ge~~|0.06|0.04|0.03|0.02|
|**SMPLRT_DIV**<br>~~Be rs~~|**ODR(Hz)**<br>~~rs~~|**Current Consumption(mA) TYP**<br>~~Gr~~<br>~~GeQQ~~||||||||
|255<br>~~Be rs~~<br>~~ss~~|3.9<br>~~rs~~<br>~~ss~~|1.3<br>~~Gr~~<br>~~Gr~~|1.3<br>~~Ge~~<br>~~rs~~|1.3<br>~~Ge~~<br>~~QQ~~|1.3<br>~~QQ~~<br>~~QQ~~|1.4<br>~~QQ~~<br>~~QQ~~|1.4|1.5|1.8|
|99<br>~~Be rs~~<br>~~ss~~<br>~~re~~|10.0<br>~~rs~~<br>~~ss~~<br>~~es~~|1.3<br>~~Gr~~<br>~~Gr~~<br>~~rr~~|1.3<br>~~Ge~~<br>~~rs~~<br>~~rs~~|1.4<br>~~Ge ~~<br>~~QQ~~<br>~~QQ~~|1.4<br> ~~QQ~~<br>~~QQ~~<br>~~QQ~~|1.5<br>~~QQ~~<br>~~QQ~~|1.6|1.9|2.5|
|64<br>~~ss~~<br>~~re~~<br>~~Re~~|15.4<br>~~ss~~<br>~~es~~<br>~~rs~~|1.4<br>~~Gr~~<br>~~rr~~<br>~~rs~~|1.4<br>~~rs ~~<br>~~rs~~<br>~~Qs~~|1.4<br> ~~QQ~~<br>~~QQ~~<br>~~Qs~~|1.5<br>~~QQ~~<br>~~QQ~~<br>~~(~~|1.6<br>~~QQ~~|1.8|2.2|N/A|
|32<br>~~re~~<br>~~Re~~<br>~~es~~|30.3<br>~~es ~~<br>~~rs~~<br>|1.4<br> ~~rr~~<br>~~rs~~<br>~~Gs~~<br>|1.4<br>~~rs~~<br>~~Qs~~|1.5<br>~~QQ~~<br>~~Qs~~<br>~~QO~~|1.6<br>~~QQ~~<br>~~(~~<br>~~QO~~|1.8<br>~~QO~~|2.2|N/A||
|19<br>~~Re ~~<br>~~ss~~<br>~~es~~<br>~~es~~|50.0<br> ~~rs~~<br>~~ss~~<br>~~Ge~~<br>|1.5<br>~~rs~~<br>~~ss~~<br>~~Gs~~<br>~~G~~~~**e**~~<br>|1.5<br>~~Qs~~<br>~~ss~~|1.6<br>~~Qs~~<br>~~ss~~<br>~~QO~~|1.8<br>~~(~~<br>~~ss~~<br>~~QO~~|2.1<br>~~ss~~<br>~~QO~~|2.8<br>~~ss~~|||
|9<br>~~ss~~<br>~~es~~<br>~~es ree~~|100.0<br>~~ss~~<br>~~Ge~~<br>~~ree~~|1.6<br>~~ss~~<br>~~Gs~~<br>~~G~~~~**e**~~<br>~~e~~|1.7<br>~~ss~~|1.9<br>~~ss~~<br>~~QO~~|2.2<br>~~ss~~<br>~~QO~~|3.0<br>~~ss~~<br>~~QO~~|N/A<br>~~ss~~|||
|7<br>~~es~~<br>~~es ree~~|125.0<br>~~Ge~~<br>~~ree~~<br>~~es~~|1.7<br>~~Gs~~<br>~~G~~~~**e**~~<br>~~e~~<br>~~es~~|1.8|2.0<br>~~QO~~|2.5<br>~~QO~~|N/A<br>~~QO~~||||
|4<br><br>~~es ree~~<br>~~ee~~|200.0<br>~~Ge~~<br>~~ree ~~<br>~~ee~~<br>~~es~~<br>~~ee ee~~|1.9<br>~~G~~~~**e**~~<br> ~~e~~<br>~~ee~~<br>~~es~~<br>~~ee~~|2.1<br>~~ee~~|2.5<br>~~ee~~|N/A|||||
|3<br>~~ee~~|250.0<br>~~es~~<br>~~ee~~<br>~~ee ee~~<br>~~ee~~|2.1<br>~~es~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|2.3<br>~~ee~~|2.7<br>~~ee~~||||||
|2<br>~~ee~~<br>~~e~~|333.3<br>~~ee~~<br>~~ee ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|2.3<br>~~ee~~<br>~~ee~~<br>~~e~~<br>~~ee~~|2.6<br>~~ee~~<br>~~e~~|N/A<br>~~ee~~||||||
|1<br>~~e~~<br>~~ee~~|500.0<br>~~ee~~<br>~~ee ~~<br>~~ee~~<br>~~ee~~|2.9<br>~~e~~<br> ~~ee~~<br>~~ee~~|N/A<br>~~e~~|||||||



To operate in gyroscope low-power mode or 6-axis low-power mode, GYRO_CYCLE should be set to ‘1.’  Gyroscope filter configuration is determined by G_AVGCFG[2:0] that sets the averaging filter configuration. It is not dependent on DLPF_CFG[2:0]. Table 19 shows some example configurations for gyroscope low power mode. 

**Table 19. Example Configurations of Gyroscope Low Power Mode** 

## **9.15 REGISTER 31 – WAKE-ON MOTION THRESHOLD (ACCELEROMETER)** 

**Register Name: ACCEL_WOM_THR Register Type: READ/WRITE Register Address: 31 (Decimal); 1F (Hex) BIT NAME FUNCTION** ~~es~~ [7:0] WOM_THR[7:0] This register holds the threshold value for the Wake on Motion Interrupt for accelerometer. ~~S—aEa_Ta‘“_aeeX mvuuYlileeemymymmua0a uss amas~~ 

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## **9.16 REGISTER 35 – FIFO ENABLE** 

## **Register Name: FIFO_EN** 

## **Register Type: READ/WRITE** 

## **Register Address: 35 (Decimal); 23 (Hex)** 

|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|[7]|TEMP_FIFO_EN|1 – Write TEMP_OUT_H and TEMP_OUT_L to the FIFO at the sample rate; If enabled,<br>buffering of data occurs even if data path is in standby.<br>0 – Function is disabled.|
|[6]|XG_FIFO_EN|1 – Write GYRO_XOUT_H and GYRO_XOUT_L to the FIFO at the sample rate; If enabled,<br>buffering of data occurs even if data path is in standby.<br>0 – Function is disabled.|
|[5]|YG_FIFO_EN|1 – Write GYRO_YOUT_H and GYRO_YOUT_L to the FIFO at the sample rate; If enabled,<br>buffering of data occurs even if data path is in standby.<br>0 – Function is disabled.<br>**Note**: Enabling any one of the bits corresponding to the Gyros or Temp data paths, data are buffered into<br>the FIFO even though that datapath is not enabled.|
|[4]|ZG_FIFO_EN|1 – Write GYRO_ZOUT_H and GYRO_ZOUT_L to the FIFO at the sample rate; If enabled,<br>buffering of data occurs even if data path is in standby.<br>0 – Function is disabled.|
|[3]|ACCEL_FIFO_EN|1 – Write ACCEL_XOUT_H, ACCEL_XOUT_L, ACCEL_YOUT_H, ACCEL_YOUT_L, ACCEL_ZOUT_H,<br>and ACCEL_ZOUT_L to the FIFO at the sample rate;<br>0 – Function is disabled.|
|[2:0]|-|Reserved.|



## **9.17 REGISTER 54 – FSYNC INTERRUPT STATUS** 

## **Register Name: FSYNC_INT** 

**Register Type: READ to CLEAR Register Address: 54 (Decimal); 36 (Hex)** 

|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|[7]|FSYNC_INT|This bit automatically sets to 1 when a FSYNC interrupt has been generated. The bit<br>clears to 0 after the register has been read.|



## **9.18 REGISTER 55 – INT/DRDY PIN / BYPASS ENABLE CONFIGURATION** 

## **Register Name: INT_PIN_CFG** 

## **Register Type: READ/WRITE** 

## **Register Address: 55 (Decimal); 37 (Hex)** 

|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|[7]|INT_LEVEL|1 – The logic level for INT/DRDY pin is active low.<br>0 – The logic level for INT/DRDYpin is active high.|
|[6]|INT_OPEN|1 – INT/DRDY pin is configured as open drain.<br>0 – INT/DRDYpin is configured aspush-pull.|
|[5]|LATCH_INT_EN|1 – INT/DRDY pin level held until interrupt status is cleared.<br>0 – INT/DRDYpin indicates interruptpulse’s width is 50µs.|
|[4]|INT_RD_CLEAR|1 – Interrupt status is cleared if any read operation is performed.<br>0 – Interrupt status is cleared onlybyreadingINT_STATUS register.|
|[3]|FSYNC_INT_LEVEL|1 – The logic level for the FSYNC pin as an interrupt is active low.<br>0 – The logic level for the FSYNCpin as an interrupt is active high.|
|[2]|FSYNC_INT_MODE_EN|When this bit is equal to 1, the FSYNC pin will trigger an interrupt when it transitions to<br>the level specified by F_SYNC_INT_LEVEL_. When this bit is equal to 0, the FSYNC pin is<br>disabled from causingan interrupt.|
|[1]|-|Reserved.|
|[0]|-|Always set to 0.|



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## **9.19 REGISTER 56 – INTERRUPT ENABLE** 

## **Register Name: INT_ENABLE Register Type: READ/WRITE** 

## **Register Address: 56 (Decimal); 38 (Hex)** 

|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|[7:5]|WOM_INT_EN[7:5]|111 – Enable WoM interrupt on accelerometer.<br>000 – Disable WoM interrupt on accelerometer.|
|[4]|FIFO_OFLOW_EN|1 – Enables a FIFO buffer overflow to generate an interrupt.<br>0 – Function is disabled.|
|[3]|-|Reserved.|
|[2]|GDRIVE_INT_EN|Gyroscope Drive System Readyinterrupt enable.|
|[1]|-|Reserved.|
|[0]|DATA_RDY_INT_EN|Data readyinterrupt enable.|



## **9.20 REGISTER 58 – INTERRUPT STATUS** 

## **Register Name: INT_STATUS Register Type: READ to CLEAR** 

## **Register Address: 58 (Decimal); 3A (Hex)** 

|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|[7:5]|WOM_INT|Accelerometer WoM interrupt status. Cleared on Read.<br>111 – WoM interrupt on accelerometer|
|[4]|FIFO_OFLOW_INT|This bit automatically sets to 1 when a FIFO buffer overflow has been generated. The bit<br>clears to 0 after the register has been read.|
|[3]|-|Reserved.|
|[2]|GDRIVE_INT|Gyroscope Drive System Readyinterrupt|
|[1]|-|Reserved.|
|[0]|DATA_RDY_INT|This bit automatically sets to 1 when a Data Ready interrupt is generated. The bit clears<br>to 0 after the register has been read.|



## **9.21 REGISTERS 59 TO 64 – ACCELEROMETER MEASUREMENTS** 

**Register Name: ACCEL_XOUT_H** 

**Register Type: READ only Register Address: 59 (Decimal); 3B (Hex)** 

**BIT NAME FUNCTION** ~~eT~~ [7:0] ACCEL_XOUT_H[15:8] High byte of accelerometer x-axis data. **Register Name: ACCEL_XOUT_L** 

**Register Type: READ only Register Address: 60 (Decimal); 3C (Hex)** 

**BIT NAME FUNCTION** ~~eT~~ [7:0] ACCEL_XOUT_L[7:0] Low byte of accelerometer x-axis data. **Register Name: ACCEL_YOUT_H Register Type: READ only Register Address: 61 (Decimal); 3D (Hex) BIT NAME FUNCTION** ~~ee~~ [7:0] ACCEL_YOUT_H[15:8] High byte of accelerometer y-axis data. 

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**Register Name: ACCEL_YOUT_L Register Type: READ only Register Address: 62 (Decimal); 3E (Hex) BIT NAME FUNCTION** ~~ee~~ [7:0] ACCEL_YOUT_L[7:0] Low byte of accelerometer y-axis data. **Register Name: ACCEL_ZOUT_H Register Type: READ only Register Address: 63 (Decimal); 3F (Hex) BIT NAME FUNCTION** [7:0] ACCEL_ZOUT_H[15:8] High byte of accelerometer z-axis data. ~~ee~~ **Register Name: ACCEL_ZOUT_L Register Type: READ only Register Address: 64 (Decimal); 40 (Hex) BIT NAME FUNCTION** ~~ee~~ [7:0] ACCEL_ZOUT_L[7:0] Low byte of accelerometer z-axis data. **9.22 REGISTERS 65 AND 66 – TEMPERATURE MEASUREMENT Register Name: TEMP_OUT_H Register Type: READ only Register Address: 65 (Decimal); 41 (Hex) BIT NAME FUNCTION** ~~ee~~ [7:0] TEMP_OUT[15:8] High byte of the temperature sensor output. **Register Name: TEMP_OUT_L Register Type: READ only Register Address: 66 (Decimal); 42 (Hex)** 

|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|[7:0]|TEMP_OUT[7:0]|Low byte of the temperature sensor output.<br>**TEMP_degC**<br>= ((TEMP_OUT –<br>RoomTemp_Offset)/Temp_Sensitivity)+ 25degC|



## **9.23 REGISTERS 67 TO 72 – GYROSCOPE MEASUREMENTS** 

**Register Name: GYRO_XOUT_H Register Type: READ only Register Address: 67 (Decimal); 43 (Hex) BIT NAME FUNCTION** [7:0] GYRO_XOUT[15:8] High byte of the X-Axis gyroscope output. ~~ee~~ **Register Name: GYRO_XOUT_L Register Type: READ only Register Address: 68 (Decimal); 44 (Hex)** 

|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|[7:0]|GYRO_XOUT[7:0]|Low byte of the X-Axis gyroscope output.<br>**GYRO_XOUT =**<br>Gyro_Sensitivity * X_angular_rate<br>Nominal<br>Conditions<br>FS_SEL = 0<br>Gyro_Sensitivity= 131 LSB/(dps)|



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**Register Name: GYRO_YOUT_H Register Type: READ only** 

**Register Address: 69 (Decimal); 45 (Hex)** 

**BIT NAME FUNCTION** ~~eS~~ [7:0] GYRO_YOUT[15:8] High byte of the Y-Axis gyroscope output. **Register Name: GYRO_YOUT_L** 

**Register Type: READ only Register Address: 70 (Decimal); 46 (Hex)** 

|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|[7:0]|GYRO_YOUT[7:0]|Low byte of the Y-Axis gyroscope output.<br>**GYRO_YOUT =**<br>Gyro_Sensitivity * Y_angular_rate<br>Nominal<br>Conditions<br>FS_SEL = 0<br>Gyro_Sensitivity= 131 LSB/(dps)|



**Register Name: GYRO_ZOUT_H Register Type: READ only Register Address: 71 (Decimal); 47 (Hex)** 

**BIT NAME FUNCTION** ~~ee~~ [7:0] GYRO_ZOUT[15:8] High byte of the Z-Axis gyroscope output. **Register Name: GYRO_ZOUT_L** 

**Register Type: READ only** 

## **Register Address: 72 (Decimal); 48 (Hex)** 

|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|[7:0]|GYRO_ZOUT[7:0]|Low byte of the Z-Axis gyroscope output.<br>**GYRO_ZOUT =**<br>Gyro_Sensitivity * Z_angular_rate<br>Nominal<br>Conditions<br>FS_SEL = 0<br>Gyro_Sensitivity = 131 LSB/(dps)|



## **9.24 REGISTER 104 – SIGNAL PATH RESET** 

## **Register Name: SIGNAL_PATH_RESET** 

## **Register Type: READ/WRITE** 

## **Register Address: 104 (Decimal); 68 (Hex)** 

|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|[7:2]|-|Reserved.|
|[1]|ACCEL_RST|Reset accel digital signal path.<br>**Note**: Sensor registers are not cleared. Use SIG_COND_RST to clear sensor registers.|
|[0]|TEMP_RST|Reset temp digital signal path.<br>**Note**: Sensor registers are not cleared. Use SIG_COND_RST to clear sensor registers.|



## **9.25 REGISTER 105 – ACCELEROMETER INTELLIGENCE CONTROL** 

## **Register Name: ACCEL_INTEL_CTRL** 

## **Register Type: READ/WRITE** 

## **Register Address: 105 (Decimal); 69 (Hex)** 

|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|[7]|ACCEL_INTEL_EN|This bit enables the Wake-on-Motion detection logic.|
|[6]|ACCEL_INTEL_MODE|0 – Do not use.<br>1 – Compare the current sample with theprevious sample.|
|[5:0]|-|Reserved.|



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## **9.26 REGISTER 106 – USER CONTROL** 

## **Register Name: USER_CTRL** 

## **Register Type: READ/WRITE Register Address: 106 (Decimal); 6A (Hex)** 

|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|[7]|-|Reserved.|
|[6]|FIFO_EN|1 – Enable FIFO operation mode.<br>0 – Disable FIFO access from serial interface. To disable FIFO writes by DMA, use FIFO_EN<br>register.|
|[5]|-|Reserved.|
|[4]|I2C_IF_DIS|1 – Disable I2C Slave module andput the serial interface in SPI mode only.|
|[3]|-|Reserved.|
|[2]|FIFO_RST|1 – Reset FIFO module. Reset is asynchronous. This bit auto clears after one clock cycle of the<br>internal 20 MHz clock.|
|[1]|-|Reserved.|
|[0]|SIG_COND_RST|1 – Reset all gyro digital signal path, accel digital signal path, and temp digital signal path.<br>This bit also clears all the sensor registers.|



## **9.27 REGISTER 107 – POWER MANAGEMENT 1** 

## **Register Name: PWR_MGMT_1 Register Type: READ/WRITE Register Address: 107 (Decimal); 6B (Hex)** 

|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|[7]|DEVICE_RESET|1 – Reset the internal registers and restores the default settings. The bit automatically clears<br>to 0 once the reset is done.|
|[6]|SLEEP|When set to 1, the chip is set to sleep mode.<br>**Note**: The default value is 1,the chipcomes upin Sleepmode.|
|[5]|ACCEL_CYCLE|When set to 1, and SLEEP and STANDBY are not set to 1, the chip will cycle between sleep<br>and taking a single accelerometer sample at a rate determined by SMPLRT_DIV<br>**Note**: When all accelerometer axes are disabled via PWR_MGMT_2 register bits and cycle is enabled, the<br>chip will wake up at the rate determined by the respective registers above, but will not take any<br>samples.|
|[4]|GYRO_STANDBY|When set, the gyro drive and pll circuitry are enabled, but the sense paths are disabled. This<br>is a lowpower mode that allowsquick enablingof thegyros.|
|[3]|TEMP_DIS|When set to 1,this bit disables the temperature sensor.|
|[2:0]|CLKSEL[2:0]|**Code**<br>**Clock Source**<br>0<br>Internal 20 MHz oscillator.<br>1<br>Auto selects the best available clock source – PLL if ready, else use the Internal oscillator.<br>2<br>Auto selects the best available clock source – PLL if ready, else use the Internal oscillator.<br>3<br>Auto selects the best available clock source – PLL if ready, else use the Internal oscillator.<br>4<br>Auto selects the best available clock source – PLL if ready, else use the Internal oscillator.<br>5<br>Auto selects the best available clock source – PLL if ready, else use the Internal oscillator.<br>6<br>Internal 20 MHz oscillator.<br>7<br>Stops the clock and keeps timing generator in reset.|



**Note** : The default value of CLKSEL[2:0] is 000. It is required that CLKSEL[2:0] be set to 001 to achieve full gyroscope performance. 

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## **9.28 REGISTER 108 – POWER MANAGEMENT 2** 

## **Register Name: PWR_MGMT_2** 

## **Register Type: READ/WRITE** 

## **Register Address: 108 (Decimal); 6C (Hex)** 

|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|[7]|FIFO_LP_EN|1 – Enable FIFO in low-power accelerometer mode. Default settingis 0.|
|[6]|-|Reserved.|
|[5]|STBY_XA|1 – X accelerometer is disabled.<br>0 – X accelerometer is on.|
|[4]|STBY_YA|1 – Y accelerometer is disabled.<br>0 – Y accelerometer is on.|
|[3]|STBY_ZA|1 – Z accelerometer is disabled.<br>0 – Z accelerometer is on.|
|[2]|STBY_XG|1 – X gyro is disabled.<br>0 – Xgyro is on.|
|[1]|STBY_YG|1 – Y gyro is disabled.<br>0 – Ygyro is on.|
|[0]|STBY_ZG|1 – Z gyro is disabled.<br>0 – Zgyro is on.|



## **9.29 REGISTERS 114 AND 115 – FIFO COUNT REGISTERS** 

**Register Name: FIFO_COUNTH Register Type: READ Only Register Address: 114 (Decimal); 72 (Hex)** 

|**BIT**|**NAME**|**FUNCTION**||
|---|---|---|---|
|[7:5]|-|Reserved.||
|[4:0]|FIFO_COUNT[12:8]|High Bits; count indicates the number of written bytes in the FIFO.<br>Readingthis byte latches the data for both FIFO_COUNTH,and FIFO_COUNTL.||
|**Register Name: FIFO_COUNTL**|**Register Name: FIFO_COUNTL**|||
|**Register Type: READ Only**|**Register Type: READ Only**|||
|**Register Address: 115 (Decimal); 73 (Hex)**|**Register Address: 115 (Decimal); 73 (Hex)**|||
|**BIT**|**NAME**|**FUNCTION**||
|||Low Bits; count indicates the number of written bytes in the FIFO.||
|[7:0]|FIFO_COUNT[7:0]|**Note**: Must read FIFO_COUNTH to latch new data for both FIFO_COUNTH and||
|||FIFO_COUNTL.||



**Register Name: FIFO_COUNTL Register Type: READ Only** 

**Register Address: 115 (Decimal); 73 (Hex)** 

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## **9.30 REGISTER 116 – FIFO READ WRITE** 

**Register Name: FIFO_R_W** 

**Register Type: READ/WRITE** 

**Register Address: 116 (Decimal); 74 (Hex)** 

**BIT NAME FUNCTION** ~~E~~ [7:0] FIFO_DATA[7:0] Read/Write command ~~e~~ provides Read or Write operation for the FIFO. **Description** : 

This register is used to read and write data from the FIFO buffer. 

Data are written to the FIFO in order of register number (from lowest to highest). If all the FIFO enable flags (see below) are enabled, the contents of registers 59 through 72 will be written in order at the Sample Rate. 

The contents of the sensor data registers (Registers 59 to 72) are written into the FIFO buffer when their corresponding FIFO enable flags are set to 1 in FIFO_EN (Register 35). 

If the FIFO buffer has overflowed, the status bit _FIFO_OFLOW_INT_ is automatically set to 1. This bit is located in INT_STATUS (Register 58). When the FIFO buffer has overflowed, the oldest data will be lost and new data will be written to the FIFO unless register 26 CONFIG, bit[6] FIFO_MODE = 1. 

If the FIFO buffer is empty, reading register FIFO_DATA will return a unique value of 0xFF until new data are available. Normal data are precluded from ever indicating 0xFF, so 0xFF gives a trustworthy indication of FIFO empty. 

## **9.31 REGISTER 117 – WHO AM I** 

**Register Name: WHO_AM_I Register Type: READ only** 

**Register Address: 117 (Decimal); 75 (Hex) BIT NAME FUNCTION** [7:0] WHOAMI Register to indicate to user which device is being accessed. ~~EE Eee~~ This register is used to verify the identity of the device. The contents of _WHOAMI_ is an 8-bit device ID. The default value of the register is 0xA9. This is different from the I[2] C address of the device as seen on the slave I[2] C controller by the applications processor. The I[2] C address of the IAM-20680 is 0x68 or 0x69 depending upon the value driven on AD0 pin. 

## **9.32 REGISTERS 119, 120, 122, 123, 125, 126 ACCELEROMETER OFFSET REGISTERS** 

## **Register Name: XA_OFFSET_H** 

**Register Type: READ/WRITE** 

## **Register Address: 119 (Decimal); 77 (Hex)** 

|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|[7:0]|XA_OFFS[14:7]|Upper bits of the X accelerometer offset cancellation. ±16g Offset cancellation in all Full<br>Scale modes,15 bit 0.98-mgsteps.|



**Register Name: XA_OFFSET_L** 

**Register Type: READ/WRITE Register Address: 120 (Decimal); 78 (Hex)** 

|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|[7:1]|XA_OFFS[6:0]|Lower bits of the X accelerometer offset cancellation. ±16g Offset cancellation in all Full<br>Scale modes,15 bit 0.98-mgsteps.|
|[0]|-|Reserved.|



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**Register Name: YA_OFFSET_H Register Type: READ/WRITE Register Address: 122 (Decimal); 7A (Hex)** 

|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|[7:0]|YA_OFFS[14:7]|Upper bits of the Y accelerometer offset cancellation. ±16g Offset cancellation in all Full<br>Scale modes,15 bit 0.98-mgsteps.|



**Register Name: YA_OFFSET_L Register Type: READ/WRITE** 

## **Register Address: 123 (Decimal); 7B (Hex)** 

|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|[7:1]|YA_OFFS[6:0]|Lower bits of the Y accelerometer offset cancellation. ±16g Offset cancellation in all Full<br>Scale modes,15 bit 0.98-mgsteps.|
|[0]|-|Reserved.|



## **Register Name: ZA_OFFSET_H Register Type: READ/WRITE Register Address: 125 (Decimal); 7D (Hex)** 

|||**BIT**|**NAME**|**FUNCTION**|
|---|---|---|---|---|
|||[7:0]|ZA_OFFS[14:7]|Upper bits of the Z accelerometer offset cancellation. ±16g Offset cancellation in all Full<br>Scale modes,15 bit 0.98-mgsteps.|
|**Register Name: ZA_OFFSET_L**|||||
|**Register Type: READ/WRITE**|||||
|**Register Address: 126 (Decimal); 7E (Hex)**|||||



|**BIT**|**NAME**|**FUNCTION**|
|---|---|---|
|[7:1]|ZA_OFFS[6:0]|Lower bits of the Z accelerometer offset cancellation. ±16g Offset cancellation in all Full<br>Scale modes,15 bit 0.98-mgsteps.|
|[0]|-|Reserved.|



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## _**10 ASSEMBLY**_ 

This section provides general guidelines for assembling InvenSense Micro Electro-Mechanical Systems (MEMS) gyros packaged in LGA package. 

## **10.1 ORIENTATION OF AXES** 

Figure 14 shows the orientation of the axes of sensitivity and the polarity of rotation. Note the pin 1 identifier (•) in the figure. 

**==> picture [86 x 109] intentionally omitted <==**

**----- Start of picture text -----**<br>
+Z<br>+Z +Y<br>+Y<br>+X +X<br>IAM-20680<br>**----- End of picture text -----**<br>


**Figure 13. Orientation of Axes of Sensitivity and Polarity of Rotation** 

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## **10.2 PACKAGE DIMENSIONS** 

16 Lead LGA (3x3x0.75) mm NiAu pad finish 

**Figure 14. Package Dimensions** 

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|~~EE~~|**SYMBOLS**<br>~~EE~~<br>~~ee~~|**DIMENSIONS IN MILLIMETERS**<br>~~EE~~|**DIMENSIONS IN MILLIMETERS**<br>~~EE~~|**DIMENSIONS IN MILLIMETERS**<br>~~EE~~|
|---|---|---|---|---|
|||**MIN**<br>~~EE~~|**NOM**<br>~~EE~~|**MAX**<br>~~EE~~|
|**Total Thickness**<br>~~es~~|**A**<br>~~es~~<br>~~ee~~<br>~~ee~~|0.7<br>~~es~~|0.75<br>~~es~~|0.8<br>~~es~~|
|**Substrate Thickness**<br>~~es~~|**A1**<br>~~ee~~<br>~~es~~<br>~~ee~~|0.105                       REF<br>~~es~~|||
|**Mold Thickness**<br>~~es~~|**A2**<br>~~ee~~<br>~~es~~|0.63                        REF<br>~~es~~|||
|**Body Size**<br>~~et~~|**D**<br>~~et~~|2.9<br>~~et~~|3<br>~~et~~|3.1|
||**E**<br>~~et~~<br>~~es es~~|2.9<br>~~et~~<br>~~es~~|3<br>~~et~~|3.1|
|**Lead Width**<br>~~ee~~|**W**<br>~~ee~~<br>~~es es~~|0.2<br>~~ee~~<br>~~es~~<br>~~rs~~|0.25<br>~~ee~~|0.3<br>~~ee~~|
|**Lead Length**<br>~~ee~~<br>~~es~~|**L**<br>~~ee~~<br>~~es es~~<br>~~es~~<br>~~en~~|0.3<br>~~ee~~<br>~~es~~<br>~~es~~<br>~~rs~~|0.35<br>~~ee~~<br>~~es~~|0.4<br>~~ee~~<br>~~es~~|
|**Lead Pitch**<br>~~es~~|**e**<br>~~es~~<br>~~en~~|0.5                           BSC<br>~~rs~~<br>~~es~~|||
|**Lead Count**<br>~~sD~~<br>~~a~~|**n**<br>~~en~~<br>~~sD~~<br>~~ees eee~~|16<br>~~sD~~<br>~~eee~~|||
|**Edge Ball Center to Center**<br>~~a~~<br>~~ee~~|**D1**<br>~~ees eee~~|2                            BSC<br>~~eee~~|||
||**E1**<br>~~ees eee~~<br>~~es~~|1                            BSC<br>~~eee~~<br>~~eee~~|||
|**Body Center to Contact Ball**<br>~~a~~<br>~~ee~~|**SD**<br>~~ees eee~~<br>~~es~~|---                           BSC<br>~~eee~~<br>~~eee~~|||
||**SE**<br>~~es~~<br>~~ee~~|---                           BSC<br>~~eee~~|||
|**Ball Width**<br>~~ee~~<br>~~es~~|**b**<br>~~es~~<br>~~es~~<br>~~ee~~|---<br>~~eee~~<br>~~es~~|---<br>~~eee~~<br>~~es~~|---<br>~~eee~~<br>~~es~~|
|**Ball Diameter**<br>~~es~~|~~ee~~<br>~~es~~|---<br>~~es~~|||
|**Ball Opening**<br>~~es~~<br>~~Rs~~|~~es~~<br>~~Rs~~|---<br>~~es~~<br>~~Rs~~|||
|**Ball Pitch**<br>~~Rs~~<br>~~Rs~~|**e1**<br>~~Rs~~<br>~~Rs~~|---<br>~~Rs~~<br>~~Rs~~|||
|**Ball Count**<br>~~Rs~~<br>~~rs~~|**n1**<br>~~Rs~~<br>~~rs~~<br>~~ee~~|---<br>~~Rs~~<br>~~rs~~|||
|**Pre-Solder**<br>~~es~~|~~es~~<br>~~ee~~<br>~~en~~|---<br>~~es~~|---<br>~~es~~|---<br>~~es~~|
|**Package Edge Tolerance**<br>~~es~~|**aaa**<br>~~ee~~<br>~~es~~<br>~~en~~|0.1<br>~~es~~|||
|**Mold Flatness**<br>~~es~~<br>~~Rs~~|**bbb**<br>~~es~~<br>~~en~~<br>~~Rs~~|0.2<br>~~es~~<br>~~Rs~~|||
|**Coplanarity**<br>~~Rs~~<br>~~Rs~~|**ddd**<br>~~Rs~~<br>~~Rs~~|0.08<br>~~Rs~~<br>~~Rs~~|||
|**Ball Offset(Package)**<br>~~Rs~~<br>~~rs~~|**eee**<br>~~Rs~~<br>~~rs~~<br>~~ee~~|---<br>~~Rs~~<br>~~rs~~|||
|**Ball Offset(Ball)**<br>~~es~~|**fff**<br>~~es~~<br>~~ee~~<br>~~er~~|---<br>~~es~~|||
|**Lead Edge to Package Edge **<br>~~es~~|**M**<br>~~ee~~<br>~~es~~<br>~~er~~|0.01<br>~~es~~|0.06<br>~~es~~|0.11<br>~~es~~|



**Table 20. Package Dimensions** 

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## _**11 PART NUMBER PACKAGE MARKING**_ 

The part number package marking for IAM-20680 devices is summarized below: 

**==> picture [398 x 42] intentionally omitted <==**

**----- Start of picture text -----**<br>
PART NUMBER  PART NUMBER PACKAGE MARKING<br>IAM-20680  IA268<br>eGO<br>Table 21. Part Number Package Marking<br>**----- End of picture text -----**<br>


**==> picture [55 x 9] intentionally omitted <==**

**----- Start of picture text -----**<br>
TOP VIEW<br>**----- End of picture text -----**<br>


**==> picture [218 x 114] intentionally omitted <==**

**----- Start of picture text -----**<br>
Part Number IA268<br>Lot Traceability Code X X X X X X<br>  YYWW<br>Y Y = Year Code<br>W W = Work Week<br>**----- End of picture text -----**<br>


**Figure 15. Part Number Package Marking** 

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## _**12 REFERENCE**_ 

Please refer to “InvenSense MEMS Handling Application Note (AN-IVS-0002A-00)” for the following information: 

- Manufacturing Recommendations 

   - Assembly Guidelines and Recommendations 

   - PCB Design Guidelines and Recommendations 

   - MEMS Handling Instructions 

   - ESD Considerations 

   - Reflow Specification 

   - Storage Specifications 

   - Package Marking Specification 

   - Tape & Reel Specification 

   - Reel & Pizza Box Label 

   - Packaging 

   - Representative Shipping Carton Label 

- Compliance 

   - Environmental Compliance 

   - DRC Compliance 

   - Compliance Declaration Disclaimer 

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## _**13 REVISION HISTORY**_ 

|**REVISION DATE**|**REVISION**|**DESCRIPTION**|
|---|---|---|
|12/21/2016|1.0|Initial Release|
|01/30/2018|1.1|Changed to TDK format, added automotive in the document title, added sections “Thermal<br>Information section” and “Sensor Initialization and Basic Configuration”, fixed typo in register<br>0x48 documentation(the table had GYRO_YOUT instead of GYRO_ZOUT)|



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This information furnished by InvenSense, Inc. (“InvenSense”) is believed to be accurate and reliable. However, no responsibility is assumed by InvenSense for its use, or for any infringements of patents or other rights of third parties that may result from its use. Specifications are subject to change without notice. InvenSense reserves the right to make changes to this product, including its circuits and software, in order to improve its design and/or performance, without prior notice. InvenSense makes no warranties, neither expressed nor implied, regarding the information and specifications contained in this document. InvenSense assumes no responsibility for any claims or damages arising from information contained in this document, or from the use of products and services detailed therein. This includes, but is not limited to, claims or damages based on the infringement of patents, copyrights, mask work and/or other intellectual property rights. 

Certain intellectual property owned by InvenSense and described in this document is patent protected. No license is granted by implication or otherwise under any patent or patent rights of InvenSense. This publication supersedes and replaces all information previously supplied. Trademarks that are registered trademarks are the property of their respective companies. InvenSense sensors should not be used or sold in the development, storage, production or utilization of any conventional or mass-destructive weapons or for any other weapons or life threatening applications, as well as in any other life critical applications such as medical equipment, transportation, aerospace and nuclear instruments, undersea equipment, power plant equipment, disaster prevention and crime prevention equipment. 

©2017 InvenSense. All rights reserved. InvenSense, MotionTracking, MotionProcessing, MotionProcessor, MotionFusion, MotionApps, DMP, AAR, and the InvenSense logo are trademarks of InvenSense, Inc. The TDK logo is a trademark of TDK Corporation. Other company and product names may be trademarks of the respective companies with which they are associated. 

©2016—2018 InvenSense. All rights reserved. 

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