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HEF4541BP
IC, 4000 LOCMOS LOGIC
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- Manufacturer: NEXPERIA
- Product type: Timers, Oscillators & Pulse Generators
- Frequency: 100kHz
- No. of Pins: 14Pins
- Digital IC Case: DIP
- Supply Voltage Max: 15V
- Supply Voltage Min: 5V
- Operating Temperature Max: 70°C
- Operating Temperature Min: -40°C
| Delivery and price | |
|---|---|
| Units per pack | 6000 |
| Price | 0.415 € |
| Current stock | 10+ |
| Lead time | 30 days |
Datasheet
**HEF4541B Programmable timer Rev. 4 — 25 June 2012** **Product data sheet** ## **1. General description** The HEF4541B is a programmable timer which consists of a 16-stage binary counter, an integrated oscillator to be used with external timing components, an automatic power-on reset and output control logic. The frequency of the oscillator is determined by the external components RTC and CTC within the frequency range 1 Hz to 100 kHz. This oscillator may be replaced by an external clock signal at input RS, the timer advances on the positive-going transition of RS. A LOW on the auto reset input (AR) and a LOW on the master reset input (MR) enables the internal power-on reset. A HIGH level at input MR resets the counter independent on all other inputs. Resetting disables the oscillator to provide no active power dissipation. A HIGH at input AR turns off the power-on reset to provide a low quiescent power dissipation of the timer. The 16-stage counter divides the oscillator frequency by 2[8] , 2[10] , 2[13] or 2[16] depending on the state of the address inputs (A0, A1). The divided oscillator frequency is available at output O. The phase input (PH) features a complementary output signal. When the mode select input (MODE) is LOW the timer is a single transition timer and when HIGH the timer is a 2[n] frequency divider. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input. ## **2. Features and benefits** - Fully static operation - 5 V, 10 V, and 15 V parametric ratings - Standardized symmetrical output characteristics - Operates across the automotive temperature range − 40 ° C to +85 ° C - Complies with JEDEC standard JESD 13-B ## **3. Ordering information** **Table 1. Ordering information** _All types operate from_ − _40_ ° _C to +85_ ° _C._ |**Type number**|**Package**|**Package**|**Package**| |---|---|---|---| ||**Name**|**Description**|**Version**| |HEF4541BP|DIP14<br>plastic dual in-line package; 14 leads (300 mil)<br>SOT27-1||| |HEF4541BT|SO14<br>plastic small outline package; 14 leads; body width 3.9 mm<br>SOT108-1||| **==> picture [172 x 101] intentionally omitted <==** **HEF4541B** **NXP Semiconductors** **Programmable timer** ## **4. Functional diagram** **==> picture [295 x 141] intentionally omitted <==** **----- Start of picture text -----**<br> RS CTC RTC A0 A1 MODE<br>3 2 1 12 13 10<br>CONTROL INPUTS<br>CP OUTPUT 8<br>5 BINARY O<br>AR STAGE<br>POWER-ON COUNTER<br>6 RESET CD<br>MR<br>9<br>PH<br>001aai581<br>**----- End of picture text -----**<br> **Fig 1. Functional diagram** **==> picture [267 x 377] intentionally omitted <==** **----- Start of picture text -----**<br> CTC<br>RTC<br>RS 2 [8] COUNTER<br>CP 2 [8]<br>RESET<br>2 [8] COUNTER<br>CP<br>RESET 2 [2] 2 [5] 2 [8]<br>A0<br>MUX<br>A1<br>POWER-ON<br>AR RESET LATCH<br>MR<br>MODE<br>PH O<br>001aai583<br>**----- End of picture text -----**<br> ## **Fig 2. Logic diagram** All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. HEF4541B **Product data sheet** **Rev. 4 — 25 June 2012** **2 of 17** **HEF4541B** **NXP Semiconductors** **Programmable timer** ## **5. Pinning information** ## **5.1 Pinning** **==> picture [117 x 147] intentionally omitted <==** **----- Start of picture text -----**<br> HEF4541B<br>RTC 1 14 VDD<br>CTC 2 13 A1<br>RS 3 12 A0<br>n.c. 4 11 n.c.<br>AR 5 10 MODE<br>MR 6 9 PH<br>VSS 7 8 O<br>**----- End of picture text -----**<br> **==> picture [29 x 6] intentionally omitted <==** **----- Start of picture text -----**<br> 001aai582<br>**----- End of picture text -----**<br> **Fig 3. Pin configuration** ## **5.2 Pin description** ||**5.2**<br>**Pin description**|| |---|---|---| |**Table 2.**|**Pin description**|| |**Symbol**|**Pin**|**Description**| |RTC|1|external resistor connection| |CTC|2|external capacitor connection| |RS|3|external resistor connection (RS) or external clock input| |nc|4, 11|not connected| |AR|5|auto reset input (active low)| |MR|6|master reset input| |VSS|7|ground (0 V)| |O|8|timer output| |PH|9|phase input| |MODE|10|mode select input| |A0, A1|12, 13|address inputs| |VDD|14|supply voltage| © NXP B.V. 2012. All rights reserved. All information provided in this document is subject to legal disclaimers. **Rev. 4 — 25 June 2012** HEF4541B **Product data sheet** **3 of 17** **HEF4541B** **NXP Semiconductors** **Programmable timer** ## **6. Functional description** ## **Table 3. Function table[[][1][]]** |**Input**|**Input**|**Input**|**Input**|**MODE**| |---|---|---|---|---| |**AR**|**MR**|**PH**|**MODE**|| |H<br>L<br>X<br>X<br>auto reset disabled||||| |L<br>L<br>X<br>X<br>auto reset enable~~d~~[2]||||| |X<br>H<br>X<br>X<br>master reset active||||| |X<br>L<br>X<br>H<br>normal operation selected division to output||||| |X<br>L<br>X<br>L<br>single-cycle mod~~e~~[3]||||| |X<br>L<br>L<br>X<br>output initially LOW after reset||||| |X<br>L<br>H<br>X<br>output initially HIGH, after reset||||| [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care. [2] For correct power-on reset, the supply voltage should be above 8.5 V. For VDD < 8.5 V, disable the autoreset and connect AR to VDD. [3] The timer is initialized on a reset pulse and the output changes state after 2[n-1] counts and remains in that state (latched). Reset of this latch is obtained by master reset or by a LOW to HIGH transition on the MODE input. ## **Table 4. Frequency selection table** |A0|A1|Number of counter stages n|_fOSC_<br>--------**-**|=|_2n_| |---|---|---|---|---|---| ||||_fO_||| |L|L|13|8192||| |L|H|10|1024||| |H|L|8|256||| |H|H|16|65536||| ## **7. Limiting values** **Table 5. Limiting values** _In accordance with the Absolute Maximum Rating System (IEC 60134)._ |**Symbol**<br>**Parameter**|**Conditions**<br>**Min**<br>**Max**<br>**Unit**| |---|---| |VDD<br>supply voltage|−0.5<br>+18<br>V| |IIK<br>input clamping current|VI<−0.5 V or VI> VDD+ 0.5 V<br>-<br>±10<br>mA| |VI<br>input voltage|−0.5<br>VDD+ 0.5<br>V| |IOK<br>output clamping current|VO<−0.5 V or VO> VDD+ 0.5 V<br>-<br>±10<br>mA| |II/O<br>input/output current|O output<br>-<br>±10<br>mA| |Tstg<br>storage temperature|−65<br>+150<br>°C| |Tamb<br>ambient temperature|−40<br>+85<br>°C| |Ptot<br>total power dissipation|Tamb=−40°C to +85°C| ||DIP14 package<br>[1]<br>-<br>750<br>mW| ||SO14 package<br>[2]<br>-<br>500<br>mW| |P<br>power dissipation|-<br>100<br>mW| [1] For DIP14 package: Ptot derates linearly with 12 mW/K above 70 ° C. [2] For SO14 package: Ptot derates linearly with 8 mW/K above 70 ° C. © NXP B.V. 2012. All rights reserved. All information provided in this document is subject to legal disclaimers. HEF4541B **Product data sheet** **Rev. 4 — 25 June 2012** **4 of 17** **HEF4541B** **NXP Semiconductors** **Programmable timer** ## **8. Recommended operating conditions** **Table 6. Recommended operating conditions** |**Symbol**<br>**Parameter**|**Conditions**<br>**Min**<br>**Max**<br>**Unit**| |---|---| |VDD<br>supply voltage|3<br>15<br>V| |VI<br>input voltage|0<br>VDD<br>V| |Tamb<br>ambient temperature|in free air<br>−40<br>+85<br>°C| |Δt/ΔV<br>input transition rise and fall rate|VDD= 5 V<br>-<br>3.75<br>μs/V| ||VDD= 10 V<br>-<br>0.5<br>μs/V| ||VDD= 15 V<br>-<br>0.08<br>μs/V| ## **9. Static characteristics** ## **Table 7. Static characteristics** _VSS = 0 V; VI = VSS or VDD; unless otherwise specified._ |**Symbol**|**Parameter**|**Conditions**|**VDD**|**Tamb =**−**40**°**C**|**Tamb =**−**40**°**C**|**Tamb = 25**°**C**|**Tamb = 25**°**C**|**Tamb = 85**°**C**|**Tamb = 85**°**C**|**Unit**| |---|---|---|---|---|---|---|---|---|---|---| |||||**Min**|**Max**|**Min**|**Max**|**Min**|**Max**|| |VIH<br>HIGH-level<br>input voltage|||IO|< 1μA|5 V|3.5<br>-<br>3.5<br>-<br>3.5<br>-<br>V||||||| ||||10 V|7.0<br>-<br>7.0<br>-<br>7.0<br>-<br>V||||||| ||||15 V|11.0<br>-<br>11.0<br>-<br>11.0<br>-<br>V||||||| |VIL<br>LOW-level<br>input voltage|||IO|< 1μA|5 V|-<br>1.5<br>-<br>1.5<br>-<br>1.5<br>V||||||| ||||10 V|-<br>3.0<br>-<br>3.0<br>-<br>3.0<br>V||||||| ||||15 V|-<br>4.0<br>-<br>4.0<br>-<br>4.0<br>V||||||| |VOH<br>HIGH-level<br>output voltage|||IO|< 1μA|5 V|4.95<br>-<br>4.95<br>-<br>4.95<br>-<br>V||||||| ||||10 V|9.95<br>-<br>9.95<br>-<br>9.95<br>-<br>V||||||| ||||15 V|14.95<br>-<br>14.95<br>-<br>14.95<br>-<br>V||||||| |VOL<br>LOW-level<br>output voltage|||IO|< 1μA|5 V|-<br>0.05<br>-<br>0.05<br>-<br>0.05<br>V||||||| ||||10 V|-<br>0.05<br>-<br>0.05<br>-<br>0.05<br>V||||||| ||||15 V|-<br>0.05<br>-<br>0.05<br>-<br>0.05<br>V||||||| |IOH<br>HIGH-level<br>output current||CTC, RTC;||||||||| |||VO= 2.5 V|5 V|-<br>−1.4<br>-<br>−1.2<br>-<br>−0.95<br>mA||||||| |||VO= 4.6 V|5 V|-<br>−0.5<br>-<br>−0.4<br>-<br>−0.3<br>mA||||||| |||VO= 9.5 V|10 V|-<br>−1.4<br>-<br>−1.2<br>-<br>−0.95<br>mA||||||| |||VO= 13.5 V|15 V|-<br>−4.8<br>-<br>−4.0<br>-<br>−3.2<br>mA||||||| |||O;||||||||| |||VO= 2.5 V|5 V|-<br>−1.7<br>-<br>−1.4<br>-<br>−1.1<br>mA||||||| |||VO= 4.6 V|5 V|-<br>−0.64<br>-<br>−0.5<br>-<br>−0.36<br>mA||||||| |||VO= 9.5 V|10 V|-<br>−1.6<br>-<br>−1.3<br>-<br>−0.9<br>mA||||||| |||VO= 13.5 V|15 V|-<br>−4.2<br>-<br>−3.4<br>-<br>−2.4<br>mA||||||| © NXP B.V. 2012. All rights reserved. All information provided in this document is subject to legal disclaimers. HEF4541B **Product data sheet** **Rev. 4 — 25 June 2012** **5 of 17** **HEF4541B** **NXP Semiconductors** **Programmable timer** **Table 7. Static characteristics** _…continued_ _VSS = 0 V; VI = VSS or VDD; unless otherwise specified._ |**Symbol**|**Parameter**|**Conditions**|**VDD**|**Tamb =**−**40**°**C**|**Tamb =**−**40**°**C**|**Tamb = 25**°**C**|**Tamb = 25**°**C**|**Tamb = 85**°**C**|**Tamb = 85**°**C**|**Unit**| |---|---|---|---|---|---|---|---|---|---|---| |||||**Min**|**Max**|**Min**|**Max**|**Min**|**Max**|| |IOL<br>LOW-level<br>output current||CTC, RTC;||||||||| |||VO= 0.4 V|5 V|0.33<br>-<br>0.27<br>-<br>0.20<br>-<br>mA||||||| |||VO= 0.5 V|10 V|1.0<br>-<br>0.85<br>-<br>0.68<br>-<br>mA||||||| |||VO= 1.5 V|15 V|3.2<br>-<br>2.7<br>-<br>2.3<br>-<br>mA||||||| |||O;||||||||| |||VO= 0.4 V|5 V|0.64<br>-<br>0.5<br>-<br>0.36<br>-<br>mA||||||| |||VO= 0.5 V|10 V|1.6<br>-<br>1.3<br>-<br>0.9<br>-<br>mA||||||| |||VO= 1.5 V|15 V|4.2<br>-<br>3.2<br>-<br>2.4<br>-<br>mA||||||| |II<br>input leakage<br>current|||15 V|-<br>±0.1<br>-<br>±0.1<br>-<br>±1.0<br>μA||||||| |IDD<br>supply current||IO= 0 A|5 V|-<br>5<br>-<br>5<br>-<br>150<br>μA||||||| ||||10 V|-<br>10<br>-<br>10<br>-<br>300<br>μA||||||| ||||15 V|-<br>20<br>-<br>20<br>-<br>600<br>μA||||||| |CI<br>input capacitance|||-|-<br>-<br>-<br>7.5<br>-<br>-<br>pF||||||| ## **Table 8. Reset characteristics** ## _VSS = 0 V; VI = VSS or VDD; see Table 12 for test conditions; unless otherwise specified._ |**Symbol**|**Parameter**|**Conditions**|**VDD**||**Tamb =**−**40** °**C**|**Tamb =**−**40** °**C**|**Tamb = +25**°**C**|**Tamb = +25**°**C**|**Tamb = +25**°**C**|**Tamb = +85** °**C**|**Tamb = +85** °**C**|**Unit**| |---|---|---|---|---|---|---|---|---|---|---|---|---| ||||||**Min**|**Max**|**Min**|**Typ**|**Max**|**Min**|**Max**|| |IDD<br>supply current supply current for<br>power-on reset<br>enable;<br>AR<br>= MR = 0 V; Other<br>inputs at 0 V or VDD|||5 V||-<br>80<br>-<br>20<br>80<br>-<br>230<br>μA|||||||| ||||10 V||-<br>750<br>-<br>250<br>600<br>-<br>700<br>μA|||||||| ||||15 V||-<br>1.6<br>-<br>0.5<br>1.3<br>-<br>1.5<br>mA|||||||| |VDD<br>supply voltage supply voltage for<br>automatic reset<br>initialization;<br>AR<br>= MR = 0 V; Other<br>inputs at 0 V or VDD|||-||-<br>-<br>8.5<br>5<br>-<br>-<br>-<br>V|||||||| © NXP B.V. 2012. All rights reserved. All information provided in this document is subject to legal disclaimers. HEF4541B **Product data sheet** **Rev. 4 — 25 June 2012** **6 of 17** **HEF4541B** **NXP Semiconductors** **Programmable timer** ## **10. Dynamic characteristics** **Table 9. Dynamic characteristics** _VSS = 0 V; Tamb = 25_ ° _C unless otherwise specified. For test circuit, see Figure 5._ |**Symbol**<br>**Parameter**|**Conditions**|**VDD**|**Extrapolation formula**<br>**Min**<br>**Typ[1]**<br>**Max**<br>**Unit**| |---|---|---|---| |tpd<br>propagation delay|RS to O;<br>28 selected;<br>see Figure 4|5 V<br>[2]<br>10 V<br>15 V|348 ns + (0.55 ns/pF)CL<br>-<br>375<br>750<br>ns| ||||139 ns + (0.23 ns/pF)CL<br>-<br>150<br>300<br>ns| ||||102 ns + (0.16 ns/pF)CL<br>-<br>110<br>220<br>ns| ||RS to O;<br>210 selected;<br>see Figure 4|5 V<br>10 V<br>15 V|398 ns + (0.55 ns/pF)CL<br>-<br>425<br>850<br>ns| ||||154 ns + (0.23 ns/pF)CL<br>-<br>165<br>330<br>ns| ||||112 ns + (0.16 ns/pF)CL<br>-<br>120<br>240<br>ns| ||RS to O;<br>213 selected;<br>see Figure 4|5 V<br>10 V<br>15 V|483 ns + (0.55 ns/pF)CL<br>-<br>510<br>1020<br>ns| ||||179 ns + (0.23 ns/pF)CL<br>-<br>190<br>380<br>ns| ||||127 ns + (0.16 ns/pF)CL<br>-<br>135<br>270<br>ns| ||RS to O;<br>216 selected;<br>see Figure 4|5 V<br>10 V<br>15 V|548 ns + (0.55 ns/pF)CL<br>-<br>575<br>1150<br>ns| ||||199 ns + (0.23 ns/pF)CL<br>-<br>210<br>420<br>ns| ||||142 ns + (0.16 ns/pF)CL<br>-<br>150<br>300<br>ns| |tW<br>pulse width|RS LOW;<br>MR HIGH;<br>seeFigure 4|5 V<br>[3]<br>10 V<br>15 V|60<br>30<br>-<br>ns| ||||30<br>15<br>-<br>ns| ||||24<br>12<br>-<br>ns| |fclk(max)<br>maximum clock<br>frequency|RS; seeFigure 4|5 V<br>10 V<br>15 V|8<br>16<br>-<br>MHz| ||||15<br>30<br>-<br>MHz| ||||18<br>36<br>-<br>MHz| |fosc<br>oscillator frequency|Rt= 5 kΩ;<br>Ct= 1 nF;<br>RS= 10 kΩ;<br>seeFigure 6|5 V<br>10 V<br>15 V|-<br>90<br>-<br>kHz| ||||-<br>90<br>-<br>kHz| ||||-<br>90<br>-<br>kHz| ||Rt= 56 kΩ;<br>Ct= 1 nF;<br>RS= 120 kΩ;<br>seeFigure 6|5 V<br>10 V<br>15 V|-<br>8<br>-<br>kHz| ||||-<br>8<br>-<br>kHz| ||||-<br>8<br>-<br>kHz| [1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF). [2] tpd is the same as tPHL and tPLH. [3] tW is the same as tWL(min) and tWH(min). © NXP B.V. 2012. All rights reserved. All information provided in this document is subject to legal disclaimers. **Rev. 4 — 25 June 2012** HEF4541B **Product data sheet** **7 of 17** **HEF4541B** **NXP Semiconductors** **Programmable timer** **Table 10. Dynamic power dissipation** _PD can be calculated from the formulas shown. VSS = 0 V; tr = tf_ ≤ _20 ns; Tamb = 25_ ° _C._ |**Symbol**<br>**Parameter**|**VDD**<br>**Typical formula**| |---|---| |**Per package**|| |PD<br>dynamic power dissipation|5 V<br>PD= 1300×fi+ (fo ×CL ×VDD2)μW| ||10 V<br>PD= 5300×fi+ (fo ×CL ×VDD2)μW| ||15 V<br>PD= 12000×fi+ (fo ×CL ×VDD2)μW| |**Using the on-chip oscillator**|| |PD(Tot)<br>Total dynamic power dissipation|5 V<br>PD= 1300×fosc+ foCLVDD2+ 2CTCVDD2fosc+ 10VDD μW| ||10 V<br>PD= 5300×fosc+ foCLVDD2+ 2CTCVDD2fosc+ 100VDD μW| ||15 V<br>PD= 12000×fosc+ foCLVDD2+ 2CTCVDD2fosc+ 400VDD μW| - [1] fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VDD = supply voltage in V; fosc = oscillator frequency in MHz; CTC = timing capacitance in pF. ## **11. Waveforms** **==> picture [439 x 166] intentionally omitted <==** **----- Start of picture text -----**<br> (1)<br>1/fclk(max)<br>VI<br>RS input VM<br>VSS<br>tWH(min)<br>tPLH tWL(min) tPHL<br>VOH<br>O output VM<br>VOL<br>VI<br>MR input<br>VSS<br>tWH(min) aaa-003391<br>VOL and VOH are typical output voltage levels that occur with the output load.<br>**----- End of picture text -----**<br> Measurement are points given in Table 11, the test circuit in Figure 5 and the test data in Table 12 (1) 2[n] pulses as selected by address inputs (A0, A1). **Fig 4. Propagation delay clock (RS) to output (O), clock pulse width and maximum clock frequency** **Table 11. Measurement points** |**Supply voltage**|**Input**|**Output**| |---|---|---| |**VDD**|**VM**|**VM**| |5 V to 15 V<br>0.5VDD<br>0.5VDD||| © NXP B.V. 2012. All rights reserved. All information provided in this document is subject to legal disclaimers. **Rev. 4 — 25 June 2012** HEF4541B **Product data sheet** **8 of 17** **HEF4541B** **NXP Semiconductors** **Programmable timer** VDD VI VO G DUT RT CL _001aag182_ Test data is given in Table 12. Definitions for test circuit: DUT - Device Under Test. RL = Load resistance. CL = load capacitance. RT = Termination resistance should be equal to output impedance of Zo of the pulse generator. **Fig 5. Test circuit for measuring switching times** ## **Table 12. Test data** |**Supply**|**Input**|**Input**|**Load**| |---|---|---|---| |**VDD**|**VI**|**tr, tf**|**CL**| |5 V to 15 V<br>VSSor VDD<br>≤20 ns<br>50 pF|||| © NXP B.V. 2012. All rights reserved. All information provided in this document is subject to legal disclaimers. HEF4541B **Product data sheet** **Rev. 4 — 25 June 2012** **9 of 17** **HEF4541B** **NXP Semiconductors** **Programmable timer** ## **12. Application information** ## **RC oscillator timing component limitations** The oscillator frequency is mainly determined by RTCCTC, provided RTC << RS and RSC2 << RTCCTC. The function of RS is to minimize the influence of the forward voltage across the input protection diodes on the frequency. The stray capacitance C2 should be kept as small as possible. In consideration of accuracy, CTC must be larger than the inherent stray capacitance. RTC must be larger than the LOCMOS ‘ON’ resistance in series with it, which typically is 500 Ω at VDD = 5 V, 300 Ω at VDD = 10 V and 200 Ω at VDD = 15 V. The recommended values for these components to maintain agreement with the typical oscillation formula are: CTC ≥ 100 pF, up to any typical value, 10 k Ω ≤ RTC ≤ 1 M Ω . **==> picture [301 x 129] intentionally omitted <==** **----- Start of picture text -----**<br> reset<br>clock to<br>from logic counter<br>RS CTC RTC<br>3 2 1<br>C2 RS CTC RTC<br>001aai584<br>Typical formula for oscillator frequency: f osc = 2.3 -------------------------------------- × RTC1 × CTC - .<br>**----- End of picture text -----**<br> **Fig 6. External component connection for RC oscillator; RS ≈ RTC** **==> picture [481 x 201] intentionally omitted <==** **----- Start of picture text -----**<br> 001aai586 001aai585<br>10 [5] 10 [5]<br>fosc fosc<br>(Hz) (Hz)<br>10 [4] 10 [4]<br>10 [3] 10 [3]<br>10 [2] 10 [2]<br>10 10<br>10 [-4] 10 [-3] 10 [-2] 10 [-1] 10 [3] 10 [4] 10 [5] 10 [6]<br>CTC (μF) RTC (Ω)<br>a. CTC curve at RTC = 56 k Ω ; RS = 120 k Ω . b. RTC curve at CTC = 1 nF; RS = 2 RTC.<br>**----- End of picture text -----**<br> **Fig 7. RC oscillator frequency as a function of RTC and CTC at VDD = 5 to 15 V; Tamb = 25** ° **C** © NXP B.V. 2012. All rights reserved. All information provided in this document is subject to legal disclaimers. HEF4541B **Product data sheet** **Rev. 4 — 25 June 2012** **10 of 17** **HEF4541B** **NXP Semiconductors** **Programmable timer** **==> picture [481 x 201] intentionally omitted <==** **----- Start of picture text -----**<br> 001aai587 001aai588<br>10 10<br>∆f ∆f<br>(%) (%)<br>5 5<br>VDD = 15 V<br>10 V VDD = 15 V<br>0 0<br>10 V<br>5 V<br>-5 -5<br>5 V<br>-10 -10<br>-75 -25 25 75 125 -75 -25 25 75 125<br>Tamb (°C) Tamb (°C)<br>a. RTC = 56 kTC = 56 k = 56 k Ω ; CTC = 1 nF; RS = 0 TC = 1 nF; RS = 0 = 1 nF; RS = 0 Ω . b. RTC = 56 k Ω ; CTC = 1 nF; RS = 120 k Ω .<br>**----- End of picture text -----**<br> a. RTC = 56 kTC = 56 k = 56 k Ω ; CTC = 1 nF; RS = 0 TC = 1 nF; RS = 0 = 1 nF; RS = 0 Ω . b. **Fig 8. Frequency deviation (** Δ **f) as a function of ambient temperature** © NXP B.V. 2012. All rights reserved. All information provided in this document is subject to legal disclaimers. HEF4541B **Product data sheet** **Rev. 4 — 25 June 2012** **11 of 17** **HEF4541B** **NXP Semiconductors** **Programmable timer** ## **13. Package outline** ## **DIP14: plastic dual in-line package; 14 leads (300 mil)** **==> picture [38 x 8] intentionally omitted <==** **----- Start of picture text -----**<br> SOT27-1<br>**----- End of picture text -----**<br> **==> picture [478 x 570] intentionally omitted <==** **----- Start of picture text -----**<br> D ME<br>A2 A<br>L A1<br>c<br>Z e w M<br>b1<br>(e )1<br>b<br>14 8 MH<br>pin 1 index<br>E<br>1 7<br>0 5 10 mm<br>scale<br>DIMENSIONS (inch dimensions are derived from the original mm dimensions)<br>UNIT max.A min.A 1 max.A 2 b b1 c D (1) E (1) e e 1 L M E MH w max.Z (1)<br>1.73 0.53 0.36 19.50 6.48 3.60 8.25 10.0<br>mm 4.2 0.51 3.2 2.54 7.62 0.254 2.2<br>1.13 0.38 0.23 18.55 6.20 3.05 7.80 8.3<br>0.068 0.021 0.014 0.77 0.26 0.14 0.32 0.39<br>inches 0.17 0.02 0.13 0.1 0.3 0.01 0.087<br>0.044 0.015 0.009 0.73 0.24 0.12 0.31 0.33<br>Note<br>1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.<br>OUTLINE REFERENCES EUROPEAN<br>ISSUE DATE<br>VERSION IEC JEDEC JEITA PROJECTION<br>99-12-27<br>SOT27-1 050G04 MO-001 SC-501-14<br>03-02-13<br>seating plane<br>**----- End of picture text -----**<br> **Fig 9. Package outline SOT27-1 (DIP14)** HEF4541B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. **Product data sheet Rev. 4 — 25 June 2012** **12 of 17** **HEF4541B** **NXP Semiconductors** **Programmable timer** ## **SO14: plastic small outline package; 14 leads; body width 3.9 mm** ## **SOT108-1** **==> picture [478 x 570] intentionally omitted <==** **----- Start of picture text -----**<br> D E A<br>X<br>c<br>y HE v M A<br>Z<br>14 8<br>Q<br>A2 A1 (A )3 A<br>pin 1 index<br>θ<br>L p<br>1 7 L<br>e w M detail X<br>bp<br>0 2.5 5 mm<br>scale<br>DIMENSIONS (inch dimensions are derived from the original mm dimensions)<br>UNIT max.A A1 A2 A3 bp c D [(1)] E [(1)] e HE L Lp Q v w y Z (1) θ<br>0.25 1.45 0.49 0.25 8.75 4.0 6.2 1.0 0.7 0.7<br>mm 1.75 0.10 1.25 0.25 0.36 0.19 8.55 3.8 1.27 5.8 1.05 0.4 0.6 0.25 0.25 0.1 0.3 8o<br>0.010 0.057 0.019 0.0100 0.35 0.16 0.244 0.039 0.028 0.028 0o<br>inches 0.069 0.01 0.05 0.041 0.01 0.01 0.004<br>0.004 0.049 0.014 0.0075 0.34 0.15 0.228 0.016 0.024 0.012<br>Note<br>1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.<br>OUTLINE REFERENCES EUROPEAN<br>ISSUE DATE<br>VERSION IEC JEDEC JEITA PROJECTION<br>99-12-27<br> SOT108-1 076E06 MS-012<br>03-02-19<br>**----- End of picture text -----**<br> **Fig 10. Package outline SOT108-1 (SO14)** HEF4541B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. **Product data sheet** **Rev. 4 — 25 June 2012** **13 of 17** **HEF4541B** **NXP Semiconductors** **Programmable timer** ## **14. Abbreviations** ## **Table 13. Abbreviations** |**Acronym**|**Description**| |---|---| |CMOS|Complementary Metal Oxide Semiconductor| |DUT|Device Under Test| |ESD|ElectroStatic Discharge| |HBM|Human Body Model| |MM|Machine Model| |TTL|Transistor-Transistor Logic| ## **15. Revision history** ## **Table 14. Revision history** |**Document ID**|**Release date**<br>**Data sheet status**|**Change notice**|**Supersedes**| |---|---|---|---| |HEF4541B v.4|20120625<br>Product data sheet|-|HEF4541B_CNV v.3| |Modifications:|**•** The format of this data sheet has been redesigned to comply with||the new identity guidelines| ||of NXP Semiconductors.||| ||**•** Legal texts have been adapted to the new|company name where appropriate.|| ||**•** Section 2“<br>Features and benefits<br>”<br> added.||| |HEF4541B_CNV v.3|19950101<br>Product specification|-|HEF4541B_CNV v.2| |HEF4541B_CNV v.2|19950101<br>Product specification|-|-| © NXP B.V. 2012. All rights reserved. All information provided in this document is subject to legal disclaimers. **Rev. 4 — 25 June 2012** HEF4541B **Product data sheet** **14 of 17** **HEF4541B** **NXP Semiconductors** **Programmable timer** ## **16. Legal information** ## **16.1 Data sheet status** |**Document statu**~~**s**~~**[1]**<br>**[2]**|**Product status[3]**|**Definition**| |---|---|---| |Objective [short] data sheet|Development|This document contains data from the objective specification for product development.| |Preliminary [short] data sheet|Qualification|This document contains data from the preliminary specification.| |Product [short] data sheet|Production|This document contains the product specification.| [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. ## **16.2 Definitions** **Draft —** The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. **Short data sheet —** A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. **Product specification —** The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. ## **16.3 Disclaimers** **Limited warranty and liability —** Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the _Terms and conditions of commercial sale_ of NXP Semiconductors. **Right to make changes —** NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. **Suitability for use —** NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. **Applications —** Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. **Limiting values —** Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. **Terms and conditions of commercial sale —** NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. **No offer to sell or license —** Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. © NXP B.V. 2012. All rights reserved. HEF4541B All information provided in this document is subject to legal disclaimers. **Product data sheet Rev. 4 — 25 June 2012** **15 of 17** **HEF4541B** **NXP Semiconductors** ## **Programmable timer** **Export control —** This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. **Non-automotive qualified products —** Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. **Translations —** A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. ## **16.4 Trademarks** Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. ## **17. Contact information** For more information, please visit: **http://www.nxp.com** For sales office addresses, please send an email to: **salesaddresses@nxp.com** © NXP B.V. 2012. All rights reserved. All information provided in this document is subject to legal disclaimers. **Rev. 4 — 25 June 2012** HEF4541B **Product data sheet** **16 of 17** **HEF4541B** **NXP Semiconductors** **Programmable timer** ## **18. Contents** |**1**|**General description . . . . . . . . . . . . . . . . . . . . . . 1**| |---|---| |**2**|**Features and benefits . . . . . . . . . . . . . . . . . . . . 1**| |**3**|**Ordering information. . . . . . . . . . . . . . . . . . . . . 1**| |**4**|**Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2**| |**5**|**Pinning information. . . . . . . . . . . . . . . . . . . . . . 3**| |5.1|Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3| |5.2|Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3| |**6**|**Functional description . . . . . . . . . . . . . . . . . . . 4**| |**7**|**Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4**| |**8**|**Recommended operating conditions. . . . . . . . 5**| |**9**|**Static characteristics. . . . . . . . . . . . . . . . . . . . . 5**| |**10**|**Dynamic characteristics . . . . . . . . . . . . . . . . . . 7**| |**11**|**Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8**| |**12**|**Application information. . . . . . . . . . . . . . . . . . 10**| ||RC oscillator timing component limitations. . . .10| |**13**|**Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12**| |**14**|**Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 14**| |**15**|**Revision history. . . . . . . . . . . . . . . . . . . . . . . . 14**| |**16**|**Legal information. . . . . . . . . . . . . . . . . . . . . . . 15**| |16.1|Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15| |16.2|Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 15| |16.3|Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15| |16.4|Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16| |**17**|**Contact information. . . . . . . . . . . . . . . . . . . . . 16**| |**18**|**Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17**| Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. **© NXP B.V. 2012.** **All rights reserved.** For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com **Date of release: 25 June 2012 Document identifier: HEF4541B**
Updated at February 9, 2023
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