HAF2026RJ-EL-E

Preliminary Datasheet 

## **HAF2026RJ** 

Silicon N Channel Power MOS FET Power Switchin g 

R07DS0122EJ0300 (Previous: REJ03G1255-0200) Rev.3.00 Sep 01, 2010 

## **Description** 

This FET has the over temperature shut-down capability sensing to the junction temperature.  This FET has the built-in over temperature shut-down circuit in the gate area.  And this circuit operation to shut-down the gate voltage in case of high junction temperature like applying over power consumption, over current etc.. 

## **Features** 

- Logic level operation (5 to 6 V Gate drive) 

- Built-in the over temperature shut-down circuit 

- High endurance capability against to the shut-down circuit 

- Latch type shut down operation (need 0 voltage recovery) 

- Built-in the current limitation circuit 

## **Outline** 

**==> picture [466 x 162] intentionally omitted <==**

**----- Start of picture text -----**<br>
RENESAS Package code: PRSP0008DD-D<br>(Package name: SOP-8 (FP-8DAV))<br>6 5<br>7<br>8<br>D D D D<br>7 8 5 6<br>1 [2 3 4]<br>2 Current  4 Current<br>G Gate Resistor Limitation  G Gate Resistor Limitation<br>Circuit Circuit 1, 3          Source<br>Temperature Latch Gate Temperature Latch Gate 2, 4          Gate<br>Sensing Circuit Shut-down Sensing Circuit Shut-down 5, 6, 7, 8  Drain<br>Circuit Circuit Circuit Circuit<br>1 3<br>MOS1 S MOS2 S<br>**----- End of picture text -----**<br>


## **Absolute Maximum Ratings** 

(Ta = 25°C) 

||||(Ta = 25°C|
|---|---|---|---|
|**Item **|**Symbol **|**Ratings**|**Unit**|
|Drainto sourcevoltage|VDSS|60|V|
|Gate to sourcevoltage|VGSS|16|V|
|Gate to source voltage|VGSS|–2.5|V|
|Draincurrent|ID|0.6|A|
|Body-draindiodereverse draincurrent|IDR|1|A|
|Avalanche current|IAP<br>Note3|0.6|A|
|Avalanche energy|EAR<br>Note3|1.54|mJ|
|Canneldissipation|PchNote1|1|W|
|Cannel dissipation|PchNote2|1.5|W|
|Canneltemperature|Tch|150|C|
|Storage temperature|Tstg|–55 to+150|C|



Notes: 1. 1 Drive operation: When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW ≤ 10s 

2. 2 Drive operation: When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW ≤ 10s 

3. Tc = 25C, Rg  50  

R07DS0122EJ0300  Rev.3.00 Sep 01, 2010 

Page 1 of 7 

**HAF2026RJ** 

**Preliminary** 

## **Typical Operation Characteristics** 

(Ta=25°C) 

|||||||(Ta=25°C)|
|---|---|---|---|---|---|---|
|**Item**|**Symbol**|**Min**|**Typ**|**Max**|**Unit**|**Test Conditions**|
|Input voltage|VIH|3.5|—|—|V||
||VIL|—|—|1.2|V||
|Input current<br>(Gate non shut down)|IIH1|—|—|100|A|Vi = 8 V, VDS= 0|
||IIH2|—|—|50|A|Vi = 3.5 V, VDS= 0|
||IIL|—|—|10|A|Vi = 1.2 V, VDS= 0|
|Input current<br>(Gate shut down)|IIH(sd)1|—|0.53|—|mA|Vi = 8 V, VDS= 0|
||IIH(sd)2|—|0.23|—|mA|Vi = 3.5 V, VDS= 0|
|Shut down temperature|Tsd|—|175|—|C|Cannel temperature|
|Gate operation voltage|Vop|3.5|—|12|V||
|Drain current(Current limitation)|ID limt|0.6|—|1.0|A|Vi = 5 V, VDS= 3 V|



## **Electrical Characteristics** 

(Ta = 25°C) 

|||||||(Ta = 25°C)|
|---|---|---|---|---|---|---|
|**Item**|**Symbol**|**Min**|**Typ**|**Max**|**Unit**|**Test Conditions**|
|Drain current|ID1|0.25|—|—|A|VGS= 3.5 V, VDS= 2 V|
||ID2|—|—|10|mA|VGS= 1.2 V, VDS= 2 V|
||ID3|0.6|—|1.0|A|VGS= 5 V, VDS= 3 V|
|Drain to source breakdown<br>voltage|V(BR)DSS|60|—|—|V|ID= 10 mA, VGS= 0|
|Gate to source breakdown<br>voltage|V(BR)GSS|16|—|—|V|IG= 800A, VDS= 0|
||V(BR)GSS|–2.5|—|—|V|IG= –100A, VDS= 0|
|Gate to source leak current|IGSS1|—|—|100|A|VGS= 8 V, VDS= 0|
||IGSS2|—|—|50|A|VGS= 3.5 V, VDS= 0|
||IGSS3|—|—|10|A|VGS= 1.2 V, VDS= 0|
||IGSS4|—|—|–100|A|VGS= –2.4 V, VDS= 0|
|Input current (shut down)|IGS(OP)1|—|0.53|—|mA|VGS= 8 V, VDS= 0|
||IGS(OP)2|—|0.23|—|mA|VGS= 3.5 V, VDS= 0|
|Zero gate voltage drain<br>current|IDSS1|—|—|10|A|VDS= 60 V, VGS= 0|
||IDSS2|—|—|10|A|VDS= 48 V, VGS= 0, Ta = 125C|
|Gate to source cut off voltage|VGS(off)|1.4|—|2.5|V|VDS= 10 V, ID= 1 mA|
|Forward transfer admittance||yfs||0.26|1.3|—|S|ID= 0.5 A, VDS= 10 VNote4|
|Static drain to source on state<br>resistance|RDS(on)|—|200|300|m|ID= 0.5 A, VGS= 5 VNote4|
||RDS(on)|—|150|210|m|ID= 0.5 A, VGS= 10 VNote4|
|Output capacitance|Coss|—|140|—|pF|VDS= 10 V, VGS= 0, f = 1MHz|
|Turn-on delaytime|td(on)|—|2.9|—|s|VGS= 5 V, ID= 0.5 A, RL= 60|
|Rise time|tr|—|11|—|s||
|Turn off delaytime|td(off)|—|0.9|—|s||
|Fall time|tf|—|1|—|s||
|Body-drain diode forward<br>voltage|VDF|—|0.9|—|V|IF= 1 A, VGS= 0|
|Body-drain diode reverse<br>recoverytime|trr|—|61|—|ns|IF= 1 A, VGS= 0, diF/dt = 50 A/s|
|Over load shut down<br>operation timenote5|tos1|—|85|—|ms|VGS= 5 V, VDD= 16 V|
||tos2|—|30|—|ms|VGS= 5 V, VDD= 24 V|



Notes: 4. Pulse test 

5. Including the junction temperature rise of the over lorded condition. 

R07DS0122EJ0300  Rev.3.00 Sep 01, 2010 

Page 2 of 7 

**HAF2026RJ** 

**Preliminary** 

## **Main Characteristics** 

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**----- Start of picture text -----**<br>
Power vs. Temperature Derating<br>4.0<br>Test condition.<br>When using the glass epoxy board.<br>(FR4  40 x 40 x 1.6 mm), (PW  ≤  10s)<br>3.0<br>2.0<br>1.0<br>0 50 100 150 200<br>Ambient Temperature   Ta  (°C)<br>Typical Output Characteristics<br>2.0<br>Pulse Test<br>1.6<br>1.2 10 V<br>5 V<br>0.8<br>VGS = 3.5 V<br>0.4<br>0 2 4 6 8 10<br>Drain to Source Voltage   VDS  (V)<br>1 Driver Operation<br>2 Driver Operation<br>Channel Dissipation   Pch  (W)<br>  (A)<br>D<br>Drain Current   I<br>**----- End of picture text -----**<br>


Drain to Saturation Voltage vs. Gate to Source Voltage 

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200<br>Pulse Test<br>160<br>120<br>80 ID = 0.5 A<br>40 0.2 A<br>0 2 4 6 8 10<br>Gate to Source Voltage   VGS  (V)<br>  (mV)<br>DS(on)<br>Drain to Source Saturation Voltage                                    V<br>**----- End of picture text -----**<br>


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Maximum Safe Operation Area<br>10<br>Thermal shut down<br>operation area<br>3<br>1 ms<br>1<br>0.3<br>Operation<br>0.1 in this area<br>is limited by R DS(on)<br>0.03 Ta = 25 ° C<br>1 shot Pulse<br>1 Driver Operation<br>0.01<br>0.01 0.03 0.1 0.3 1 3 10 30 100<br>Drain Source Voltage   VDS  (V)<br>Note 6:<br>When using the glass epoxy board.<br>( FR4  40 x 40 x 1.6 mm)<br>Typical Transfer Characteristics<br>1.0<br>V DS = 10 V<br>Pulse Test<br>0.8<br>0.6<br>0.4<br>75 ° C<br>0.2<br>25 ° C<br>Tc = -25 ° C<br>0 1 2 3 4 5<br>Gate to Source Voltage   VGS  (V)<br>Static Drain to Source State Resistance<br>vs. Drain Current<br>500<br>VGS = 5 V<br>200<br>100 V GS = 10 V<br>50<br>20<br>Pulse Test<br>10<br>0.01 0.02 0.05 0.1 0.2 0.5 1 2<br>Drain Current   ID  (A)<br>PW = 10 ms<br>Note6<br>DC Operation PW< 10s<br>  (A)<br>D<br>Drain Current   I<br>  (A)<br>D<br>Drain Current   I<br>) Ω<br>(m<br>DS(on)<br>Drain Source On Sate Resistance                                  R<br>**----- End of picture text -----**<br>


R07DS0122EJ0300  Rev.3.00 Sep 01, 2010 

Page 3 of 7 

**HAF2026RJ** 

**Preliminary** 

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**----- Start of picture text -----**<br>
Drain to Source On State Resistance Forward Transfer Admittance vs.<br>vs. Temperature Drain Current<br>10<br>500<br>Pulse Test VDS =10 V Tc = –25 ° C<br>3 Pulse Test<br>400<br>I D = 0.5 A, 0.2 A 1<br>300 0.3 25 ° C<br>75 ° C<br>V GS  = 5 V 0.1<br>200<br>0.03<br>I D  = 0.5 A, 0.2 A<br>0.01<br>100 VGS = 10 V<br>0.003<br>0 0.001<br>–25 0 25 50 75 100 125 150 0.01 0.03 0.1 0.3 1<br>Case Temperature   Tc  ( ° C) Drain Current   ID  (A)<br>Body to Drain  Diode Reverse<br>Recovery Time Switching Characteristics<br>1000 100<br>VGS = 5 V,  VDD = 30 V<br>500 PW = 300  μ s,  duty < 1 %<br>30<br>200<br>tr<br>100 10<br>50 td(on)<br>3<br>20<br>10 1 t f<br>5 td(off)<br>2 di / dt = 50 A / VGS = 0, Ta = 25 μ s ° C 0.3<br>1 0.1<br>0.01 0.02 0.05 0.1 0.2 0.5 1 0.001 0.003 0.01 0.03 0.1 0.3 1<br>Reverse Drain Current   IDR  (A) Drain Current   ID  (A)<br>Reverse Drain Current vs.  Typical capacitance vs.<br>Source to Drain Voltage Drain to Source Voltage<br>1.0 1000<br>Pulse Test<br>0.8<br>100<br>0.6 V GS  = 5 V<br>0 V<br>0.4<br>10<br>0.2<br>VGS = 0<br>f = 1 MHz<br>1<br>0 0.2 0.4 0.6 0.8 1.0 0 10 20 30 40 50<br>Source to Drain Voltage   VSD  (V) Drain to Source   VDS  (V)<br>) Ω<br>(m<br>DS(on)<br>Drain Source On State Resistance                                    R<br>Forward Transfer Admittance   |yfs|  (S)<br>s)<br>μ<br>Switching Time   t  (<br>Reverse Recovery Time   trr  (ns)<br>(A)<br>DR   Capacitance   Coss  (pF)<br>Reverse Drain Current   I<br>**----- End of picture text -----**<br>


R07DS0122EJ0300  Rev.3.00 Sep 01, 2010 

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**HAF2026RJ** 

**Preliminary** 

Gate to Source Voltage vs. Shutdown Time of Load-Short Test 

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**----- Start of picture text -----**<br>
12<br>10<br>8 VDD = 16 V<br>6<br>24 V<br>4<br>2<br>0<br>0.001 0.01 0.1 1<br>Shutdown Time of Lord-Short Test<br>                                                   PW  (S)<br>Avalanche Energy vs.<br>Channel Temperature Derating<br>2.0<br>IAP = 0.6 A<br>VDD = 25 V<br>1.5 duty < 0.1 %<br>Rg > 50  Ω<br>1<br>0.5<br>0<br>25 50 75 100 125 150<br>Channel Temperature   Tch  ( ° C)<br>(V)<br>GS<br>Gate to Source Voltage   V<br>  (mJ)<br>AR<br>Repetitive Avalanche Energy   E<br>**----- End of picture text -----**<br>


## Avalanche Test Circuit 

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**----- Start of picture text -----**<br>
L<br>VDS<br>Monitor<br>IAP<br>Monitor<br>Rg D. U. T VDD<br>Vin<br>50  Ω<br> 5 V<br>**----- End of picture text -----**<br>


Shutdown Case Temperature vs. Gate to Source Voltage 

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**----- Start of picture text -----**<br>
200<br>180<br>160<br>140<br>120 ID = 0.2 A<br>100<br>0 2 4 6 8 10<br>Gate to Source Voltage   VGS  (V)<br>Shutdown Case Temperature   Tc  (°C)<br>**----- End of picture text -----**<br>


## Avalanche Waveform 

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**----- Start of picture text -----**<br>
1 VDSS<br>EAR =  2  • L • IAP [2] • VDSS – VDD<br>V<br>(BR)DSS<br>IAP<br>VDS<br>ID<br>VDD<br>0<br>**----- End of picture text -----**<br>


R07DS0122EJ0300  Rev.3.00 Sep 01, 2010 

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**HAF2026RJ** 

**Preliminary** 

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**----- Start of picture text -----**<br>
Normalized Transient Thermal Impedance vs. Pulse Width (1 Drive Operation)<br>10<br>D = 1<br>1<br>0.5<br>0.1<br>θ ch-f(t) =  γ s (t)  •  θ ch - f<br>0.01 θ ch-f = 125 ° C/W, Ta = 25 ° C<br>When using the glass epoxy board<br>(FR4  40 x 40 x 1.6 mm)<br>0.001 PDM D = [PW] T<br>PW<br>T<br>0.0001<br>10  μ 100  μ 1 m 10 m 100 m 1 10 100 1000 10000<br>Pulse Width   PW  (S)<br>Normalized Transient Thermal Impedance vs. Pulse Width (2 Drive Operation)<br>10<br>D = 1<br>1<br>0.5<br>0.1<br>θ ch-f(t) =  γ s (t)  •  θ ch - f<br>0.01 θ ch-f = 166 ° C/W, Ta = 25 ° C<br>When using the glass epoxy board<br>(FR4  40 x 40 x 1.6 mm)<br>0.001 PDM D = [PW] T<br>PW<br>T<br>0.0001<br>10  μ 100  μ 1 m 10 m 100 m 1 10 100 1000 10000<br>Pulse Width   PW  (S)<br>Switching Time Test Circuit Switching Time Waveform<br>Vin Monitor Vout 90%<br>Monitor<br>D.U.T.<br>RL Vin 10%<br>Vout 1 0% 10%<br>Vin VDD<br>5 V 50  Ω = 30 V<br>90% 90%<br>td(on) tr td(off) tf<br>0.1<br>0.1<br>0.2<br>0.2<br>0.02<br>0.02<br>0.05<br>0.05<br>0.01<br>0.01<br>1shot pulse<br>1shot pulse<br>s  (t)<br>γ<br>Normalized Transient Thermal Impedance<br>s  (t)<br>γ<br>Normalized Transient Thermal Impedance<br>**----- End of picture text -----**<br>


R07DS0122EJ0300  Rev.3.00 Sep 01, 2010 

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**HAF2026RJ** 

**Preliminary** 

## **Package Dimensions** 

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**----- Start of picture text -----**<br>
Package Name JEITA Package Code RENESAS Code Previous Code MASS[Typ.]<br>SOP-8 P-SOP8-3.95  ×  4.9-1.27 PRSP0008DD-D FP-8DAV 0.085g<br>* [1] D<br>8 5 bp<br>Index mark<br>1 4 Terminal cross section NOTE)1. DIMENSIONS "*1(Nom)" AND "*2"<br>Z DO NOT INCLUDE MOLD FLASH.<br>* [3] bp x M (Ni/Pd/Au plating) 2. DIMENSION "*3" DOES NOTINCLUDE TRIM OFFSET.<br>e<br>Reference Dimension in Millimeters<br>Symbol Min Nom Max<br>L1 DE 4.3.9095 5.3<br>A2<br>A1 0.10 0.14 0.25<br>A 1.75<br>bp 0.34 0.40 0.46<br>b1<br>c 0.15 0.20 0.25<br>L c1<br>0° 8°<br>y HE 5.80 6.10 6.20<br>Detail F e 1.27<br>x 0.25<br>y 0.1<br>Z 0.75<br>L 0.40 0.60 1.27<br>L1 1.08<br>F<br>E E<br>2* H c<br>A<br>A1<br>**----- End of picture text -----**<br>


## **Ordering Information** 

|**Part Name**|**Quantity**|**Shipping Container**|
|---|---|---|
|HAF2026RJ-EL-E|2500pcs|Taping|



R07DS0122EJ0300  Rev.3.00 Sep 01, 2010 

Page 7 of 7 

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