FXLN8361QR1

**Freescale Semiconductor, Inc.** Data Sheet: Technical Data 

FXLN83xxQ Rev 2.0, 7/2014 

## **Xtrinsic FXLN83xxQ 3-Axis LowPower Analog-Output Accelerometer** 

FXLN83xxQ is a family of 3-axis, low-power, low- _g_ , analogoutput accelerometers that consist of an acceleration sensor along with a CMOS signal conditioning and control ASIC in a 3x3x1mm QFN package. The analog outputs for the X, Y, and Z axes are internally compensated for zero- _g_ offset and sensitivity, and then buffered to the output pads. The outputs have a fixed zero- _g_ offset of 0.75V, irrespective of the VDD supply voltage. The bandwidth of the output signal for each axis may be independently adjusted using external capacitors. The host can place the FXLN83xxQ into a low-current shutdown mode to conserve power. 

## **Features** 

- Supply voltage (VDD) from 1.71 V to 3.6 V 

- Accelerometer operating ranges selectable 

   - ±2 _g_ or ±8 _g_ (FXLN83x1Q) 

   - ±4 _g_ or ±16 _g_ (FXLN83x2Q) 

- Low current consumption of 180 μA (typical) 

- Output Bandwidth Options 

   - High bandwidth, 2.7 kHz (XY axes), 600 Hz (Z axis), (FXLN837XQ) 

   - Low bandwidth, 1.1 kHz (XY axes), 600 Hz (Z axis), (FXLN836XQ) 

- 3 x 3 x 1 mm, 12-pin QFN package (0.65 mm lead pitch) 

- Robust design with high shock survivability (10,000 _g_ ) 

- Operating temperature from –40 °C to +105 °C 

## **FXLN83xxQ** 

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12-pin QFN<br>3 mm x 3 mm x 1 mm<br>Case 2300-01<br>**----- End of picture text -----**<br>


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Top View<br>NC NC<br>12 11<br>BYP 1 10 XOUT<br>VDD 2 9 YOUT<br>ST 3 8 ZOUT<br>EN 4 7 GND<br>5 6<br>g-Select GND<br>Pin Connections<br>**----- End of picture text -----**<br>


- MSL 1 compliant 

## **Typical Applications** 

- Tamper detection 

- White goods: tilt, vibration, and shake detection 

- Motion sensing in robotics applications 

- Inclinometer, vibrometer 

- Activity monitoring in sports and medical devices 

Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. © 2014 Freescale Semiconductor, Inc. All rights reserved. 

## **Ordering Information** 

|**Part Number**|**Operating Range**|**Bandwidth**|**Temperature**<br>**Range**|**Package**<br>**Description**|**Shipping**|
|---|---|---|---|---|---|
|FXLN8361QR1|±2/8_g_|Low|–40 °C to +105 °C|QFN-12|Tape and reel (1 k)|
|FXLN8362QR1|±4/16_g_|Low|–40 °C to +105 °C|QFN-12|Tape and reel (1 k)|
|FXLN8371QR1|±2/8_g_|High|–40 °C to +105 °C|QFN-12|Tape and reel (1 k)|
|FXLN8372QR1|±4/16_g_|High|–40 °C to +105 °C|QFN-12|Tape and reel (1 k)|
|||||||



## **Related Documentation** 

The FXLN83xxQ device features and operations are described in a variety of reference manuals, user guides, and application notes. To find the most-current versions of these documents: 

1. Go to the Freescale homepage at freescale.com. 

2. In the **Keyword** search box at the top of the page, enter the device number FXLN83xxQ. 

3. In the **Refine Your Result** pane on the left, click on the **Documentation** link. 

Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0, 7/2014. 

**2** 

Freescale Semiconductor, Inc. 

## **Table of Contents** 

1 General Description......................................................................... 4 1.1 Block Diagram.........................................................................4 1.2 Pin Descriptions.......................................................................4 1.3 Typical Application Circuit..................................................... 6 1.4 Sensing Direction and Output Response................................. 6 2 Device Characteristics..................................................................... 8 2.1 Absolute Maximum Ratings....................................................8 2.2 Mechanical Specifications ...................................................... 9 2.3 Electrical Specifications ......................................................... 10 

3 Printed Circuit Board Layout and Device Mounting.......................11 3.1 Printed Circuit Board Layout...................................................11 3.2 Overview of Soldering Considerations....................................12 3.3 Halogen Content...................................................................... 13 4 Package Information........................................................................ 13 4.1 Device Marking....................................................................... 13 4.2 Tape and Reel Information...................................................... 13 4.3 Package Description................................................................ 14 5 Revision History.............................................................................. 17 

Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0, 7/2014. 

**3** 

Freescale Semiconductor, Inc. 

**General Description** 

## **1 General Description** 

## **1.1 Block Diagram** 

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BYP<br>XOUT<br>D2SAAF<br>VDD X+ Y+ Z+ 10 KΩ<br>aX,aY,aZ YOUT<br>G-cell MUX C2V Gain MUX D2SAAF<br>10 KΩ<br>ST<br>X- Y- Z- ZOUT<br>D2SAAF<br>10 KΩ<br>EN<br>References Self Test Clock Digital Logic<br>and<br>Control<br>g-Select<br>**----- End of picture text -----**<br>


**Figure 1. FXLN83xxQ block diagram** 

Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0, 7/2014. 

**4** 

Freescale Semiconductor, Inc. 

**General Description** 

## **1.2 Pin Descriptions** 

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NC NC<br>12 11<br>BYP 1 10 XOUT<br>VDD 2 9 YOUT<br>ST 3 8 ZOUT<br>EN 4 7 GND<br>5 6<br>g-Select GND<br>**----- End of picture text -----**<br>


**Figure 2. Pin locations** 

**Table 1. Pin descriptions** 

|||**Table 1. Pin descriptions**||
|---|---|---|---|
|**Pin**|**Name**|**Description**|**I/O**|
|1|BYP|Internal voltage regulator output capacitor connection|Output|
|2|VDD|Supply voltage|Power|
|3|ST1|Self-Test<br>• When ST pin is logic high, the accelerometer is put into self-test mode.<br>• When ST pin is logic low, the accelerometer is put into normal operating mode.|Input|
|4|EN|Power enable pin<br>• When the EN pin is logic low, the accelerometer is shut down, minimizing current<br>consumption.<br>• When the EN pin is logic high, the accelerometer is fully functional.|Input|
|5|g-Select|Full Scale Range selection:<br>**For part numbers FXLN8361QR1 & FXLN8371QR1:**<br>• When the g-select pin is logic low, the accelerometer is in ±8_g_mode<br>• When the g-select pin is logic high, the accelerometer is in ±2_g_mode<br>**For part numbers FXLN8362QR1 & FXLN8372QR1:**<br>• When the g-select pin is logic low, the accelerometer is in ±16_g_mode<br>• When the g-select pin is logic high, the accelerometer is in ±4_g_mode|Input|
|6|GND|Ground|Ground|
|7|GND|Ground|Ground|
|8|ZOUT|Z-axis analog output|Output|
|9|YOUT|Y-axis analog output|Output|
|10|XOUT|X-axis analog output|Output|
|11|NC|No internal connection, may be left floating or connected to GND|—|
|12|NC|No internal connection, may be left floating or connected to GND|—|
|EP|DNC|Center pads should not be soldered, refer toPrinted Circuit Board Layout and Device Mounting|—|



Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0, 7/2014. 

**5** 

Freescale Semiconductor, Inc. 

## **General Description** 

1. The Self-Test function verifies the correct functioning of the sensor and signal path without the need to apply a mechanical stimulus. When Self-Test is activated, an electrostatic actuation force is applied to the sensor, simulating a small acceleration. 

## **1.3 Typical Application Circuit** 

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XOUT<br>C6<br>C1<br>VDD 0.1μF<br>1 10<br>BYP XOUT<br>2 VDD YOUT 9 YOUT<br>3 8<br>ST ZOUT<br>C2 C3 4 7 C5<br>4.7μF 0.1μF EN GND<br>ZOUT<br>FXLN83xxQ<br>C4<br>SELF-TEST<br>ENABLE<br>RANGE SELECT<br>12 11<br>NC NC<br>g-Select GND<br>5 6<br>**----- End of picture text -----**<br>


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RANGE SELECT<br>**----- End of picture text -----**<br>


Notes: 

**Recommended Minimum Capacitance Specifications Part Number    Bandwidth   C4 (pF)   C5 (pF)    C6 (pF)** FXLN8361Q          Low            9100       9100        9100 FXLN8362Q          Low            9100       9100        9100 FXLN8371Q          High           8200       3300        3300 FXLN8372Q          High           8200       3300        3300 

1. Position the decoupling capacitors (C2, C3) as near as possible to the VDD pin (common practice to filter out undesired noise from the power supply). 

2. C1 is required to stabilize the output of the internal voltage regulator. 

3. Connecting the EN pin to the VDD pin is not a supported configuration and may prevent the part from starting up. Do not set the EN pin high until VDD > 1.71 V. 

## **Figure 3. Electrical Connections** 

Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0, 7/2014. 

**6** 

Freescale Semiconductor, Inc. 

**General Description** 

## **1.4 Sensing Direction and Output Response** 

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Side View<br>Top View BACK<br>Pin 1<br>Xout @   0  g<br>Yout @   0  g<br>Zout @ –1  g<br>Xout @   0  g FRONT<br>Yout @ –1  g<br>Zout @   0  g<br>Xout @ 0  g<br>Earth Gravity Yout @ 0  g<br>Zout @ 1  g<br>Z<br>Xout @ –1  g Xout @ 1  g<br>Yout @   0  g Yout @ 0  g<br>X<br>Zout @   0  g Zout @ 0  g<br>Xout @ 0  g Y<br>Yout @ 1  g<br>Top View<br>Zout @ 0  g<br>XYZ Output Voltage<br>Part Number Mode<br>–1  g         0  g        +1  g<br> ±2  g        0.521    0.750    0.979<br>FXLN8361Q, FXLN8371Q<br> ±8  g        0.693    0.750    0.807<br> ±4  g        0.636    0.750    0.865<br>FXLN8362Q, FXLN8372Q<br>±16  g       0.722    0.750    0.779<br>263<br>P3XX ALYM<br>ALYM<br>P3XX<br>263<br>**----- End of picture text -----**<br>


**Figure 4. Sensitive Axes Orientation and Response to Gravity Stimulus** 

Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0, 7/2014. 

**7** 

Freescale Semiconductor, Inc. 

**Device Characteristics** 

## **2 Device Characteristics** 

## **2.1 Absolute Maximum Ratings** 

Absolute maximum ratings are the limits the device can be exposed to without permanently damaging it. Absolute maximum ratings are stress ratings only; functional operation at these ratings is not guaranteed. Exposure to absolute maximum ratings conditions for extended periods may affect reliability. 

This device contains circuitry to protect against damage due to high static voltage or electrical fields. It is advised, however, that normal precautions be taken to avoid application of any voltages higher than maximum-rated voltages to this high-impedance circuit. 

**Table 2. Absolute maximum ratings** 

|**Rating**|**Symbol**|**Value**|**Unit**|
|---|---|---|---|
|Supply voltage|VDD|–0.3 to +3.6|V|
|Drop-test height, component|Ddrop|1.8|m|
|Operating temperature range|TOP|–40 to +105|°C|
|Storage temperature range|TSTG|–40 to +125|°C|



**Table 3. ESD and latch-up protection characteristics** 

|**Rating**|**Symbol**|**Value**|**Unit**|
|---|---|---|---|
|Human body model (HBM)|VHBM|±2000|V|
|Machine model (MM)|VMM|±200|V|
|Charge device model (CDM)|VCDM|±500|V|
|Latch-up current at T = 85 °C|ILU|±100|mA|



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## **Caution** 

This device is sensitive to mechanical shock, improper handling can cause permanent damage to the part. 

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## **Caution** 

This is an ESD sensitive device, improper handling can cause permanent damage to the part. 

Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0, 7/2014. 

**8** 

Freescale Semiconductor, Inc. 

**Device Characteristics** 

## **2.2 Mechanical Specifications** 

## **Table 4. Mechanical characteristics** 

||||||||
|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Test Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|Full scale range (FXLN83X1)|FSR|±2_g_mode|—|±2|—|_g_|
|||±8_g_mode|—|±8|—||
|Full scale range (FXLN83X2)||±4_g_mode|—|±4|—||
|||±16_g_mode|—|±16|—||
|Nominal sensitivity|SEN|±2_g_range|—|229.0|—|mV/_g_|
|||±4_g_range|—|114.5|—||
|||±8_g_range|—|57.25|—||
|||±16_g_range|—|28.62|—||
|Calibrated sensitivity|SENCAL|±2_g_|VBYP/(3.276*gRange)|||V/_g_|
|||±4_g_|||||
|||±8_g_|||||
|||±16_g_|||||
|Calibrated sensitivity error|SENERR|±2_g_range|–5|—|+5|%|
|||±4_g_range|–6|—|+6||
|Sensitivity change vs.<br>temperature1|TCS|—|–0.07|—|+0.07|%/°C|
|Cross-axis sensitivity1|CAS|—|–4.2|—|+4.2|%|
|Self-test output change1|STOC|—|35(XY)<br>300(Z)|—|—|m_g_|
|Zero-_g_level offset|VOFF|±2_g_range|0.705|0.75|0.795|V|
|||±4_g_range|0.7125|0.75|0.7875||
|||±8_g_range|||||
|||±16_g_range|||||
|Zero-_g_level change vs.<br>temperature1|TCO|±2_g_range|–1.2|—|+1.2|m_g_/°C|
|||±4_g_range|–2.0|—|+2.0||
|Zero-_g_level offset, post board<br>mount1|OFFPBM|1 mm (overall thickness),<br>2-layer, FR4-based PCB|–200|—|+200|m_g_|
|Noise Density1,2|ND|FXLN8371QR1,<br>FXLN8372QR1|—|200(XY)<br>280(Z)|—|µ_g_/√Hz|
|||FXLN8361QR1,<br>FXLN8362QR1|—|130(XY)<br>200(Z)|—|µ_g_/√Hz|
|Operating temperature range1|TOP|—|–40|—|+105|°C|
|Notes:|||||||
|Test conditions (unless otherwise noted):<br>• VDD= 2.8 V, unless otherwise noted<br>• T = 25 °C, ±2_g_range (for ±2/8_g_product), ±4_g_range (for ±4/16_g_product)|||||||



Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0, 7/2014. 

**9** 

Freescale Semiconductor, Inc. 

**Device Characteristics** 

## **Table 4. Mechanical characteristics** 

   - Analog acceleration output pin loading = 3.3 nF capacitors on X and Y axes, with 8.2 nF capacitor on Z axis (HBW configuration) 

   - Analog acceleration output pin loading = 9.1 nF capacitors on X, Y and Z axes (LBW configuration) 

   - No analog acceleration output pin loading other than external BW setting capacitor 

   - No BYP pin loading other than bypass capacitor and 150 μA DC current draw through resistive divider. 

1. Limits verified by characterization only. 

2. High and Low Bandwidth modes are configured in non-volatile Memory (NVM) at the factory 

## **2.3 Electrical Specifications** 

## **Table 5. Electrical characteristics** 

|**Parameter**|**Symbol**|**Test Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
||||||||
|Supply voltage1|VDD|—|1.71|2.8|3.6|V|
|Active supply current|IDD|—|—|180|—|µA|
|Shutdown supply current|IDD–SD|—|—|30|—|nA|
|Voltage supplied at BYP pin1|VBYP|IBYP≤ 150 µA|1.45|1.5|1.55|V|
|Output impedance (XYZ<br>outputs)1|RO|—|8|10|12|kΩ|
|Bandwidth1,2,3|BW|High BW device|—|2700(XY)<br>600(Z)|—|Hz|
|||Low BW device|—|1100(XY)<br>600(Z)|—||
|BYP output capacitor value|CBYP|External capacitor|70|100|500|nF|
|Logic high input level on EN, g-<br>Select, ST pins1|VIH|—|0.75 * VDD|—|VDD|V|
|Logic low input level on EN, g-<br>Select, ST pins1|VIL|—|0|—|0.3 * VDD|V|
|Turn-on time1,2,4|TON||—|660|—|µs|
|g-Select transition delay3|Tg-Select||—|340|—|µs|
|Operating temperature range1|TOP|—|–40|—|+105|°C|
|Notes:|||||||
|Test conditions (unless otherwise noted):<br>• VDD= 2.8 V<br>• Output load = 3.3 nF capacitors on X and Y axes, with 8.2 nF capacitor on Z axis (HBW configuration)<br>• Output load = 9.1 nF capacitors on X, Y and Z axes (LBW configuration)<br>• Output loading other than external capacitor: high impedance<br>• No electrical loading on BYP pin other than output capacitor and 150 μA (max)<br>• DC output current for ADC reference input<br>• T = 25°C, ±2_g_range (for ±2/8_g_product), ±4_g_range (for ±4/16_g_product)|||||||



1. Limits verified by characterization only. 

2. Apply VDD first. Then, Turn-on time is defined by the delay between when the EN pin is set to high and the time at which a pin's output value reaches 90% of its final value. 

3. g-Select pin transition from high to low. Time for output value to reach 90% of final value. 

Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0, 

**10** 

7/2014. 

Freescale Semiconductor, Inc. 

**Printed Circuit Board Layout and Device Mounting** 

4. BYP pin is not connected 

## **3 Printed Circuit Board Layout and Device Mounting** 

Printed Circuit Board (PCB) layout and device mounting are critical to the overall performance of the design. The footprint for the surface mount packages must be the correct size as a base for a proper solder connection between the PCB and the package. This, along with the recommended soldering materials and techniques, will optimize assembly and minimize the stress on the package after board mounting. 

Freescale application note AN1902, "Assembly Guidelines for QFN and DFN Packages" discusses the QFN package used by the FXLN83xxQ. 

## **3.1 Printed Circuit Board Layout** 

The following recommendations are a guide to an effective PCB layout. See Figure 5 for footprint dimensions. 

- The PCB land should be designed with Non-Solder Mask Defined (NSMD) as shown in Figure 5. 

- No additional via pattern underneath package. 

- No components or vias should be placed at a distance less than 2 mm from the package land area. This may cause additional package stress if it is too close to the package land area. 

- Signal traces connected to pads should be as symmetric as possible. Put dummy traces on the NC pads in order to have same length of exposed trace for all pads. 

- No copper traces should be on the top layer of the PCB under the package. This will cause planarity issues with board mount. Freescale QFN sensors are compliant with Restrictions on Hazardous Substances (RoHS), having halide-free molding compound (green) and lead-free terminations. These terminations are compatible with tin-lead (Sn-Pb) as well as tin-silver-copper (Sn-Ag-Cu) solder paste soldering processes. Reflow profiles applicable to those processes can be used successfully for soldering the devices. 

Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0, 7/2014. 

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Freescale Semiconductor, Inc. 

**Printed Circuit Board Layout and Device Mounting** 

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**----- Start of picture text -----**<br>
12X 0.330<br>3 12X 0.686<br>12X 0.35<br>5 6 0.25 12X 0.3105<br>12X 0.5 4 7<br>0.3<br>8X 0.325 8X 0.325<br>3<br>1<br>10<br>4X 0.650 4X 0.650<br>24 20<br>Package footprint<br>Package PCB land pad<br>12X 0.533<br>12X 0.305<br>12X 0.889<br>Package footprint 12X 0.635<br>12X 0.4121<br>8X 0.325 8X 0.325<br>4X 0.650 4X 0.650<br>Package footprint<br>Solder mask opening Solder stencil opening<br>**----- End of picture text -----**<br>


**Figure 5. Footprint** 

## **3.2 Overview of Soldering Considerations** 

The information provided here is based on experiments executed on QFN devices. These experiments cannot represent exact conditions present at a customer site. Therefore, information herein should be used for guidance purposes only. Process and design optimizations are recommended to develop an application-specific solution. With the proper PCB footprint and solder stencil designs, the package will self-align during the solder reflow process. 

- Stencil thickness should be 100 or 125 µm. 

- The PCB should be rated for the multiple lead-free reflow condition with a maximum 260 °C temperature. 

Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0, 7/2014. 

**12** 

Freescale Semiconductor, Inc. 

**Package Information** 

- Use a standard pick-and-place process and equipment. Do not use a hand soldering process. 

- Do not use a screw-down or stacking to mount the PCB into an enclosure. These methods could bend the PCB, which would put stress on the package. 

## **3.3 Halogen Content** 

This package is designed to be Halogen Free, exceeding most industry and customer standards. Halogen Free means that no homogeneous material within the assembly package shall contain chlorine (Cl) in excess of 700 ppm or 0.07% weight/weight or bromine (Br) in excess of 900 ppm or 0.09% weight/weight. 

## **4 Package Information** 

The FXLN83xxQ device uses a 12-lead QFN package, case number 2300-01. 

## **4.1 Device Marking** 

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Top View<br>Freescale code 263<br>P3XX Part number<br>ALYW   P3XX<br>Traceability date code<br>Assembly site 71, 72, 61, or 62<br>Lot code P = Prototype, 8 = Production<br>Work week<br>**----- End of picture text -----**<br>


## **Figure 6. Device Marking Description** 

Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0, 7/2014. 

**13** 

Freescale Semiconductor, Inc. 

**Package Information** 

## **4.2 Tape and Reel Information** 

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## **Figure 7. Tape dimensions** 

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Pin 1<br>Direction<br>to unreel<br>Barcode label<br>side of reel<br>**----- End of picture text -----**<br>


**Figure 8. Tape and reel orientation** 

Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0, 7/2014. 

**14** 

Freescale Semiconductor, Inc. 

**Package Information** 

## **4.3 Package Description** 

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Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0, 7/2014. 

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Freescale Semiconductor, Inc. 

**Package Information** 

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## This drawing is located at freescale.com. 

Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0, 7/2014. 

**16** 

Freescale Semiconductor, Inc. 

**Revision History** 

## **5 Revision History** 

|**Revision**<br>**number**|**Revision date**|**Description**|
|---|---|---|
|1.0|11/2013|Initial release.|
|1.1|7/2014|Revised to match current Freescale standard<br>Figure 3, added note #3|
|2.0|7/2014|Changed document type from Advance Information to Technical Data|
||||



Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0, 7/2014. 

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Freescale Semiconductor, Inc. 

## _**How to Reach Us:**_ 

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**Web Support:** freescale.com/support 

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© 2014 Freescale Semiconductor, Inc. 

Document Number FXLN83xxQ Revision 2.0, 7/2014