FSB50250BS

## FSB50250B / FSB50250BS Motion SPM 5 Series **Description** The FSB50250B / FSB50250BS is an advanced Motion SPM ° 

The FSB50250B / FSB50250BS is an advanced Motion SPM 5 module providing a fully−featured, high−performance inverter output stage for AC Induction, BLDC and PMSM motors such as refrigerators, fans and pumps. These modules integrate optimized gate drive of the built−in MOSFETs (FRFET technology) to minimize EMI and losses, while also providing multiple on−module protection features including under−voltage lockouts and thermal monitoring. The built−in high−speed HVIC requires only a single supply voltage and translates the incoming logic−level gate inputs to the high−voltage, high−current drive signals required to properly drive the module’s internal MOSFETs. Separate open−source MOSFET terminals are available for each phase to support the widest variety of control algorithms. 

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**SPM5H−023 / 23LD, PDD STD, SPM23−BD CASE MODEM** 

## **Features** 

- UL Certified No. E209204 (UL1557) 

- Optimized for over 10 kHz Switching Frequency 

- 500 V FRFET MOSFET 3−Phase Inverter with Gate Drivers and Protection 

- Built−In Bootstrap Diodes Simplify PCB Layout 

- Separate Open−Source Pins from Low−Side MOSFETs for Three−Phase Current−Sensing 

- Active−HIGH Interface, Works with 3.3 / 5 V Logic, Schmitt−trigger Input 

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SPM5E−023 / 23LD, PDD STD<br>CASE MODEJ<br>**----- End of picture text -----**<br>


## **MARKING DIAGRAM** 

- Optimized for Low Electromagnetic Interference 

- HVIC Temperature−Sensing Built−In for Temperature Monitoring 

- HVIC for Gate Driving and Under−Voltage Protection 

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$Y<br>FSB50250X<br>&Z&K&E&E&E&3<br>**----- End of picture text -----**<br>


- Isolation Rating: 1500 Vrms / min. 

- Moisture Sensitive Level (MSL)3 for SMD 

- These Devices are Pb−Free and are RoHS Compliant 

## **Applications** 

- 3−Phase Inverter Driver for Small Power AC Motor Drives 

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$Y = ON Semiconductor Logo<br>&Z = Assembly Plant Code<br>&3 = Data Code (Year & Week)<br>&K = Lot<br>FSB50250X = Specific Device Code<br>⇒  X = B or BS<br>**----- End of picture text -----**<br>


## **Related Source** 

- AN−9080 − FSB50450AS − User’s Guide for Motion SPM 5 Series 

- AN−9082 − Motion SPM5 Series Thermal Performance by Contact Pressure 

## **ORDERING INFORMATION** 

See detailed ordering and shipping information on page 2 of this data sheet. 

Publication Order Number: **FSB50250B/D** 

**1** 

© Semiconductor Components Industries, LLC, 2019 **March, 2019 − Rev. 2** 

## **FSB50250B / FSB50250BS** 

## **PACKAGE MARKING AND ORDERING INFORMATION** 

|**Device**|**Device Marking**|**Package**|**Packing Type**|**Reel Size**|**Quantity**|
|---|---|---|---|---|---|
|FSB50250B|FSB50250B|SPM5P−023|Rail|NA|15|
|FSB50250BS|FSB50250BS|SPM5Q−023|Tape & Reel|330 mm|450|



|**ABSOLUTE MAXIMUM RATINGS**(TC= 25°C, Unless otherwise noted)|**ABSOLUTE MAXIMUM RATINGS**(TC= 25°C, Unless otherwise noted)|**ABSOLUTE MAXIMUM RATINGS**(TC= 25°C, Unless otherwise noted)|||
|---|---|---|---|---|
|**Symbol**|**Parameter**|**Conditions**|**Rating**|**Unit**|
|**INVERTER PART **(Each MOSFET Unless Otherwise Specified)|||||
|VDSS|Drain−Source Voltage of Each MOSFET||500|V|
|*ID 25|Each MOSFET Drain Current, Continuous|TC= 25°C|1.9|A|
|*ID 80|Each MOSFET Drain Current, Continuous|TC= 80°C|1.2|A|
|*IDP|Each MOSFET Drain Current, Peak|TC= 25°C, PW < 100�s|5.0|A|
|*IDRMS|Each MOSFET Drain Current, Rms|TC= 80°C, FPWM< 20 kHz|0.9|Arms|
|**CONTROL PART **(Each HVIC Unless Otherwise Specified)|||||
|VDD|Control Supply Voltage|Applied Between VDDand COM|20|V|
|VBS|High−side Bias Voltage|Applied Between VBand VS|20|V|
|VIN|Input Signal Voltage|Applied Between IN and COM|−0.3 ~ VDD+0.3|V|
|**BOOTSTRAP DIODE PART **(Each Bootstrap Diode Unless Otherwise Specified.)|||||
|VRRMB|Maximum Repetitive Reverse Voltage||500|V|
|* IFB|Forward Current|TC= 25°C|0.5|A|
|* IFPB|Forward Current (Peak)|TC= 25°C, Under 1 ms Pulse Width|1.5|A|
|**THERMAL RESISTANCE**|||||
|Rth(j−c)Q|Junction to Case Thermal Resistance<br>(Note 1)|Inverter MOSFET part, (Per Module)|2.6|°C/W|
|**TOTAL SYSTEM**|||||
|TJ|Operating Junction Temperature||−40 ~ 150|°C|
|TSTG|Storage Temperature||−40 ~ 125|°C|
|VISO|Isolation Voltage|60 Hz, Sinusoidal, 1 minute,<br>Connection Pins to Heatsink|1500|Vrms|



Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 

1. For the Measurement Point of Case Temperature TC, Please refer to Figure 4. 

2. Marking “ * ” Is Calculation Value or Design Factor. 

3. Using continuously under heavy loads or excessive assembly conditions (e.g. the application of high temperature/ current/ voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/ current/ voltage, etc.) are within the absolute maximum ratings and the operating ranges. 

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**2** 

**FSB50250B / FSB50250BS** 

## **PIN DESCRIPTION** 

|**Pin No.**|**Pin Name**|**Pin Description**|
|---|---|---|
|1|COM|IC Common Supply Ground|
|2|VB(U)|Bias Voltage for U Phase High Side FRFET Driving|
|3|VDD(U)|Bias Voltage for U Phase IC and Low Side FRFET Driving|
|4|IN(UH)|Signal Input for U Phase High−side|
|5|IN(UL)|Signal Input for U Phase Low−side|
|6|N.C|N.C|
|7|VB(V)|Bias Voltage for V Phase High Side FRFET Driving|
|8|VDD(V)|Bias Voltage for V Phase IC and Low Side FRFET Driving|
|9|IN(VH)|Signal Input for V Phase High−side|
|10|IN(VL)|Signal Input for V Phase Low−side|
|11|VTS|Output for HVIC Temperature Sensing|
|12|VB(W)|Bias Voltage for W Phase High Side FRFET Driving|
|13|VDD(W)|Bias Voltage for W Phase IC and Low Side FRFET Driving|
|14|IN(WH)|Signal Input for W Phase High−side|
|15|IN(WL)|Signal Input for W Phase Low−side|
|16|N.C|N.C|
|17|P|Positive DC–Link Input|
|18|U, VS(U)|Output for U Phase & Bias Voltage Ground for High Side FRFET Driving|
|19|NU|Negative DC–Link Input for U Phase|
|20|NV|Negative DC–Link Input for V Phase|
|21|V, VS(V)|Output for V Phase & Bias Voltage Ground for High Side FRFET Driving|
|22|NW|Negative DC–Link Input for W Phase|
|23|W, VS(W)|Output for W Phase & Bias Voltage Ground for High Side FRFET Driving|



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(1) COM<br>(2) VB(U) (17) P<br>(3) VDD(U) VCC VB<br>(4) IN(UH) HIN HO<br>(5) IN(UL) LIN VS (18) U, VS(U)<br>COM LO<br>(6) N.C<br>(7) VB(V) (19) NU<br>(8) VDD(V) VCC VB (20) NV<br>(9) IN(VH) HIN HO<br>(10) IN(VL) LIN VS (21) V, VS(V)<br>COM LO<br>(11) VTS VTS<br>(12) VB(W)<br>(13) VDD(W) VCC VB (22) NW<br>(14) IN(WH) HIN HO<br>(15) IN(WL) LIN VS (23) W, VS(W)<br>COM LO<br>(16) N.C<br>**----- End of picture text -----**<br>


4. Source Terminal of Each Low−Side MOSFET is Not Connected to Supply Ground or Bias Voltage Ground Inside Motion SPM 5 product. External Connections Should be Made as Indicated in Figure 3. 

**Figure 1. Pin Configuration and Internal Block Diagram (Bottom View)** 

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**3** 

## **FSB50250B / FSB50250BS** 

**ELECTRICAL CHARACTERISTICS** (TJ = 25 ° C, VDD = VBS = 15 V Unless Otherwise Specified) 

|**ELECTRIC**|**AL CHARACTERISTICS**(TJ= 25°C,|VDD= VBS= 15 V Unless Otherwise Specified)|VDD= VBS= 15 V Unless Otherwise Specified)|||||
|---|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test Conditions**||**Min.**|**Typ.**|**Max.**|**Unit**|
|**INVERTER PART**(Each MOSFET Unless Otherwise||Specified)||||||
|BVDSS|Drain−Source Breakdown Voltage|VIN= 0 V, ID= 1 mA ( Note 5)||500|−|−|V|
|IDSS|Zero Gate Voltage Drain Current|VIN= 0 V, VDS= 500 V||−|−|1|mA|
|RDS(on)|Static Drain−Source On−Resistance|VDD= VBS= 15 V, VIN= 5 V, ID= 0.5 A||−|5.5|6.4|�|
|VSD|Drain−Source Diode Forward Voltage|VDD= VBS= 15 V, VIN= 0 V, ID= −0.5 A||−|−|1.1|V|
|tON|Switching Times|VPN= 300 V, VDD= VBS= 15 V, ID= 0.5 A<br>VIN= 0 V↔ 5 V, Inductive Load L = 3 mH High−<br>and Low−Side MOSFET Switching<br>(Note 6)||−|580|−|ns|
|tOFF||||−|450|−|ns|
|trr||||−|150|−|ns|
|EON||||−|30|−|�J|
|EOFF||||−|3|−|�J|
|RBSOA|Reverse−Bias Safe Operating Area|VPN= 400 V, VDD= VBS= 15 V, ID= IDP,<br>VDS= BVDSS, TJ= 150°C<br>High− and Low−Side MOSFET Switching (Note 7)|||Full Square|||
|**CONTROL PART**(Each HVIC Unless Otherwise Specified)||||||||
|IQDD|Quiescent VDDCurrent|VDD= 15 V, VIN= 0 V|Applied Between VDDand<br>COM|−|−|200|�A|
|IQBS|Quiescent VBSCurrent|VBS= 15 V, VIN= 0 V|Applied Between<br>VB(U)−U, VB(V)−V,<br>VB(W)−W|−|−|100|�A|
|IPDD|Operating VDDSupply|VDD− COM|VDD= 15 V,<br>fPWM= 20 kHz,<br>Duty = 50%, Applied to<br>One PWM Signal Input<br>for Low−Side|−|−|900|�A|
|IPBS|Operating VBSSupply Current|VB(U)−VS(U), VB(V)<br>− VS(V), VB(W)− VS(W)|VDD= VBS= 15 V,<br>fPWM= 20 kHz,<br>Duty = 50%, Applied to<br>One PWM Signal Input<br>for High−Side|−|−|800|�A|
|UVDDD|Low−Side Undervoltage Protection<br>(Figure 8)|VDDUndervoltage Protection Detection Level||7.4|8.0|9.4|V|
|UVDDR||VDDUndervoltage Protection Reset Level||8.0|8.9|9.8|V|
|UVBSD|High−Side Undervoltage Protection<br>(Figure 9)|VBSUndervoltage Protection Detection Level||7.4|8.0|9.4|V|
|UVBSR||VBSUndervoltage Protection Reset Level||8.0|8.9|9.8|V|
|VTS|HVIC Temperature sensing voltage<br>output|VDD= 15 V, THVIC= 25°C (Note 8)||600|790|980|mV|
|VIH|ON Threshold Voltage|Logic High Level|Applied between IN and<br>COM|−|−|2.9|V|
|VIL|OFF Threshold Voltage|Logic Low Level||0.8|−|−|V|
|**BOOTSTRAP DIODE PART**(Each Bootstrap Diode Unless Otherwise Specified)||||||||
|VFB|Forward Voltage|IF= 0.1 A, TC= 25°C (Note 9)||−|2.5|−|V|
|trrB|Reverse Recovery Time|IF= 0.1 A, TC= 25°C||−|80|−|ns|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 

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**4** 

**FSB50250B / FSB50250BS** 

## **RECOMMENDED OPERATING CONDITION** 

|**Symbol**|**Parameter**|**Conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|VPN|Supply Voltage|Applied between P and N|−|300|400|V|
|VDD|Control Supply Voltage|Applied between VDDand COM|13.5|15.0|16.5|V|
|VBS|High−Side Bias Voltage|Applied between VBand VS|13.5|15.0|16.5|V|
|VIN(ON)|Input ON Threshold Voltage|Applied between VINand COM|3.0|−|VDD|V|
|VIN(OFF)|Input OFF Threshold Voltage||0|−|0.6|V|
|tdead|Blanking Time for Preventing Arm−Short|VDD= VBS= 13.5 ~ 16.5 V, TJ≤150°C|1.0|−|−|�s|
|fPWM|PWM Switching Frequency|TJ≤150°C|−|15|−|kHz|



## **Built in Bootstrap Diode VF−IF Characteristic** 

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1.0<br>0.9<br>0.8<br>0.7<br>0.6<br>0.5<br>0.4<br>0.3<br>0.2<br>0.1<br>0.0<br>0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15<br>VF [V] TC = 25 � C<br> [A]<br>IF<br>**----- End of picture text -----**<br>


## **Figure 2. Built in Bootstrap Diode Characteristics (Typical)** 

NOTES: 

> 5. BVDSS is the Absolute Maximum Voltage Rating Between Drain and Source Terminal of Each MOSFET Inside Motion SPM 5 product. VPN Should be Sufficiently Less Than This Value Considering the Effect of the Stray Inductance so that VDS Should Not Exceed BVDSS in Any Case. 

> 6. tON and tOFF Include the Propagation Delay Time of the Internal Drive IC. Listed Values are Measured at the Laboratory Test Condition, and They Can be Different According to the Field Applications Due to the Effect of Different Printed Circuit Boards and Wirings. Please see Figure 6 for the Switching Time Definition with the Switching Test Circuit of Figure 7. 

7. The peak current and voltage of each MOSFET during the switching operation should be included in the Safe Operating Area (SOA). Please see Figure 8 for the RBSOA test circuit that is same as the switching test circuit. 

8. VTS is only for sensing temperature of module and cannot shutdown MOSFETs automatically. 

9. Built in bootstrap diode includes around 15 � resistance characteristic. Please refer to Figure 1. 

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**5** 

**FSB50250B / FSB50250BS** 

_These values depend on PWM control algorithm_ 

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+15 V A C1 * Example Circuit : V phase<br>VDC<br>P HIN LIN Output Note<br>R5 VDDHIN HOVB V OutputInverter 00 01 Z0 Low side FRFET OnBoth FRFET Off<br>LIN VS C3 1 0 VDC High side FRFET On<br>C5 COM LO 1 1 Forbidden Shoot through<br>VTS N R3 Open Open Z Same as (0,0)<br>C2 C4 One Leg Diagram of Motion  SPM 5 Product<br>10 F<br>*Example of Bootstrap Paramters:<br>C1 = C2 = 1 F Ceramic Capacitor<br>MCU<br>**----- End of picture text -----**<br>


- 10.Parameters for bootstrap circuit elements are dependent on PWM algorithm. For 15 kHz of switching frequency, typical example of parameters is shown above. 

11. RC−coupling (R5 and C5) and C4 at each input of Motion SPM 5 product and MCU (Indicated as Dotted Lines) may be used to prevent improper signal due to surge−noise. 

- 12.Bold lines should be short and thick in PCB pattern to have small stray inductance of circuit, which results in the reduction of surge−voltage. Bypass capacitors such as C1 , C2 and C3 should have good high−frequency characteristics to absorb high−frequency ripple−current. 

**Figure 3. Recommended MCU Interface and Bootstrap Circuit with Parameters** 

- 13.Attach the thermocouple on top of the heat−sink of SPM 5 package (between SPM 5 package and heatsink if applied) to get the correct temperature measurement. 

**Figure 4. Case Temperature Measurement** 

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3.5<br>3.0<br>2.5<br>2.0<br>1.5<br>1.0<br>0.5<br>20 40 60 80 100 120 140 160<br>THVIC [ ° C]<br> [V]<br>TS<br>V<br>**----- End of picture text -----**<br>


**Figure 5. Temperature Profile of VTS (Typical)** 

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**6** 

**FSB50250B / FSB50250BS** 

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**----- Start of picture text -----**<br>
VIN VIN<br>Irr<br>100% of ID 120% of ID<br>VDS ID<br>10% of ID<br>ID VDS<br>tON trr tOFF<br>(a) Turn−on (b) Turn−off<br>**----- End of picture text -----**<br>


**Figure 6. Switching Time Definitions** 

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CBS<br>VDD ID<br>VDD VB<br>HIN HO L VDC<br>LIN VS<br>+<br>COM LO VDS<br>VTS −<br>One Leg Diagram of Motion SPM 5 Product<br>**----- End of picture text -----**<br>


**Figure 7. Switching and RBSOA (Single−Pulse) Test Circuit (Low−side)** 

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Input Signal<br>UV Protection<br>RESET SET RESET<br>Status<br>UVDDR<br>Low−side Supply, VDD<br>UVDDD<br>MOSFET Current<br>**----- End of picture text -----**<br>


**Figure 8. Under−Voltage Protection (Low−Side)** 

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Input Signal<br>UV Protection<br>RESET SET RESET<br>Status<br>UVBSR<br>High−side Supply, VBS<br>UVBSD<br>MOSFET Current<br>**----- End of picture text -----**<br>


**Figure 9. Under−Voltage Protection (High−Side)** 

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**7** 

**FSB50250B / FSB50250BS** 

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C1<br>(1) COM<br>(2) VB(U) (17) P<br>(3) VDD(U)<br>VDD VB<br>R5 (4) IN(UH)<br>HIN HO<br>(5) IN(UL) LIN VS (18) U, VS(U) C3 VDC<br>C5 C2 COM LO<br>(6) N.C<br>(19) NU<br>(7) VB(V)<br>(8) VDD(V) VDD VB (20) NV<br>(9) IN(10) IN(VH)(VL) HINLIN HOVS (21) V, VS(V) M<br>COM LO<br>(11) VTS VTS<br>(12) VB(W)<br>(13) VDD(W) (22) NW<br>VDD VB<br>(14) IN(WH)<br>HIN HO (23) W, VS(W)<br>(15) IN(WL) LIN VS<br>COM LO<br>(16) N.C<br>C4 For current−sensing and protection R4<br>15 V<br>Supply C6 R3<br>Micom<br>**----- End of picture text -----**<br>


- 14.About pin position, refer to Figure 1. 

- 15.RC−coupling (R5 and C5 , R4 and C6) and C4 at each input of Motion SPM 5 product and MCU are useful to prevent improper input signal caused by surge−noise. 

- 16.The voltage−drop across R3 affects the low−side switching performance and the bootstrap characteristics since it is placed between COM and the source terminal of the low−side MOSFET. For this reason, the voltage−drop across R3 should be less than 1 V in the steady−state. 

- 17.Ground−wires and output terminals, should be thick and short in order to avoid surge−voltage and malfunction of HVIC. 

- 18.All the filter capacitors should be connected close to Motion SPM 5 product, and they should have good characteristics for rejecting high−frequency ripple current. 

**Figure 10. Example of Application Circuit** 

SPM is a registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. 

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**8** 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

## **SPM5E−023 / 23LD, PDD STD, FULL PACK, DIP TYPE** CASE MODEJ ISSUE O 

DATE 31 JAN 2017 

## **DOCUMENT NUMBER: 98AON13543G** 

Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. 

**DESCRIPTION: SPM5E−023 / 23LD, PDD STD, FULL PACK, DIP TYPE PAGE 1 OF 1** 

ON Semiconductor and          are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 

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© Semiconductor Components Industries, LLC, 2019 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

## **SPM5H−023 / 23LD, PDD STD, SPM23−BD (Ver1.5) SMD TYPE** CASE MODEM ISSUE O 

DATE 31 JAN 2017 

Electronic versions are uncontrolled except when accessed directly from the Document Repository. **DOCUMENT NUMBER: 98AON13546G** Printed  versions are uncontrolled  except when stamped  “CONTROLLED COPY” in red. 

**DESCRIPTION: SPM5H−023 / 23LD, PDD STD, SPM23−BD (Ver1.5) SMD TYPE** 

**PAGE 1 OF 1** 

ON Semiconductor and          are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 

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© Semiconductor Components Industries, LLC, 2019 

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