FNB81060T3

## **Is Now Part of** 

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## **FNB81060T3** 

## **Motion SPM[®] 8 Series** 

## **Features** 

- UL Certified No. E209204 (UL1557) 

- 600 V - 10 A 3-Phase IGBT Inverter Including Control IC for Gate Drive and Protections 

- Low-Loss, Short-Circuit Rated IGBTs 

- Separate Open-Emitter Pins from Low-Side IGBTs for Three-Phase Current Sensing 

- Active-high interface, works with 3.3 / 5 V Logic, Schmitt-trigger Input 

- HVIC for Gate Driving, Under-Voltage, Over Current and Short-Circuit Current Protection 

- Fault Output for Under-Voltage, Over Current and Short-Circuit Current Protection 

- Inter-Lock Function to Prevent Short-Circuit 

## **General Description** 

FNB81060T3 is a Motion SPM 8 module providing a fully-featured, high-performance inverter output stage for AC Induction, BLDC, and PMSM motors. These modules integrate optimized gate drive of the built-in IGBTs to minimize EMI and losses, while also providing multiple on-module protection features including under-voltage lockouts, inter-lock function, over-current shutdown, thermal monitoring of drive IC, and fault reporting. The built-in, high-speed HVIC requires only a single supply voltage and translates the incoming logic-level gate inputs to the high-voltage, high-current drive signals required to properly drive the module's robust shortcircuit-rated IGBTs. Separate negative IGBT terminals are available for each phase to support the widest variety of control algorithms. 

- Shut-Down Input 

- HVIC Temperature-Sensing Built-In for Temperature Monitoring 

- Isolation Rating: 1500 Vrms / min. 

## **Applications** 

- Motion Control - Home Appliance / Industrial Motor / HVAC. 

## **Related Resources** 

- _AN-9112 - Smart Power Module, Motion SPM[®] 8 Series User’s Guide._ 

**SPMFA-A25** 

**Figure 1. 3D Package Drawing (Click to Activate 3D Content)** 

## **Package Marking and Ordering Information** 

|**Device**|**Device Marking**|**Package**|**Packing Type**|**Quantity**|
|---|---|---|---|---|
|FNB81060T3|NB81060T3|SPMFA-A25|RAIL|15|



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## **Integrated Power Functions** 

- 600 V - 10 A IGBT inverter for three phase DC / AC power conversion ( _Please refer to Figure 3_ ) 

## **Integrated Drive, Protection and System Control Functions** 

- For inverter high-side IGBTs: gate drive circuit, high-voltage isolated high-speed level shifting control circuit Under-Voltage Lock-Out (UVLO) protection 

Note: Available bootstrap circuit example is given in Figures 5 and 17 

- control circuit Under-Voltage Lock-Out (UVLO) protection 

- For inverter low-side IGBTs: gate drive circuit, Over Curent Pretection(OCP), Short-Circuit Protection (SCP) control supply circuit Under-Voltage Lock-Out (UVLO) protection 

- Fault signaling: corresponding to UVLO (low-side supply) and SC faults 

- Input interface: High-active interface, works with 3.3 / 5 V logic, Schmitt trigger input 

## **Pin Configuration** 

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(25) VBU<br>(1) P<br>(24) COM<br>(23) INUH<br>(2) U, VSU (22) INUL<br>(21) VDD<br>Case temperature (Tc)<br>(20) /SDU<br>Detecting point<br>(3) NU<br>(19) VBV<br>(4) V, VSV (18) INVH<br>(17) INVL<br>(16) VDD<br>(5) NV (15) /SDV<br>(14) VBW<br>(<br>(13) INWH<br>(12) INWL<br>(6) W, VSW (11) VDD<br>(10) Csc<br>(9) /FO,/SDW,VTS<br>(7) NW (8) COM<br>**----- End of picture text -----**<br>


## **Figure 2. Top View** 

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## **Pin Descriptions** 

|**Pin Number**|**Pin Name**|**Pin Description**|
|---|---|---|
|1|P|Positive DC-Link Input|
|2|U, VSU|Output for U Phase|
|3|NU|Negative DC-Link Input for U Phase|
|4|V, VSV|Output for V Phase|
|5|NV|Negative DC-Link Input for V Phase|
|6|W, VSW|Output for W Phase|
|7|NW|Negative DC-Link Input for W Phase|
|8|COM|Common Supply Ground|
|9|/FO, /SDW, VTS|Fault Output, Shut-Down Input for W Phase, Temperature Output of Drive IC|
|10|CSC|Shut Down Input for Over Current and Short Circuit Protection|
|11|VDD|Common Bias Voltage for IC and IGBTs Driving|
|12|INWL|Signal Input for Low-Side W Phase|
|13|INWH|Signal Input for High-Side W Phase|
|14|VBW|High-Side Bias Voltage for W-Phase IGBT Driving|
|15|/SDV|Shut-Down Input for V Phase|
|16|VDD|Common Bias Voltage for IC and IGBTs Driving|
|17|INVL|Signal Input for Low-Side V Phase|
|18|INVH|Signal Input for High-Side V Phase|
|19|VBV|High-Side Bias Voltage for V-Phase IGBT Driving|
|20|/SDU|Shut-Down Input for U Phase|
|21|VDD|Common Bias Voltage for IC and IGBTs Driving|
|22|INUL|Signal Input for Low-Side U Phase|
|23|INUH|Signal Input for High-Side U Phase|
|24|COM|Common Supply Ground|
|25|VBU|High-Side Bias Voltage for U-Phase IGBT Driving|



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**Internal Equivalent Circuit and Input/Output Pins** 

P VBU VB INUH HIN HO INUL LIN U,VSU VDD VS /SDU /SDVDDU COM COM LO ~~a.~~ NU INVBVHV VBHIN HO INVL LIN V,VSV VDD VDD VS /SDV /SDV COM LO Nv VBW VB INWH HIN HO INWL LIN VDD W,VSW VDD VS Csc Csc /FO, /SDW, VTS COM COM/FO, /SDW, VTS LO Nw 

**Figure 3. Internal Block Diagram** 

## **Note:** 

1. Inverter high-side is composed of three IGBTs, freewheeling diodes. 

2. Inverter low-side is composed of three IGBTs, freewheeling diodes. 

3. Inverter power side is composed of four inverter DC-link input terminals and three inverter output terminals. 

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## **Absolute Maximum Ratings** (TJ = 25°C,  unless otherwise specified.) 

## **Inverter Part** 

**Symbol Parameter Conditions Rating Unit** VPN Supply Voltage Applied between P - NU, NV, NW 450 V VPN(Surge) Supply Voltage (Surge) Applied between P - NU, NV, NW 500 V VCES Collector - Emitter Voltage 600 V ± IC Each IGBT Collector Current TC = 25°C, TJ ≤150°C  (Note 4) 10 A ± ICP Each IGBT Collector Current (Peak) TC = 25°C, TJ ≤150°C, Under 1 ms Pulse 20 A Width (Note 4) TJ Operating Junction Temperature -40 ~ 150 °C **Control Part Symbol Parameter Conditions Rating Unit** VDD Control Supply Voltage Applied between VDD - COM 20 V VBS High-Side Control Bias Voltage Applied between VBU - VSU, VBV - VSV, 20 V VBW - VSW VIN Input Signal Voltage Applied between INUH, INVH, INWH, INUL, -0.3 ~ VDD +0.3 V INVL, INWL - COM VFS Function Supply Voltage Applied between /FO, /SDW ,VTS - COM -0.3 ~ VDD +0.3 V IFO Fault Current Sink Current at /FO, /SDW ,VTS  pin 2 mA ~~zee~~ VSC Current Sensing Input Voltage Applied between CSC - COM -0.3 ~ VDD +0.3 V **Total System Symbol Parameter Conditions Rating Unit** VPN(PROT) Self Protection Supply Voltage Limit VDD = VBS = 13.5 ~ 16.5 V, TJ = 150°C, 400 V (Short Circuit Protection Capability) Non-Repetitive, < 2 s TC Module Case Operation Temperature _See Figure 2_ -40 ~ 125 °C TSTG Storage Temperature -40 ~ 125 °C VISO Isolation Voltage AC 60 Hz, Sinusoidal, 1 Minute, Connection 1500 Vrms Connect Pins to Heat Sink Plate Pins to Heat Sink Plate **Thermal Resistance Symbol Parameter Conditions Min. Typ. Max. Unit** Rth(j-c)Q Junction to Case Thermal Resistance Inverter IGBT part, (Per Module) - - 3.40 °C / W ~~SS~~ Rth(j-c)F (Note 4) Inverter FWDi part (Per Module) - - 3.86 °C / W **Note:** 4. These values had been made an acquisition by the calculation considered to design factor. ~~3~~ ©2016 Fairchild Semiconductor Corporation 5 FNB81060T3 Rev. 1.1 

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**Electrical Characteristics** (TJ = 25°C,  unless otherwise specified.) 

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Inverter Part<br>Symbol Parameter Conditions Min. Typ. Max. Unit<br>Re VCE(SAT) Collector - Emitter Saturation VDD = VBS = 15 V TJ = 25°C - 1.50 2.10 V<br>Voltage VIN = 5 V<br>ef IC = 8 A TJ = 150°C - 1.80 - V<br>VF FWDi Forward Voltage VIN = 0 V TJ = 25°C - 1.90 2.50 V<br>A IF = 8 A ee TJ = 150°C - 1.80 - V<br>HS | tON Switching Times VPN = 400 V, VDD = VBS = 15 V, I —— C = 10A a 0.25 ee a 0.75 ee 1.25 ee ee us<br>| tC(ON) TVJIN = 25°C = 0 V  5 V, Inductive load ee - 0.15 0.45 us<br>| tOFF (Note 5)  Pot - 0.50 1.00 us<br>tC(OFF) - 0.10 0.40 us<br>| trr im - 0.10 - us<br>LS 7 tON VPN = 400 V, VDD = VBS = 15 V, IC = 10A 0.25 0.75 | 1.25 | us |<br>| tCtOFF(ON) (Note 5)TVJIN = 25°C = 0 V  5 V, Inductive load P| -- 0.150.50  UT 0.451.00 usus<br>yy tC(OFF) P| - 0.10 fl 0.40 us<br>yy trr aa - 0.10 ee - us<br>yl ee<br>ICES Collector - Emitter Leakage VCE = VCES - - 1.00 mA<br>Current<br>Note:<br>5.   tON and tOFF include the propagation delay of the internal drive IC. tC(ON) and tC(OFF) are the switching time of IGBT itself under the given gate driving condition internally. For<br>the detailed information,  please see Figure 4.<br>HINx<br>LINx<br>trr<br>toff ton<br>100% ICx<br>ICx 90% ICx<br>10% V CEx<br>10% V CEx 10% ICx 10% ICx<br>v CEx<br>tc(off) tc(on)<br>Figure 4. Switching Time Definition<br>**----- End of picture text -----**<br>


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One-Leg Diagram of SPM 8 IC<br>P<br>CBS<br>VB HO LS Switching<br>H IN<br>HS Switching U,V,W VPN<br>VS V<br>LS Switching L IN Inductor 400V<br>V DD<br>5V VIN / F o, /SDw, VTS L O HS Switching<br>VDD 10kΩ<br>0V C sc<br>V C OM NU,V,W<br>+15V<br>+5V V<br>Figure 5. Example Circuit for Switching Test<br>500 Inductive Load, VPN = 300V, VDD=15V, TJ=25℃ 500 Inductive Load, VPN = 300V, VDD=15V, TJ=150℃<br> IGBT Turn-off, Eoff IGBT Turn-on, Eon  IGBT Turn-on IGBT Turn-off, Eoff, Eon<br>400 FRD Turn-off, Erec 400  FRD Turn-off, Erec<br>300 300<br>200 200<br>100 100<br>0 0<br>0 1 2 3 4 5 6 7 8 9 10 11 0 1 2 3 4 5 6 7 8 9 10 11<br>COLLECTOR CURRENT, IC [AMPERES] COLLECTOR CURRENT, IC [AMPERES]<br>Figure 6. Switching Loss Characteristics<br>4.8<br>  3.3V pull-up with 4.7kohm<br>  5V pull-up with 10kohm<br>4.3<br>PX<br>3.8 POA<br>3.3<br>PoP<br>2.8<br>PoKR<br>2.3<br>PoNpT N N<br>1.8<br>========5===<br>1.3<br>poBR<br>0 25 50 75 100 125 150<br>THVIC [ OC]<br> [uJ]  [uJ]<br>SW SW<br>SWITCHING LOSS E SWITCHING LOSS E<br> from Pin 9 [V]<br>TS<br>V<br>**----- End of picture text -----**<br>


**Figure 7. V-T Curve of Temperature Output of IC** 

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## **Control Part** 

|**Symbol**|**Parameter**|**Conditions**|**Conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|---|
|IQDD|Quiescent VDDSupply<br>Current|VDD= 15 V,<br>IN(UH,VH,WH,UL,VL,WL)= 0 V|VDD- COM|-|-|1.7|mA|
|IPDD|Operating VDDSupply<br>Current|VDD= 15 V, fPWM= 20 kHz, duty =<br>50%, applied to one PWM signal<br>input|VDD- COM|-|-|2.2|mA|
|IQBS|Quiescent VBSSupply<br>Current|VBS= 15 V, IN(UH, VH, WH)= 0 V|VBU- VSU, VBV-<br>VSV, VBW- VSW|-|-|100|A|
|IPBS|Operating VBSSupply<br>Current|VDD= VBS= 15 V, fPWM= 20 kHz,<br>duty = 50%, applied to one PWM<br>signal input for high - side|VBU- VSU, VBV-<br>VSV, VBW- VSW|-|-|600|A|
|VFOH|Fault Output Voltage|VSC= 0 V, /FO Circuit: 10 kto 5 V Pull-up||3.81|-|-|V|
|VFOL||VSC= 1 V, /FO Circuit: 10 kto 5 V Pull-up||-|-|0.5|V|
|VSC(ref)|Short-Circuit Trip Level|VDD= 15 V (Note 6)||0.46|0.49|0.52|V|
|UVDDD|Supply Circuit<br>Under-Voltage<br>Protection|Detection level||10.0|11.5|13.0|V|
|UVDDR||Reset level||10.5|12.0|13.5|V|
|UVBSD||Detection level||9.5|11.0|12.5|V|
|UVBSR||Reset level||10.0|11.5|13.0|V|
|IFO_T|HVIC Temperature<br>Sensing Current|VDD= VBS= 15 V, THVIC= 25°C||-|82.5|-|A|
|||VDD= VBS= 15 V, THVIC= 75°C||-|207.5|-|A|
|VFO_T|HVIC Temperature<br>Sensing Voltage<br>_See Figure 7_|VDD= VBS= 15 V, THVIC= 25°C, 10 kto 5 V Pull-up||-|4.18|-|V|
|||VDD= VBS= 15 V, THVIC= 75°C, 10 kto 5 V Pull-up||-|2.93|-|V|
|tFOD|Fault-Out Pulse Width|||40|-|-|s|
|VFSDR|Shut-down Reset level|Applied between /FO - COM||-|-|2.4|V|
|VFSDD|Shut-down Detection<br>level|||0.8|-|-|V|
|VIN(ON)|ON Threshold Voltage|Applied between INUH, INVH, INWH, INUL, INVL, INWL-<br>COM||-|-|2.4|V|
|VIN(OFF)|OFF Threshold Voltage|||0.8|-|-|V|



## **Note:** 

6. Short-circuit current protection function is for all six IGBTs if the /FO, /SDW, VTS  pin is connected to /SDx pins. 

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## **Bootstrap Diode Part** 

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Symbol Parameter Conditions Min. Typ. Max. Unit<br>RBS Bootstrap Diode  VDD = 15V, TJ = 25°C - 280 - <br>Resitance<br>0.06<br>0.05<br>0.04<br>0.03<br>0.02<br>0.01<br>T J =25  o C, VDD=15V<br>0.00<br>0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15<br>VF [V]<br> [A]IF<br>**----- End of picture text -----**<br>


## **Figure 8. Built-In Bootstrap Diode Charaterstics** 

## **Recommended Operating Conditions** 

|**Symbol**|**Parameter**|**Conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|VPN|Supply Voltage|Applied between P - NU, NV, NW|-|300|400|V|
|VDD|Control Supply Voltage|Applied between VDD- COM|14.0|15|16.5|V|
|VBS|High - Side Bias Voltage|Applied between VBU- VSU, VBV-VSV, VBW- VSW|13.0|15|18.5|V|
|dVDD/ dt,<br>dVBS/ dt|Control Supply Variation||-1|-|1|V /s|
|tdead|Blanking Time for<br>Preventing Arm - Short|For each input signal|0.5|-|-|s|
|VSEN|Voltage for Current<br>Sensing|Applied between NU, NV, NW- COM<br>(Including surge voltage)|-4||4|V|
|PWIN(ON)|Minimun Input Pulse<br>Width|VDD= VBS= 15 V, IC 20 A, Wiring Inductance<br>between NU, V, Wand DC Link N < 10nH (Note 7)|0.7|-|-|s|
|PWIN(OFF)|||0.7|-|-||



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## **Mechanical Characteristics and Ratings** 

|**Parameter**|**Conditions**|**Conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|
|Device Flatness|_See Figure 9_||-50|-|100|m|
|Mounting Torque|Mounting Screw: - M3<br>_See Figure 10_|Recommended 0.7 N • m|0.6|0.7|0.8|N • m|
|||Recommended 7.1 kg • cm|5.9|6.9|7.9|kg • cm|
|Weight|||-|5.0|-|g|



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Figure 9. Flatness Measurement Position<br>**----- End of picture text -----**<br>


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Pre – Screwing :  1   2<br>2 Final  Screwing :  2   1<br>**----- End of picture text -----**<br>


## **Figure 10. Mounting Screws Torque Order** 

## **Note:** 

8. Do not make over torque when mounting screws. Much mounting torque may cause package cracks, as well as bolts and Al heat-sink destruction. 

9. Avoid one side tightening stress. _Figure 10_ shows the recommended torque order for mounting screws. Uneven mounting can cause of package to be damaged. The pre-screwing torque is set to 20 ~ 30 % of maximum torque rating. 

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## **Time Charts of Protective Function** 

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Input Signal<br>Protection<br>RESET SET RESET<br>Circuit State<br>UVDDR<br>a1 a6<br>Control  UVDDD a3<br>Supply Voltage a ——<br>a2<br>a4 a7<br>Output Current | | | | | \ || |<br>Y | | } || “‘ ' |' : | |L<br>>)<br>: $$$—<br>a5<br>Fault Output Signal<br>Figure 11. Under-Voltage Protection (Low-Side)<br>a1 : Control supply voltage rises: After the voltage rises UVDDR, the circuits start to operate when next input is applied.<br>a2 : Normal operation: IGBT ON and carrying current.<br>a3 : Under voltage detection (UVDDD).<br>a4 : IGBT OFF in spite of control input condition.<br>a5 : Fault output operation starts.<br>a6 : Under voltage reset (UVDDR).<br>a7 : Normal operation: IGBT ON and carrying current.<br>Input Signal<br>tL Ls | r*<br>CO | a 7<br>Protection<br>RESET SET RESET<br>Circuit State —_— r<br>UVBSR NN<br>b1 b5<br>Control UVBSD b3<br>Supply Voltage b6<br>b2<br>b4 vy<br>mA () "OA<br>\ ~~ |<br>Output Current<br>a|_| L<br>SS High-level (no fault output) 4a<br>Fault Output Signal<br>Figure 12. Under-Voltage Protection (High-Side)<br>**----- End of picture text -----**<br>


- b1 : Control supply voltage rises: After the voltage reaches UVBSR, the circuits start to operate when next input is applied. b2 : Normal operation: IGBT ON and carrying current. 

- b3 : Under voltage detection (UVBSD). 

- b4 : IGBT OFF in spite of control input condition, but there is no fault output signal. 

- b5 : Under voltage reset (UVBSR) 

- b6 : Normal operation: IGBT ON and carrying current 

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Hin<br>Lin<br>d3 d4 d5<br>Ho<br>Hin : High-side Input Signal<br>d1 d2 Lin : Low-side Input Signal<br>Ho : High-side IGBT Gate Voltage<br>Lo<br>Lo : Low-side IGBT Gate Voltage<br>/Fo : Fault Output<br>/Fo<br>CO<br>Figure 13. Inter-Lock Function<br>d1 : High Side First - Input - First - Output Mode<br>d2 : Low Side Noise Mode : No LO d3 : High Side Noise Mode : No HO<br>d4 : Low Side First - Input - First - Output Mode<br>d5 : IN - Phase Mode : No HO<br>HIN<br>LIN<br>se<br>HO Smart Turn-off<br>Activated by next input<br>Soft Off after fault clear<br>LO<br>Over-Current<br>Detection No Output<br>CSC<br>/FO<br>**----- End of picture text -----**<br>


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 Figure 14. Fault-Out Function By Over Current Protection<br>**----- End of picture text -----**<br>


HIN : High-side Input Signal LIN :  Low-side Input Signal HO :  High-Side Output Signal LO :   Low-Side Output Signal CSC : Over Current Detection Input /FO : Fault Out Function 

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HIN<br>LIN<br>Activated by next<br>No Output input after fault  Smart<br>HO clear Turn-off<br>Soft Off<br>LO<br>CSC<br>/SDx External<br>shutdown input<br>**----- End of picture text -----**<br>


## **Figure 15. Shutdown Input Function By External Command** 

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HIN : High-side Input Signal<br>LIN :  Low-side Input Signal<br>HO :  High-Side Output Signal<br>LO :   Low-Side Output Signal<br>CSC : Over Current Detection Input<br>/SDx : Shutdown Input Function<br>**----- End of picture text -----**<br>


## **Input/Output Interface Circuit** 

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5  V  L in e  (M C U  o r C o n tro l p o w e r)<br>R P F  =   1 0k Ω S P M<br>IN U H , IN V H , IN W H<br>IN U L, IN V L , IN W L<br>M C U<br>/F O , /S D W , V T S<br>C O M<br>**----- End of picture text -----**<br>


## **Figure 16. Recommended MCU I/O Interface Circuit** 

## **Note:** 

10. RC coupling at each input (parts shown dotted) might change depending on the PWM control scheme used in the application and the wiring impedance of the application’s printed circuit board. The input signal section of the SPM 8 product integrates 5 k ( typ.) pull-down resistor. Therefore, when using an external filtering resistor, please pay attention to the signal voltage drop at input terminal. 

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15V VBU P<br>VB<br>HO<br>Gating UHGating UL RRSS CPS CPS CBS CBSC ININVCOM/SDDDUHULU COMHINLINV/SDDDU VSLO U,VSU<br>Nu<br>M VBV VB HO<br>CU Gating VHGating VL RRSS CPS CPS 5V CBS CBSC ININV/SDDDVHVLV /SDVCOMHINLINDDV VSLO V,VSNvV M CDCS VDC<br>VBU VB<br>HO<br>Gating WHGating WL RRSS CBS CBSC ININWHWL LINHIN VS W,VSW<br>Fault VDD VDD<br>A CPS CPS CPF CSP15 CSPC15 D RF CSC /Fo, /SDw, VCscCOM TS vo /Fo, /SDw, VCscCOM TS LO [i] Nw [a] RRSUSV A E [l] Power<br>B RSW GND Line<br>C<br>| Control<br>Input Signal for  W-Phase Current GND Line<br>Short-Circuit Protection V-Phase Current<br>U-Phase Current<br>**----- End of picture text -----**<br>


## **Figure 17. Typical Application Circuit** 

**Note:** 

11. To avoid malfunction, the wiring of each input should be as short as possible. (less than 2 ~ 3 cm) 

12. /FO is open-drain type. This signal line should be pulled up to the positive side of the MCU or control power supply with a resistor that makes IFO up to 1 mA. _Please refer to Figure 16._ 

13. CSP15 of around seven times larger than bootstrap capacitor CBS is recommended. 

14. Input signal is active-HIGH type. There is a 5 k resistor inside the IC to pull down each input signal line to GND. RC coupling circuits is recommanded  for the prevention of input signal oscillation. RSCPS time constant should be selected in the range 50 ~ 150 ns. (Recommended RS = 100 Ω , CPS = 1 nF) 

15. Each wiring pattern inductance of A point should be minimized (Recommend less than 10nH). Use the shunt resistor RS(U/V/W) of surface mounted (SMD) type to reduce wiring inductance. To prevent malfunction, wiring of point E should be connected to the terminal of the shunt resistor RS(U/V/W) as close as possible. 

16. To prevent errors of the protection function, the wiring of B, C, and D point should be as short as possible. 

17. In the short-circuit protection circuit, please select the RFCSC time constant in the range 1.5 ~ 2 s. Do enough evaluation on the real system because short-circuit protection time may very wiring pattem layout and value of the RF and CSC time constant. 

18. The connection between control GND line and power GND line which includes the NU, NV, NW must be connected to only one point. Please do not connect the control GND to the power GND by the broad pattern. Also, the wiring distance between control GND and power GND should be as short as possible. 

19. Each capacitor should be mounted as close to the pins of the Motion SPM 8 product as possible. 

20. To prevent surge destruction, the wiring between the smoothing capacitor and the P and GND pins should be as short as possible. The use of a high frequency non-inductive capacitor of around 0.1 ~ 0.22 F between the P and GND pins is recommended. 

21. Relays are used at almost every systems of electrical equipments of home appliances. In these cases, there  should be sufficient distance between the CPU and the relays. 

22. The zener diode or transient voltage suppressor should be adopted for the protection of ICs from the surge destruction between each pair of control supply terminals. 

- (Recommanded zener diode is 22 V / 1 W, which has the lower zener impedance characteristic than about 15 Ω ) 

23. Please choose the electrolytic capacitor with good temperature characteristic in CBS. Also, choose 0.1 ~ 0.2 F R-category ceramic capacitors with good temperature and frequency characteristics in CBSC. 

24. For the detailed information, please refer to the application notes. 

25. /FO and /SD must be connected as short as possible. 

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©2016 Fairchild Semiconductor Corporation FNB81060T3 Rev. 1.1 

www.fairchildsemi.com 

## **Detailed Package Outline Drawings (FNB81060T3, Long Lead)** 

**==> picture [444 x 484] intentionally omitted <==**

**----- Start of picture text -----**<br>
Max 0.80<br>0.50±0.10 18X<br>2.60 [±0.30]  5X<br>1.30 [±0.30]  12X<br>(1.70) (1.70)<br>22X1.30=28.60 [±0.30]<br>(0.55)<br>14.30±0.30 14.30±0.30<br>(0.70)<br>25 8<br>∅3.20 [±0.20]  2X<br>==<br>1 7<br>(3.00) (1.70) 2.90±0.20<br>am<br>13.00 [±0.30] 14.30 [±0.30] (9.50)<br>tt<br>32.00±0.20<br>NOTES: UNLESS OTHERWISE SPECIFIED<br>2.60±0.30    A) NO PACKAGING STANDARD APPLIES<br>   B) ALL DIMENSIONS ARE IN MILLIMETERS<br>3.90 [±0.30]  7X    C) DIMENSIONS ARE EXCLUSIVE OF BURRS,<br>        MOLD FLASH, AND TIE BAR EXTRUSIONS<br>Peer    D) (  ) IS REFERENCE<br>   E) DRAWING FILENAME: MOD25DAREV2<br>mini<br>0.60 [±0.10]  7X<br>1.30±0.30 Max 1.00<br>(R0.50)<br>(90°)<br>(0.45)<br>+0.10 -0.05<br>0.40<br>(11.70)<br>±0.25 (9.00) ±0.40 ±0.40<br>(11.44)<br>14.00 18.00 20.70<br>(0.45)<br>**----- End of picture text -----**<br>


_Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or data on the drawing and contact a FairchildSemiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide therm and conditions, specifically the the warranty therein, which covers Fairchild products._ 

_Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:_ 

_http://www.fairchildsemi.com/dwg/MO/MOD25DA.pdf_ 

15 

©2016 Fairchild Semiconductor Corporation FNB81060T3 Rev. 1.1 

www.fairchildsemi.com 

©2016 Fairchild Semiconductor Corporation 

www.fairchildsemi.com 

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