FNB35060T

## **Is Now Part of** 

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Dec. 2016 

## **FNB35060T Motion SPM[®] 3 Series** 

## **Features** 

- 600 V - 50 A 3-Phase IGBT Inverter with Integral Gate Drivers and Protection 

- Low-Loss, Short-Circuit Rated IGBTs 

- Very Low Thermal Resistance using AlN DBC Substrate 

- Built-In Bootstrap Diodes and Dedicated Vs Pins Simplify PCB Layout 

- Separate Open-Emitter Pins from Low-Side IGBTs for Three-Phase Current Sensing 

- Single-Grounded Power Supply 

- LVIC Temperature-Sensing Built-In for Temperature Monitoring 

## **General Description** 

FNB35060T is an advanced Motion SPM[®] 3 module providing a fully-featured, high-performance inverter output stage for AC Induction, BLDC, and PMSM motors. These modules integrate optimized gate drive of the built-in IGBTs to minimize EMI and losses, while also providing multiple on-module protection features including under-voltage lockouts, over-current shutdown, thermal monitoring of drive IC, and fault reporting. The built-in, high-speed HVIC requires only a single supply voltage and translates the incoming logic-level gate inputs to the high-voltage, high-current drive signals required to properly drive the module's internal IGBTs. Separate negative IGBT terminals are available for each phase to support the widest variety of control algorithms. 

- Isolation Rating: 2500 Vrms / 1 min. 

## **Applications** 

- Motion Control - Home Appliance / Industrial Motor 

## **Related Resources** 

- _AN-9088 - Motion SPM[®] 3 V6 Series Users Guide_ 

- _AN-9086 - SPM 3 Package Mounting Guide_ 

**Figure 1. 3D Package Drawing (Click to Activate 3D Content)** 

**Package Marking and Ordering Information Device Device Marking Package Packing Type Quantity** FNB35060T FNB35060T SPM27-RA Rail 10 ~~—~~ 

**1** 

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## **Integrated Power Functions** 

- 600 V - 50 A IGBT inverter for three-phase DC / AC power conversion (Please refer to Figure 3) 

## **Integrated Drive, Protection and System Control Functions** 

- For inverter high-side IGBTs: gate drive circuit, high-voltage isolated high-speed level shifting control circuit Under-Voltage Lock-Out Protection (UVLO) 

   - Note: Available bootstrap circuit example is given in Figures 5 and 15. 

- For inverter low-side IGBTs: gate drive circuit, Short-Circuit Protection (SCP) control supply circuit Under-Voltage Lock-Out Protection (UVLO) 

- Fault signaling: corresponding to UVLO (low-side supply) and SC faults 

- Input interface: active-HIGH interface, works with 3.3 / 5 V logic, Schmitt-trigger input 

## **Pin Configuration** 

**Figure 2. Top View** 

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## **Pin Descriptions** 

|**Pin Number**|**Pin Name**|**Pin Description**|
|---|---|---|
|1|VDD(L)|Low-Side Common Bias Voltage for IC and IGBTs Driving|
|2|COM|Common Supply Ground|
|3|IN(UL)|Signal Input for Low-Side U-Phase|
|4|IN(VL)|Signal Input for Low-Side V-Phase|
|5|IN(WL)|Signal Input for Low-Side W-Phase|
|6|VFO|Fault Output|
|7|VTS|Output for LVIC Temperature Sensing Voltage Output|
|8|CSC|Shut Down Input for Short-Circuit Current Detection Input|
|9|IN(UH)|Signal Input for High-Side U-Phase|
|10|VDD(H)|High-Side Common Bias Voltage for IC and IGBTs Driving|
|11|VB(U)|High-Side Bias Voltage for U-Phase IGBT Driving|
|12|VS(U)|High-Side Bias Voltage Ground for U-Phase IGBT Driving|
|13|IN(VH)|Signal Input for High-Side V-Phase|
|14|VDD(H)|High-Side Common Bias Voltage for IC and IGBTs Driving|
|15|VB(V)|High-Side Bias Voltage for V-Phase IGBT Driving|
|16|VS(V)|High-Side Bias Voltage Ground for V Phase IGBT Driving|
|17|IN(WH)|Signal Input for High-Side W-Phase|
|18|VDD(H)|High-Side Common Bias Voltage for IC and IGBTs Driving|
|19|VB(W)|High-Side Bias Voltage for W-Phase IGBT Driving|
|20|VS(W)|High-Side Bias Voltage Ground for W-Phase IGBT Driving|
|21|NU|Negative DC-Link Input for U-Phase|
|22|NV|Negative DC-Link Input for V-Phase|
|23|NW|Negative DC-Link Input for W-Phase|
|24|U|Output for U-Phase|
|25|V|Output for V-Phase|
|26|W|Output for W-Phase|
|27|P|Positive DC-Link Input|



**3** 

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## **Internal Equivalent Circuit and Input/Output Pins** 

|(20) VS(W)<br>(19)VB(W)<br>VDD<br>VB<br>OUT<br>COM<br>VS<br>IN<br>(18)VDD(H)<br>(17) IN(WH)|(20) VS(W)<br>(19)VB(W)<br>VDD<br>VB<br>OUT<br>COM<br>VS<br>IN<br>(18)VDD(H)<br>(17) IN(WH)|(20) VS(W)<br>(19)VB(W)<br>VDD<br>VB<br>OUT<br>COM<br>VS<br>IN<br>(18)VDD(H)<br>(17) IN(WH)|(20) VS(W)<br>(19)VB(W)<br>VDD<br>VB<br>OUT<br>COM<br>VS<br>IN<br>(18)VDD(H)<br>(17) IN(WH)|(20) VS(W)<br>(19)VB(W)<br>VDD<br>VB<br>OUT<br>COM<br>VS<br>IN<br>(18)VDD(H)<br>(17) IN(WH)||P(27)|P(27)|P(27)|P(27)|P(27)||
|---|---|---|---|---|---|---|---|---|---|---|---|
||||||||W (26)<br>|||||
|(18)VDD(H)||||||||||||
|(17) IN(WH)||||||||||||
|||||||||||||
|(20) VS(W)||||||||||||
|||||||||||V(25)||
|(15) VB(V)||||||||||||
|<br>(14)VDD(H)||||VDD<br>VB<br>OUT<br>COM<br>VS<br>IN||||||||
|(13) IN(VH)||||||||||||
|||||||||||||
|(16) VS(V)<br>(11)VB(U)|||VB<br>VS<br>OUT<br>IN<br>COM<br>VDD|||||||U(24)<br>||
|(10) VDD(H)||||||||||||
|(9) IN(UH)||||||||||||
|||||||||||||
|(12) VS(U)||||||||||||
|||||||||||||
|(8)CSC||||||||||||
|||||||||||||
|(7) VTS||||||||||||
|(6)VFO||||||||||||
|||||||||||||
|(5) IN(WL)||||||||||||
|(4) IN(VL)||||||||||||
|(3) IN(UL)||||||||||||
|||||||||||||
|(2) COM||||||||||||
|(1) VDD(L)||||||||||||
|||||||||||||



## **Figure 3. Internal Block Diagram** 

## **Notes:** 

1. Inverter low-side is composed of three IGBTs, freewheeling diodes for each IGBT, and one control IC. It has gate drive and protection functions. 

2. Inverter power side is composed of four inverter DC-link input terminals and three inverter output terminals. 

3. Inverter high-side is composed of three IGBTs, freewheeling diodes, and three drive ICs for each IGBT. 

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## **Absolute Maximum Ratings** (TJ = 25°C,  Unless Otherwise Specified) 

## **Inverter Part** 

|**Symbol**|**Parameter**|**Conditions**|**Rating**|**Unit**|
|---|---|---|---|---|
|VPN|Supply Voltage|Applied between P - NU, NV, NW|450|V|
|VPN(Surge)|Supply Voltage (Surge)|Applied between P - NU, NV, NW|500|V|
|VCES|Collector - Emitter Voltage||600|V|
|± IC|Each IGBT Collector Current|TC= 25°C, TJ 150°C (Note 4)|50|A|
|± ICP|Each IGBT Collector Current (Peak)|TC= 25°C, TJ 150°C, Under 1 ms Pulse<br>Width (Note 4)|100|A|
|PC|Collector Dissipation|TC= 25°C per One Chip (Note 4)|367|W|
|TJ|Operating Junction Temperature||-40 ~ 150|°C|



## **Control Part** 

|**Symbol**|**Parameter**|**Conditions**|**Rating**|**Unit**|
|---|---|---|---|---|
|VDD|Control Supply Voltage|Applied between VDD(H), VDD(L) - COM|20|V|
|VBS|High-Side Control Bias Voltage|Applied between VB(U)- VS(U), VB(V)- VS(V),<br>VB(W)- VS(W)|20|V|
|VIN|Input Signal Voltage|Applied between IN(UH), IN(VH), IN(WH),<br>IN(UL), IN(VL), IN(WL)- COM|-0.3 ~ VDD+0.3|V|
|VFO|Fault Output Supply Voltage|Applied between VFO- COM|-0.3 ~ VDD+0.3|V|
|IFO|Fault Output Current|Sink Current at VFOpin|2|mA|
|VSC|Current Sensing Input Voltage|Applied between CSC- COM|-0.3 ~ VDD+0.3|V|



## **Bootstrap Diode Part** 

|**Symbol**|**Parameter**|**Conditions**|**Conditions**|**Rating**|**Rating**|**Rating**|**Unit**|
|---|---|---|---|---|---|---|---|
|VRRM|Maximum Repetitive Reverse Voltage|||600|||V|
|IF|Forward Current|TC= 25°C, TJ 150°C (Note 4)||0.5|||A|
|IFP|Forward Current (Peak)|TC= 25°C, TJ 150°C, Under 1 ms Pulse<br>Width (Note 4)||2.0|||A|
|TJ|Operating Junction Temperature|||-40 ~ 150|||°C|
|**Total System**||||||||
|**Symbol**|**Parameter**|**Conditions**||**Rating**|||**Unit**|
|VPN(PROT)|Self Protection Supply Voltage Limit<br>(Short Circuit Protection Capability)|VDD= VBS= 13.5 ~ 16.5 V, TJ= 150°C,<br>Non-repetitive, < 2s||400|||V|
|TC|Module Case Operation Temperature|_See Figure 2_||-40 ~ 125|||°C|
|TSTG|Storage Temperature|||-40 ~ 125|||°C|
|VISO|Isolation Voltage|60 Hz, Sinusoidal, AC 1 minute, Connection<br>Pins to Heat Sink Plate||2500|||Vrms|
|**Thermal Resistance**||||||||
|**Symbol**|**Parameter**|**Conditions**|**Min.**|**Typ.**|**Max.**|**Unit**||
|Rth(j-c)Q|Junction to Case Thermal Resistance<br>(Note 5)|Inverter IGBT part (per 1 / 6 module)|-|-|0.34|°C / W||
|Rth(j-c)F||Inverter FWD part (per 1 / 6 module)|-|-|0.93|°C / W||



## **Note:** 

4.  These values had been made an acquisition by the calculation considered to design factor. 

5.  For the measurement point of case temperature (TC), _please refer to Figure 2._ 

**5** 

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**Electrical Characteristics** (TJ = 25°C, Unless Otherwise Specified) 

## **Inverter Part** 

|**Inverter Part**|**Inverter Part**||||||||
|---|---|---|---|---|---|---|---|---|
|**Symbol**||**Parameter**|**Conditions**||**Min.**|**Typ.**|**Max.**|**Unit**|
|VCE(SAT)||Collector - Emitter Saturation<br>Voltage|VDD= VBS= 15 V<br>VIN= 5 V|IC= 50 A, TJ= 25°C|-|1.65|2.25|V|
||VF|FWDi Forward Voltage|VIN= 0 V|IF= 50 A, TJ= 25°C|-|1.90|2.50|V|
|HS|tON|Switching Times|VPN= 300 V, VDD= 15 V, IC= 50 A<br>TJ= 25°C<br>VIN= 0 V5 V, Inductive Load<br>_See Figure 5_<br>(Note 6)||0.80|1.20|1.80|s|
||tC(ON)||||-|0.30|0.75|s|
||tOFF||||-|1.25|1.75|s|
||tC(OFF)||||-|0.15|0.50|s|
||trr||||-|0.15|-|s|
|LS|tON||VPN= 300 V, VDD= 15 V, IC= 50 A<br>TJ= 25°C<br>VIN= 0 V5 V, Inductive Load<br>_See Figure 5_<br>(Note 6)||0.65|1.05|1.65|s|
||tC(ON)||||-|0.30|0.75|s|
||tOFF||||-|1.30|1.80|s|
||tC(OFF)||||-|0.25|0.60|s|
||trr||||-|0.15|-|s|
||ICES|Collector - Emitter Leakage<br>Current|VCE= VCES||-|-|5|mA|
|**Note:**<br>6.   tON <br>For|and tOFFinclude the propagation delay time of the intern<br>the detailed information,_please see Figure 4_.||al drive IC. tC(ON)and tC(OFF)are the switching time of IGBT its||elf under the given gate driving condition internally.||||



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100% IC 100% IC<br>trr<br>V CE IC IC V CE<br>V IN V IN<br>tON tOFF<br>tC(ON) tC(OFF)<br>10% IC<br>V IN(ON) 90% IC 10% V CE V IN(OFF) 10% V CE 10% IC<br>(a) turn-on (b) turn-off<br>**----- End of picture text -----**<br>


**Figure 4. Switching Time Definition** 

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One-Leg Diagram of SPM 3 IC<br>l geea<br>P<br>CBS VDD(H) VB<br>COM(H) OUT( H) LS Switching<br>IN(H) VS<br>HS Switching een VPN<br>U,V,W<br>V<br>LS Switching ono p IN(L) s 6 Inductor $009 | C) 300V<br>VDD(L)<br>5V VIN V oot DD 4.7kΩ VFOVTS OUT(L) HS Switching<br>0V CSC<br>V COM(L) NU,V,W<br>+15V<br>V<br>+5V<br>‘ Ss<br>**----- End of picture text -----**<br>


**Figure 5. Example Circuit for Switching Test** 

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4000 Inductive Load, VPN = 300V, VDD=15V, TJ=25℃ 4000 Inductive Load, VPN = 300V, VDD=15V, TJ=150℃<br> IGBT Turn-on, Eon  IGBT Turn-on, Eon<br>3500  IGBT Turn-off, Eoff 3500  IGBT Turn-off, Eoff<br>FRD Turn-off, Erec  FRD Turn-off, Erec<br>3000 3000<br>2500 2500<br>2000 2000<br>1500 1500<br>1000 1000<br>500 500<br>0 0<br>0 10 20 30 40 50 0 10 20 30 40 50<br>COLLECTOR CURRENT, IC [AMPERES] COLLECTOR CURRENT, IC [AMPERES]<br> [uJ]  [uJ]<br>SW SW<br>SWITCHING LOSS E SWITCHING LOSS E<br>**----- End of picture text -----**<br>


**Figure 6. Switching Loss Characteristics** 

**Figure 7. Temperature Profile of VTS (Typical)** 

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|**Bootstrap Diode Part**|**Bootstrap Diode Part**|||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**||**Conditions**||**Min.**|**Typ.**||**Max.**||**Unit**||
|VF|Forward Voltage||IF= 0.1 A, TJ= 25°C||-|2.5||-||V||
|trr|Reverse Recovery Time||IF= 0.1 A, dIF / dt = 50 A / s, TJ= 25°C||-|80||-||ns||
|**Control Part**||||||||||||
|**Symbol**|**Parameter**|**Conditions**|||**Min.**||**Typ.**||**Max.**||**Unit**|
|IQDDH|Quiescent VDDSupply<br>Current|VDD(H)= 15 V,<br>IN(UH,VH,WH)= 0 V||VDD(H)- COM|-||-||0.50||mA|
|IQDDL||VDD(L)= 15 V,<br>IN(UL,VL, WL)= 0 V||VDD(L)- COM|-||-||6.00||mA|
|IPDDH|Operating VDDSupply<br>Current|VDD(H)= 15 V, fPWM= 20 kHz,<br>duty = 50%, applied to one<br>PWM signal input for High-<br>Side||VDD(H)- COM|-||-||0.60||mA|
|IPDDL||VDD(L)= 15 V, fPWM= 20 kHz,<br>duty = 50%, applied to one<br>PWM signal input for Low-<br>Side||VDD(L)- COM|-||-||11.0||mA|
|IQBS|Quiescent VBSSupply<br>Current|VBS= 15 V,<br>IN(UH, VH, WH)= 0 V||VB(U)- VS(U),<br>VB(V)- VS(V),<br>VB(W)- VS(W)|-||-||0.30||mA|
|IPBS|Operating VBSSupply<br>Current|VDD= VBS= 15 V,<br>fPWM= 20 kHz, duty = 50%,<br>applied to one PWM signal<br>input for High-Side||VB(U)- VS(U),<br>VB(V)- VS(V),<br>VB(W)- VS(W)|-||-||5.50||mA|
|VFOH|Fault Output Voltage|VDD= 15 V, VSC= 0 V, VFOCircuit: 4.7 kto 5 V<br>Pull-up|||4.5||-||-||V|
|VFOL||VDD= 15 V, VSC= 1 V, VFOCircuit: 4.7 kto 5 V<br>Pull-up|||-||-||0.5||V|
|VSC(ref)|Short Circuit Trip Level|VDD= 15 V (Note 7)||CSC- COM(L)|0.45||0.50||0.55||V|
|UVDDD|Supply Circuit Under-<br>Voltage Protection|Detection Level|||9.8||-||13.3||V|
|UVDDR||Reset Level|||10.3||-||13.8||V|
|UVBSD||Detection Level|||9.0||-||12.5||V|
|UVBSR||Reset Level|||9.5||-||13.0||V|
|tFOD|Fault-Out Pulse Width||||50||-||-||s|
|VTS|LVIC Temperature<br>Sensing Voltage Output|VDD(L)= 15 V, TLVIC= 25°C (Note 8)<br>_See Figure 7_|||540||640||740||mV|
|VIN(ON)|ON Threshold Voltage|Applied between IN(UH, VH, WH)- COM,<br>IN(UL, VL, WL)- COM|||-||-||2.6||V|
|VIN(OFF)|OFF Threshold Voltage||||0.8||-||-||V|



## **Note:** 

7. Short-circuit current protection is functioning only at the low-sides. 

8. TLVIC is the temperature of LVIC itself. VTS is only for sensing temperature of LVIC and can not shutdown IGBTs automatically. 

**8** 

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## **Recommended Operating Conditions** 

|**Symbol**|**Parameter**|**Conditions**|**Value**|**Value**|**Value**|**Unit**|
|---|---|---|---|---|---|---|
||||**Min.**|**Typ.**|**Max.**||
|VPN|Supply Voltage|Applied between P - NU, NV, NW|-|300|400|V|
|VDD|Control Supply Voltage|Applied between VDD(H)- COM, VDD(L)- COM|14.0|15|16.5|V|
|VBS|High-Side Bias Voltage|Applied between VB(U)- VS(U), VB(V)- VS(V), VB(W)-<br>VS(W)|13.0|15|18.5|V|
|dVDD/ dt,<br>dVBS/ dt|Control Supply<br>Variation||- 1|-|1|V /s|
|tdead|Blanking Time for<br>Preventing Arm - Short|For Each Input Signal|2.0|-|-|s|
|fPWM|PWM Input Signal|-40CTC 125°C, -40CTJ 150°C|-|-|20|kHz|
|VSEN|Voltage for Current<br>Sensing|Applied between NU, NV, NW- COM<br>(Including Surge Voltage)|- 5||5|V|
|PWIN(ON)|Minimum Input Pulse<br>Width|VDD= VBS= 15 V, IC 100 A, Wiring Inductance<br>between NU, V, Wand DC Link N < 10nH (Note 9)|2.5|-|-|s|
|PWIN(OFF)|||2.5|-|-||
|TJ|Junction Temperature||- 40|-|150|C|



## **Note:** 

9. This product might not make response if input pulse width is less than the recommanded value. 

**==> picture [396 x 262] intentionally omitted <==**

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50<br>40<br>f  = 5 kHz<br>SW<br>30<br>f  = 15 kHz<br>20 SW<br>V DC = 300 V, V DD = V BS = 15 V<br>10 T j = 150 ℃ , T C  = 125 ℃<br>M.I. = 0.9, P.F. = 0.8<br>Sinusoidal PWM<br>0<br>0 20 40 60 80 100 120 140<br>Case Temperature, T C [ ℃ ]<br>Figure 8. Allowable Maximum Output Current<br>]rms<br> [A<br>Orms<br>Allowable Output Current, I<br>**----- End of picture text -----**<br>


## **Note:** 

10. This allowable output current value is the reference data for the safe operation of this product. This may be different from the actual application and operating condition. 

**9** 

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## **Mechanical Characteristics and Ratings** 

|**Parameter**|**Conditions**|**Conditions**|**Limits**|**Limits**|**Limits**|**Unit**|
|---|---|---|---|---|---|---|
||||**Min.**|**Typ.**|**Max.**||
|Device Flatness|_See Figure 9_||0|-|+150|m|
|Mounting Torque|Mounting Screw: M3<br>_See Figure 10_|Mounting Screw: M3<br>Recommended 0.7 N • m<br>Recommended 7.1 kg • cm|0.6|0.7|0.8|N • m|
||||6.2|7.1|8.1|kg • cm|
|Terminal Pulling Strength|Load 19.6 N||10|-|-|s|
|Terminal Bending Strength|Load 9.8 N, 90 deg. bend||2|-|-|times|
|Weight|||-|15|-|g|



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( + )<br>|<br>Lo mune i<br>( + )<br>**----- End of picture text -----**<br>


**Figure 9. Flatness Measurement Position** 

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2<br>**----- End of picture text -----**<br>


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Pre - Screwing : 1     2<br>Final Screwing : 2     1<br>**----- End of picture text -----**<br>


## **Figure 10. Mounting Screws Torque Order** 

## **Note:** 

11. Do not make over torque when mounting screws. Much mounting torque may cause DBC cracks, as well as bolts and Al heat-sink destruction. 

12. Avoid one-sided tightening stress. Figure 10 shows the recommended torque order for mounting screws. Uneven mounting can cause the DBC substrate of package to be damaged. The pre-screwing torque is set to 20 ~ 30% of maximum torque rating. 

**10** 

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## **Time Charts of SPMs Protective Function** 

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Input Signal<br>Protection<br>RESET SET RESET<br>Circuit State<br>UVDDR<br>a1 a6<br>Control  UVDDD a3<br>Supply Voltage<br>a2<br>a4 a7<br>Output Current<br>a5<br>Fault Output Signal<br>**----- End of picture text -----**<br>


## **Figure 11. Under-Voltage Protection (Low-Side)** 

a1 : Control supply voltage rises: After the voltage rises UVDDR, the circuits start to operate when next input is applied. 

- a2 : Normal operation: IGBT ON and carrying current. 

a3 : Under voltage detection (UVDDD). 

a4 : IGBT OFF in spite of control input condition. 

a5 : Fault output operation starts with a fixed pulse width. 

a6 : Under voltage reset (UVDDR). 

a7 : Normal operation: IGBT ON and carrying current by triggering next signal from LOW to HIGH. 

**==> picture [344 x 163] intentionally omitted <==**

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Input Signal<br>Protection<br>RESET SET RESET<br>Circuit State<br>UVBSR<br>b1 b5<br>Control  UVBSD b3<br>Supply Voltage b6<br>b2<br>b4<br>Output Current<br>High-level (no fault output)<br>**----- End of picture text -----**<br>


## Fault Output Signal 

## **Figure 12. Under-Voltage Protection (High-Side)** 

- b1 : Control supply voltage rises: After the voltage reaches UVBSR, the circuits start to operate when next input is applied. 

- b2 : Normal operation: IGBT ON and carrying current. 

- b3 : Under voltage detection (UVBSD). 

- b4 : IGBT OFF in spite of control input condition, but there is no fault output signal. 

- b5 : Under voltage reset (UVBSR). 

- b6 : Normal operation: IGBT ON and carrying current by triggering next signal from LOW to HIGH. 

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**----- Start of picture text -----**<br>
Lower arms<br>control input c6 c7<br>Protection<br>Circuit state SET RESET<br>Internal IGBT c4<br>Gate-Emitter Voltage c3<br>c2 Internal delay<br>at protection circuit<br>SC current trip level<br>c8<br>c1<br>Output Current<br>Sensing Voltage SC Reference Voltage<br>of sense resistor<br>RC Filter circuit<br>Fault Output Signal c5 time constant<br>delay<br>**----- End of picture text -----**<br>


## **Figure 13. Short-Circuit Current Protection (Low-Side Operation only)** 

(with the external sense resistance and RC filter connection) 

- c1 : Normal operation: IGBT ON and carrying current. 

- c2 : Short circuit current detection (SC trigger). 

- c3 : All low-side IGBT’s gate are hard interrupted. 

- c4 : All low-side IGBTs turn OFF. 

- c5 : Fault output operation starts with a fixed pulse width. 

- c6 : Input HIGH: IGBT ON state, but during the active period of fault output the IGBT doesn’t turn ON. 

- c7 : Fault output operation finishes, but IGBT doesn’t turn on until triggering next signal from LOW to HIGH. 

- c8 : Normal operation: IGBT ON and carrying current. 

## **Input/Output Interface Circuit** 

**==> picture [370 x 128] intentionally omitted <==**

**----- Start of picture text -----**<br>
+5V (MCU or Control power)<br>4.7 kΩ SPM<br>IN(UH) , IN(VH) , IN(WH)<br>IN(UL) , IN(VL) , IN(WL)<br>MCU VFO<br>COM<br>**----- End of picture text -----**<br>


## **Figure 14. Recommended CPU I/O Interface Circuit** 

## **Note:** 

13. RC coupling at each input might change depending on the PWM control scheme used in the application and the wiring impedance of the application’s printed circuit board. The input signal section of the Motion SPM 3 product integrates 5 k ( typ.) pull-down resistor. Therefore, when using an external filtering resistor, please pay attention to the signal voltage drop at input terminal. 

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**----- Start of picture text -----**<br>
Gating WH R1 (17) IN(WH) IN P (27)<br>(18) VDD(H) VDD<br>C4 COM OUT<br>D2 C3 C4 (19) V(20) VS(W)B(W) VB VS W (26)<br>Gating VH R1 (13) IN(VH) IN<br>(14) VDD(H) VDD<br>C4 COM OUT<br>D2 C3 C4 (15) V(16) VB(V)S(V) VB VS V (25) M<br>M Gating UH R1 (9) IN(UH) IN<br>C1 C1 C1 C 4 (10) VDD(H) COMVDD OUT C7 VDC<br>C 5V line D2 C3 C4 (12) V(11) VS(U)B(U) VB VS U (24)<br>U<br>VTS R3<br>B D R6 C6 (8) CSC CSC OUT<br>Fault R1 C5 (7) V(6) VTSFO VVTSFO NW (23) R4 A<br>Gating WL R1 (5) IN(WL) IN OUT<br>Gating ULGating VL C1 RR11 C1 C1 C1 C1 15V line (1) V(4) IN(3) IN(2) COMDD(L)(VL)(UL) ININCOMVDD OUT NNVU (22) (21) RR44 E GND LinePower<br>D2 C2 C4<br>C<br>W-Phase Current R5 Control<br>Input Signal for  V-Phase Current R5 GND Line<br>Short-Circuit Protection R5<br>U-Phase Current<br>C5 C5 C5<br>a=<br>**----- End of picture text -----**<br>


## **Figure 15. Typical Application Circuit** 

## **Note:** 

14. To avoid malfunction, the wiring of each input should be as short as possible. (less than 2 - 3 cm) 

15. VFO output is open-drain type. This signal line should be pulled up to the positive side of the MCU or control power supply with a resistor that makes IFO up to 2 mA. Please refer to Figure 14. 

16. Input signal is active-HIGH type. There is a 5 k resistor inside the IC to pull-down each input signal line to GND. RC coupling circuits should be adopted  for the prevention of input signal oscillation. R1C1 time constant should be selected in the range 50 ~ 150 ns. (Recommended R1 = 100 Ω , C1 = 1 nF) 

17. Each wiring pattern inductance of A point should be minimized (Recommend less than 10nH). Use the shunt resistor R4 of surface mounted (SMD) type to reduce wiring inductance. To prevent malfunction, wiring of point E should be connected to the terminal of the shunt resistor R4 as close as possible. 

18. To prevent errors of the protection function, the wiring of B, C, and D point should be as short as possible. 

19. In the short-circuit protection circuit, please select the R6C6 time constant in the range 1.5 ~ 2 s. Do enough evaluaiton on the real system because short-circuit protection time may vary wiring pattern layout and value of the R6C6 time constant. 

20. Each capacitor should be mounted as close to the pins of the Motion SPM[®] 3 product as possible. 

21. To prevent surge destruction, the wiring between the smoothing capacitor C7 and the P & GND pins should be as short  as possible. The use of a high-frequency non-inductive capacitor of around 0.1 ~ 0.22 F between the P & GND pins is recommended. 

22. Relays are used at almost every systems of electrical equipments at industrial application. In these cases, there  should be sufficient distance between the CPU and the relays. 

23. The zener diode or transient voltage suppressor should be adopted for the protection of ICs from the surge destruction between each pair of control supply terminals (Recommanded zener diode is 22 V / 1 W, which has the lower zener impedance characteristic than about 15 Ω ). 

24. C2 of around 7 times larger than bootstrap capacitor C3 is recommended. 

25. Please choose the electrolytic capacitor with good temperature characteristic in C3. Also, choose 0.1 ~ 0.2 F R-category ceramic capacitors with good temperature and frequency characteristics in C4. 

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## **Detailed Package Outline Drawings (FNB35060T)** 

_Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or data on the drawing and contact a FairchildSemiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide therm and conditions, specifically the the warranty therein, which covers Fairchild products._ 

_Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:_ 

_http://www.fairchildsemi.com/dwg/MO/MOD27BA.pdf_ 

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