FJ3303010L
Power MOSFET, P Channel, 30 V, 100 mA, 4 ohm, SOT-723, Surface Mount
- Manufacturer: PANASONIC
- Product type: Single MOSFETs
- No. of Pins: 3Pins
- Channel Type: P Channel
- Power Dissipation: 100mW
- Transistor Mounting: Surface Mount
- Transistor Polarity: P Channel
- Power Dissipation Pd: 100mW
- Rds(on) Test Voltage: 4V
- On Resistance Rds(on): 4ohm
- Transistor Case Style: SOT-723
- Drain Source Voltage Vds: 30V
- Operating Temperature Max: 85°C
- Continuous Drain Current Id: 100mA
- Drain Source On State Resistance: 4ohm
- Gate Source Threshold Voltage Max: 1V
| Delivery and price | |
|---|---|
| Units per pack | 1 |
| Price | 0.024 € |
| Current stock | 10+ |
| Lead time | 30 days |
Doc No. TT4-EA-12653 Revision. 3 ## Product Standards MOS FET FJ3303010L ## FJ3303010L ## Silicon P-channel MOSFET For switching FJ350301 in SSSMini3 type package ## Features - Low drive voltage : 2.5 V drive - Halogen-free / RoHS compliant **==> picture [64 x 36] intentionally omitted <==** - (EU RoHS / UL-94 V-0 / MSL:Level 1 compliant) ## Marking Symbol : U1 ## Packaging Embossed type (Thermo-compression sealing) :10 000 pcs / reel (standard) ## Absolute Maximum Ratings Ta = 25C |Absolute Maximum Ratings Ta = 25|C||| |---|---|---|---| |Parameter|Symbol|Rating|Unit| |Drain-source voltage|VDS|-30|V| |Gate-source voltage|VGS|12|V| |Drain current|ID|-100|mA| |Pulse drain current|IDp|-200|mA| |Totalpower dissipation|PD|100|mW| |Channel temperature|Tch|150|C| |Operatingambient temperature|Topr|-40<br>to +85|| |Storage temperature|Tstg|+150<br>-55 to|| **==> picture [155 x 480] intentionally omitted <==** **----- Start of picture text -----**<br> Unit : mm<br>1.2<br>0.3 0.13<br>3<br>1 2<br>0.2 0.52<br>(0.4) (0.4)<br>0.8<br>1. Gate<br>2. Source<br>3. Drain<br>Panasonic SSSMini3-F2-B<br>JEITA SC-105AA<br>Code SOT-723<br>Internal Connection<br>(D)<br>3<br>1 2<br>(G) (S)<br>Pin Name<br>1. Gate<br>2. Source<br>3. Drain<br>0.8 1.2<br>**----- End of picture text -----**<br> **==> picture [154 x 48] intentionally omitted <==** Page 1 of 5 Established : 2010-06-25 Revised : 2013-10-10 Doc No. TT4-EA-12653 Revision. 3 Product Standards ## MOS FET FJ3303010L ## Electrical Characteristics Ta = 25C 3C |Electrical Characteristics Ta = 25C|3C|||||| |---|---|---|---|---|---|---| |Parameter|Symbol|Conditions|Min|Typ|Max|Unit| |Drain-source breakdown voltage|VDSS|ID = -1 mA,VGS = 0|-30|||V| |Drain-source cutoff current|IDSS|VDS = -30 V,VGS = 0|||-1.0|A| |Gate-source cutoff current|IGSS|VGS =10 V,VDS = 0|||10|A| |Gate threshold voltage|VTH|ID = -1.0A,VDS = -3.0 V|-0.5|-1.0|-1.5|V| |Drain-source ON resistance|RDS(on)1|ID = -10 mA,VGS = -2.5 V||7|17|| ||RDS(on)2|ID = -10 mA,VGS = -4.0 V||4|7|| |Forward transfer admittance||Yfs||ID = -10 mA,VDS = -3.0 V|20|40||mS| |Input capacitance|Ciss|VDS = -3 V, VGS = 0, f = 1 MHz||12||pF| |Output capacitance|Coss|||7||pF| |Reverse transfer capacitance|Crss|||3||pF| |Turn-on time*1|ton|ID = -10 mA<br>VDD = -3 V, VGS = 0 to -3 V||100||ns| |Turn-off time*1|toff|VDD = -3 V, VGS = -3 to 0 V<br>ID = -10 mA||100||ns| Note) 1. Measuring methods are based on JAPANESE INDUSTRIAL STANDARD JIS C 7030 Measuring methods for transistors. 2. *1 Turn-on and Turn-off test circuit **==> picture [445 x 206] intentionally omitted <==** **----- Start of picture text -----**<br> VDD=-3V<br>10 % ID=-10mA<br>RL=300Ω<br>Vin<br>90 %<br>D Vout<br>Vin<br>VGS=0~-3V<br>G<br>90 %<br>Vout 50Ω<br>10 %<br>S<br>t(on) t(off)<br>**----- End of picture text -----**<br> Page 2 of 5 Established : 2010-06-25 Revised : 2013-10-10 Doc No. TT4-EA-12653 Revision. 3 Product Standards ## MOS FET FJ3303010L **==> picture [40 x 9] intentionally omitted <==** **----- Start of picture text -----**<br> ID - VDS<br>**----- End of picture text -----**<br> **==> picture [220 x 599] intentionally omitted <==** **----- Start of picture text -----**<br> -0.1<br>VGS = -1.5 V -2.0 V<br>-0.08<br>-0.06<br>-2.5 V<br>-0.04<br>-0.02<br>-4.0 V<br>0<br>0 -0.2 -0.4 -0.6 -0.8 -1<br>Drain-source Voltage VDS (V)<br>VDS - VGS<br>-1<br>-20 mA<br>-0.5<br>-5 mA<br>-10 mA<br>0<br>0 -1 -2 -3 -4 -5 -6<br>Gate-source Voltage VGS (V)<br>Capacitance - VDS<br>100<br>Ciss<br>10<br>Coss<br>Crss<br>1<br>-0.1 -1 -10 -100<br>Drain-source Voltage VDS (V)<br>Drain current ID (A)<br>Drain-source Voltage VDS (V)<br>Capacitance C (pF)<br>**----- End of picture text -----**<br> ## ID - VGS **==> picture [223 x 169] intentionally omitted <==** **----- Start of picture text -----**<br> -1.0E-01<br>Ta = 85 ℃<br>-1.0E-02<br>-1.0E-03<br>25 ℃<br>-1.0E-04<br>-1.0E-05<br>-40 ℃<br>-1.0E-06<br>-1.0E-07<br>-0 -1 -2 -3<br>Gate-source voltage VGS (V)<br>Drain current ID (A)<br>**----- End of picture text -----**<br> ## RDS(on) - ID **==> picture [219 x 388] intentionally omitted <==** **----- Start of picture text -----**<br> 100<br>-2.5 V<br>10<br>VGS = -4.0 V<br>1<br>-0.001 -0.01 -0.1<br>Drain current ID (A)<br>Dynamic Input/Output Characteristics<br>-3<br>-2.5<br>-2<br>VDD = -3 V<br>-1.5<br>-1<br>-0.5<br>0<br>0 1<br>Total Gate Charge Qg (nC)<br>)<br>RDS(on) (<br>Drain source On-state Resistance<br>Gate to source Voltage VGS (V)<br>**----- End of picture text -----**<br> Page 3 of 5 Established : 2010-06-25 Revised : 2013-10-10 Doc No. TT4-EA-12653 Revision. 3 Product Standards MOS FET FJ3303010L ## RDS(on) - Ta **==> picture [480 x 623] intentionally omitted <==** **----- Start of picture text -----**<br> Vth - Ta RDS(on) - Ta<br>-2 12<br>10<br>VGS = -2.5 V<br>-1.5<br>8<br>-1 6<br>-4.0 V<br>4<br>-0.5<br>2<br>0 0<br>-50 0 50 100 150 -50 0 50 100 150<br>Temperature (℃) Temperature (℃)<br>PD - Ta<br>0.2<br>0.1<br>0<br>0 50 100 150<br>Temperature Ta (C)<br>Rth -tsw Safe Operating Area<br>1000 -1.0E+01<br>-1.0E+00<br>IDp = -0.2 A<br>100 1 ms<br>-1.0E-01<br>10 ms<br>100<br>ms<br>-1.0E-02 Operation in this area 1 s<br>10 is limited by RDS(on)<br>Ta = 25 °C, DC<br>-1.0E-03 Glass epoxy board (25.4 × 25.4 × t0.8mm)<br>coated with copper foil,<br>which has more than 300mm [2] .<br>1 -1.0E-04<br>0.001 0.01 0.1 1 10 100 1000 -0.01 -0.1 -1 -10 -100<br>Drain-source Voltage VDS (V)<br>Pulse Width tsw (s)<br>)<br> Vth (V) RDS(on) (<br>Drain-source On-resistance<br>Gate-source Threshold Voltage<br>Total Power Dissipation PD (W)<br>C/W)<br>Thermal resistance Rth ( Drain Current ID (A)<br>**----- End of picture text -----**<br> Page 4 of 5 Established : 2010-06-25 Revised : 2013-10-10 Doc No. TT4-EA-12653 Revision. 3 Product Standards ## MOS FET FJ3303010L ## SSSMini3-F2-B Unit : mm **==> picture [321 x 591] intentionally omitted <==** **----- Start of picture text -----**<br> 1.20±0.05 +0.05<br>+0.05 0.13-0.02<br>0.30-0.02<br>3<br>1 2<br>+0.05<br>0.20-0.02<br>(0.4) (0.4)<br>0.80±0.05<br>(5°)<br>0.45<br>0.35 0.35<br>0.4 0.4<br>±0.05 0.05±<br>0.80 1.20<br>(5°)<br>±0.05<br>0.20<br>0.03 0.27)<br>± (<br>0.52<br>05<br>0 to 0.<br>0.35<br>1.15<br>0.35<br>**----- End of picture text -----**<br> ## Land Pattern (Reference) (Unit : mm) Page 5 of 5 Established : 2010-06-25 Revised : 2013-10-10 ## Request for your special attention and precautions in using the technical information and semiconductors described in this book - (1) If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. - (2) The technical information described in this book is intended only to show the main characteristics and application circuit examples of the products. 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Updated at February 9, 2023
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