FERD15S50DJF-TR

**FERD15S50** 

Datasheet 

50 V, 15 A field effect rectifier 

## **Features** 

- ST patented rectifier process 

- Stable leakage current over reverse voltage 

- Low forward voltage drop 

- High frequency operation 

- ECOPACK[®] 2 compliant 

## **Applications** 

- Set-top box 

- Battery charger 

- DC / DC converter 

## **Description** 

This single rectifier is based on a patented technology, enabling to achieve the best in class VF/IR trade-off for a given silicon surface. 

Packaged in PowerFLAT™ 5x6, the FERD15S50 is optimized for use in rectification and freewheeling operations in switch mode power supplies. 

## **Product status** 

FERD15S50 

|**Product summary**|**Product summary**|
|---|---|
|**Symbol**|**Value**|
|**IF(AV)**|15 A|
|**VRRM**|50 V|
|**T j(max.)**|150 °C|
|**VF(typ.)**|0.48 V|



**DS9849** - **Rev 3** - **February 2019** For further information contact your local STMicroelectronics sales office. 

www.st.com 

**FERD15S50 Characteristics** 

**1** 

## **Characteristics** 

**Table 1. Absolute ratings (limiting values at 25 °C, unless otherwise specified, anode terminals short circuited)** 

|**Symbol**|**Parameter**|**Parameter**|**Value**|**Unit**|
|---|---|---|---|---|
|VRRM|Repetitive peak reverse voltage||50|V|
|IF(RMS)|Forward rms current||25|A|
|IF(AV)|Average forward current, δ = 0.5 square wave|TC= 120 °C|15|A|
|IFSM|Surge non repetitive forward current|tp= 10 ms sinusoidal|80|A|
|Tstg|Storage temperature range||-65 to +175|°C|
|Tj|Maximum operating junction temperature(1)||+150|°C|



_1. (dPtot/dTj) < (1/Rth(j-a)) condition to avoid thermal runaway for a diode on its own heatsink._ 

**Table 2. Thermal resistance parameter** 

|**Symbol**|**Parameter**|**Max. value**|**Unit**|
|---|---|---|---|
|Rth(j-c)|Junction to case|2.8|°C/W|



For more information, please refer to the following application note : 

- AN5046 : Printed circuit board assembly recommendations for STMicroelectronics PowerFLAT™ packages 

**Table 3. Static electrical characteristics (anode terminals short circuited)** 

|**Symbol**|**Parameter**|**Test conditions**|**Test conditions**|**Min.**|**Typ.**|**Max.**|**Unit**|
|---|---|---|---|---|---|---|---|
|IR(1)|Reverse leakage current|Tj= 25 °C|VR= VRRM|-|250|650|µA|
|||Tj= 125 °C||-|20|40|mA|
|VF(2)|Forward voltage drop|Tj= 25 °C|IF= 5 A|-|0.35||V|
|||Tj= 125 °C||-|0.30|0.35||
|||Tj= 25 °C|IF= 10 A|-|0.42|0.48||
|||Tj= 125 °C||-|0.41|0.45||
|||Tj= 25 °C|IF= 15 A|-|0.48|||



_1. Pulse test: tp = 5 ms, δ < 2%_ 

_2. Pulse test: tp = 380 µs, δ < 2%_ 

To evaluate the conduction losses, use the following equation: 

P = 0.25 x IF(AV) + 0.02 x IF[2] (RMS) 

For more information, please refer to the following application notes related to the power losses : 

- AN604: Calculation of conduction losses in a power rectifier 

- AN4021: Calculation of reverse losses on a power diode 

**DS9849** - **Rev 3** 

**page 2/9** 

**FERD15S50 Characteristics (curves)** 

## **1.1 Characteristics (curves)** 

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**----- Start of picture text -----**<br>
Figure 1. Average forward power dissipation versus Figure 2. Average forward current versus ambient<br>average forward current (anode terminals short circuited) temperature (δ = 0.5, anode terminals short circuited)<br>PF(AV)(W) 20 IF(AV)(A)<br>12<br>10 Rth(j-a)= R th(j-c)<br>15<br>8<br>6 10<br>4<br>T 5 T<br>2<br>IF(AV)(A) δ [=tp/T] tp δ [=tp/T] tp Tamb (°C)<br>0 0<br>0 2 4 6 8 10 12 14 16 18 20 0 25 50 75 100 125 150<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
Figure 3. Relative variation of thermal impedance junction<br>Figure 4. Reverse leakage current versus reverse voltage<br>to case versus pulse duration<br>applied (typical values)<br>Zth(j- c)/R th (j -c) 1.E+02 IR(mA)<br>1.0<br>PowerFLAT™ 5x6<br>0.9 Tj = 125 °C<br>1.E+01<br>0.8<br>0.7<br>0.6 1.E+00<br>0.5<br>0.4 Tj = 25 °C<br>1.E-01<br>0.3<br>Single pulse<br>0.2<br>VR(V)<br>0.1 tP(s) 1.E-02<br>0.0 0 5 10 15 20 25 30 35 40 45 50<br>1.E-04 1.E-03 1.E-02 1.E-01 1.E+00<br>**----- End of picture text -----**<br>


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**----- Start of picture text -----**<br>
Figure 5. Junction capacitance versus reverse voltage Figure 6. Forward voltage drop versus forward current<br>applied (typical values) (typical values, anode terminals short circuited)<br>C(pF) IF (A )<br>10000 100<br>F = 1MHz<br>VoscT = 30mVj = 25 °CRMS<br>10<br>1000<br>Tj = 125°C Tj = 25°C<br>1.0<br>VR(V) VF(V)<br>100 0.1<br>1 10 100 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7<br>**----- End of picture text -----**<br>


**DS9849** - **Rev 3** 

**page 3/9** 

**FERD15S50 Characteristics (curves)** 

**Figure 7. Thermal resistance junction to ambient versus copper surface under tab (typical values)** 

**==> picture [225 x 152] intentionally omitted <==**

**----- Start of picture text -----**<br>
Rth(j-a) (°C/W)<br>150<br>PowerFlat™_5X6<br>125 epoxy printed board FR4, eCu = 35 µm<br>100<br>75<br>50<br>25<br>SCu(cm²)<br>0<br>0 1 2 3 4 5 6 7 8 9 10<br>**----- End of picture text -----**<br>


**DS9849** - **Rev 3** 

**page 4/9** 

**FERD15S50 Package information** 

**2** 

## **Package information** 

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK[®] packages, depending on their level of environmental compliance. ECOPACK[®] specifications, grade definitions and product status are available at: www.st.com. ECOPACK[®] is an ST trademark. 

## **2.1 PowerFLAT™ 5x6 package information** 

- Epoxy meets UL 94,V0 

- Cooling method: by conduction (C) 

**Figure 8. PowerFLAT™ 5x6 package outline (non-contractual)** 

**==> picture [118 x 139] intentionally omitted <==**

**==> picture [66 x 292] intentionally omitted <==**

**----- Start of picture text -----**<br>
Bottom view<br>Side view<br>Top view<br>**----- End of picture text -----**<br>


**DS9849** - **Rev 3** 

**page 5/9** 

**FERD15S50 PowerFLAT™ 5x6 package information** 

**Table 4. PowerFLAT™ 5x6 mechanical data** 

||**Dimensions**|**Dimensions**|**Dimensions**|**Dimensions**|**Dimensions**|**Dimensions**|
|---|---|---|---|---|---|---|
|**Rf**|**Millimeters**|||**Inches (for reference only)**|||
|**e**|**Min.**|**Typ.**|**Max.**|**Min.**|**Typ.**|**Max.**|
|A|0.80||1.00|0.031||0.039|
|A1|0.00||0.05|0.000||0.002|
|b|0.30||0.50|0.01||0.02|
|c||0.25|||0.010||
|D|4.80||5.40|0.189||0.212|
|D2|3.91||4.45|0.154||0.175|
|e||1.27|||0.050||
|E|5.90||6.35|0.232||0.250|
|E2|3.34||3.70|0.138||0.146|
|L|0.50||0.80|0.020||0.031|
|K|1.10||1.575|0.015||0.023|
|L1|0.05|0.15|0.25|0.002|0.006|0.009|



**Figure 9. PowerFLAT™ 5x6 recommended footprint (dimensions are in mm)** 

**DS9849** - **Rev 3** 

**page 6/9** 

**FERD15S50 Ordering Information** 

**3 Ordering information** 

## **Table 5. Ordering information** 

|**Order code**|**Marking**|**Package**|**Weight**|**Base qty.**|**Delivery mode**|
|---|---|---|---|---|---|
|FERD15S50DJF-TR|FD15 S50|PowerFLAT™ 5x6|95 mg|3000|Tape and reel|



**DS9849** - **Rev 3** 

**page 7/9** 

**FERD15S50** 

## **Revision history** 

**Table 6. Document revision history** 

|**Date**|**Version**|**Changes**|
|---|---|---|
|09-Oct-2013|1|Initial release.|
|09-Nov-2018|2|UpdatedSection Cover imageandSection Features. UpdatedFigure 8. PowerFLAT™ 5x6 package<br>outline (non-contractual)AddedSection Applications,Table 4. PowerFLAT™ 5x6 mechanical data<br>andFigure 9. PowerFLAT™ 5x6 recommended footprint (dimensions are in mm).|
|05-Feb-2019|3|UpdatedFigure 8. PowerFLAT™ 5x6 package outline (non-contractual)andTable 4. PowerFLAT™<br>5x6 mechanical data.|



**DS9849** - **Rev 3** 

**page 8/9** 

**FERD15S50** 

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**DS9849** - **Rev 3** 

**page 9/9**