FDY1002PZ.

## **FDY1002PZ** 

## **Dual P-Channel (–1.5 V) Specified PowerTrench[®] MOSFET** 

## **–20 V, –0.83 A, 0.5** Ω **Features** 

Max rDS(on) = 0.5 Ω at VGS = –4.5 V, ID = –0.83 A Max rDS(on) = 0.7 Ω at VGS = –2.5 V, ID = –0.70 A Max rDS(on) = 1.2 Ω at VGS = –1.8 V, ID = –0.43 A Max rDS(on) = 1.8 Ω at VGS = –1.5 V, ID = –0.36 A HBM ESD protection level = 1400 V (Note 3) RoHS Compliant 

## **General Description** 

This Dual P-Channel MOSFET has been designed using ON Semiconductor’s advanced Power Trench process to optimize the rDS(on)@VGS = –1.5 V. 

## **Application** 

Li-Ion Battery Pack 

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## **MOSFET Maximum Ratings** TA = 25 °C unless otherwise noted 

**Symbol Parameter Ratings Units** VDS Drain to Source Voltage –20 V VGS Gate to Source Voltage ±8 V Drain Current   -Continuous (Note 1a) –0.83 ID -Pulsed –1.0 A Power Dissipation (Note 1a) 0.625 PD Power Dissipation (Note 1b) 0.446 W TJ, TSTG Operating and Storage Junction Temperature Range –55 to +150 ° C **Thermal Characteristics** RθJA Thermal Resistance, Junction to Ambient (Note 1a) 200 °C/W ~~ee~~ RθJA Thermal Resistance, Junction to Ambient (Note 1b) 280 ~~ae~~ **Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity** G FDY1002PZ SC89-6 7 ” 8 mm 3000 units ~~———~~ 

©2008 Semiconductor Components Industries, LLC. October-2017,  Rev.2 

Publication Order Number: FDY1002PZ/D 

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## **Electrical Characteristics** TJ = 25 °C unless otherwise noted 

|**Off Characteristics**<br>**On Characteristics**(Note 2)<br>**Dynamic Characteristics**<br>**Switching Characteristics**(Note 2)<br>**Symbol**<br>**Parameter**<br>**Test Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Units**<br>BVDSS<br>Drain to Source Breakdown Voltage<br>ID= –250µA, VGS= 0 V<br>–20<br>V<br>∆BVDSS<br>∆TJ<br>Breakdown Voltage Temperature<br>Coefficient<br>ID= –250µA, referenced to 25 °C<br>-11<br>mV/°C<br>IDSS<br>Zero Gate Voltage Drain Current<br>VDS= –16 V, VGS = 0 V<br>–1<br>µA<br>IGSS<br>Gate to Source Leakage Current<br>VGS= ±8 V, VDS = 0 V<br>±10<br>µA<br>VGS(th)<br>Gate to Source Threshold Voltage<br>VGS= VDS,  ID= –250µA<br>–0.4<br>–0.7<br>–1.0<br>V<br>∆VGS(th)<br>∆TJ<br>Gate to Source Threshold Voltage<br>Temperature Coefficient<br>ID= –250µA, referenced to 25 °C<br>3<br>mV/°C<br>rDS(on)<br>Static Drain to Source On-Resistance<br>VGS= –4.5 V, ID= –0.83 A<br>0.28<br>0.5<br>Ω<br>VGS= –2.5 V, ID= –0.70 A<br>0.36<br>0.7<br>VGS= –1.8 V, ID= –0.43 A<br>0.47<br>1.2<br>VGS= –1.5 V, ID= –0.36 A<br>0.62<br>1.8<br>VGS= –4.5 V, ID= –0.83 A,<br>TJ=125 °C<br>0.39<br>0.85<br>gFS<br>Forward Transconductance<br>VDD= –5 V, ID= –0.83 A<br>2<br>S<br>Ciss<br>Input Capacitance<br>VDS= –10 V, VGS= 0 V,<br>f = 1 MHz<br>100<br>135<br>pF<br>Coss<br>Output Capacitance<br>23<br>35<br>pF<br>Crss<br>Reverse Transfer Capacitance<br>18<br>30<br>pF<br>td(on)<br>Turn-On DelayTime<br>VDD= –10 V, ID= –0.83 A<br>VGS= –4.5 V, RGEN= 6Ω<br>3.5<br>10<br>ns<br>tr<br>Rise Time<br>2.9<br>10<br>ns<br>td(off)<br>Turn-Off DelayTime<br>23<br>37<br>ns<br>tf<br>Fall Time<br>13<br>23<br>ns<br>Qg<br>Total Gate Charge<br>VDD= –10 V,  ID= –0.83 A<br>VGS= –4.5 V<br>2.2<br>3.1<br>nC<br>Qgs<br>Gate to Source Charge<br>0.3<br>nC<br>Qgd<br>Gate to Drain “Miller” Charge<br>0.6<br>nC<br>~~a~~<br>~~eG~~<br>~~=|~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~re~~<br>~~i~~|
|---|
|**Drain-Source Diode Characteristics** **and Maximum Rating**|
|IS<br>Maximum Continuous Drain-Source Diode Forward Current<br>–0.52<br>A|
|VSD<br>Source to Drain Diode  Forward Voltage<br>VGS = 0 V, IS = –0.52 A(Note 2)<br>–1.0<br>–1.2<br>V|
|trr<br>Reverse RecoveryTime<br>IF= –0.83 A, dIF/dt = 100 A/µs<br>18<br>31<br>ns<br>Qrr<br>Reverse RecoveryCharge<br>3.8<br>10<br>nC|



## **Notes:** 

1. RθJA is determined with the device mounted on a 1 in[2] oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθJA is determined by the user's board design. 

a) 200[o] C/W when mounted  on a 1 in[2 ] pad of 2 oz copper. 

b) 280[o] C/W when mounted on a minimum pad of 2 oz copper. 

2. Pulse Test : Pulse Width < 300 us, Duty Cycle < 2.0% 

3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. 

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## **Typical Characteristics** TJ = 25 °C unless otherwise noted 

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1.0 4.5<br>0.8 VVGSGS =  = -2.5 V-4.5 V 4.0 VGS = -1.5 V PULSE DURATION = 80 DUTY CYCLE = 0.5%MAX µ s<br>VGS = -1.5 V 3.5 VGS = -1.8 V<br>0.6 3.0<br>VGS = -2.0 V 2.5 VGS = -2.0V<br>VGS = -1.8 V<br>0.4<br>2.0<br>VGS = -2.5 V<br>1.5<br>0.2<br>PULSE DURATION = 80  µ s 1.0<br>DUTY CYCLE = 0.5% MAX VGS =  -4.5 V<br>0.0 0.5<br>0.0 0.5 1.0 1.5 2.0 0.0 0.5 1.0 1.5 2.0 2.5<br>-VDS, DRAIN TO SOURCE VOLTAGE (V) -ID, DRAIN CURRENT (A)<br>Figure 1.  On Region Characteristics Figure 2.  Normalized On-Resistance<br>vs Drain Current and Gate Voltage<br>1.6 2.0<br>ID = -0.83 A PULSE DURATION = 80  µ s<br>VGS = -4.5 V DUTY CYCLE = 0.5% MAX<br>1.4 1.6<br>ID = -0.415 A<br>1.2 1.2<br>1.0 0.8<br>TJ = 125  [o] C<br>0.8 0.4<br>0.6 0.0 TJ = 25  [o] C<br>-75 -50 -25 0 25 50 75 100 125 150 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5<br>TJ, JUNCTION TEMPERATURE ( [o] C) -VGS, GATE TO SOURCE VOLTAGE (V)<br>Figure 3.  Normalized  On  Resistance    Figure 4.   On-Resistance vs  Gate to<br>vs Junction Temperature Source Voltage<br>1.0 1<br>PULSE DURATION = 80 DUTY CYCLE = 0.5% MAX µ s VGS = 0 V<br>0.8<br>VDS = -5 V TJ = 125  [o] C<br>0.1<br>0.6<br>TJ = 125 [ o] C<br>0.4 TJ = 25  [o] C<br>TJ = 25  [o] C 0.01<br>0.2 TJ = -55  [o] C<br>TJ = -55  [o] C<br>0.0 0.001<br>0.5 1.0 1.5 2.0 0.0 0.2 0.4 0.6 0.8 1.0 1.2<br>-VGS, GATE TO SOURCE VOLTAGE (V) -VSD, BODY DIODE FORWARD VOLTAGE (V)<br>Figure 5.  Transfer Characteristics Figure 6.    Source to Drain  Diode<br>Forward Voltage vs Source Current<br>DRAIN CURRENT (A),  NORMALIZED<br>D<br>-I<br>DRAIN TO SOURCE ON-RESISTANCE<br>)<br>Ω<br>(<br>DRAIN TO<br>NORMALIZED rDS(on),<br>SOURCE ON-RESISTANCE<br> DRAIN TO SOURCE ON-RESISTANCE<br>, DRAIN CURRENT (A)<br>D<br>-I<br>, REVERSE DRAIN CURRENT (A)<br>S<br>-I<br>**----- End of picture text -----**<br>


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## **Typical Characteristics** TJ = 25 °C unless otherwise noted 

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5 500<br>ID = -0.83 A Ciss<br>4<br>100<br>3 Coss<br>VDD = -8 V<br>VDD = -10 V<br>2 10 Crss<br>VDD = -12 V<br>f = 1 MHz<br>1 VGS = 0 V<br>0 1<br>0.0 0.5 1.0 1.5 2.0 2.5 3.0 0.1 1 10 20<br>-VDS, DRAIN TO SOURCE VOLTAGE (V)<br>Qg, GATE CHARGE (nC)<br>Figure 7.  Gate Charge Characteristics Figure 8.  Capacitance vs Drain<br>to Source Voltage<br>105 2<br>VGS = 0 V 1<br>1 ms<br>103<br>10 ms<br>101 THIS AREA IS<br>TJ = 125 [ o] C 0.1 LIMITED BY rDS(on) 100 ms<br>SINGLE PULSE<br>10-1 TJ = MAX RATED 10 ms1 s<br>TJ = 25  [o] C R θ JA = 280  [o] C/W DC<br>TA = 25  [o] C<br>10-3 0.01<br>0 3 6 9 12 15 0.1 1 10 60<br>-VGS, GATE TO SOURCE VOLTAGE (V) -VDS, DRAIN to SOURCE VOLTAGE (V)<br>Figure 9.  Gate   Leakage   Current    Figure 10.   Forward   Bias   Safe<br>vs Gate to Source Voltage Operating Area<br>30<br>VGS = -4.5 V SINGLE PULSE<br>10<br>R θ JA = 280 [ o] C/W<br>TA = 25  [o] C<br>1<br>0.2<br>10-3 10-2 10-1 100 101 100 1000<br>t, PULSE WIDTH (sec)<br>Figure 11.  Single Pulse Maximum Power  Dissipation<br>CAPACITANCE (pF)<br>, GATE TO SOURCE VOLTAGE (V)<br>GS<br>-V<br>, DRAIN CURRENT (A)<br>D<br>-I<br>GATE LEAKAGE CURRENT (uA)<br>,<br>g<br>-I<br>, PEAK TRANSIENT POWER (W)<br>(PK)<br>P<br>**----- End of picture text -----**<br>


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**Typical Characteristics** TJ = 25 °C unless otherwise noted 

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2<br>DUTY CYCLE-DESCENDING ORDER<br>1<br>D = 0.5<br>     0.2<br>     0.1<br>     0.05<br>     0.02 PDM<br>     0.01<br>0.1<br>t1<br>SINGLE PULSE t2<br>NOTES:<br>R θ JA = 280  [o] C/W DUTY FACTOR: D = t1/t2<br>PEAK TJ = PDM x Z θJA  x R θJA  + TA<br>0.02<br>10-3 10-2 10-1 100 101 100 1000<br>t, RECTANGULAR PULSE DURATION (sec)<br>Figure 12.  Junction-to-Ambient Transient Thermal Response Curve<br>Z JA θ<br>IMPEDANCE,<br>NORMALIZED THERMAL<br>**----- End of picture text -----**<br>


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