FDT86102LZ

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## **FDT86102LZ** 

**N-Channel PowerTrench[®] MOSFET 100 V, 6.6 A, 28 m** Ω 

## **Features** 

Max rDS(on) = 28 mΩ at VGS = 10 V, ID = 6.6 A Max rDS(on) = 38 mΩ at VGS = 4.5 V, ID = 5.5 A HBM ESD protection level > 6 kV typical (Note 4) 

Very low Qg and Qgd compared to competing trench technologies Fast switching speed 100% UIL Tested RoHS Compliant **D S** < **D G SOT-223** 

## **General Description** 

This N-Channel MOSFET is produced using Fairchild Semiconductor’s advanced PowerTrench[®] process that has been especially tailored to minimize the on-state resistance and switching loss. G-S zener has been added to enhance ESD voltage level. 

## **Applications** 

DC-DC conversion 

Inverter 

Synchronous Rectifier 

## **MOSFET Maximum Ratings** TA = 25 °C unless otherwise noted 

|**Symbol**||**Parameter**||**Ratings**||**Units**|
|---|---|---|---|---|---|---|
|VDS|Drain to Source Voltage|||100||V|
|VGS|Gate to Source Voltage|||±20||V|
|ID|Drain Current   -Continuous<br>-Pulsed|Drain Current   -Continuous||6.6<br>40||A|
|EAS|Single Pulse Avalanche Energy|(Note 3)||84||mJ|
|PD|Power Dissipation                                                   T<br>Power Dissipation                                                  T|ation                                                   TA= 25 °C(Note 1a)<br>ation                                                  TA= 25 °C(Note 1b)||2.2<br>1.0||W|
|TJ, TSTG|Operatingand Storage Junction Temperature Range|||-55 to +150||°C|
|**Thermal Characteristics**|||||||
|RθJC<br>RθJA<br>~~ee~~|Thermal Resistance, Junction to Case(Note 1)<br>Thermal Resistance, Junction to Ambient                                                 (Note 1a)|||12<br>55||°C/W|
|**Package Marking and Ordering Information**|||||||
|**Device Marking**<br>**Device**<br>86102LZ<br>FDT86102LZ<br>~~[_os~~||**Package**<br>**Reel Size**<br>SOT-223<br>13 ’’<br>~~os~~|~~os~~|**Tape Width**<br>12 mm<br>~~os~~|**Quantity**<br>2500 units<br>~~os~~||



©2010 Fairchild Semiconductor Corporation **1** www.fairchildsemi.com FDT86102LZ Rev. C 

**Electrical Characteristics** TJ = 25 °C unless otherwise noted 

|**Off Characteristics**<br>**On Characteristics**<br>**Dynamic Characteristics**<br>**Symbol**<br>**Parameter**<br>**Test Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Units**<br>BVDSS<br>Drain to Source Breakdown Voltage<br>ID= 250μA, VGS= 0 V<br>100<br>V<br>ΔBVDSS<br>ΔTJ<br>Breakdown Voltage Temperature<br>Coefficient<br>ID= 250μA, referenced to 25 °C<br>70<br>mV/°C<br>IDSS<br>Zero Gate Voltage Drain Current<br>VDS= 80 V, VGS = 0 V<br>1<br>μA<br>IGSS<br>Gate to Source Leakage Current<br>VGS= ±20 V, VDS = 0 V<br>±10<br>μA<br>VGS(th)<br>Gate to Source Threshold Voltage<br>VGS= VDS,  ID= 250μA<br>1.0<br>1.4<br>3.0<br>V<br>ΔVGS(th)<br>ΔTJ<br>Gate to Source Threshold Voltage<br>Temperature Coefficient<br>ID= 250μA, referenced to 25 °C<br>-6<br>mV/°C<br>rDS(on)<br>Static Drain to Source On Resistance<br>VGS= 10 V,  ID= 6.6 A<br>22<br>28<br>mΩ<br>VGS= 4.5 V, ID= 5.5 A<br>27<br>38<br>VGS= 10 V,  ID= 6.6 A, TJ= 125 °C<br>36<br>46<br>gFS<br>Forward Transconductance<br>VDS= 5 V,  ID= 6.6 A<br>26<br>S<br>Ciss<br>Input Capacitance<br>VDS= 50 V, VGS= 0 V,<br>f = 1MHz<br>1118<br>1490<br>pF<br>Coss<br>Output Capacitance<br>181<br>245<br>pF<br>Crss<br>Reverse Transfer Capacitance<br>7.5<br>15<br>pF<br>Rg<br>Gate Resistance<br>0.5<br>Ω<br>~~=~~<br>~~EE~~|**Off Characteristics**<br>**On Characteristics**<br>**Dynamic Characteristics**<br>**Symbol**<br>**Parameter**<br>**Test Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Units**<br>BVDSS<br>Drain to Source Breakdown Voltage<br>ID= 250μA, VGS= 0 V<br>100<br>V<br>ΔBVDSS<br>ΔTJ<br>Breakdown Voltage Temperature<br>Coefficient<br>ID= 250μA, referenced to 25 °C<br>70<br>mV/°C<br>IDSS<br>Zero Gate Voltage Drain Current<br>VDS= 80 V, VGS = 0 V<br>1<br>μA<br>IGSS<br>Gate to Source Leakage Current<br>VGS= ±20 V, VDS = 0 V<br>±10<br>μA<br>VGS(th)<br>Gate to Source Threshold Voltage<br>VGS= VDS,  ID= 250μA<br>1.0<br>1.4<br>3.0<br>V<br>ΔVGS(th)<br>ΔTJ<br>Gate to Source Threshold Voltage<br>Temperature Coefficient<br>ID= 250μA, referenced to 25 °C<br>-6<br>mV/°C<br>rDS(on)<br>Static Drain to Source On Resistance<br>VGS= 10 V,  ID= 6.6 A<br>22<br>28<br>mΩ<br>VGS= 4.5 V, ID= 5.5 A<br>27<br>38<br>VGS= 10 V,  ID= 6.6 A, TJ= 125 °C<br>36<br>46<br>gFS<br>Forward Transconductance<br>VDS= 5 V,  ID= 6.6 A<br>26<br>S<br>Ciss<br>Input Capacitance<br>VDS= 50 V, VGS= 0 V,<br>f = 1MHz<br>1118<br>1490<br>pF<br>Coss<br>Output Capacitance<br>181<br>245<br>pF<br>Crss<br>Reverse Transfer Capacitance<br>7.5<br>15<br>pF<br>Rg<br>Gate Resistance<br>0.5<br>Ω<br>~~=~~<br>~~EE~~|**Off Characteristics**<br>**On Characteristics**<br>**Dynamic Characteristics**<br>**Symbol**<br>**Parameter**<br>**Test Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Units**<br>BVDSS<br>Drain to Source Breakdown Voltage<br>ID= 250μA, VGS= 0 V<br>100<br>V<br>ΔBVDSS<br>ΔTJ<br>Breakdown Voltage Temperature<br>Coefficient<br>ID= 250μA, referenced to 25 °C<br>70<br>mV/°C<br>IDSS<br>Zero Gate Voltage Drain Current<br>VDS= 80 V, VGS = 0 V<br>1<br>μA<br>IGSS<br>Gate to Source Leakage Current<br>VGS= ±20 V, VDS = 0 V<br>±10<br>μA<br>VGS(th)<br>Gate to Source Threshold Voltage<br>VGS= VDS,  ID= 250μA<br>1.0<br>1.4<br>3.0<br>V<br>ΔVGS(th)<br>ΔTJ<br>Gate to Source Threshold Voltage<br>Temperature Coefficient<br>ID= 250μA, referenced to 25 °C<br>-6<br>mV/°C<br>rDS(on)<br>Static Drain to Source On Resistance<br>VGS= 10 V,  ID= 6.6 A<br>22<br>28<br>mΩ<br>VGS= 4.5 V, ID= 5.5 A<br>27<br>38<br>VGS= 10 V,  ID= 6.6 A, TJ= 125 °C<br>36<br>46<br>gFS<br>Forward Transconductance<br>VDS= 5 V,  ID= 6.6 A<br>26<br>S<br>Ciss<br>Input Capacitance<br>VDS= 50 V, VGS= 0 V,<br>f = 1MHz<br>1118<br>1490<br>pF<br>Coss<br>Output Capacitance<br>181<br>245<br>pF<br>Crss<br>Reverse Transfer Capacitance<br>7.5<br>15<br>pF<br>Rg<br>Gate Resistance<br>0.5<br>Ω<br>~~=~~<br>~~EE~~|
|---|---|---|
|**Switching Characteristics**|||
|td(on)<br>Turn-On DelayTime|6.6<br>14<br>ns||
|VDD= 50 V, ID= 6.6 A,<br>tr<br>Rise Time|1.9<br>10<br>ns||
|VGS= 10 V, RGEN= 6Ω<br>td(off)<br>Turn-Off DelayTime|19<br>31<br>ns||
|tf<br>Fall Time|2.2<br>10<br>ns||
|Qg(TOT)<br>Total Gate Charge<br>VGS = 0 V to 10 V<br>VDD= 50 V,<br>ID= 6.6 A<br>17<br>25<br>nC<br>Qg(TOT)<br>Total Gate Charge<br>VGS = 0 V to 4.5 V<br>8.3<br>12<br>Qgs<br>Gate to Source Charge<br>2.6<br>nC<br>Qgd<br>Gate to Drain “Miller” Charge<br>2.2<br>nC<br>~~SS~~|||
|**Drain-Source Diode Characteristics**|||
|VSD<br>Source to Drain Diode  Forward Voltage<br>VGS = 0 V, IS = 6.6 A(Note 2)<br>0.82<br>1.3<br>V<br>VGS = 0 V, IS = 1 A(Note 2)<br>0.68<br>1.2<br>trr<br>Reverse RecoveryTime<br>IF= 6.6 A, di/dt = 100 A/μs<br>40<br>64<br>ns<br>Qrr<br>Reverse RecoveryCharge<br>36<br>58<br>nC<br>~~nae~~|||
|NOTES:|||
|1. RθJAis determined with the device mounted on a 1 in2pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJCis guaranteed by design while R|is guaranteed by design while RθCAis determined by||
|the user's board design.|||
|55 °C/W when mounted on a<br>1 in2pad of  2 oz  copper<br>a)<br>b)|118 °C/W when mounted on<br>a minimum pad of 2 oz copper||



> a) 55 °C/W when mounted on a 1 in[2 ] pad of  2 oz  copper 

2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %. 

3. Starting TJ = 25 °C,  L = 1 mH, IAS = 13 A, VDD = 90 V, VGS = 10 V. 

4. The diode connected between gate and source serves only as protection against ESD. No gate overvoltage rating is implied. 

©2010 Fairchild Semiconductor Corporation **2** www.fairchildsemi.com FDT86102LZ Rev. C 

## **Typical Characteristics** TJ = 25 °C unless otherwise noted 

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40<br>VGS =  10 V<br>VGS = 4.5 V<br>30 VGS = 3.5 V<br>VGS = 3 V<br>20<br>10<br>PULSE DURATION = 80  μ s VGS = 2.5 V<br>DUTY CYCLE = 0.5% MAX<br>0<br>0 1 2 3 4 5<br>VDS, DRAIN TO SOURCE VOLTAGE (V)<br>Figure 1.  On-Region Characteristics<br>2.0<br>ID = 6.6 A<br>1.8 VGS = 10 V<br>1.6<br>1.4<br>1.2<br>1.0<br>0.8<br>0.6<br>-75 -50 -25 0 25 50 75 100 125 150<br>TJ, JUNCTION TEMPERATURE ( [o] C)<br>Figure 3.  Normalized  On-Resistance<br>vs Junction Temperature<br>40<br>PULSE DURATION = 80  μ s<br>DUTY CYCLE = 0.5% MAX<br>30<br>VDS = 5 V<br>20<br>TJ = 150 [ o] C<br>TJ = 25 [ o] C<br>10<br>TJ = -55  [o] C<br>0<br>0 1 2 3 4<br>VGS, GATE TO SOURCE VOLTAGE (V)<br>DRAIN CURRENT (A)<br>,<br>ID<br>NORMALIZED<br> DRAIN TO SOURCE ON-RESISTANCE<br>, DRAIN CURRENT (A)<br>ID<br>**----- End of picture text -----**<br>


**Figure 3.  Normalized  On-Resistance vs Junction Temperature** 

**Figure 5.  Transfer Characteristics** 

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5<br>VGS = 2.5 V<br>4<br>VGS =  3 V<br>3<br>VGS = 3.5 V<br>2<br>1<br>PULSE DURATION = 80  μ s VGS = 4.5 V VGS =  10 V<br>DUTY CYCLE = 0.5% MAX<br>0<br>0 10 20 30 40<br>ID, DRAIN CURRENT (A)<br>NORMALIZED<br>DRAIN TO SOURCE ON-RESISTANCE<br>**----- End of picture text -----**<br>


**Figure 2.  Normalized On-Resistance vs Drain Current and Gate Voltage** 

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150<br>ID = 6.6 A PULSE DURATION = 80 DUTY CYCLE = 0.5% MAX μ s<br>120<br>90<br>60<br>TJ = 125  [o] C<br>30<br>TJ = 25 [ o] C<br>0<br>2 4 6 8 10<br>VGS, GATE TO SOURCE VOLTAGE (V)<br>Figure 4.   On-Resistance vs  Gate to<br>Source Voltage<br>40<br>V GS  = 0 V<br>10<br>TJ = 150  [o] C<br>1<br>T J  = 25 [ o] C<br>0.1<br>0.01 TJ = -55 [ o] C<br>0.001<br>0.0 0.2 0.4 0.6 0.8 1.0 1.2<br>VSD, BODY DIODE FORWARD VOLTAGE (V)<br>Figure 6.    Source to Drain  Diode<br>Forward Voltage vs Source Current<br>)<br>Ω<br>m<br>(<br>DRAIN TO<br>rDS(on),<br>SOURCE ON-RESISTANCE<br>, REVERSE DRAIN CURRENT (A)<br>IS<br>**----- End of picture text -----**<br>


©2010 Fairchild Semiconductor Corporation **3** www.fairchildsemi.com FDT86102LZ Rev. C 

**Typical Characteristics** TJ = 25 °C unless otherwise noted 

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10 2000<br>ID = 6.6 A VDD = 25 V 1000 Ciss<br>8<br>VDD = 50 V<br>6 100 Coss<br>4<br>VDD = 75 V 10<br>2 Crss<br>f = 1 MHz<br>VGS = 0 V<br>0 1<br>0 3 6 9 12 15 18 0.1 1 10 100<br>Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)<br>Figure 7.  Gate Charge Characteristics Figure 8.  Capacitance vs Drain<br>to Source Voltage<br>20 15<br>12<br>10<br>VGS = 10 V<br>TJ = 25  [o] C<br>9<br>Package Limited<br>TJ = 100  [o] C 6 VGS = 4.5 V<br>3<br>TJ = 125 [ o] C R θ JC = 12 oC/W<br>1 0<br>0.001 0.01 0.1 1 10 100 25 50 75 100 125 150<br>tAV, TIME IN AVALANCHE (ms) TC, CASE TEMPERATURE (oC)<br>Figure 9. Unclamped Inductive                                  Figure 10.  Maximum Continuous Drain<br>Switching Capability Current  vs Case Temperature<br>10-1 50<br>10-2 VGS = 0 V 100  μ s<br>10<br>10-3<br>1 ms<br>10-4 TJ = 125 [ o] C 1<br>10-5 THIS AREA IS  10 ms<br>LIMITED BY r 100 ms<br>-6 DS(on)<br>10 TJ = 25  [o] C 0.1 SINGLE PULSE<br>10-7 TJ = MAX RATED 1 s<br>10-8 R θ JA = 118 [ o] C/W 10 s<br>0.01 TA = 25  [o] C DC<br>10-9 0.005<br>0 5 10 15 20 25 30 35 0.01 0.1 1 10 100 500<br>VGS, GATE TO SOURCE VOLTAGE (V) VDS, DRAIN to SOURCE VOLTAGE (V)<br>Figure 11.  Gate  Leakage Current vs                                        Figure 12.  Forward Bias Safe<br>Gate to Source Voltage   Operating Area<br>CAPACITANCE (pF)<br>, GATE TO SOURCE VOLTAGE (V)<br>GS<br>V<br>DRAIN CURRENT (A)<br>,<br>ID<br>, AVALANCHE CURRENT (A)<br>IAS<br>, DRAIN CURRENT (A)<br>ID<br>GATE LEAKAGE CURRENT (A)<br>,<br>Ig<br>**----- End of picture text -----**<br>


©2010 Fairchild Semiconductor Corporation **4** www.fairchildsemi.com FDT86102LZ Rev. C 

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Typical Characteristics  TJ = 25 °C unless otherwise noted<br>2000<br>1000<br>100<br>10<br>SINGLE PULSE<br>R θ JA = 118  [o] C/W<br>TA = 25  [o] C<br>1<br>0.5<br>10-4 10-3 10-2 10-1 1 10 100 1000<br>t, PULSE WIDTH (sec)<br>Figure 13.   Single  Pulse Maximum Power  Dissipation<br>2<br>DUTY CYCLE-DESCENDING ORDER<br>1<br>D = 0.5<br>0.1       0.2<br>      0.1 PDM<br>0.05<br>      0.02<br>0.01       0.01 t1<br>t2<br>SINGLE PULSE NOTES:<br>DUTY FACTOR: D = t 1 /t 2<br>R θ JA  = 118  [o] C/W PEAK TJ = PDM x Z θJA  x R θJA  + TA<br>0.001<br>0.0005<br>10-4 10-3 10-2 10-1 1 10 100 1000<br>t, RECTANGULAR PULSE DURATION (sec)<br>Figure 14.  Junction-to-Ambient Transient Thermal Response Curve<br>, PEAK TRANSIENT POWER (W)<br>(PK)<br>P<br>Z JA θ<br>IMPEDANCE,<br>NORMALIZED THERMAL<br>**----- End of picture text -----**<br>


©2010 Fairchild Semiconductor Corporation **5** www.fairchildsemi.com FDT86102LZ Rev. C 

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6.70<br>B<br>6.20<br>0.10 C B<br>3.10<br>2.90 3.25<br>4<br>1.90<br>A<br>3.70<br>6.10<br>3.30<br>1.90<br>1 3<br>0.84<br>0.60<br>2.30<br>0.95 2.30<br>4.60<br>0.10 C B LAND PATTERN RECOMMENDATION<br>SEE DETAIL A<br>1.80 MAX<br>0.08 C 7.30<br>C 6.70<br>0.10<br>0.00<br>NOTES: UNLESS OTHERWISE SPECIFIED<br>   A)  DRAWING BASED ON JEDEC REGISTRATION<br>        TO-261C, VARIATION AA.<br>   B)  ALL DIMENSIONS ARE IN MILLIMETERS.<br>R0.15±0.05<br>10°    C) DIMENSIONS DO NOT INCLUDE BURRS<br>GAGE 5°        OR MOLD FLASH. MOLD FLASH OR BURRS<br>R0.15±0.05        DOES NOT EXCEED 0.10MM.<br>PLANE<br>   D) DIMENSIONING AND TOLERANCING PER<br>        ASME Y14.5M-2009.<br>10° 0.35    E)  LANDPATTERN NAME: SOT230P700X180-4BN<br>0° [ TYP] 0.20    F)  DRAWING FILENAME: MKT-MA04AREV3<br>0.25 10°<br>5° 0.60 MIN<br>SEATING<br>1.70<br>PLANE<br>DETAIL A<br>SCALE: 2:1<br>**----- End of picture text -----**<br>


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