FDS8958B.

## **ON Semiconductor** 

## **Is Now** 

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## **FDS8958B** 

## **Dual N & P-Channel PowerTrench[®] MOSFET Q1-N-Channel: 30 V, 6.4 A, 26 m** Ω **Q2** - **P-Channel: -30 V, -4.5 A, 51 m** Ω 

## **Features** 

Q1: N-Channel 

Max rDS(on) = 26 mΩ at VGS = 10 V, ID = 6.4 A Max rDS(on) = 39 mΩ at VGS = 4.5 V, ID = 5.2 A 

Q2: P-Channel 

- Max rDS(on) = 51 mΩ at VGS = -10 V, ID = -4.5 A Max rDS(on) = 80 mΩ at VGS = -4.5 V, ID = -3.3 A HBM ESD protection level > 3.5 kV (Note 3) 

## **General Description** 

These dual N- and P-Channel enhancement mode power field effect transistors are produced using ON Semiconductor's advanced PowerTrench[®] process th at has been especially tailored to minimize on-state resistan ce and yet maintain superior switching performance. 

These devices are well suite d for low voltage and battery powered applications where low in-line power loss and fast switching are required. 

## **Application** 

DC-DC Conversion 

|Pin 1<br>**D1**<br>**D1**<br>**D2**<br>**D2**<br>**S2**<br>**S1**<br>**G1**<br>RoHS Compliant<br>~~2~~|**G2**|**G2**|**Q1**<br>**Q2**<br>**D1**<br>**D1**<br>**D2**<br>**D2**<br>**1**<br>**2**<br>**3**<br>**4**<br>**8**<br>**7**<br>**6**<br>**5**<br>BLU and motor drive inverter<br>~~oe~~|**Q1**<br>**Q2**<br>**D1**<br>**D1**<br>**D2**<br>**D2**<br>**1**<br>**2**<br>**3**<br>**4**<br>**8**<br>**7**<br>**6**<br>**5**<br>BLU and motor drive inverter<br>~~oe~~|**Q1**<br>**Q2**<br>**D1**<br>**D1**<br>**D2**<br>**D2**<br>**1**<br>**2**<br>**3**<br>**4**<br>**8**<br>**7**<br>**6**<br>**5**<br>BLU and motor drive inverter<br>~~oe~~|**Q1**<br>**Q2**<br>**D1**<br>**D1**<br>**D2**<br>**D2**<br>**1**<br>**2**<br>**3**<br>**4**<br>**8**<br>**7**<br>**6**<br>**5**<br>BLU and motor drive inverter<br>~~oe~~|**S1**<br>**G1**<br>**S2**<br>**G2**||
|---|---|---|---|---|---|---|---|---|
|**SO-8**|||||||||
|**MOSFET Maximum Ratings  **TC= 25 °C unless otherwise noted|= 25 °C unless otherwise noted||||||||
|**Symbol**||**Parameter**||||**Q1**|**Q2**|**Units**|
|VDS<br>Drain to Source Voltage||||||30|-30|V|
|VGS<br>Gate to Source Voltage||||||±20|±25|V|
|ID<br>Drain Current    - Continuous<br>- Pulsed|||TA= 25 °C|||6.4<br>30|-4.5<br>-30|A|
|Power Dissipation for Dual Operation||||||2.0|||
|PD<br>Power Dissipation for Single Operation|||TA= 25 °C|= 25 °C(Note 1a)||1.6||W|
||||TA= 25 °C|= 25 °C(Note 1b)||0.9|||
|EAS<br>Single Pulse Avalanche Energy||||(Note 4)||18|5|mJ|
|TJ, TSTG<br>Operatingand Storage Junction Temperature Ran|e Junction Temperature Range|||||-55 to +150|-55 to +150|°C|
|**Thermal Characteristics**|||||||||
|RθJC<br>Thermal Resistance, Junction to Case<br> (Note 1)<br>40<br>°C/W<br>RθJA<br>Thermal Resistance, Junction to Ambient<br> (Note 1a)<br>78<br>~~ee~~|||||||||
|**Package Marking and Ordering Information**|||||||||
|**Device Marking**<br>**Device**<br>FDS8958B<br>FDS8958B<br>~~[_~~|||**Package**<br>**Reel Size**<br>SO-8<br>13 ”|||**Tape Width**<br>**Quantity**<br>12 mm<br>2500 units|||



©2008 Semiconductor Components Industries, LLC. 

Publication Order Number: FDS8958B/D 

October-2017,Rev.3 

**Electrical Characteristics** TJ = 25 °C unless otherwise noted 

|**Symbol**|**Parameter**|**Test Conditions**|**Test Conditions**|**Type**|**Min**|**Typ**|**Max**|**Units**|
|---|---|---|---|---|---|---|---|---|
|**Off Characteristics**|||||||||
|BVDSS|Drain to Source Breakdown Voltage|ID= 250µA, VGS= 0 V<br>ID= -250µA, VGS= 0 V||Q1<br>Q2|30<br>-30|||V|
|∆BVDSS<br>∆TJ|Breakdown Voltage Temperature<br>Coefficient|ID= 250µA, referenced to 25 °C<br>ID= -250µA, referenced to 25 °C||Q1<br>Q2||24<br>-21||mV/°C|
|IDSS|Zero Gate Voltage Drain Current|VDS= 24 V,   VGS= 0 V<br>VDS= -24 V,  VGS= 0 V||Q1<br>Q2|||1<br>-1|µA|
|IGSS|Gate to Source Leakage Current|VGS= ±20 V, VDS= 0 V<br>VGS= ±25 V, VDS= 0 V||Q1<br>Q2|||±100<br>±10|nA<br>µA|
|**On Characteristics**|||||||||
|VGS(th)|Gate to Source Threshold Voltage|VGS= VDS,  ID= 250µA<br>VGS= VDS,  ID= -250µA||Q1<br>Q2|1.0<br>-1.0|2.0<br>-1.9|3.0<br>-3.0|V|
|∆VGS(th)<br>∆TJ|Gate to Source Threshold Voltage<br>Temperature Coefficient|ID= 250µA, referenced to 25 °C<br>ID= -250µA, referenced to 25 °C||Q1<br>Q2||-6<br>5||mV/°C|
|rDS(on)|Static Drain to Source On Resistance|VGS= 10 V,  ID= 6.4 A<br>VGS= 4.5 V,  ID= 5.2 A<br>VGS= 10 V,  ID= 6.4A, TJ= 125 °C||Q1||21<br>29<br>31|26<br>39<br>39|mΩ|
|||VGS= -10 V,  ID= -4.5 A<br>VGS= -4.5 V,  ID= -3.3 A<br>VGS= -10 V,  ID= -4.5 A, TJ= 125 °C||Q2||38<br>60<br>53|51<br>80<br>72||
|gFS|Forward Transconductance|VDD= 5 V,  ID= 6.4 A<br>VDD= -5 V,  ID= -4.5 A||Q1<br>Q2||20<br>10||S|
|**Dynamic Characteristics**|||||||||
|Ciss|Input Capacitance|Q1<br>VDS= 15 V, VGS= 0 V, f = 1 MHZ<br>Q2<br>VDS= -15 V, VGS= 0 V, f = 1 MHZ||Q1<br>Q2||405<br>570|540<br>760|pF|
|Coss|Output Capacitance|||Q1<br>Q2||75<br>115|100<br>155|pF|
|Crss|Reverse Transfer Capacitance|||Q1<br>Q2||55<br>100|80<br>150|pF|
|Rg|Gate Resistance|||Q1<br>Q2||2.4<br>4.4||Ω|
|**Switching Characteristics**|||||||||
|td(on)|Turn-On Delay Time|Q1<br>VDD= 15 V, ID= 6.4 A,<br>VGS= 10 V, RGEN= 6Ω<br>Q2<br>VDD= -15 V, ID= -4.5 A,<br>VGS= -10 V, RGEN= 6Ω||Q1<br>Q2||4.3<br>6.0|10<br>12|ns|
|tr|Rise Time|||Q1<br>Q2||2.0<br>6.0|10<br>12|ns|
|td(off)|Turn-Off Delay Time|||Q1<br>Q2||12<br>17|22<br>30|ns|
|tf|Fall Time|||Q1<br>Q2||2.0<br>7.0|10<br>14|ns|
|Qg(TOT)|Total Gate Charge|VGS= 10 V<br>VGS= -10 V|Q1<br>VDD= 15 V,<br>ID= 6.4 A<br>Q2<br>VDD= -15 V,<br>ID= -4.5 A|Q1<br>Q2||8.3<br>14|12<br>19|nC|
|Qg(TOT)|Total Gate Charge|VGS= 4.5 V<br>VGS= -4.5 V||Q1<br>Q2||4.1<br>7.0|5.8<br>9.6|nC|
|Qgs|Gate to Source  Charge|||Q1<br>Q2||1.3<br>1.9||nC|
|Qgd|Gate to Drain “Miller” Charge|||Q1<br>Q2||1.7<br>3.6||nC|



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Electrical Characteristics  TJ = 25 °C unless otherwise noted<br>Symbol Parameter Test Conditions Type Min Typ Max Units<br>Drain-Source Diode Characteristics<br>Q1 0.8  1.2<br>VSD Source to Drain Diode  Forward Voltage V [V][GS ] GS  [= 0 V, I] = 0 V, I [S ] S = -1.3 A         [= 1.3 A         (Note 2)] (Note 2) Q2 -0.8 -1.2 V<br>Q1 Q1 17 30<br>trr Reverse Recovery Time IF = 6.4 A, di/dt = 100 A/µs Q2 20 36 ns<br>Q2 Q1 6 12<br>eetiee Qrr Reverse Recovery Charge IF = -4.5 A, di/dt = 100 A/µs Q2 8 16 nC<br>NOTES:<br>1. RθJA is determined with the device mounted on a 1 in [2]  pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by<br> the user's board design.<br>a) 78 °C/W when b) 135 °C/W when<br>mounted on a  1 in [2]  mounted on a<br>pad of 2 oz copper minimun pad<br>**----- End of picture text -----**<br>


2. Pulse Test: Pulse Width < 30 0 µs, Duty cycle < 2.0%. 

3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. 

4. UIL condition: Starting TJ = 25 °C, L = 1 mH, IAS = 6 A, VDD = 27 V, VGS = 10 V . (Q1) Starting TJ = 25 °C, L = 1 mH, IAS = -4 A, VDD = -27 V, VGS = -10 V. (Q2) 

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## **Typical Characteristics (Q1 N-Channel)** TJ = 25 °C unless otherwise noted 

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30 3.0<br>VGS =  10 V VGS =  3.5 V<br>24 VGS = 6 V 2.5 VGS = 4 V<br>VGS = 4.5 V<br>18 VGS = 4 V 2.0 VGS = 4.5 V<br>12 1.5<br>VGS = 6 V<br>VGS = 3.5 V<br>6 1.0<br>PULSE DURATION = 80  µ s PULSE DURATION = 80  µ s VGS =  10 V<br>DUTY CYCLE = 0.5% MAX DUTY CYCLE = 0.5% MAX<br>0 0.5<br>0 0.5 1.0 1.5 2.0 2.5 3.0 0 6 12 18 24 30<br>VDS, DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 1.  On Region Characteristics Figure 2.  Normalized On-Resistance<br>vs Drain Current and Gate Voltage<br>1.8 75<br> ID = 6.4 A PULSE DURATION = 80  µ s<br>1.6 VGS = 10 V DUTY CYCLE = 0.5% MAX<br>60<br>1.4<br>ID = 3.2 A<br>1.2<br>45<br>1.0<br>TJ = 125 [ o] C<br>0.8<br>30<br>0.6<br>TJ = 25 [ o] C<br>0.4 15<br>-75 -50 -25 0 25 50 75 100 125 150 2 4 6 8 10<br>TJ, JUNCTION TEMPERATURE ( [o] C) VGS, GATE TO SOURCE VOLTAGE (V)<br>Figure 3.  Normalized  On  Resistance    Figure 4.   On-Resistance vs  Gate to<br>vs Junction Temperature Source Voltage<br>30 30<br>PULSE DURATION = 80  µ s VGS = 0 V<br>25 DUTY CYCLE = 0.5% MAX 10<br>20 VDS = 5 V TJ = 125  [ o] C<br>1<br>15<br>TJ = 25  [o] C<br>10 TJ = 125  [o] C 0.1<br>TJ = 25  [o] C<br>5<br>TJ = -55 [ o] C TJ = -55  [o] C<br>0 0.01<br>1 2 3 4 5 6 0.2 0.4 0.6 0.8 1.0 1.2 1.4<br>VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)<br>NORMALIZED<br>DRAIN CURRENT (A)<br>,<br>ID<br>DRAIN TO SOURCE ON-RESISTANCE<br>)<br>Ω<br>m<br>(<br>DRAIN TO<br>NORMALIZED rDS(on),<br>SOURCE ON-RESISTANCE<br> DRAIN TO SOURCE ON-RESISTANCE<br>, DRAIN CURRENT (A)<br>ID<br>, REVERSE DRAIN CURRENT (A)<br>IS<br>**----- End of picture text -----**<br>


**Figure 5.  Transfer Characteristics** 

**Figure 6.    Source to Drain  Diode Forward Voltage vs Source Current** 

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## **Typical Characteristics (Q1 N-Channel)** TJ = 25 °C unless otherwise noted 

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10 1000<br>ID = 6.4 A Ciss<br>8<br>VDD = 10 V<br>6<br>VDD = 15 V 100 Coss<br>4<br>VDD = 20 V<br>Crss<br>2<br>f = 1 MHz<br>VGS = 0 V<br>0 10<br>0 2 4 6 8 10 0.1 1 10 30<br>Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)<br>Figure 7.  Gate Charge Characteristics Figure 8.  Capacitance vs Drain<br>to Source Voltage<br>9 100<br>8 THIS AREA IS<br>7 LIMITED BY r<br>6 DS(on)<br>5 10 0.1 ms<br>4<br>TJ = 25  [o] C 1 ms<br>3 1<br>10 ms<br>2 SINGLE PULSE 100 ms<br>0.1 TJ = MAX RATED 1 s<br>TJ = 125  [o] C R θ JA = 135  [o] C/W 10 s<br>TA = 25  [o] C DC<br>1 0.01<br>0.001 0.01 0.1 1 10 100 0.01 0.1 1 10 100<br>tAV, TIME IN AVALANCHE (ms) VDS, DRAIN to SOURCE VOLTAGE (V)<br>Figure 9. Unclamped Inductive   Figure 10.  Forward  Bias  Safe<br>Switching Capability Operating Area<br>500<br>100 VGS = 10 V<br>SINGLE PULSE<br>R θ JA = 135  [o] C/W<br>10 TA = 25  [o] C<br>1<br>0.5<br>10-4 10-3 10-2 10-1 1 10 100 1000<br>t, PULSE WIDTH (sec)<br>Figure 11.  Single  Pulse Maximum Power  Dissipation<br>CAPACITANCE (pF)<br>, GATE TO SOURCE VOLTAGE (V)<br>GS<br>V<br>, DRAIN CURRENT (A)<br>ID<br>, AVALANCHE CURRENT (A)<br>IAS<br>, PEAK TRANSIENT POWER (W)<br>(PK)<br>P<br>**----- End of picture text -----**<br>


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Typical Characteristics (Q1 N-Channel)  TJ = 25 °C unless otherwise noted<br>2<br>1<br>DUTY CYCLE-DESCENDING ORDER<br>D = 0.5<br>   0.2<br>0.1    0.1<br>   0.05 PDM<br>   0.02<br>   0.01<br>t1<br>0.01 t2<br>SINGLE PULSE NOTES:<br>R θ JA = 135  [o] C/W DUTY FACTOR: D = tPEAK TJ = PDM x Z θJA 1 x R/t2 θJA  + TA<br>0.001<br>10-4 10-3 10-2 10-1 1 10 100 1000<br>t, RECTANGULAR PULSE DURATION (sec)<br>ZJA θ<br>IMPEDANCE,<br>NORMALIZED THERMAL<br>**----- End of picture text -----**<br>


**Figure 12.  Junction-to-Ambient Transient Thermal Response Curve** 

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## **Typical Characteristics (Q2 P-Channel)** TJ = 25 °C unless otherwise noted 

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30 4.5<br>VGS = -10 V VGS =  -6 V 4.0 VGS = -3.5 V<br>24 VGS = -4 V<br>PULSE DURATION = 80  µ s 3.5 VGS =  -4.5 V<br>DUTY CYCLE = 0.5% MAX<br>18 3.0 PULSE DURATION = 80  µ s<br>VGS = -4.5 V 2.5 DUTY CYCLE = 0.5%MAX<br>12 VGS = -4 V 2.0 VGS = -6 V<br>1.5<br>6<br>VGS = -3.5 V 1.0<br>VGS = -10 V<br>0 0.5<br>0.0 0.5 1.0 1.5 2.0 2.5 3.0 0 6 12 18 24 30<br>-VDS, DRAIN TO SOURCE VOLTAGE (V) -ID, DRAIN CURRENT (A)<br>Figure 15. On- Region Characteristics Figure 16. Normalized on-Resistance vs Drain<br>Current and Gate  Voltage<br>1.6 200<br>ID = -4.5 A PULSE DURATION = 80  µ s<br>VGS = -10 V DUTY CYCLE = 0.5% MAX<br>1.4 160<br>ID = -2.3 A<br>1.2 120<br>1.0 80<br>TJ = 125  [o] C<br>0.8 40<br>TJ = 25  [o] C<br>0.6 0<br>-75 -50 -25 0 25 50 75 100 125 150 2 4 6 8 10<br>TJ, JUNCTION TEMPERATURE ( [o] C) -VGS, GATE TO SOURCE VOLTAGE (V)<br>Figure 17. Normalized On-Resistance  Figure 18. On-Resistance vs Gate to<br> vs Junction Temperature Source Voltage<br>30 30<br>PULSE DURATION = 80  µ s VGS = 0 V<br>DUTY CYCLE = 0.5% MAX 10<br>25<br>VDS = -5 VDS = -5 V= -5 V TJ = -55 J = -55  = -55  [[o]] C TJ = 25 J = 25  = 25  [[o]] C<br>20<br>TJ = 125  [o] C<br>TJ = 125J = 125 = 125 [[ o]] C<br>15<br>TJ = 25  [o] C<br>10<br>0.1<br>5<br>TJ = -55  [o] C<br>0 0.01<br>1 2 3 4 5 6 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6<br>-VGS, GATE TO SOURCE VOLTAGE (V)GS, GATE TO SOURCE VOLTAGE (V), GATE TO SOURCE VOLTAGE (V) -VSD, BODY DIODE FORWARD VOLTAGE (V)<br>DRAIN CURRENT (A),  NORMALIZED<br>D<br>-I<br>DRAIN TO SOURCE ON-RESISTANCE<br>)<br>Ω<br>m<br>(<br>DRAIN TO<br>NORMALIZED rDS(on),<br>SOURCE ON-RESISTANCE<br> DRAIN TO SOURCE ON-RESISTANCE<br>, DRAIN CURRENT (A)<br>D<br>-I<br>, REVERSE DRAIN CURRENT (A)<br>S<br>-I<br>**----- End of picture text -----**<br>


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30<br>PULSE DURATION = 80  µ s<br>DUTY CYCLE = 0.5% MAX<br>25<br>VDS = -5 VDS = -5 V= -5 V TJ = -55 J = -55  = -55  [[o]] C TJ = 25 J = 25  = 25  [[o]] C<br>20<br>TJ = 125J = 125 = 125 [[ o]] C<br>15<br>10<br>5<br>0<br>1 2 3 4 5 6<br>-VGS, GATE TO SOURCE VOLTAGE (V)GS, GATE TO SOURCE VOLTAGE (V), GATE TO SOURCE VOLTAGE (V)<br>Figure 19. Transfer Characteristics<br>, DRAIN CURRENT (A)<br>D<br>-I<br>**----- End of picture text -----**<br>


**Figure 20. Source to Drain Diode Forward Voltage vs Source Current** 

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**7** 

## **Typical Characteristics (Q2 P-Channel)** TJ = 25 °C unless otherwise noted 

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10 2000<br>ID = -4.5 A<br>1000<br>8 Ciss<br>VDD = -10 V<br>6<br>VDD = -15 V<br>4 Coss<br>VDD = -20 V<br>100<br>2 Crss<br>f = 1 MHz<br>VGS = 0 V<br>0 30<br>0 3 6 9 12 15 0.1 1 10 30<br>Qg, GATE CHARGE (nC) -VDS, DRAIN TO SOURCE VOLTAGE (V)<br>Figure 21. Gate Charge Characteristics Figure 22. Capacitance vs Drain<br>to Source Voltage<br>8 10-2<br>7<br>6 10-3 VGS = 0V<br>5<br>10-4<br>4<br>TJ = 25  [o] C 10-5<br>3 TJ = 125 [o] C<br>10-6<br>2 10-7<br>TJ = 125  [o] C<br>10-8 TJ = 25 [o] C<br>1 10-9<br>0.01 0.1 1 10 0 5 10 15 20 25 30 35<br>tAV, TIME IN AVALANCHE (ms) -VGS, GATE TO SOURCE VOLTAGE(V)<br>Figure 23. Unclamped Inductive<br>Figure 24. Ig vs Vgs<br>Switching Capability<br>100 200<br>THIS AREA IS  100 VGS = -10 V<br>LIMITED BY r<br>DS(on)<br>10<br>0.1 ms SINGLE PULSE<br>R θ JA = 135  [o] C/W<br>1 ms<br>1 10 TA = 25  [o] C<br>10 ms<br>SINGLE PULSE 100 ms<br>0.1 TJ = MAX RATED 1 s<br>R θ JA = 135  [o] C/W 10 s<br>TA = 25  [o] C DC 1<br>0.01 0.5<br>0.01 0.1 1 10 100 10-4 10-3 10-2 10-1 1 10 100 1000<br>-VDS, DRAIN to SOURCE VOLTAGE (V) t, PULSE WIDTH (sec)<br>CAPACITANCE (pF)<br>, GATE TO SOURCE VOLTAGE (V)<br>GS<br>-V<br>, AVALANCHE CURRENT (A) GATE LEAKAGE CURRENT(A)<br>-IAS -Ig,<br>, DRAIN CURRENT (A)<br>D<br>-I<br>PEAK TRANSIENT POWER (W)<br>P)(PK,<br>**----- End of picture text -----**<br>


**Figure 25. Forward Bias Safe Operating Area** 

**Figure 26. Single Pulse  Maximum Power Dissipation** 

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Typical Characteristics (Q2 P-Channel)  TJ = 25 °C unless otherwise noted<br>2<br>1 DUTY CYCLE-DESCENDING ORDER<br>D = 0.5<br>      0.2<br>      0.1<br>0.1       0.05 PDM<br>      0.02<br>      0.01<br>t1<br>t2<br>0.01 SINGLE PULSE NOTES:<br>R θ JA = 135  [o] C/W DUTY FACTOR: D = tPEAK TJ = PDM x Z θJA 1 x R/t2 θJA  + TA<br>0.002<br>10-4 10-3 10-2 10-1 1 10 100 1000<br>t, RECTANGULAR PULSE DURATION (sec)<br>Z JA θ<br>IMPEDANCE,<br>NORMALIZED THERMAL<br>**----- End of picture text -----**<br>


**Figure 27. Junction-to-Ambient Transient Thermal Response Curve** 

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Physical Dimensions<br>0.65<br>4.90±0.10 A<br>(0.635)<br>8 5<br>B<br>1.75<br>6.00±0.20<br>3. 90±0.10 5.60<br>PIN ONE 1 4<br>INDICATOR<br>1.27<br>1.27<br>0.25 C B A LAND PATTERN RECOMMENDATION<br>SEE DETAIL A<br>0.175±0.75<br>0.22±0.30<br>1.75 MAX C<br>0.10<br>0.42±0.09 OPTION A - BEVEL EDGE<br>(0.86) x 45°<br>R0.10 GAGE PLANE<br>R0.10 OPTION B - NO BEVEL EDGE<br>0.36<br>8° NOTES: UNLESS OTHERWISE SPECIFIED<br>0° A)  THIS PACKAGE CONFORMS TO JEDEC<br>MS-012, VARIATION AA.<br>SEATING PLANE B)  ALL DIMENSIONS ARE IN MILLIMETERS.<br>0.65±0.25<br>C)  DIMENSIONS DO NOT INCLUDE MOLD<br>FLASH OR BURRS.<br>(1.04)  D) LANDPATTERN STANDARD: SOIC127P600X175-8M.<br>DETAIL A E)  DRAWING FILENAME: M08Arev15<br>SCALE: 2:1 F) FAIRCHILD SEMICONDUCTOR.<br>**----- End of picture text -----**<br>


## **Figure 16. 8-Lead, SOIC,JEDEC MS-012, .150-inch Narrow Body** 

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