FDS6986AS

## **Is Now Part of** 

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## March 2005 

## **FDS6986AS** 

## **Dual Notebook Power Supply N-Channel PowerTrench**[®] **SyncFET[™] General Description Features** 

The FDS6986AS is designed to replace two single SO8  MOSFETs and Schottky diode in synchronous DC:DC power supplies that provide various peripheral voltages for notebook computers and other battery powered electronic devices. FDS6986AS contains two unique 30V, N-channel, logic level, PowerTrench MOSFETs designed to maximize power conversion efficiency. 

The high-side switch (Q1) is designed with specific emphasis on reducing switching losses while the lowside switch (Q2) is optimized to reduce conduction losses.  Q2 also includes an integrated Schottky diode using Fairchild’s monolithic SyncFET technology. 

- **Q2** : Optimized to minimize conduction losses Includes SyncFET Schottky body diode 

- 7.9A,  30V RDS(on) = 20 mΩ @ VGS = 10V RDS(on) = 28 mΩ @ VGS = 4.5V 

- **Q1** : Optimized for low switching losses Low gate charge (10 nC typical) 

- 6.5A,  30V RDS(on) = 29 mΩ @ VGS = 10V RDS(on) = 38 mΩ @ VGS = 4.5V 

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Q2<br>D 5 4<br>D<br>D cH 6 @-o 3<br>D<br>7 Q1 2<br>SO-8<br>G 8 1<br>S tat<br>S<br>Pin 1 S SO-8 d S ti<br>Absolute Maximum Ratings   TA = 25°C unless otherwise noted<br>Symbol  Parameter  Q2 Q1  Units<br>VDSS Drain-Source Voltage  30  30  V<br>VGSS Gate-Source Voltage  ±20  ±16  V<br>ID Drain Current  - Continuous   (Note 1a) 7.9  6.5  A<br>- Pulsed  30  20<br>PD Power Dissipation for Dual Operation  2  W<br>Power Dissipation for Single Operation  (Note 1a) 1.6<br>(Note 1b) 1<br>(Note 1c) 0.9<br>TJ, TSTG Operating and Storage Junction Temperature Range  –55 to +150  °C<br>Thermal Characteristics<br>RθJA Thermal Resistance, Junction-to-Ambient   (Note 1a)  78  °C/W<br>RθJC Thermal Resistance, Junction-to-Case  (Note 1)  40  °C/W<br>$$<br>Package Marking and Ordering Information<br>Device Marking  Device  Reel Size  Tape width  Quantity<br>FDS6986AS FDS6986AS 13”  12mm  2500 units<br>FDS6986AS FDS6986AS_NL (Note 4) 13”  12mm  2500 units<br>es es<br>©2005 Fairchild Semiconductor Corporation  FDS6986AS Rev A(X)<br>G2<br>S2<br>G1<br>S1/D2<br>D2/S1<br>D2/S1<br>D1<br>D1<br>**----- End of picture text -----**<br>


FDS6986AS Rev A(X) 

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Electrical Characteristics  TA = 25°C unless otherwise noted<br>Symbol Parameter  Test Conditions  Type Min Typ Max Units<br>Off Characteristics<br>BVDSS Drain-Source Breakdown  VGS = 0 V, ID = 1 mA  Q2  30  V<br>Voltage VGS = 0 V, ID = 250 uA  Q1  30<br>∆BVDSS Breakdown Voltage  ID = 1 mA, Referenced to 25°C  Q2  31  mV/°C<br>   ∆TJ Temperature Coefficient   ID = 250 µA, Referenced to 25°C Q1  23<br>IDSS Zero Gate Voltage Drain  VDS = 24 V, VGS = 0 V  Q2  500  µA<br>Current Q1  1<br>IGSS Gate-Body Leakage  VGS = ±20 V, VDS = 0 V  Q2<br>±100  nA<br>VGS = ±16 V, VDS = 0 V  Q1<br>On Characteristics (Note 2)<br>VGS(th) Gate Threshold Voltage   VDS = VGS, ID = 1 mA  Q2  1  1.7  3  V<br>VDS = VGS, ID = 250 µA  Q1  1  1.9 3<br>∆VGS(th) Gate Threshold Voltage  ID = 1 mA, Referenced to 25°C  Q2  –3.2  mV/°C<br>   ∆TJ Temperature Coefficient  ID = 250 uA, Referenced to 25°C  Q1  –4.0<br>RDS(on) Static Drain-Source   VGS = 10 V, ID = 7.9 A  Q2  17  20  mΩ<br>On-Resistance  VGS = 10 V, ID = 7.9 A, TJ = 125°C  25  32<br>VGS = 4.5 V, ID = 7 A  22  28<br>VGS = 10 V, ID = 6.5 A  Q1  21  29<br>VGS = 10 V, ID = 6.5 A, TJ = 125°C  32  49<br>VGS = 4.5 V, ID = 5.6 A  32  38<br>ID(on) On-State Drain Current  VGS = 10 V, VDS = 5 V  Q2  30  A<br>Q1  20<br>gFS Forward Transconductance  VDS = 5 V, ID = 7.9 A  Q2  25  S<br>VDS = 5 V, ID = 6.5 A  Q1  15<br>Dynamic Characteristics<br>Ciss Input Capacitance  Q2  550  pF<br>VDS = 10 V, VGS = 0 V,  Q1  720<br>Coss Output Capacitance  Q2  180  pF<br> f = 1.0 MHz  Q1  120<br>Crss Reverse Transfer Capacitance Q2  70  pF<br>Q1  60<br>RG Gate Resistance  VGS = 15mV, f = 1.0 MHz  Q2  3.2  Ω<br>Q1  1.2<br>Switching Characteristics (Note 2)<br>td(on) Turn-On Delay Time  Q2  9  18  ns<br>Q1  10 19<br>tr Turn-On Rise Time  VDD = 15 V, ID = 1 A,  Q2  6  12  ns<br>Q1  4  8<br>td(off) Turn-Off Delay Time  VGS = 10V, RGEN = 6 Ω Q2  25  40  ns<br>Q1  24  39<br>tf Turn-Off Fall Time  Q2  4  8  ns<br>Q1  3 6<br>td(on) Turn-On Delay Time  Q2  11  20  ns<br>Q1  10 20<br>tr Turn-On Rise Time  VDD = 15 V, ID = 1 A,  Q2  15  26  ns<br>Q1  9 18<br>td(off) Turn-Off Delay Time  VGS = 4.5V, RGEN = 6 Ω Q2  15  26  ns<br>Q1  13 23<br>tf Turn-Off Fall Time  Q2  6  12  ns<br>Q1  3  6<br>**----- End of picture text -----**<br>


FDS6986AS Rev A (X) 

|**Electrical Characteristics(continued)**<br>TA= 25°C unless otherwise noted|**Electrical Characteristics(continued)**<br>TA= 25°C unless otherwise noted|**Electrical Characteristics(continued)**<br>TA= 25°C unless otherwise noted|**Electrical Characteristics(continued)**<br>TA= 25°C unless otherwise noted|||||
|---|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test Conditions**|**Type**|**Min**|**Typ**|**Max**|**Units**|
|**Switching Characteristics ** (Note 2)||||||||
|Qg(TOT)<br>|Total Gate Charge, Vgs = 10V|Q2:<br>VDS= 15 V, ID= 7.9 A<br>Q1:<br>VDS= 15 V, ID= 6.5 A|Q2<br>Q1||10<br>12|14<br>17|nC|
|Qg<br>|Total Gate Charge, Vgs = 5V||Q2<br>Q1||5.6<br>6.5|8<br>9|nC|
|Qgs<br>|Gate-Source Charge||Q2<br>Q1||2.0<br>2.3||nC|
|Qgd<br>|Gate-Drain Charge||Q2<br>Q1||1.5<br>2.1||nC|
|**Drain–Source Diode Characteristics and Maximum Ratings**||||||||
|IS<br>|Maximum Continuous Drain-Source Diode Forward Current||Q2<br>Q1|||3.0<br>1.3|A|
|Trr<br>|Reverse Recovery Time|IF= 10 A,<br>diF/dt= 300 A/µs<br>(Note 3)|Q2||15||ns|
|Qrr<br>|Reverse Recovery Charge||||6||nC|
|Trr<br>|Reverse Recovery Time|IF= 6.5 A,<br>diF/dt= 100 A/µs<br>(Note 3)|Q1||20||ns|
|Qrr<br>|Reverse Recovery Charge||||12||nC|
|VSD<br> <br>|Drain-Source Diode Forward<br>Voltage|VGS= 0 V, IS= 2.3 A(Note 2)<br>VGS=0V,IS= 1.3A (Note 2)|Q2<br>Q1||0.6<br>0.8|0.7<br>1.2|V|



**Notes:** 

**1.** RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.  RθJC is guaranteed by design while RθCA is determined by the user's board design. 

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a) 78°C/W when b) 125°C/W when c) 135°C/W when mounted on a mounted on a mounted on a 0.5in[2] pad of 2 0.02 in[2] pad of minimum pad. oz copper 2 oz copper 

Scale 1 : 1 on letter size paper 

**2.** Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% 

**3.** See “SyncFET Schottky body diode characteristics” below. 

**4.** FDS6986AS_NL is a lead free product.  FDS6986AS_NL marking will appear on the reel label. 

FDS6986AS Rev A (X) 

## **Typical Characteristics:   Q2** 

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30 2<br>VGS = 10V 3.5V VGS = 3.0V<br>25<br>1.75<br>6.0V 4.5V<br>20<br>3.0V 1.5<br>3.5V<br>15<br>4.0V<br>1.25 4.5V<br>10 5.0V<br>6.0V<br>2.5V 1 10V<br>5<br>0 0.75<br>0 0.5 1 1.5 2 2.5 3 0 5 10 15 20 25 30<br>VDS, DRAIN-SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 1. On-Region Characteristics.  Figure 2. On-Resistance Variation with<br>Drain Current and Gate Voltage.<br>1.6 0.065<br>VIDGS = 7.9A = 10V ID = 3.95A<br>1.4 0.055<br>1.2 0.045<br>1 0.035 T A  = 125 [o] C<br>0.8 0.025<br>TA = 25 [o] C<br>0.6 0.015<br>-50 -25 0 25 50 75 100 125 150 2 4 6 8 10<br>TJ, JUNCTION TEMPERATURE ( [o] C) VGS, GATE TO SOURCE VOLTAGE (V)<br>Figure 3. On-Resistance Variation with  Figure 4. On-Resistance Variation with<br>Temperature.  Gate-to-Source Voltage.<br>100<br>30 VGS = 0V<br>VDS = 5V<br>10<br>25<br>20 1 TA = 125 [o] C<br>15 0.1<br>25 [o] C<br>10 TA = 125 [o] C 0.01<br>-55 [o] C -55 [o] C<br>5 0.001<br>25 [o] C<br>0 0.0001<br>1.5 2 2.5 3 3.5 0 0.2 0.4 0.6 0.8 1 1.2<br>VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)<br>Figure 5. Transfer Characteristics.  Figure 6. Body Diode Forward Voltage Variation<br>with Source Current and Temperature.<br>, NORMALIZED<br>DS(ON)<br>, DRAIN CURRENT (A)ID R<br>DRAIN-SOURCE ON-RESISTANCE<br>, NORMALIZED<br>DS(ON) , ON-RESISTANCE (OHM)<br>R DS(ON)<br>R<br> DRAIN-SOURCE ON-RESISTANCE<br>, DRAIN CURRENT (A)ID<br>, REVERSE DRAIN CURRENT (A)IS<br>**----- End of picture text -----**<br>


FDS6986AS Rev A (X) 

## **Typical Characteristics:   Q2** 

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10 800<br>f = 1MHz<br>ID = 7.9A VDS = 10V 20V VGS = 0 V<br>8<br>600<br>15V Ciss<br>6<br>400<br>4<br>Coss<br>200<br>2<br>Crss<br>0 0<br>0 3 6 9 12 0 4 8 12 16 20<br>Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)<br>Figure 7. Gate Charge Characteristics.  Figure 8. Capacitance Characteristics.<br>100 50<br>SINGLE PULSE<br>100µs RθJA = 135°C/W<br>10 RDS(ON) LIMIT 1ms 40 TA = 25°C<br>10ms<br>100ms 30<br>1s<br>1 10s<br>DC 20<br>V GS  = 10V<br>0.1 SINGLE PULSE<br>RθJA = 135 [o] C/W 10<br>T A  = 25 [o] C<br>0.01 0<br>0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100<br>VDS, DRAIN-SOURCE VOLTAGE (V) t1, TIME (sec)<br>CAPACITANCE (pF)<br>, GATE-SOURCE VOLTAGE (V)<br>GS<br>V<br>, DRAIN CURRENT (A)ID<br>P(pk), PEAK TRANSIENT POWER (W)<br>**----- End of picture text -----**<br>


**Figure 9. Maximum Safe Operating Area.** 

**Figure 10. Single Pulse Maximum Power Dissipation.** 

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FDS6986AS Rev A (X)<br>**----- End of picture text -----**<br>


## **Typical Characteristics Q1** 

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20 3.4<br>VGS = 10V 4.0V VGS = 3.0V<br>3<br>6.0V 4.5V<br>15<br>2.6<br>5.0V<br>3.5V<br>3.5V<br>2.2<br>10 4.0V<br>1.8<br>4.5V<br>5.0V<br>5 3.0V 1.4 6.0V<br>1 10V<br>2.5V<br>0 0.6<br>0 0.5 1 1.5 2 2.5 3 0 5 10 15 20<br>VDS, DRAIN-SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 11. On-Region Characteristics.  Figure 12. On-Resistance Variation with<br>Drain Current and Gate Voltage.<br>1.6 0.135<br>VIDGS = 6.5A = 10V 0.115 ID = 3.3 A<br>1.4<br>0.095<br>1.2<br>0.075<br>1 TA = 125 [o] C<br>0.055<br>0.8 TA = 25 [o] C<br>0.035<br>0.6 0.015<br>-50 -25 0 25 50 75 100 125 150 2 4 6 8 10<br>TJ, JUNCTION TEMPERATURE ( [o] C) VGS, GATE TO SOURCE VOLTAGE (V)<br>Figure 13. On-Resistance Variation with  Figure 14. On-Resistance Variation with<br>Temperature.  Gate-to-Source Voltage.<br>100<br>20 VGS = 0V<br>VDS = 5V TA = -55 [o] C 10<br>125 [o] C<br>16<br>1<br>25 [o] C<br>12 TA = 125 [o] C<br>0.1<br>25 [o] C<br>8<br>0.01<br>-55 [o] C<br>4 0.001<br>0 0.0001<br>1.5 2 2.5 3 3.5 4 4.5 0 0.2 0.4 0.6 0.8 1 1.2<br>VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)<br>Figure 15. Transfer Characteristics.  Figure 16. Body Diode Forward Voltage Variation<br>with Source Current and Temperature.<br>, NORMALIZED<br>DS(ON)<br>, DRAIN CURRENT (A)ID R<br>DRAIN-SOURCE ON-RESISTANCE<br>, NORMALIZED<br>DS(ON) , ON-RESISTANCE (OHM)<br>R DS(ON)<br>R<br> DRAIN-SOURCE ON-RESISTANCE<br>, DRAIN CURRENT (A)ID<br>, REVERSE DRAIN CURRENT (A)IS<br>**----- End of picture text -----**<br>


FDS6986AS Rev A (X) 

## **Typical Characteristics  Q1** 

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10 1000<br>f = 1MHz<br>ID = 6.5A VGS = 0 V<br>8 800<br>VDS = 10V<br>20V Ciss<br>6 600<br>15V<br>4 400<br>Coss<br>2 200<br>Crss<br>0 0<br>0 3 6 9 12 15 0 4 8 12 16 20<br>Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)<br>Figure 17. Gate Charge Characteristics.  Figure 18. Capacitance Characteristics.<br>100 50<br>SINGLE PULSE<br>100µs RθJA = 135°C/W<br>10 RDS(ON) LIMIT 1ms 40 T A  = 25°C<br>10ms<br>100ms 30<br>1s<br>1 10s<br>DC 20<br>V GS  = 10V<br>0.1 SINGLE PULSE<br>RθJA = 135 [o] C/W 10<br>T A  = 25 [o] C<br>0.01 0<br>0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100<br>VDS, DRAIN-SOURCE VOLTAGE (V) t1, TIME (sec)<br>Figure 19. Maximum Safe Operating Area.  Figure 20. Single Pulse Maximum<br>Power Dissipation.<br>1<br>D = 0.5<br>0.2 R θJA (t) = r(t) * R θJA<br>0.1 0.1 RθJA = 135 °C/W<br>0.05<br>P(pk)<br>0.02<br>0.01 t 1<br>0.01 t2<br>SINGLE PULSE TJ - TA = P * RθJA(t)<br>Duty Cycle, D = t1 / t2<br>0.001<br>0.0001 0.001 0.01 0.1 1 10 100 1000<br>t1, TIME (sec)<br>CAPACITANCE (pF)<br>, GATE-SOURCE VOLTAGE (V)<br>GS<br>V<br>, DRAIN CURRENT (A)ID<br>P(pk), PEAK TRANSIENT POWER (W)<br>r(t), NORMALIZED EFFECTIVE<br>TRANSIENT THERMAL RESISTANCE<br>**----- End of picture text -----**<br>


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Figure 21. Transient Thermal Response Curve.<br>                            Thermal characterization performed using the conditions described in Note 1c.<br>                            Transient thermal response will change depending on the circuit board design.<br>**----- End of picture text -----**<br>


FDS6986AS Rev A (X) 

## **Typical Characteristics** (continued) 

## **SyncFET Schottky Body Diode Characteristics** 

Fairchild’s SyncFET process embeds a Schottky diode in parallel with PowerTrench MOSFET.  This diode exhibits similar characteristics to a discrete external Schottky diode in parallel with a MOSFET.  Figure 22 shows the reverse recovery characteristic of the FDS6986AS. 

Schottky barrier diodes exhibit significant leakage at high temperature and high reverse voltage.  This will increase the power in the device. 

**==> picture [437 x 432] intentionally omitted <==**

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reverse recovery characteristic of the FDS6986AS.  0.1<br>0.01<br>:. a a oe E 125 [o] C<br>t 0.001 E<br>100 [o] C<br>0.0001<br>:t::<br>0.00001<br>25 [o] C<br>:1;:c<br>0.000001<br>0 5 10 15 20 25 30<br>4 VDS, REVERSE VOLTAGE (V)<br>: : i :<br>Figure 24. SyncFET body diode reverse<br>: t : : leakage versus drain-source voltage and<br>temperature.<br>12.5nS/DIV<br>Figure 22. FDS6986AS SyncFET body diode<br>reverse recovery characteristic.<br>For comparison purposes, Figure 23 shows the reverse<br>recovery characteristics of the body diode of an<br>equivalent size MOSFET produced without SyncFET<br>(FDS6690A).<br>12.5nS/DIV<br>, REVERSE LEAKAGE CURRENT (A)<br>IDSS<br>0.8A/DIV<br>0.8A/DIV<br>**----- End of picture text -----**<br>


## **Figure 23. Non-SyncFET (FDS6690A) body diode reverse recovery characteristic.** 

FDS6986AS Rev A (X) 

## **Typical Characteristics** 

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L<br>VDS  BVDSS<br>VGS  tP VDS<br>RGE DUT + IAS<br>VDD  VDD<br>0V -<br>VGS  tp IAS<br>vary tP to obtain<br>required peak IAS  0.01Ω<br>tAV<br>Figure 25. Unclamped Inductive Load Test      Figure 26. Unclamped Inductive<br>Circuit  Waveforms<br>Drain Current<br>Same type as<br>+<br>50kΩ<br>10V<br>-  10µF  1µF  +<br>- VDD  QG(TOT)<br>VGS  10V<br>DUT<br>VGS  QGS  QGD<br>I<br>g(REF<br>Charge, (nC)<br>Figure 27. Gate Charge Test Circuit  Figure 28. Gate Charge Waveform<br>tON  tOFF<br>RL  td(ON)  td(OFF<br>VDS  VDS  90% tr ) tf 90%<br>VGS  +<br>10% 10%<br>RGEN  DUT VDD  0V<br>- 90%<br>VGS<br>VGS  50% 50%<br>Pulse Width ≤ 1µs<br>Duty Cycle ≤ 0.1% 0V 10% Pulse Width<br>Figure 29. Switching Time Test  Figure 30. Switching Time Waveforms<br>Circuit<br>**----- End of picture text -----**<br>


FDS6986AS Rev A (X) 

## **TRADEMARKS** 

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. 

|ACEx™|FAST|IntelliMAX™|POP™|SPM™|
|---|---|---|---|---|
|ActiveArray™|FASTr™|ISOPLANAR™|Power247™|Stealth™|
|<br>Bottomless™|<br>FPS™|LittleFET™|PowerEdge™|SuperFET™|
|CoolFET™|FRFET™|MICROCOUPLER™|PowerSaver™|SuperSOT™-3|
|_CROSSVOLT_™|GlobalOptoisolator™|MicroFET™|PowerTrench|SuperSOT™-6|
|DOME™|GTO™|MicroPak™|QFET|SuperSOT™-8|
|EcoSPARK™|HiSeC™|MICROWIRE™|QS™|SyncFET™|
|E2CMOS™|I2C™|MSX™|QT Optoelectronics™|TinyLogic|
|EnSigna™|_i-Lo_™|MSXPro™|Quiet Series™|TINYOPTO™|
|FACT™|ImpliedDisconnect™|OCX™|RapidConfigure™|TruTranslation™|
|FACT Quiet Series™||OCXPro™|RapidConnect™|UHC™|
|Across the board. Around the world.™<br>The Power Franchise||OPTOLOGIC<br>OPTOPLANAR™|µSerDes™<br>SILENT SWITCHER|UltraFET<br>UniFET™|
|Programmable Active Droop™||PACMAN™|SMART START™|VCX™|



## **DISCLAIMER** 

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 

## **LIFE SUPPORT POLICY** 

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 

1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. 

## **PRODUCT STATUS DEFINITIONS** 

## **Definition of Terms** 

|**Definition of Terms**|||
|---|---|---|
|**Datasheet Identification**|**Product Status**|**Definition**|
|Advance Information|Formative or<br>In Design|This datasheet contains the design specifications for<br>product development. Specifications may change in<br>any manner without notice.|
|Preliminary|First Production|This datasheet contains preliminary data, and<br>supplementary data will be published at a later date.<br>Fairchild Semiconductor reserves the right to make<br>changes at any time without notice in order to improve<br>design.|
|No Identification Needed|Full Production|This datasheet contains final specifications. Fairchild<br>Semiconductor reserves the right to make changes at<br>any time without notice in order to improve design.|
|Obsolete|Not In Production|This datasheet contains specifications on a product<br>that has been discontinued by Fairchild semiconductor.<br>The datasheet is printed for reference information only.|



Rev. I15 

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