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FDS6900AS.
Dual MOSFET, N Channel, 30 V, 6.9 A, 0.027 ohm, SOIC, Surface Mount
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- Manufacturer: ONSEMI
- Product type: Dual MOSFETs
- No. of Pins: 8Pins
- Channel Type: N Channel
- Transistor Mounting: Surface Mount
- Transistor Polarity: N Channel
- Power Dissipation Pd: 2W
- Rds(on) Test Voltage: 10V
- On Resistance Rds(on): 0.027ohm
- Transistor Case Style: SOIC
- Drain Source Voltage Vds: 30V
- Operating Temperature Max: 150°C
- Continuous Drain Current Id: 6.9A
- Power Dissipation N Channel: 2W
- Gate Source Threshold Voltage Max: 1.9V
- Drain Source Voltage Vds N Channel: 30V
- Continuous Drain Current Id N Channel: 6.9A
- Drain Source On State Resistance N Channel: 0.027ohm
| Delivery and price | |
|---|---|
| Units per pack | 5000 |
| Price | 0.304 € |
| Current stock | 10+ |
| Lead time | 30 days |
Datasheet
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ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. **==> picture [47 x 11] intentionally omitted <==** **----- Start of picture text -----**<br> May 2005<br>**----- End of picture text -----**<br> **FDS6900AS Dual N-Ch PowerTrench**[®] **SyncFET[™] General Description** The FDS6900AS is designed to replace two single SO8 MOSFETs and Schottky diode in synchronous DC:DC power supplies that provide various peripheral voltages for notebook computers and other battery powered electronic devices. FDS6900AS contains two unique 30V, N-channel, logic level, PowerTrench MOSFETs designed to maximize power conversion efficiency. The high-side switch (Q1) is designed with specific emphasis on reducing switching losses while the lowside switch (Q2) is optimized to reduce conduction losses. Q2 also includes an integrated Schottky diode using Fairchild’s monolithic SyncFET technology. ## **Features** **==> picture [192 x 124] intentionally omitted <==** **----- Start of picture text -----**<br> • Q2 : Optimized to minimize conduction losses<br>Includes SyncFET Schottky body diode<br> 8.2A, 30V RDS(on) = 22mΩ @ VGS = 10V<br>RDS(on) = 28mΩ @ VGS = 4.5V<br>• Q1 : Optimized for low switching losses<br>Low Gate Charge (11nC typical)<br> 6.9A, 30V RDS(on) = 27mΩ @ VGS = 10V<br>RDS(on) = 34mΩ @ VGS = 4.5V<br>• 100% RG (Gate Resistance) Tested<br>**----- End of picture text -----**<br> **==> picture [433 x 359] intentionally omitted <==** **----- Start of picture text -----**<br> S1D2D 1 8<br>S1D2D<br>S1D2D 2 Q1 7<br>DG1<br>3 6<br>Q2<br>SO-8 S2 4 5<br>G2 G pa<br>& D1D1S S Dual N-Channel SyncFet<br>Pin 1 < SO- S<br>Absolute Maximum Ratings TA = 25°C unless otherwise noted<br>Symbol Parameter Q2 Q1 Units<br>VDSS Drain-Source Voltage 30 30 V<br>VGSS Gate-Source Voltage ±20 ±20 V<br>ID Drain Current - Continuous (Note 1a) 8.2 6.9 A<br>- Pulsed 30 20<br>PD Power Dissipation for Dual Operation 2 W<br>Power Dissipation for Single Operation (Note 1a) 1.6<br>(Note 1b) 1<br>(Note 1c) 0.9<br>TJ, TSTG Operating and Storage Junction Temperature Range –55 to +150 °C<br>Thermal Characteristics<br>RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W<br>RθJC Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W<br>Ss— —<br>Package Marking and Ordering Information<br>Device Marking Device Reel Size Tape width Quantity<br>FDS6900AS FDS6900AS 13” 12mm 2500 units<br>FDS6900AS FDS6900AS_NL (Note 4) 13” 12mm 2500 units<br>———<br>**----- End of picture text -----**<br> ©2005 Fairchild Semiconductor Corporation FDS6900AS Rev B(X) ## **Electrical Characteristics** TA = 25°C unless otherwise noted |**Electri**|**cal Characteristics**|TA= 25°C unless otherwise noted|||||| |---|---|---|---|---|---|---|---| |**Symbol**|**Parameter**|**Test Conditions**|**Type **|**Min **|**Typ **|**Max**|**Units**| |**Off Characteristics**|||||||| |BVDSS|Drain-Source Breakdown<br>Voltage|VGS= 0 V,<br>ID= 1 mA<br>VGS=0V,<br>ID= 250 uA|Q2<br>Q1|30<br>30|||V| |∆BVDSS<br>∆TJ|Breakdown Voltage<br>Temperature Coefficient|ID= 10 mA, Referenced to 25°C<br>ID= 250 µA,Referenced to25°C|Q2<br>Q1||27<br>22||mV/°C| |IDSS|Zero Gate Voltage Drain<br>Current|VDS= 24 V,<br>VGS= 0 V|Q2<br>Q1|||500<br>1|µA| |IGSS|Gate-Body Leakage|VGS=±20 V, VDS= 0 V|Q2<br>Q1|||±100|nA| |**On Characteristics**<br>**(Note 2)**|||||||| |VGS(th)|Gate Threshold Voltage|VDS= VGS,<br>ID= 1 mA<br>VDS= VGS,<br>ID= 250 µA|Q2<br>Q1|1<br>1|1.9<br>1.9|3<br>3|V| |∆VGS(th)<br> <br>∆TJ|Gate Threshold Voltage<br>Temperature Coefficient|ID= 10 mA, Referenced to 25°C<br>ID= 250 uA, Referenced to 25°C|Q2<br>Q1||–3.2<br>–4.2||mV/°C| |RDS(on)|Static Drain-Source<br>On-Resistance|VGS= 10 V,<br>ID= 8.2 A<br>VGS= 10 V, ID= 8.2 A, TJ= 125°C<br>VGS= 4.5V,<br>ID= 7.6A|Q2||17<br>23<br>21|22<br>36<br>28|mΩ| |||VGS= 10 V,<br>ID= 6.9 A<br>VGS= 10 V, ID= 6.9 A, TJ= 125°C<br>VGS= 4.5V,<br>ID=6.2 A|Q1||22<br>30<br>27|27<br>38<br>34|| |ID(on)|On-State Drain Current|VGS= 10 V,<br>VDS= 5 V|Q2<br>Q1|30<br>20|||A| |gFS|Forward Transconductance|VDS= 5 V,<br>ID= 8.2 A<br>VDS=5V,<br>ID=6.9A|Q2<br>Q1||25<br>21||S| |**Dynamic Characteristics**|||||||| |Ciss|Input Capacitance|VDS= 15 V,<br>VGS= 0 V,<br>f = 1.0 MHz|Q2<br>Q1||570<br>600||pF| |Coss|Output Capacitance||Q2<br>Q1||180<br>150||pF| |Crss|Reverse Transfer Capacitance||Q2<br>Q1||70<br>70||pF| |RG|Gate Resistance||Q2<br>Q1||2.8<br>2.2|4.9<br>3.8|Ω| |**Switching Characteristics ** (Note 2)|||||||| |td(on)|Turn-On Delay Time|VDD= 15 V,<br>ID= 1 A,<br>VGS= 10V, RGEN= 6Ω|Q2<br>Q1||10<br>9|19<br>18|ns| |tr|Turn-On Rise Time||Q2<br>Q1||5<br>4|10<br>8|ns| |td(off)|Turn-Off Delay Time||Q2<br>Q1||26<br>23|42<br>32|ns| |tf|Turn-Off Fall Time||Q2<br>Q1||3<br>3|6<br>6|ns| |td(on)|Turn-On Delay Time|VDD= 15 V,<br>ID= 1 A,<br>VGS= 4.5 V, RGEN= 6Ω|Q2<br>Q1||11<br>10|20<br>19|ns| |tr|Turn-On Rise Time||Q2<br>Q1||15<br>9|27<br>18|ns| |td(off)|Turn-Off Delay Time||Q2<br>Q1||16<br>14|29<br>25|ns| |tf|Turn-Off Fall Time||Q2<br>Q1||6<br>4|12<br>8|ns| FDS6900AS Rev B (X) |**Electrical Characteristics(continued)**<br>TA= 25°C unless otherwise noted|**Electrical Characteristics(continued)**<br>TA= 25°C unless otherwise noted|**Electrical Characteristics(continued)**<br>TA= 25°C unless otherwise noted|**Electrical Characteristics(continued)**<br>TA= 25°C unless otherwise noted||||| |---|---|---|---|---|---|---|---| |**Symbol**|**Parameter**|**Test Conditions**|**Type**<br>|**Min**|**Typ**|**Max**|**Units**| |**Switching Characteristics ** (Note 2)|||||||| |Qg(TOT)<br>|Total Gate Charge at Vgs=10V|Q2:<br>VDS= 15 V, ID= 8.2A<br>Q1:<br>VDS= 15 V, ID= 6.9A|Q2<br>Q1||10<br>11|15<br>15|nC| |Qg<br>|Total Gate Charge at Vgs=5V||Q2<br>Q1||5.8<br>6.1|8.2<br>8.5|nC| |Qgs<br>|Gate–Source Charge||Q2<br>Q1||1.6<br>1.7||nC| |Qgd<br>|Gate–Drain Charge||Q2<br>Q1||2.1<br>2.2||nC| |**Drain–Source Diode Characteristics and Maximum Ratings**|||||||| |IS<br>|Maximum Continuous Drain-Source Diode Forward Current||Q2<br>Q1|||2.3<br>1.3|A| |Trr<br>|Reverse Recovery Time|IF= 8.2 A,<br>diF/dt= 300 A/µs<br>(Note 3)|Q2||15||ns| |Qrr<br>|Reverse Recovery Charge||||6||nC| |Trr<br>|Reverse Recovery Time|IF= 6.9 A,<br>diF/dt= 100 A/µs<br>(Note 3)|Q1||19||ns| |Qrr<br>|Reverse Recovery Charge||||10||nC| |VSD<br> <br>|Drain-Source Diode Forward<br>Voltage|VGS= 0 V, IS= 2.3 A(Note 2)<br>VGS= 0 V, IS= 5 A(Note 2)<br>VGS=0V,IS= 1.3A (Note 2)|Q2<br>Q2<br>Q1||0.6<br>0.7<br>0.7|0.7<br>1.0<br>1.2|V| **Notes:** **1.** RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. **==> picture [80 x 82] intentionally omitted <==** a) 78°C/W when b) 125°C/W when c) 135°C/W when mounted on a mounted on a mounted on a 0.5in[2] pad of 2 0.02 in[2] pad of minimum pad. oz copper 2 oz copper Scale 1 : 1 on letter size paper **2.** Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% **3.** See “SyncFET Schottky body diode characteristics” below. **4.** FDS6900AS_NL is a lead free product. The FDS6900AS_NL marking will appear on the reel label. FDS6900AS Rev B (X) ## **Typical Characteristics: Q2** **==> picture [429 x 540] intentionally omitted <==** **----- Start of picture text -----**<br> 30 2.4<br>VGS = 10V 4.0V 3.5V VGS = 3.0V<br>2.2<br>6.0V 4.5V 2<br>20<br>1.8<br>1.6 3.5V<br>3.0V<br>1.4 4.0V<br>10<br>4.5V<br>1.2 5.0V<br>6.0V<br>2.5V 1 10V<br>0 0.8<br>0 0.5 1 1.5 2 2.5 3 0 5 10 15 20 25 30<br>VDS, DRAIN-SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with<br>Drain Current and Gate Voltage.<br>1.6 0.06<br>VIDGS = 8.2A = 10V ID = 4A<br>1.4 0.05<br>1.2 0.04<br>1 0.03 T A = 125 [o] C<br>0.8 0.02<br>TA = 25 [o] C<br>0.6 0.01<br>-50 -25 0 25 50 75 100 125 150 2 4 6 8 10<br>TJ, JUNCTION TEMPERATURE ( [o] C) VGS, GATE TO SOURCE VOLTAGE (V)<br>Figure 3. On-Resistance Variation with Figure 4. On-Resistance Variation with<br>Temperature. Gate-to-Source Voltage.<br>30 100<br>VDS = 5V VGS = 0V<br>25<br>10<br>20<br>1 TA = 125 [o] C<br>15<br>TA = 125 [o] C 0.1 25 [o] C<br>10<br>-55 [o] C<br>0.01 -55 [o] C<br>5<br>25 [o] C<br>0 0.001<br>1.5 2 2.5 3 3.5 4 0 0.2 0.4 0.6 0.8 1<br>VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)<br>Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation<br>with Source Current and Temperature.<br>, NORMALIZED<br>, DRAIN CURRENT (A)ID RDS(ON)<br>DRAIN-SOURCE ON-RESISTANCE<br>, NORMALIZED<br>DS(ON) , ON-RESISTANCE (OHM)<br>R DS(ON)<br>R<br> DRAIN-SOURCE ON-RESISTANCE<br>, DRAIN CURRENT (A)ID<br>, REVERSE DRAIN CURRENT (A)IS<br>**----- End of picture text -----**<br> FDS6900AS Rev B (X) ## **Typical Characteristics: Q2** **==> picture [422 x 496] intentionally omitted <==** **----- Start of picture text -----**<br> 10 800<br>ID =8.2A f = 1MHz<br>VGS = 0 V<br>8<br>VDS = 10V 600<br>6 20V Ciss<br>400<br>15V<br>4<br>Coss<br>200<br>2<br>Crss<br>0 0<br>0 3 6 9 12 0 5 10 15 20 25 30<br>Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)<br>Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.<br>100 50<br>SINGLE PULSE<br>RDS(ON) LIMIT 100µs RθJA = 135°C/W<br>10 1ms 40 T A = 25°C<br>10ms<br>100ms<br>30<br>1s<br>1 10s<br>DC<br>20<br>VGS = 10V<br>0.1 SINGLE PULSE<br>10<br>Rθ JA = 135 [o] C/W<br>T A = 25 [o] C<br>0.01 0<br>0.1 1 10 100 0.001 0.01 0.1 1 10 100 1000<br>VDS, DRAIN-SOURCE VOLTAGE (V) t1, TIME (sec)<br>Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum<br>Power Dissipation.<br>1<br>D = 0.5<br>0.2 R θJA (t) = r(t) * R θJA<br>0.1 0.1 RθJA = 135 °C/W<br>0.05<br>P(pk)<br>0.02<br>0.01 t 1<br>0.01 t2<br>TJ - TA = P * RθJA(t)<br>SINGLE PULSE Duty Cycle, D = t1 / t2<br>0.001<br>0.0001 0.001 0.01 0.1 1 10 100 1000<br>t1, TIME (sec)<br>CAPACITANCE (pF)<br>, GATE-SOURCE VOLTAGE (V)<br>GS<br>V<br>, DRAIN CURRENT (A)ID<br>P(pk), PEAK TRANSIENT POWER (W)<br>THERMAL RESISTANCE<br>r(t), NORMALIZED EFFECTIVE TRANSIENT<br>**----- End of picture text -----**<br> **==> picture [203 x 10] intentionally omitted <==** **----- Start of picture text -----**<br> Figure 11. Transient Thermal Response Curve.<br>**----- End of picture text -----**<br> **==> picture [232 x 13] intentionally omitted <==** **----- Start of picture text -----**<br> Thermal characterization performed using the conditions described in Note 1c.<br> Transient thermal response will change depending on the circuit board design.<br>**----- End of picture text -----**<br> FDS6900AS Rev B (X) ## **Typical Characteristics Q1** **==> picture [426 x 507] intentionally omitted <==** **----- Start of picture text -----**<br> 20 2.2<br>VGS = 10V 3.5V VGS = 3.0V<br>4.0V 2<br>16<br>6.0V 4.5V 1.8<br>12<br>1.6<br> 3.5V<br>8 3.0V 1.4<br> 4.0V<br>1.2 4.5V 5.0V<br>4 6.0V<br>1 10V<br>2.5V<br>0 0.8<br>0 0.4 0.8 1.2 1.6 2 0 4 8 12 16 20<br>VDS, DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 12. On-Region Characteristics. Figure 13. On-Resistance Variation with<br>Drain Current and Gate Voltage.<br>1.6 0.07<br>VIDGS = 6.9A = 10V ID = 3.5A<br>1.4 0.06<br>1.2 0.05<br>1 0.04 T A = 125 [o] C<br>0.8 0.03<br>TA = 25 [o] C<br>0.6 0.02<br>-50 -25 0 25 50 75 100 125 150 2 4 6 8 10<br>TJ, JUNCTION TEMPERATURE ( [o] C) VGS, GATE TO SOURCE VOLTAGE (V)<br>Figure 14. On-Resistance Variation with Figure 15. On-Resistance Variation with<br>Temperature. Gate-to-Source Voltage.<br>20 100<br>VDS = 5V VGS = 0V<br>10<br>16<br>1 TA = 125 [o] C<br>12<br>25 [o] C<br>0.1<br>8 -55 [o] C<br>TA = 125 [o] C -55 [o] C 0.01<br>4<br>0.001<br>25 [o] C<br>0 0.0001<br>1 1.5 2 2.5 3 3.5 4 0 0.2 0.4 0.6 0.8 1 1.2<br>VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)<br>, NORMALIZED<br>, DRAIN CURRENT (A)ID RDS(ON)<br>DRAIN-SOURCE ON-RESISTANCE<br>, NORMALIZED<br>DS(ON) , ON-RESISTANCE (OHM)<br>R DS(ON)<br>R<br> DRAIN-SOURCE ON-RESISTANCE<br>, DRAIN CURRENT (A)ID<br>, REVERSE DRAIN CURRENT (A)IS<br>**----- End of picture text -----**<br> **Figure 16. Transfer Characteristics.** **Figure 17. Body Diode Forward Voltage Variation with Source Current and Temperature.** FDS6900AS Rev B (X) ## **Typical Characteristics Q1** **==> picture [421 x 493] intentionally omitted <==** **----- Start of picture text -----**<br> 10 800<br>ID = 6.9A f = 1 MHz<br>VGS = 0 V<br>8<br>600<br>VDS = 10V 20V Ciss<br>6<br>400<br>15V<br>4<br>Coss<br>200<br>2<br>Crss<br>0 0<br>0 2 4 6 8 10 12 0 5 10 15 20 25 30<br>Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)<br>Figure 18. Gate Charge Characteristics. Figure 19. Capacitance Characteristics.<br>100 50<br>SINGLE PULSE<br>10 R DS(ON) LIMIT 1ms 100µs 40 RθJA T = 135°C/WA = 25°C<br>10ms<br>100ms 30<br>1s<br>1 10s<br>DC<br>20<br>VGS = 10V<br>0.1 SINGLE PULSE<br>RθJA = 135 [o] C/W 10<br>T A = 25 [o] C<br>0.01 0<br>0.1 1 10 100 0.001 0.01 0.1 1 10 100 1000<br>VDS, DRAIN-SOURCE VOLTAGE (V) t1, TIME (sec)<br>Figure 20. Maximum Safe Operating Area. Figure 21. Single Pulse Maximum<br>Power Dissipation.<br>1<br>D = 0.5<br>RθJA(t) = r(t) * RθJA<br>0.2 RθJA = 135 [o] C/W<br>0.1 0.1<br>0.05 P(pk)<br>0.02 t1<br>0.01 t2<br>0.01<br>TJ - TA = P * RθJA(t)<br>Duty Cycle, D = t1 / t2<br>SINGLE PULSE<br>0.001<br>0.0001 0.001 0.01 0.1 1 10 100 1000<br>t1, TIME (sec)<br>CAPACITANCE (pF)<br>, GATE-SOURCE VOLTAGE (V)<br>GS<br>V<br>, DRAIN CURRENT (A)ID<br>P(pk), PEAK TRANSIENT POWER (W)<br>THERMAL RESISTANCE<br>r(t), NORMALIZED EFFECTIVE TRANSIENT<br>**----- End of picture text -----**<br> **==> picture [324 x 26] intentionally omitted <==** **----- Start of picture text -----**<br> Figure 22. Transient Thermal Response Curve.<br> Thermal characterization performed using the conditions described in Note 1c.<br> Transient thermal response will change depending on the circuit board design.<br>**----- End of picture text -----**<br> FDS6900AS Rev B (X) ## **Typical Characteristics** (continued) ## **SyncFET Schottky Body Diode Characteristics** Fairchild’s SyncFET process embeds a Schottky diode in parallel with PowerTrench MOSFET. This diode exhibits similar characteristics to a discrete external Schottky diode in parallel with a MOSFET. **Figure 23** shows the reverse recovery characteristic of the FDS6900AS. **==> picture [126 x 290] intentionally omitted <==** **----- Start of picture text -----**<br> Time: 10nS/DIV<br>For comparison purposes, Figure 24<br>(FDS6690).<br>Current: 1.6A/DIV<br>Current: 1.6A/DIV<br>**----- End of picture text -----**<br> ## **Figure 23. FDS6900AS SyncFET body diode reverse recovery characteristic.** For comparison purposes, **Figure 24** shows the reverse recovery characteristics of the body diode of an equivalent size MOSFET produced without SyncFET (FDS6690). Schottky barrier diodes exhibit significant leakage at high temperature and high reverse voltage. This will increase the power in the device. **==> picture [188 x 122] intentionally omitted <==** **----- Start of picture text -----**<br> 0.01<br>125 [o] C<br>0.001<br>100 [o] C<br>0.0001<br>0.00001<br>25 [o] C<br>0.000001 =<br>0 5 10 15 20 25 30<br>VDS, REVERSE VOLTAGE (V)<br>, REVERSE LEAKAGE CURRENT (A)<br>IDSS<br>**----- End of picture text -----**<br> **Figure 25. SyncFET body diode reverse leakage versus drain-source voltage and temperature** **==> picture [47 x 6] intentionally omitted <==** **----- Start of picture text -----**<br> Time: 10nS/DIV<br>**----- End of picture text -----**<br> **Figure 24. Non-SyncFET (FDS6690) body diode reverse recovery characteristic.** FDS6900AS Rev B (X) **==> picture [455 x 641] intentionally omitted <==** **----- Start of picture text -----**<br> Typical Characteristics<br>L<br>VDS BVDSS<br>VGS tP VDS<br>RGE DUT + IAS<br>VDD VDD<br>0V -<br>VGS tp IAS<br>vary tP to obtain<br>required peak IAS 0.01Ω<br>tAV<br>Figure 26. Unclamped Inductive Load Test Figure 27. Unclamped Inductive<br>Circuit Waveforms<br>Drain Current<br>Same type as<br>+<br>50kΩ<br>10V<br>- 10µF 1µF +<br>- VDD QG(TOT)<br>VGS 10V<br>DUT<br>VGS QGS QGD<br>I<br>g(REF<br>Charge, (nC)<br>Figure 28. Gate Charge Test Circuit Figure 29. Gate Charge Waveform<br>tON tOFF<br>RL td(ON) td(OFF<br>VDS VDS 90% tr ) tf 90%<br>VGS +<br>10% 10%<br>RGEN DUT VDD 0V<br>- 90%<br>VGS<br>VGS 50% 50%<br>Pulse Width ≤ 1µs<br>Duty Cycle ≤ 0.1% 0V 10% Pulse Width<br>Figure 30. Switching Time Test Figure 31. Switching Time Waveforms<br>Circuit<br>**----- End of picture text -----**<br> FDS6900AS Rev B (X) ## **TRADEMARKS** The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. |<br>FAST®<br>FASTr™<br>FPS™<br>ACEx™<br>ActiveArray™<br>Bottomless™|ISOPLANAR™<br>LittleFET™<br>MICROCOUPLER™|PowerSaver™<br>PowerTrench®<br>QFET®|SuperSOT™-8<br>SyncFET™<br>TinyLogic®| |---|---|---|---| |FRFET™<br>Build it Now™|MicroFET™|QS™|TINYOPTO™| |GlobalOptoisolator™<br>CoolFET™|MicroPak™|QT Optoelectronics™|TruTranslation™| |GTO™<br>HiSeC™<br>_CROSSVOLT_™<br>DOME™|MICROWIRE™<br>MSX™|Quiet Series™<br>RapidConfigure™|UHC™<br>UltraFET®| |I2C™<br>EcoSPARK™|MSXPro™|RapidConnect™|UniFET™| |_i-Lo_™<br>ImpliedDisconnect™<br>IntelliMAX™<br>E2CMOS™<br>EnSigna™<br>FACT™|OCX™<br>OCXPro™<br>OPTOLOGIC®|μSerDes™<br>SILENT SWITCHER®<br>SMART START™|VCX™<br>Wire™| |FACT Quiet Series™|OPTOPLANAR™|SPM™|| |Across the board. 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