FDS4935BZ

## **Is Now Part of** 

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September 2006<br>tm<br>**----- End of picture text -----**<br>


## **FDS4935BZ** 

## **Dual 30 Volt P-Channel PowerTrench MOSFET** 

## **General Description** 

This P-Channel MOSFET has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers, and battery chargers. 

These MOSFETs feature faster switching and lower gate charge than other MOSFETs with comparable RDS(ON) specifications. 

The result is a MOSFET that is easy and safer to drive (even at very high frequencies), and DC/DC power supply designs with higher overall efficiency. 

## **Features** 

–6.9 A, –30 V. RDS(ON) = 22 m @ VGS = –10 V RDS(ON) = 35 m @ VGS = – 4.5 V 

Extended VGSS range (–25V) for battery applications 

ESD protection diode (note 3) 

High performance trench technology for extremely low RDS(ON) 

High power and current handling capability 

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DD1 5 4<br>DD1<br>DD2 6 Q1 3<br>DD2<br>7 2<br>SO-8 S1G1G 8 Q2 1<br>Sa G2 S<br>S2 S<br>Pin 1 SO-8 S<br>Absolute Maximum Ratings TA=25 [o] C unless otherwise noted<br>Symbol  Parameter  Ratings  Units<br>VDS\ Drain-Source Voltage   –30  V<br>VGS Gate-Source Voltage  +25  V<br>ID Drain Current  – Continuous  (Note 1a) –6.9  A<br>– Pulsed  –50<br>PD Power Dissipation for Single Operation  (Note 1a) 1.6  W<br>(Note 1b) 1.0<br>(Note 1c) 0.9<br>TJ, TSTG Operating and Storage Junction Temperature Range  –55 to +150  C<br>Thermal Characteristics<br>R JA Thermal Resistance, Junction-to-Ambient   (Note 1a)  78 C/W<br>R JC Thermal Resistance, Junction-to-Case  (Note 1)  40 C/W<br>——————_—<br>Package Marking and Ordering Information<br>Device Marking  Device  Reel Size  Tape width  Quantity<br>FDS4935BZ  FDS4935BZ  13’’  12mm   2500 units<br>————————<br>**----- End of picture text -----**<br>


FDS4935BZ Rev B1 (W) 

2006 Fairchild Semiconductor Corporation 

|**Electrical Characteristics**<br>TA= 25°C unless otherwise noted|**Electrical Characteristics**<br>TA= 25°C unless otherwise noted|**Electrical Characteristics**<br>TA= 25°C unless otherwise noted|**Electrical Characteristics**<br>TA= 25°C unless otherwise noted|**Electrical Characteristics**<br>TA= 25°C unless otherwise noted|**Electrical Characteristics**<br>TA= 25°C unless otherwise noted|**Electrical Characteristics**<br>TA= 25°C unless otherwise noted|
|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Test Conditions**|**Min**|**Typ**|**Max**|**Units**|
|**Off Characteristics**|||||||
|BVDSS|Drain–Source Breakdown Voltage|VGS= 0 V,<br>ID= –250�A|–30|||V|
|�BVDSS<br>�TJ|Breakdown Voltage Temperature<br>Coefficient|ID= –250�A,Referenced to 25�C||24||mV/�C|
|IDSS|Zero Gate Voltage Drain Current|VDS= –24 V, VGS= 0 V|||–1|�A|
|IGSS|Gate–BodyLeakage|VGS= +<br>25 V, VDS= 0 V|||+<br>10|�A|
|**On Characteristics**<br>**(Note 2)**|||||||
|VGS(th)|Gate Threshold Voltage|VDS= VGS, ID= –250�A|–1|–1.9|–3|V|
|�VGS(th)<br>�TJ|Gate Threshold Voltage<br>Temperature Coefficient|ID= –250�A,Referenced to 25�C||–5||mV/�C|
|rDS(on)|Static Drain–Source<br>On–Resistance|VGS= –10 V,  ID= –6.9 A<br>VGS= –4.5 V,  ID= –5.3 A<br>VGS= –10 V, ID= –6.9A,TJ=125�C||18<br>27.5<br>26|22<br>35<br>34|m�|
|gFS|Forward Transconductance|VDS= –5 V,    ID= –6.9 A||22||S|
|**Dynamic Characteristics**|||||||
|Ciss|Input Capacitance|VDS= –15 V,  VGS= 0 V,<br>f = 1.0 MHz||1360||pF|
|Coss|Output Capacitance|||240||pF|
|Crss|Reverse Transfer Capacitance|||200||pF|
|**Switching Characteristics(Note 2)**|||||||
|td(on)|Turn–On Delay Time|VDD= –15 V,  ID= –1 A,<br>VGS= –10 V,  RGEN= 6�||12|22|ns|
|tr|Turn–On Rise Time|||13|23|ns|
|td(off)|Turn–Off Delay Time|||68|108|ns|
|tf|Turn–Off Fall Time|||38|61|ns|
|Qg(TOT)|Total Gate Charge, VGS= 10V|VDS= –15 V,  ID= –6.9 A,<br>VGS= –10 V||29|40|nC|
|Qg(TOT)|Total Gate Charge, VGS= 5V|||16|23|nC|
|Qgs|Gate–Source Charge|||4||nC|
|Qgd|Gate–Drain Charge|||7||nC|
|**Drain–Source Diode Characteristics and Maximum Ratings**|||||||
|IS|Maximum Continuous Drain–Source Diode Forward Current||||–2.1|A|
|VSD|Drain–Source Diode Forward<br>Voltage|VGS= 0 V,<br>IS= –2.1 A<br>(Note 2)||–0.8|–1.2|V|
|tRR|Reverse Recovery Time|IF= –8.8 A,<br>diF/dt= 100 A/µs<br>(Note 2)||24||ns|
|QRR|Reverse Recovery Charge|||9||nC|



## **Notes:** 

**1.** R�JA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.  R�JC is guaranteed by design while R�CA is determined by the user's board design. 

**==> picture [61 x 63] intentionally omitted <==**

a) 78°C/W steady state b) 125°C/W when c) 135°C/W when mounted on a when mounted on a mounted on a .04 in[2] minimum pad. 1in[2] pad of 2 oz pad of 2 oz copper copper 

Scale 1 : 1 on letter size paper 

**2.** Pulse Test: Pulse Width < 300�s, Duty Cycle < 2.0% 

**3.** The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. 

FDS4935BZ Rev B1 (W) 

## **Typical Characteristics** 

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50 3<br>VGS = -10V  -5.0V VGS = -3.5V<br>40 -4.5V 2.6<br> -6.0V<br>2.2<br>30<br> -4.0V  -4.0V<br>1.8<br> -4.5V<br>20  -5.0V<br>-3.5V 1.4  -6.0V<br> -8.0V<br>10  -10V<br>1<br>-3.0V<br>0 0.6<br>0 1 2 3 4 0 10 20 30 40 50<br>-VDS, DRAIN TO SOURCE VOLTAGE (V) -ID, DRAIN CURRENT (A)<br>Figure 1. On-Region Characteristics.  Figure 2. On-Resistance Variation with<br>Drain Current and Gate Voltage.<br>1.6 0.08<br>VIDGS = -8.8A = -10V ID = -4.4A<br>1.4<br>0.06<br>1.2 TA = 125 [o] C<br>0.04<br>1 TA = 25 [o] C<br>0.02<br>0.8<br>0.6 0<br>-50 -25 0 25 50 75 100 125 150 2 4 6 8 10<br>TJ, JUNCTION TEMPERATURE ( [o] C) -VGS, GATE TO SOURCE VOLTAGE (V)<br>Figure 3. On-Resistance Variation with  Figure 4. On-Resistance Variation with<br>Temperature.  Gate-to-Source Voltage.<br>50 100<br>VDS = -5V V GS  = 0V<br>40 10<br>T A  = 125 [o] C<br>30 1<br>  25 [o] C<br>20 0.1 -55 [o] C<br>TA = 125 [o] C<br>-55 [o] C<br>10 0.01<br>25 [o] C<br>0 0.001<br>2 2.5 3 3.5 4 4.5 5 0 0.4 0.8 1.2 1.6<br>-VGS, GATE TO SOURCE VOLTAGE (V) -VSD, BODY DIODE FORWARD VOLTAGE (V)<br>Figure 5. Transfer Characteristics.  Figure 6. Body Diode Forward Voltage Variation<br>with Source Current and Temperature.<br>, NORMALIZED<br>, DRAIN CURRENT (A)D RDS(ON)<br>-I<br>DRAIN-SOURCE ON-RESISTANCE<br>, NORMALIZED<br>DS(ON) , ON-RESISTANCE (OHM)<br>R DS(ON)<br>R<br> DRAIN-SOURCE ON-RESISTANCE<br>, DRAIN CURRENT (A)-ID<br>, REVERSE DRAIN CURRENT (A)-IS<br>**----- End of picture text -----**<br>


FDS4935BZ Rev B1 (W) 

## **Typical Characteristics** 

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10 2000<br>ID = -8.8A f = 1 MHzVGS = 0 V<br>8 1600<br>VDS = -10V -20V Ciss<br>6 1200<br>-15V<br>4 800<br>Coss<br>2 400<br>Crss<br>0<br>0<br>0 5 10 15 20 25 30<br>0 6 12 18 24 30 36<br>Qg, GATE CHARGE (nC) -VDS, DRAIN TO SOURCE VOLTAGE (V)<br>Figure 7. Gate Charge Characteristics.  Figure 8. Capacitance Characteristics.<br>100 50<br>10 RDS(ON) LIMIT 1ms100�s 40 SINGLE PULSER�JAT = 125°C/WA = 25°C<br>10ms<br>100ms 30<br>1 1s<br>DC<br>20<br>V GS  = -10V<br>0.1 SINGLE PULSE<br>R�JA = 125 [o] C/W 10<br>T A  = 25 [o] C<br>0.01 0<br>0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 1000<br>-VDS, DRAIN-SOURCE VOLTAGE (V) t1, TIME (sec)<br>Figure 9. Maximum Safe Operating Area.  Figure 10. Single Pulse Maximum<br>Power Dissipation.<br>1<br>D = 0.5<br>R �JA (t) = r(t) * R �JA<br>0.2<br>0.1 0.1 R�JA = 125 [o] C/W<br>0.05 P(pk)<br>0.02 t 1<br>0.01 0.01 TJ - TA = P * R t2 �JA(t)<br>Duty Cycle, D = t 1  / t 2<br>SINGLE PULSE<br>0.001<br>0.0001 0.001 0.01 0.1 1 10 100 1000<br>t1, TIME (sec)<br>Figure 11. Transient Thermal Response Curve.<br>Thermal characterization performed using the conditions described in Note 1c.<br>Transient thermal response will change depending on the circuit board design.<br>CAPACITANCE (pF)<br>, GATE-SOURCE VOLTAGE (V)<br>GS<br>-V<br>, DRAIN CURRENT (A)-ID<br>P(pk), PEAK TRANSIENT POWER (W)<br>r(t), NORMALIZED EFFECTIVE<br>TRANSIENT THERMAL RESISTANCE<br>**----- End of picture text -----**<br>


FDS4935BZ Rev B1 (W) 

## **TRADEMARKS** 

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. 

|ACEx™|FACT Quiet Series™|OCX™|SILENT SWITCHER®|UniFET™|
|---|---|---|---|---|
|ActiveArray™|GlobalOptoisolator™|OCXPro™|SMART START™|UltraFET®|
|Bottomless™|GTO™|OPTOLOGIC®|SPM™|VCX™|
|Build it Now™|HiSeC™|OPTOPLANAR™|Stealth™|Wire™|
|CoolFET™|I2C™|PACMAN™|SuperFET™||
|_CROSSVOLT_™|_i-Lo_™|POP™|SuperSOT™-3||
|DOME™|ImpliedDisconnect™|Power247™|SuperSOT™-6||
|EcoSPARK™|IntelliMAX™|PowerEdge™|SuperSOT™-8||
|E2CMOS™|ISOPLANAR™|PowerSaver™|SyncFET™||
|EnSigna™|LittleFET™|PowerTrench®|TCM™||
|FACT™|MICROCOUPLER™|QFET®|TinyBoost™||
|FAST®|MicroFET™|QS™|TinyBuck™||
|FASTr™|MicroPak™|QT Optoelectronics™|TinyPWM™||
|FPS™|MICROWIRE™|Quiet Series™|TinyPower™||
|FRFET™|MSX™|RapidConfigure™|TinyLogic®||
||MSXPro™|RapidConnect™|TINYOPTO™||
|Across the board.|Around the world.™|µSerDes™|TruTranslation™||
|The Power Franchise®||ScalarPump™|UHC™||
|Programmable Active Droop™|||||



## **DISCLAIMER** 

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.  THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. 

## **LIFE SUPPORT POLICY** 

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. 

As used herein: 

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 

## **PRODUCT STATUS DEFINITIONS Definition of Terms** 

|**PRODUCT STATUS DEFINITIONS**<br>**Definition of Terms**|||
|---|---|---|
|**Datasheet Identification**|**Product Status**|**Definition**|
|Advance Information|Formative or In Design|This datasheet contains the design specifications for<br>product development. Specifications may change in<br>any manner without notice.|
|Preliminary|First Production|This datasheet contains preliminary data, and<br>supplementary data will be published at a later date.<br>Fairchild Semiconductor reserves the right to make<br>changes at any time without notice to improve<br>design.|
|No Identification Needed|Full Production|This datasheet contains final specifications. Fairchild<br>Semiconductor reserves the right to make changes at<br>any time without notice to improve design.|
|Obsolete|Not In Production|This datasheet contains specifications on a product<br>that has been discontinued by Fairchild semiconductor.<br>The datasheet is printed for reference information only.|



Rev. I20 

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