FDS4935A

## MOSFET – Dual, P-Channel, POWERTRENCH 

## 30 V 

## FDS4935A 

## **General Description** 

This P−Channel MOSFET is a rugged gate version of ON Semiconductor’s advanced POWERTRENCH[®] process. It has been optimized for power management applications requiring a wide range of gave drive voltage ratings (4.5 V – 20 V). 

## **Features** 

- −7 A, −30 V. RDS(ON) = 23 m @ VGS = −10 V RDS(ON) = 35 m @ VGS = −4.5 V 

- Low Gate Charge (15 nC Typical) 

- Fast Switching Speed 

- High Performance Trench Technology for Extremely Low RDS(ON) 

- High Power and Current Handling Capability 

- This is a Pb−Free Device 

## **Features** 

- Power Management 

- Load Switch 

- Battery Protection 

**ABSOLUTE MAXIMUM RATINGS** (TA = 25 ° C unless otherwise noted) 

|**Symbol**<br>~~=~~|**Parameter**<br>~~=~~|**Ratings**<br>~~=~~|**Unit**<br>~~=~~|
|---|---|---|---|
|VDS<br>~~=~~|Drain−Source Voltage<br>~~=~~|−30<br>~~=~~|V<br>~~=~~|
|VGSS<br>~~=~~|Gate−Source Voltage<br>~~=~~|±20<br>~~=~~|V<br>~~=~~|
|ID<br>~~=~~|Drain Current − Continuous (Note 1a)<br>− Pulsed<br>~~=~~|−7<br>−30<br>~~=~~|A<br>~~=~~|
|PD<br>~~=~~|Power Dissipation for Dual Operation<br>~~=~~|2<br>~~=~~|W<br>~~=~~|
|PD<br>~~=~~|Power Dissipation<br>(Note 1a)<br>for Single Operation<br>(Note 1b)<br>(Note 1c)<br>~~=~~|1.6<br>1<br>0.9<br>~~=~~|W<br>~~=~~|
|TJ, TSTG<br>~~=~~|Operating and Storage Junction<br>Temperature Range<br>~~=~~|−55 to +150<br>~~=~~|°C<br>~~=~~|



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D1<br>D1<br>D2<br>D2<br>G1<br>S1<br>G2<br>S2<br>SOIC8<br>CASE 751EB<br>MARKING DIAGRAM<br>FDS4935A<br>ALYW<br>|<br>FDS4935A = Specific Device Code<br>A = Assembly Site<br>L = Wafer Lot Number<br>YW = Assembly Start Week<br>**----- End of picture text -----**<br>


## **ELECTRICAL CONNECTION** 

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## **ORDERING INFORMATION** 

See detailed ordering and shipping information on page  5 of this data sheet. 

## **THERMAL CHARACTERISTICS** 

|**Symbol**|**Parameter**|**Ratings**|**Unit**|
|---|---|---|---|
|R JA|Thermal Resistance, Junction to<br>Ambient (Note 1a)|78|°C/W|
|R JC|Thermal Resistance, Junction to<br>Case (Note 1)|40|°C/W|



Publication Order Number: 

**1** 

© Semiconductor Components Industries, LLC, 2002 **May, 2021 − Rev. 1** 

**FDS4935A/D** 

**FDS4935A** 

**ELECTRICAL CHARACTERISTICS** (TA = 25 ° C unless otherwise noted) 

|**ELECTRICA**|**ELECTRICA**|**L CHARACTERISTICS**(TA= 25°C unless o|therwise noted)|||||
|---|---|---|---|---|---|---|---|
|**Symbol**||**Parameter**|**Test Condition**|**Min**|**Typ**|**Max**|**Unit**|
|**OFF CHARACTERISTICS**||||||||
||BVDSS<br>|Drain−Source Breakdown Voltage|VGS= 0 V, ID= −250�A|−30|−|−|V|
||�BVDSS<br>�TJ<br>|Breakdown Voltage Temperature Coefficient|ID= −250�A, Referenced to 25°C|−|−24|−|mV/°C|
||IDSS<br>|Zero Gate Voltage Drain Current|VDS= −24 V, VGS= 0 V|−|−|−10|�A|
||IGSSF<br>|Gate−Body Leakage Current, Forward|VGS= −20 V, VDS= 0 V|−|−|−100|nA|
||IGSSR<br>|Gate−Body Leakage Current, Reverse|VGS= 20 V, VDS= 0 V|−|−|100|nA|
|**ON CHARACTERISTICS**(Note 2)||||||||
||VGS(th)<br>|Gate Threshold Voltage|VDS= VGS, ID= −250�A|−1|−1.6|−3|V|
||�VGS(th)<br>�TJ<br>|Gate Threshold Voltage Temperature Coefficien|t<br>ID= −250�A, Referenced to 25°C|−|4.4|−|mV/°C|
||RDS(on)<br>|Static Drain−Source On−Resistance|VGS= −10 V, ID= −7 A<br>VGS= −4.5 V, ID= −5.5 A<br>VGS= −10 V, ID= −7 A, TJ= 125°C|−<br>−<br>−|19<br>28<br>26|23<br>35<br>34|m�|
||ID(on)<br>|On−State drain Current|VGS= −10 V, VDS= −5 V|−30|−|−|A|
||gFS<br>|Forward Transconductance|VDS= −5 V, ID= −7 A|−|19|−|S|
|**DYNAMIC CHARACTERISTICS**||||||||
|Ciss<br>I||nput Capacitance|VDS= −15 V, VGS= 0 V<br>f = 1.0 MHz|−|1233|−|pF|
|Coss<br>||Output Capacitance||−|311|−|pF|
|Crss<br>||Reverse Transfer Capacitance||−|152|−|pF|
|**SWITCHING CHARACTERISTICS**(Note 2)||||||||
|td(on)<br>||Turn−On Delay Time|VDD= −15 V, ID= −1 A<br>VGS= −10 V, RGEN= 6�|−|13|23|ns|
|tr<br>||Turn−On Rise Time||−|10|20|ns|
|td(off)<br>||Turn−Off Delay Time||−|48|77|ns|
|tf<br>||Turn−Off Fall Time||−|25|40|ns|
|Qg<br>||Total Gate Charge|VDS= −15 V, ID= −7 A<br>VGS= −5 V|−|15|21|nC|
|Qgs<br>||Gate−Source Charge||−|4.4|−|nC|
|Qgd<br>||Gate−Drain Charge||−|4.5|−|nC|
|**DRAIN−SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS**||||||||
|IS<br>||Maximum Continuous Drain−Source Diode Forward Current||−|−|−2.1|A|
|VSD<br>||Drain−Source Diode Forward Voltage|VGS= 0 V, IS= −2.1 A (Note 2)|−|−0.75|−1.2|V|



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 

1. R � JA is the sum of the junction−to−case and case−to−ambient resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R � JC is guaranteed by design while R � CA is determined by the user’s board design. 

a) 78 ° C/W when mounted on a 0.5 in[2] pad of 2 oz. Copper. 

b) 125 ° C/W when c) 135 ° C/W when mounted mounted on a 0.02 in[2] on a minimum pad. pad of 2 oz. copper. 

2. Pulse Test Pulse Width < 300 � s, Duty Cycle < 2.0% 

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**FDS4935A** 

## **TYPICAL CHARACTERISTICS** 

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50<br>VGS = −10 V −5.0 V<br>−6.0 V −4.5 V<br>40<br>−4.0 V<br>30<br>−3.5 V<br>20<br>−3.0 V<br>10<br>0<br>0 1 2 3 4 5<br>−VDS, DRAIN TO SOURCE VOLTAGE (V)<br>, DRAIN CURRENT (A)<br>D<br>−I<br>**----- End of picture text -----**<br>


**Figure 1. On−Region Characteristics** 

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2.4<br>2.2<br>VGS = −3.5 V<br>2<br>1.8<br> −4.0 V<br>1.6<br> −4.5 V<br>1.4  −5.0 V<br> −6.0 V<br>1.2<br> −10 V<br>1<br>0.8<br>0 10 20 30 40 50<br>−ID, DRAIN CURRENT (A)<br>, NORMALIZED<br>DS(ON)<br>R<br>DRAIN−SOURCE ON−RESISTANCE<br>**----- End of picture text -----**<br>


**Figure 2. On−Resistance Variation with Drain Current and Gate Voltage** 

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1.6<br>VGS = −10 V<br>ID = −7 A<br>1.4<br>1.2<br>1<br>0.8<br>0.6<br>−50 −25 0 25 50 75 100 125 150<br>TJ, JUNCTION TEMPERATURE ( ° C)<br>Figure 3. On−Resistance Variation with Temperature<br>50<br>VDS = −5 V TA = −55 ° C 25 ° C<br>40<br>125 ° C<br>30<br>20<br>10<br>0<br>1 2 3 4 5<br>−VGS, GATE TO SOURCE VOLTAGE (V)<br>, NORMALIZED<br>DS(ON)<br>R<br>DRAIN−SOURCE ON−RESISTANCE<br>, DRAIN CURRENT (A)<br>D<br>−I<br>**----- End of picture text -----**<br>


**Figure 3. On−Resistance Variation with Temperature** 

**Figure 5. Transfer Characteristics** 

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0.08<br>ID = −3.5 A<br>0.06<br>0.04<br>TA = 125 ° C<br>0.02<br>TA= 25 ° C<br>0<br>2 4 6 8 10<br>−VGS, GATE TO SOURCE VOLTAGE (V)<br>Figure 4. On−Resistance Variation with<br>Gate−to−Source Voltage<br>100<br>VGS = 0 V<br>10<br>TA = 125 ° C<br>1<br>0.1 25 ° C<br>−55 ° C<br>0.01<br>0.001<br>0.0001<br>0 0.2 0.4 0.6 0.8 1 1.2 1.4<br>−VSD, BODY DIODE FORWARD VOLTAGE (V)<br>) �<br>, ON−RESISTANCE (<br>DS(ON)<br>R<br>, REVERSE DRAIN CURRENT (A)<br>S<br>−I<br>**----- End of picture text -----**<br>


**Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature** 

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**FDS4935A** 

## **TYPICAL CHARACTERISTICS** (continued) 

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10<br>ID = −8.8 AD = −8.8 A = −8.8 A VDS = −5 VDS = −5 V = −5 V<br>−10 V<br>8<br>−15 V<br>6<br>4<br>2<br>0<br>0 4 8 12 16 20 24<br>Qg, GATE CHARGE (nC)g, GATE CHARGE (nC), GATE CHARGE (nC)<br> GATE−SOURCE VOLTAGE (V)GSGS ,<br>−V<br>**----- End of picture text -----**<br>


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2000<br>ID = −8.8 AD = −8.8 A = −8.8 A VDS = −5 VDS = −5 V = −5 V f = 1 MHz<br>−10 V 1800 VGS = 0 V<br>8 1600<br>−15 V 1400<br>CISS<br>6 1200<br>1000<br>4 800<br>600<br>2 400 COSS<br>200 C RSS<br>0 0<br>0 4 8 12 16 20 24 0 5 10 15 20 25 30<br>Qg, GATE CHARGE (nC)g, GATE CHARGE (nC), GATE CHARGE (nC) −VDS, DRAIN TO SOURCE VOLTAGE (V)<br>Figure 7. Gate−Charge Characteristics Figure 8. Capacitance Characteristics<br>100 50<br>RDS(ON) LIMIT 100  � s  SINGLE PULSE<br>1 ms  R � JA = 135 ° C/W<br>10 10 ms 40 [T] A = 25 ° C<br>100 ms<br>1 s 30<br>10 s<br>1<br>DC<br>20<br>0.1  VGS = −10 V<br> SINGLE PULSE 10<br> R � JA = 135 ° C/W<br>[T] A = 25 ° C<br>0.01 0<br>0 1 10 100 0.001 0.01 0.1 1 10 100<br>−VDS, DRAIN−SOURCE VOLTAGE (V) t1 [, TIME (sec)]<br>CAPACITANCE (pF)<br> GATE−SOURCE VOLTAGE (V)GSGS ,<br>−V<br>POWER (W)<br>, DRAIN CURRENT (A)<br>D P(pk), PEAK TRANSIENT<br>−I<br>**----- End of picture text -----**<br>


**Figure 10. Single Pulse Maximum Power Dissipation** 

**Figure 9. Maximum Safe Operating Area** 

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1<br> D = 0.5<br>  0.2<br>0.1  0.1 R � JA (t) = r(t) * R � JA<br>R � JA= 135 ° C/W<br> 0.05<br> 0.02 P(pk)<br>0.01  0.01  t 1<br> t  2<br>TJ − TA = P * R � JA (t)<br> Single Pulse Duty Cycle, D = t1 / t2<br>0.001<br>0.0001 0.001 0.01 0.1 1 10 100 1000<br>r(t), NORMALIZED EFFECTIVE<br>TRANSIENT THERMAL RESISTANCE<br>**----- End of picture text -----**<br>


**Figure 11. Transient Thermal Response Curve** Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. 

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**FDS4935A** 

## **ORDERING INFORMATION** 

|**Device Marking**|**Device**|**Package Type**|**Reel Size**|**Tape Width**|**Shipping**†|
|---|---|---|---|---|---|
|FDS4935A|FDS4935A|SOIC8<br>(Pb−Free)|13”|12 mm|2500 / Tape & Reel|



†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 

POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. 

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**5** 

MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** 

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SOIC8<br>CASE 751EB<br>ISSUE A<br>DATE 24 AUG 2017<br>**----- End of picture text -----**<br>


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