FDS4559

## **Is Now Part of** 

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## April 2002 

## **FDS4559** 

## **60V Complementary PowerTrench[] MOSFET** 

## **General Description** 

## **Features** 

This complementary MOSFET device is produced using • **Q1** : **N-Channel** Fairchild’s advanced PowerTrench process that has been especially tailored to minimize the on-state 4.5 A, 60 V RDS(on) = 55 mΩ @ VGS = 10V resistance and yet maintain low gate charge for superior switching performance. RDS(on) = 75 mΩ @ VGS = 4.5V 

**==> picture [435 x 462] intentionally omitted <==**

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•  Q2 :   P-Channel<br>Applications<br>  –3.5 A, –60 V RDS(on) = 105 mΩ @ VGS = –10V<br>•  DC/DC converter<br>RDS(on) = 135 mΩ @ VGS = –4.5V<br>•  Power management<br>•  LCD backlight inverter<br>DD2 5 Q2 4<br>DD2<br>DD1<br>6 3<br>DD1<br>Q1<br>7 2<br>SO-8 S2G2G<br>G1 S 8 1<br>S1 S<br>Pin 1 SO-8 S<br>Absolute Maximum Ratings   TA = 25°C unless otherwise noted<br>Symbol  Parameter  Q1 Q2  Units<br>VDSS Drain-Source Voltage  60  –60  V<br>VGSS Gate-Source Voltage  ±20  ±20  V<br>ID Drain Current - Continuous   (Note 1a) 4.5  –3.5  A<br>- Pulsed  20  –20<br>PD Power Dissipation for Dual Operation  2  W<br>Power Dissipation for Single Operation  (Note 1a) 1.6<br>(Note 1b) 1.2<br>(Note 1c) 1<br>TJ, TSTG Operating and Storage Junction Temperature Range  -55 to +175  °C<br>Thermal Characteristics<br>RθJA Thermal Resistance, Junction-to-Ambient   (Note 1a)  78  °C/W<br>RθJC Thermal Resistance, Junction-to-Case  (Note 1)  40  °C/W<br>==<br>Package Marking and Ordering Information<br>Device Marking  Device  Reel Size  Tape width  Quantity<br>FDS4559  FDS4559  13”  12mm  2500 units<br>2000 Fairchild Semiconductor Corporation 2000 Fairchild Semiconductor Corporation  FDS4559 Rev C1(W)<br>**----- End of picture text -----**<br>


2000 Fairchild Semiconductor Corporation 2000 Fairchild Semiconductor Corporation 

**==> picture [456 x 635] intentionally omitted <==**

**----- Start of picture text -----**<br>
Electrical Characteristics  TA = 25°C unless otherwise noted<br>Symbol Parameter  Test Conditions  Type Min Typ Max Units<br>Drain-Source Avalanche Ratings (Note 1)<br>WDSS Single Pulse Drain-Source  VDD = 30 V,  ID = 4.5 A  Q1  90  mJ<br>Avalanche Energy<br>IAR Maximum Drain-Source  Q1  4.5  A<br>Avalanche Current<br>Off Characteristics<br>BVDSS Drain-Source Breakdown  VGS = 0 V, ID = 250 µA  Q1  60  V<br>Voltage   VGS = 0 V, ID = –250 µA  Q2  –60<br>∆BVDSS Breakdown Voltage  ID = 250 µA, Referenced to 25°C  Q1  58  mV/°C<br>   ∆TJ Temperature Coefficient   ID = –250 µA, Referenced to 25°C Q2  –49<br>IDSS Zero Gate Voltage Drain  VDS = 48 V, VGS = 0 V  Q1  1  µA<br>Current  VDS = –48 V, VGS = 0 V  Q2  –1<br>IGSS Gate-Body Leakage  VGS = +20 V, VDS = 0 V  Q1  +100  nA<br>VGS = +20 V, VDS = 0 V  Q2  +100<br>On Characteristics (Note 2)<br>VGS(th) Gate Threshold Voltage   VDS = VGS, ID = 250 µA  Q1  1  2.2  3  V<br>VDS = VGS, ID = –250 µA  Q2  –1  –1.6  –3<br>∆VGS(th) Gate Threshold Voltage  ID = 250 µA, Referenced to 25°C  Q1  –5.5  mV/°C<br>   ∆TJ Temperature Coefficient  ID = –250 µA, Referenced to 25°C  Q2  4<br>RDS(on) Static Drain-Source   VGS = 10 V, ID = 4.5 A  Q1  42  55  mΩ<br>On-Resistance  VGS = 10 V, ID = 4.5 A, TJ = 125°C  72  94<br>VGS = 4.5 V, ID = 4 A  55  75<br>VGS = –10 V, ID = –3.5 A  Q2  82  105<br>VGS = –10 V, ID = –3.5 A, TJ = 125°C 130  190<br>VGS = –4.5 V, ID = –3.1 A  105  135<br>ID(on) On-State Drain Current  VGS = 10 V, VDS = 5 V  Q1  20  A<br>VGS = –10 V, VDS = –5 V  Q2  –20<br>gFS Forward Transconductance  VDS = 10 V, ID = 4.5 A  Q1  14  S<br>VDS = –5 V, ID = –3 5 A  Q2  9<br>Dynamic Characteristics<br>Ciss Input Capacitance  Q1  Q1  650  pF<br>VDS = 25 V, VGS = 0 V,  Q2  759<br>Coss Output Capacitance  f = 1.0 MHz  Q1  80  pF<br>Q2  Q2  90<br>Crss Reverse Transfer  VDS = –30 V, VGS = 0 V,  Q1  35  pF<br>Capacitance  f = 1.0 MHz  Q2  39<br>Switching Characteristics  (Note 2)<br>td(on) Turn-On Delay Time  Q1  Q1  11  20  ns<br>VDD = 30 V, ID = 1 A,  Q2  7  14<br>tr Turn-On Rise Time  VGS = 10V, RGEN = 6 Ω  Q1  8  18  ns<br>Q2  10  20<br>td(off) Turn-Off Delay Time  Q2  Q1  19  35  ns<br>VDD = –30 V, ID = –1 A,  Q2  19  34<br>tf Turn-Off Fall Time  VGS = –10 V, RGEN = 6 Ω Q1  6  15  ns<br>Q2  12  22<br>Qg Total Gate Charge  Q1  Q1  12.5  18  nC<br>VDS = 30 V, ID = 4.5 A, VGS = 10 V  Q2  15  21<br>Qgs Gate-Source Charge  Q1  2.4  nC<br>Q2  Q2  2.5<br>Qgd Gate-Drain Charge  VDS = –30 V, ID = –3.5 A, VGS = –10V Q1  2.6  nC<br>Q2  3.0<br>**----- End of picture text -----**<br>


FDS4559 Rev C1(W) 

|**Electrical Characteristics**|**Electrical Characteristics**|**(continued)**<br>TA= 25°C unless otherwis|e noted|||||
|---|---|---|---|---|---|---|---|
|**Symb**|**ol**<br>**Parameter**|**Test Conditions**|**Type**|**Min**|**Typ**|**Max**|**Units**|
|**Drain-Source Diode Characteristics and Maximum Ratings**||||||||
|IS|Maximum Continuous Drain-Source Diode Forward Current||Q1<br>Q2|||1.3<br>–1.3|A|
|VSD|Drain-Source Diode Forward<br>Voltage|VGS= 0 V, IS= 1.3 A(Note 2)<br>VGS= 0 V,IS= –1.3 A (Note 2)|Q1<br>Q2||0.8<br>–0.8|1.2<br>–1.2|V|



**Notes:** 

**1.** RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.  RθJC is guaranteed by design while RθCA is determined by the user's board design. 

**==> picture [63 x 76] intentionally omitted <==**

a) 78°C/W when b) 125°C/W when c) 135°C/W when mounted on a mounted on a mounted on a .02 in[2] minimum pad. 0.5 in[2] pad of 2 oz pad of 2 oz copper copper 

Scale 1 : 1 on letter size paper 

**2.** Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% 

FDS4559 Rev C1(W) 

## **Typical Characteristics: Q2** 

**==> picture [418 x 526] intentionally omitted <==**

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15 1.8<br>12 VGS = -10V-6.0V -5.0V -4.0V -4.5V 1.6 VGS = -3.5V<br>-3.5V  -4.0V<br>9 1.4<br>-4.5V<br> -5.0V<br>6 1.2  -6.0V<br>-3.0V  -7.0V<br> -8.0V<br> -10V<br>3 1<br>-2.5V<br>0 0.8<br>0 1 2 3 4 5 0 2 4 6 8 10<br>-VDS, DRAIN-SOURCE VOLTAGE (V) -ID, DRAIN CURRENT (A)<br>Figure 1. On-Region Characteristics.  Figure 2. On-Resistance Variation with<br>Drain Current and Gate Voltage.<br>2 0.4<br>1.8 VIDGS = -3.5A = -10V ID = -1.5A<br>1.6 0.3<br>1.4<br>TA = 125 [o] C<br>1.2 0.2<br>1<br>0.8 0.1<br>0.6 TA = 25 [o] C<br>0.4 0<br>-50 -25 0 25 50 75 100 125 150 175 2 4 6 8 10<br>TJ, JUNCTION TEMPERATURE ( [o] C) -VGS, GATE TO SOURCE VOLTAGE (V)<br>Figure 3. On-Resistance Variation with  Figure 4. On-Resistance Variation with<br>Temperature.  Gate-to-Source Voltage.<br>15 100<br>VDS = -5V TA = -55 [o] C 25 [o] C VGS = 0V<br>12 10<br>125 [o] C TA = 125 [o] C<br>9 1 25 [o] C<br>-55 [o] C<br>6 0.1<br>3 0.01<br>0 0.001<br>1 2 3 4 5 0 0.2 0.4 0.6 0.8 1 1.2 1.4<br>-VGS, GATE TO SOURCE VOLTAGE (V) -VSD,  BODY DIODE FORWARD VOLTAGE (V)<br>Figure 5. Transfer Characteristics.  Figure 6. Body Diode Forward Voltage Variation<br>, NORMALIZED<br>DS(ON)<br>, DRAIN CURRENT (A)-ID R<br>DRAIN-SOURCE ON-RESISTANCE<br>, NORMALIZED<br>RDS(ON) , ON-RESISTANCE (OHM)DS(ON)<br> DRAIN-SOURCE ON-RESISTANCE R<br>, DRAIN CURRENT (A)-ID<br>, REVERSE DRAIN CURRENT (A)-IS<br>**----- End of picture text -----**<br>


**Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.** 

FDS4559 Rev C1(W) 

## **Typical Characteristics: Q2** 

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10 1200<br>8 ID = -3.0A VDS = 10V 20V 1000 f = 1 MHz V GS  = 0 V<br>30V<br>800<br>6 CISS<br>600<br>4<br>400<br>2<br>200<br>CRSS COSS<br>0 0<br>0 4 8 12 16 0 10 20 30 40 50 60<br>Qg, GATE CHARGE (nC) -V DS, DRAIN TO SOURCE VOLTAGE (V)<br>Figure 7. Gate Charge Characteristics.  Figure 8. Capacitance Characteristics.<br>100 40<br>SINGLE PULSE<br>100µs RθJA = 135°C/W<br>10 RDS(ON) LIMIT 30 TA = 25°C<br>10ms<br>100ms<br>1 20<br>1s<br>V GS  = -10V DC10s<br>0.1 SINGLE PULSE 10<br>RθJA = 135 [o] C/W<br>TA = 25 [o] C<br>0.01 0<br>0.1 1 10 100 0.01 0.1 1 10 100 1000<br>-VDS, DRAIN-SOURCE VOLTAGE (V) t1, TIME (sec)<br>CAPACITANCE (pF)<br>, GATE-SOURCE VOLTAGE (V)<br>GS<br>-V<br>, DRAIN CURRENT (A)ID<br>P(pk), PEAK TRANSIENT POWER (W)<br>**----- End of picture text -----**<br>


**Figure 9. Maximum Safe Operating Area.** 

**Figure 10. Single Pulse Maximum Power Dissipation.** 

FDS4559 Rev C1(W) 

## **Typical Characteristics: Q1** 

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20 1.8<br>VGS = 10V<br>6.0V 4.5V<br>16 1.6<br>5.0V<br>4.0V VGS = 4.0V<br>12 1.4 4.5V<br>5.0V<br>8 1.2 6.0V<br>8.0V<br>3.5V 10V<br>4 1<br>0 0.8<br>0 1 2 3 4 0 4 8 12 16 20<br>VDS, DRAIN-SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 11. On-Region Characteristics.  Figure 12. On-Resistance Variation with<br>Drain Current and Gate Voltage.<br>2.2 0.14<br>2 VIDGS = 4.5A = 10V 0.12 ID = 2.3A<br>1.8<br>0.1<br>1.6<br>1.4 0.08 TA = 125 [o] C<br>1.2 0.06<br>1<br>0.8 0.04 TA = 25 [o] C<br>0.6 0.02<br>0.4<br>0<br>-50 -25 0 25 50 75 100 125 150 175<br>2 4 6 8 10<br>TJ, JUNCTION TEMPERATURE ( [o] C) VGS, GATE TO SOURCE VOLTAGE (V)<br>Figure 13. On-Resistance Variation with  Figure 14. On-Resistance Variation with<br>Temperature.  Gate-to-Source Voltage.<br>20 100<br>VDS = 5V TA = -55 [o] C 25 [o] C VGS = 0V<br>10<br>16 125 [o] C<br>1 TA = 125 [o] C<br>12 25 [o] C<br>0.1<br>-55 [o] C<br>8<br>0.01<br>4 0.001<br>0.0001<br>0<br>0 0.2 0.4 0.6 0.8 1 1.2<br>1 2 3 4 5 6<br>VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)<br>Figure 15. Transfer Characteristics.  Figure 16. Body Diode Forward Voltage Variation<br>with Source Current and Temperature.<br>, NORMALIZED<br>DS(ON)<br>R<br>, DRAIN-SOURCE CURRENT (A)ID DRAIN-SOURCE ON-RESISTANCE<br>, NORMALIZED<br>RDS(ON) , ON-RESISTANCE (OHM)DS(ON)<br>R<br> DRAIN-SOURCE ON-RESISTANCE<br>, DRAIN CURRENT (A)ID<br>, REVERSE DRAIN CURRENT (A)IS<br>**----- End of picture text -----**<br>


FDS4559 Rev C1(W) 

## **Typical Characteristics: Q1** 

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10<br>ID = 4.5A VDS = 10V 900<br>f = 1MHz<br>8 30V 20V 800 VGS = 0 V<br>700<br>CISS<br>6 600<br>500<br>4 400<br>300<br>2 200<br>100 COSS<br>0 0 CRSS<br>0 2 4 6 8 10 12 14 0 10 20 30 40 50 60<br>Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)<br>Figure 17. Gate Charge Characteristics.  Figure 18. Capacitance Characteristics.<br>100 40<br>SINGLE PULSE<br>RDS(ON) LIMIT RθJA = 135 [o] C/W<br>10 100µs 30 TA = 25 [o] C<br>1m<br>10ms<br>1 100ms 20<br>1s<br>VGS= 10V DC<br>SINGLE PULSE<br>0.1 RθJA= 135 [o] C/W 10<br>TA= 25 [o] C<br>0.01 0<br>0.1 1 10 100 0.01 0.1 1 10 100 1000<br>VDS, DRAIN-SOURCE VOLTAGE (V) SINGLE PULSE TIME (SEC)<br>Figure 19. Maximum Safe Operating Area.  Figure 20. Single Pulse Maximum<br>Power Dissipation.<br>1<br>D = 0.5<br>0.2 R θJA (t) = r(t) + R θJA<br>0.1 0.1 RθJA = 135°C/W<br>0.05<br>P(pk)<br>0.02<br>0.01 t 1<br>0.01 t2<br>SINGLE PULSE TJ - TA = P * RθJA(t)<br>Duty Cycle, D = t 1  / t 2<br>0.001<br>0.0001 0.001 0.01 0.1 1 10 100 1000<br>t1, TIME (sec)<br>Figure 21. Transient Thermal Response Curve.<br>Thermal characterization performed using the conditions described in Note 1c.<br>Transient thermal response will change depending on the circuit board design.<br>CAPACITANCE (pF)<br>, GATE-SOURCE VOLTAGE (V)<br>GS<br>V<br>POWER (W)<br>, DRAIN CURRENT (A)ID<br>r(t), NORMALIZED EFFECTIVE<br>TRANSIENT THERMAL RESISTANCE<br>**----- End of picture text -----**<br>


FDS4559 Rev C1(W) 

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