FDMQ8205A

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**September 2016** 

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## **FDMQ8205A GreenBridge[TM] 2 Series of High-Efficiency Bridge Rectifiers** 

## **Features** 

- Low Power Loss GreenBridge[TM] Replaces Diode Bridge 

- Self Driving Circuitry for MOSFETs 

- Low r 100V Rated MOSFETs DS(on) 

- Maximizing Available Power and Voltage 

- Eliminating Thermal Design Problems 

- IEEE802.3at Compatible 

- Meet Detection and Classification Requirement 

- Work with 2 and 4-pair Architecture 

- Small Backfeed Voltage 

- Compact MLP 4.5x5 Package 

## **Applications** 

- Power over Ethernet (PoE) Power Device (PD) 

- IP Phones 

- Network Cameras 

## **General Description** 

FDMQ8205A is GreenBridge[TM] 2 series of quad MOSFETs for a bridge application so that the input will be insensitive to the polarity of a power source coupled to the device. Many known bridge rectifier circuits can be configured using typical diodes. The conventional diode bridge has relatively high power loss that is undesirable in many applications. Especially, Power over Ethernet (PoE) Power Device (PD) application requires high-efficiency bridges because it should be operated with the limited power delivered from Power Source Equipment (PSE) which is classified by IEEE802.3at. FDMQ8205A is configured with low r dual P-ch MOSFETs and N-ch MOSFETs so that it can re- DS(on) duce the power loss caused by the voltage drop, compared to the conventional diode bridge. FDMQ8205A enables the application to maximize the available power and voltage and to eliminate the thermal design problems in PoE PD applications. 

FDMQ8205A GreenBridge[TM] 2 is compatible with IEEE802.3at PoE standard by not compromising detection and classification requirement as well as small backfeed voltage. 

- Wireless Access Points 

- Thin Clients 

- Microcell 

- Femtocell 

## **Package Marking and Ordering Information** 

|**Device Marking**|**Device**|**Package**|**Reel Size**|**Tape Width**|**Quantity**|
|---|---|---|---|---|---|
|FDMQ8205A|FDMQ8205A|MLP4.5x5|13 ”|12 mm|3000 units|



**1** 

©2016 Fairchild Semiconductor Corporation FDMQ8205A Rev.1.0 

www.fairchildsemi.com 

## **Typical Application** 

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**----- Start of picture text -----**<br>
RJ45<br>C onnector<br>1 POU T<br>G3 G2<br>FDMQ8205A<br>2 VOUTP<br>IN PUT2 I NPU T1<br>3<br>VOU T+<br>TVS 0.1uF PoE PD   22uF Isolated<br>G4 G1 I nt erface D C/D C<br>C onverter VOU T-<br>6 N OU T<br>4<br>VOU TN<br>POU T<br>5<br>G3 G2<br>7 FDMQ8205A<br>IN PUT2 I NPU T1<br>8<br>G4 G1<br>N OU T<br>**----- End of picture text -----**<br>


**Figure 1. Typical Application of Power Device for Power over Ethernet** 

## **Block Diagram** 

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**----- Start of picture text -----**<br>
OUTP OUTP<br>Q3 Q2<br>G3 Gate  Gate  G2<br>driver driver<br>Q4 Q1<br>Gate  Gate<br>G4 driver driver G1<br>OUTN INPUT2 INPUT1 OUTN<br>**----- End of picture text -----**<br>


**Figure 2. Block Diagram** 

©2016 Fairchild Semiconductor Corporation FDMQ8205A Rev.1.0 

www.fairchildsemi.com 

**2** 

## **Pin Configuration** 

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G4 12 1 G1<br>OUTN 11 INPUT2 INPUT1 2 OUTN<br>(16) (13)<br>OUTN 10 3 OUTN<br>G3 9 4 G2<br>OUTP 8 INPUT2 INPUT1 5 OUTP<br>(15) (14)<br>OUTP 7 6 OUTP<br>MLP 4.5x5<br>**----- End of picture text -----**<br>


**Figure 3. Pin Assignment (Bottom View)** 

## **Pin Descriptions** 

|**Pin Number**|**Name**|**Description**|
|---|---|---|
|1|G1|Gate of Q1 N-ch MOSFET|
|4|G2|Gate of Q2 P-ch MOSFET|
|9|G3|Gate of Q3 P-ch MOSFET|
|12|G4|Gate of Q4 N-ch MOSFET|
|13,14|INPUT1|Input1 of GreenBridgeTM|
|15,16|INPUT2|Input2 of GreenBridgeTM|
|2,3,11,10|OUTN|Negative Output of GreenBridgeTM|
|5,6,7,8|OUTP|Positive Output of GreenBridgeTM|



**Notes:** 

1. Show  the feature that provides orientation or pin 1 location. 

©2016 Fairchild Semiconductor Corporation FDMQ8205A Rev.1.0 

www.fairchildsemi.com 

**3** 

## **Absolute Maximum Ratings** 

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. 

|stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings<br>only.|stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings<br>only.|stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings|stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings|stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings|
|---|---|---|---|---|
|||**Min.**|**Max.**|**Units**|
|INPUT1, INPUT2 to OUTN|||100|V|
|OUTP to INPUT1, INPUT2|||100|V|
|INPUT1 to  INPUT2|||100|V|
|INPUT2 to  INPUT1|||100|V|
|OUTP to  OUTN|||100|V|
|G1, G2, G3, G4 to  OUTN|||70|V|
|OUTP to G1, G2, G3, G4|||70|V|
|VG_TRANSIENT|Transient Gate Voltage, Pulse Width < 200μs,<br>DutyCycle < 0.003%||100|V|
|Continuous IINPUT(GreenBridgeTMCurrent,<br>Q1+Q3 or Q2+Q4)|TA= 25 °C(Note 2a)||3.0|A|
||TA= 25 °C(Note 2b)||1.7|A|
|Pulsed IINPUT (Q1+Q3 or Q2+Q4)|Pulse Width < 300μs, DutyCycle < 2%(Note 3)||58|A|
|PD(Power Dissipation, Q1+Q3 or Q2+Q4)|TA= 25 °C(Note 2a)||2.5|W|
||TA= 25 °C(Note 2b)||0.78|W|
|Max Junction Temperature|||150|°C|



## **Notes :** 

2. RθJA is determined with the device mounted on a 1 in[2] pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. 

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a. 50 °C/W when mounted on a 1 in [2  ] pad  b. 160 °C/W when mounted on  a<br>of 2 oz copper, the board designed  minimum pad of 2 oz copper, the board<br>Q1+Q3 or Q2+Q4. designed Q1+Q3 or Q2+Q4.<br>3. Pulse Id measured at td <= 300μs, refer to SOA graph for more details.<br>Thermal Characteristics<br>Symbol Parameter Min. Typ. Max. Units<br>RθJC Thermal Resistance, Junction to Case                                             5.1<br>RθJA Thermal Resistance, Junction to Ambient                                     (Note 2a) 50 °C/W<br>——<—_ RθJA Thermal Resistance, Junction to Ambient                                     (Note 2b) 160<br>OUTN F OUTN S OUTP F OUTP S<br>OUTN F OUTN S OUTP F OUTP S<br>**----- End of picture text -----**<br>


©2016 Fairchild Semiconductor Corporation FDMQ8205A Rev.1.0 

www.fairchildsemi.com 

**4** 

## **Recommended Operating Conditions** 

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. 

|**Symbol**|**Parameter**|**Conditions**|**Min.**|**Typ.**|**Max.**|**Units**|
|---|---|---|---|---|---|---|
|VINPUT<br>~~a~~|Input Voltage of Bridge<br>|At INPUT1 to INPUT2 or INPUT2 to<br>INPUT1<br>|||57<br>|V<br>|
|VG<br>~~aeG~~|Gate Voltage of MOSFETs<br>~~eG~~|At G1,G4 to OUTN and G2,G3 to OUTP<br>~~eG~~|~~eG~~|~~eG~~|57<br>~~eG~~|V<br>~~eG~~|
|IQ<br>~~eG~~|Quiescent Current<br>~~eG~~|Detection Mode<br>1.5 V <VINPUT=VG<10.1V(Note 4)<br>~~eG~~|~~eG~~|~~eG~~|5<br>~~eG~~|μA<br>~~eG~~|
|||Classification Mode<br>10.2 V <VINPUT=VG<23.9 V(Note 4)|||400|μA|
|||Power On Mode<br>Maximum VINPUT=VG=57 V(Note 4)|||3.2|mA|
|VTURN_ON|Turn-On Voltage of MOSFETs|Turn-On of MOSFETs while VGIncreases<br>(Note 4)|32||36|V|
|ILEAKAGE|Turn-Off Leakage Current|VOUTP=57 V, VOUTN=0 V<br>TJ=  -40 °C to 85 °C(Note 4)|||700|μA|
|VBF|Backfeed Voltage|VOUTP=57 V, VOUTN=0 V, 100 kOhm<br>between INPUT1 and INPUT2<br>TJ=  -40 °C to 85 °C(Note 4)||~~es~~|2.7|V|
|rDS(on)<br>**Notes:**|N-ch MOSFET|VG=42 V, IINPUT=1.5 A, TA=25 °C<br>~~ss~~|~~ss~~|35<br>~~ss~~<br>~~es~~|51<br>~~ss~~|mΩ<br>~~ss~~|
|||VG=48 V, IINPUT=1.5 A, TA=25 °C<br>~~ss~~<br>~~sd~~|~~ss~~<br>~~sd~~|29<br>~~ss~~<br>~~es~~<br>~~sd~~|44<br>~~ss~~<br>~~sd~~|mΩ<br>~~ss~~<br>~~sd~~|
|||VG=57 V, IINPUT=1.5 A, TA=25 °C<br>~~sd~~<br>~~es~~|~~sd~~<br>~~es~~|26<br>~~sd~~<br>~~es~~<br>~~es~~|37<br>~~sd~~<br>~~es~~|mΩ<br>~~sd~~<br>~~es~~|
||P-ch MOSFET|VG= -42 V, IINPUT= -1.5 A, TA=25 °C<br>~~es~~<br>~~ss~~|~~es~~<br>~~ss~~|95<br>~~es~~<br>~~ss~~<br>~~es~~|147<br>~~es~~<br>~~ss~~|mΩ<br>~~es~~<br>~~ss~~|
|||VG= -48 V, IINPUT= -1.5 A, TA=25 °C<br>~~ss~~<br>~~sd~~|~~ss~~<br>~~sd~~|83<br>~~ss~~<br>~~es~~<br>~~sd~~|125<br>~~ss~~<br>~~sd~~|mΩ<br>~~ss~~<br>~~sd~~|
|||VG= -57 V, IINPUT= -1.5 A, TA=25 °C<br>~~sd~~<br>~~es~~|~~sd~~<br>~~es~~|76<br>~~sd~~<br>~~es~~|107<br>~~sd~~<br>~~es~~|mΩ<br>~~sd~~<br>~~es~~|



5. Backfeed Voltage can not be guaranteed for junction temperature in excess of 85 °C. See VBF in Electrical Characteristics Table. 

©2016 Fairchild Semiconductor Corporation FDMQ8205A Rev.1.0 

www.fairchildsemi.com 

**5** 

## **Typical Characteristics (Q1 or Q4 N-Channel)** TJ = 25°C unless otherwise noted. 

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2.0 102<br>1.8 ID = 1.7 A 10 VGS = 0 V<br>VGS = 57 V<br>1.6 1 TJ = 150  [o] C TJ = 25 [ o] C<br>1.4 10-1<br>1.2 10-2<br>1.0 10-3 TJ = -55 [ o] C<br>0.8 10-4<br>0.6 10-5<br>-75 -50 -25 0 25 50 75 100 125 150 0.2 0.4 0.6 0.8 1.0 1.2<br>TJ, JUNCTION TEMPERATURE ( [o] C) VSD, BODY DIODE FORWARD VOLTAGE (V)<br>Figure 4. Normalized On Resistance                                       Figure 5. Source to Drain Diode<br>vs. Junction Temperature Forward Voltage vs. Source Current<br>10-1<br>10-2 VDS = 0 V<br>10-3<br>TJ = 125 [o] C<br>10-4<br>10-5<br>10-6<br>10-7 T J  = 25  [o] C<br>10-8<br>10-9<br>0 10 20 30 40 50 60 70<br>VGS, GATE TO SOURCE VOLTAGE (V)<br>NORMALIZED<br>, REVERSE DRAIN CURRENT (A)<br>IS<br> DRAIN TO SOURCE ON-RESISTANCE<br>GATE LEAKAGE CURRENT (A)<br>,<br>Ig<br>**----- End of picture text -----**<br>


**vs. Gate to Source Voltage** 

©2016 Fairchild Semiconductor Corporation FDMQ8205A Rev.1.0 

www.fairchildsemi.com 

**6** 

## **Typical Characteristics (Q2 or Q3 P-Channel)** TJ = 25 °C unless otherwise noted. 

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**----- Start of picture text -----**<br>
1.8 102<br> ID = -1.7 A VGS = 0 V<br>1.6 VGS = -57 V 10<br>1<br>1.4 TJ = 150 [ o] C<br>10-1 TJ = 25  [o] C<br>1.2<br>10-2<br>1.0 10-3<br>TJ = -55  [o] C<br>0.8 10-4<br>0.6 10-5<br>-75 -50 -25 0 25 50 75 100 125 150 0.2 0.4 0.6 0.8 1.0 1.2<br>TJ, JUNCTION TEMPERATURE ( [o] C) -VSD, BODY DIODE FORWARD VOLTAGE (V)<br>NORMALIZED<br>, REVERSE DRAIN CURRENT (A)<br>S<br>-I<br> DRAIN TO SOURCE ON-RESISTANCE<br>**----- End of picture text -----**<br>


**Figure 7. vs. Junction Temperature** 

**Figure 8. Forward Voltage vs. Source Current** 

**==> picture [211 x 171] intentionally omitted <==**

**----- Start of picture text -----**<br>
10-1<br>10-2 VDS = 0 V<br>10-3<br>TJ = 125 [ o] C<br>10-4<br>10-5<br>10-6 TJ = 25  [o] C<br>10-7<br>10-8<br>10-9<br>0 10 20 30 40 50 60 70<br>-VGS, GATE TO SOURCE VOLTAGE (V)<br>GATE LEAKAGE CURRENT (A)<br>g,<br>-I<br>**----- End of picture text -----**<br>


**vs. Gate to Source Voltage** 

©2016 Fairchild Semiconductor Corporation FDMQ8205A Rev.1.0 

www.fairchildsemi.com 

**7** 

## **Typical Characteristics (Q1 + Q3 or Q2 + Q4 In Serial)** TJ = 25°C unless otherwise noted. 

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**----- Start of picture text -----**<br>
100 2000<br>1000<br>THIS AREA IS<br>LIMITED BY r<br>10 DS(on) 100  μ s<br>100<br>1 ms<br>1<br>10 ms<br>10<br>100 ms<br>0.1<br>SINGLE PULSE 1 s<br>T J = MAX RATED 10 s 1 SINGLE PULSE<br>0.01 R θ JA = 160 [ o] C/W DC R θ JA = 160  [o] C/W<br>TA = 25  [o] C TA = 25  [o] C<br>0.001 0.1<br>0.01 0.1 1 10 100 400 10-4 10-3 10-2 10-1 1 10 102 103<br>VDS, DRAIN to SOURCE VOLTAGE (V) t, PULSE WIDTH (sec)<br>, DRAIN CURRENT (A)<br>ID<br>PEAK TRANSIENT POWER (W)<br>,<br>(PK)<br>P<br>**----- End of picture text -----**<br>


**Figure 10. Forward Bias Safe Operating Area** 

**Figure 11. Single Pulse Maximum Power Dissipation** 

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**----- Start of picture text -----**<br>
2<br>1 DUTY CYCLE-DESCENDING ORDER<br>D = 0.5<br>10-1    0.2    0.1 PDM<br>   0.05<br>   0.02<br>10-2    0.01 t1<br>t2<br>NOTES:<br>10-3 SINGLE PULSE Z R θ θ JA JA  (t) = r(t) x R  = 160 [o] C/W θJA<br>DUTY FACTOR: D = t1/ t2<br>T J  -T A  = P DM  x Z θJA (t)<br>10-4<br>10-4 10-3 10-2 10-1 1 10 100 1000<br>t, RECTANGULAR PULSE DURATION (sec)<br>  Figure 12. Junction-to-Ambient Transient Thermal Response Curve<br>0.6<br>0.5<br>0.4<br>0.3<br>TJ = 85  [o] C<br>0.2<br>TJ = 25  [o] C<br>0.1<br>TJ = -40  [o] C<br>0<br>0 15 30 45 60<br>OUTP to OUTN (V)<br>Figure 13. Leakage vs. Output Voltage Curve<br>THERMAL RESISTANCE<br>r(t), NORMALIZED EFFECTIVE TRANSIENT<br>, Leakage CURRENT (mA)<br>ILEAKAGE<br>**----- End of picture text -----**<br>


©2016 Fairchild Semiconductor Corporation FDMQ8205A Rev.1.0 

www.fairchildsemi.com 

**8** 

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**----- Start of picture text -----**<br>
5.00 A 4.45<br>0.10 C<br>2X B (0.40) 2.10(4X)<br>12 (0.25) 7<br>1.00(4X)<br>4.50 3.50<br>PIN#1 (0.50)<br>4.80<br>IDENT AREA<br> (0.50)2X<br>0.10 C<br>TOP VIEW 2X (0.65) 1 6<br>0.40<br>0.80<br>(12x)<br>0.80 MAX RECOMMENDED LAND PATTERN<br>0.10 C<br>(0.20)<br>0.08 C<br>0.05 C<br>0.00 NOTES:<br>SEATING SIDE VIEW A.  PACKAGE DOES NOT FULLY CONFORM TO<br>PLANE      JEDEC MO-229 REGISTRATION<br>5.00����� B.  DIMENSIONS ARE IN MILLIMETERS.<br>C.  DIMENSIONS AND TOLERANCES PER<br>1.95<br>(0.35)4X<br>1.85 [(4X)]      ASME Y14.5M, 1994.<br>1 6<br>D.  LAND PATTERN RECOMMENDATION IS<br>(0.50)2X<br>      BASED ON FSC DESIGN ONLY.<br>PIN#1<br>IDENT E.  DRAWING FILENAME: MKT-MLP12Erev2.<br>(0.50)2X<br>4.50�����<br>1.05<br>0.95 [(4X)]<br>0.55<br>0.45<br>0.10 C A B<br>0.05 C<br>12 7<br>0.80<br>0.35<br>0.25 [(12X)]<br>2.40<br>BOTTOM VIEW<br>**----- End of picture text -----**<br>


ON Semiconductor and      are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 

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