FDMM256MSE-N100

# **Industrial microSD 2.0 Specification** 

**(FxPrem I, SLC)** 

**Version 1.0** 

Address: 28 Genting Lane, #09-03/04/05 Platinum 28, Singapore 349585 Tel : +65-6493 5035 

Fax : +65-6493 5037 Website: http://www.flexxon.com Email: flexxon@flexxon.com 

ALL RIGHTS ARE STRICTLY RESERVED. ANY PORTION OF THIS PAPER SHALL NOT BE REPRODUCED, COPIED, OR TRANSLATED TO ANY OTHER FORMS WITHOUT PERMISSION FROM FLEXXON. 

## **Table of Contents** 

||**Table of Contents**|
|---|---|
|**1.**|**General Description ..................................................................................... 1**|
|1.1.|Introduction ...................................................................................................................... 1|
|1.2.|Product Overview ............................................................................................................ 1|
|**2.**|**Product Specifications................................................................................. 2**|
|2.1.|Performance ..................................................................................................................... 2|
|2.2.|Power ............................................................................................................................... 2|
|2.3.|MTBF ............................................................................................................................... 2|
|2.4.|Data Retention.................................................................................................................. 2|
|**3.**|**Environmental Specifications ..................................................................... 3**|
|**4.**|**Electrical Specifications .............................................................................. 4**|
|4.1.|DC Characteristics ........................................................................................................... 4|
|4.1.1.|Bus Operation Conditions for 3.3V Signaling ..................................................... 4|
|4.1.2.|Bus Signal Line Load ........................................................................................... 5|
|4.1.3.|Power Up Time of Host ....................................................................................... 6|
|4.1.4.|Power Up Time of Card ....................................................................................... 7|
|4.2.|AC Characteristic ............................................................................................................. 7|
|4.2.1.|microSD Interface timing (Default) ..................................................................... 7|
|4.2.2.|microSD Interface Timing (High-Speed Mode) .................................................. 9|
|4.2.3.|microSD Interface timing (SDR12, SDR25, SDR50 and SDR104 Modes) ...... 10|
|4.2.4.|microSD Interface timing (DDR50 Modes)....................................................... 12|
|**5.**|**Pad Assignment ......................................................................................... 14**|
|**6.**|**Registers ................................................................................................... 15**|
|**7.**|**Physical Dimension ................................................................................... 16**|
|**8.**|**Ordering Information ................................................................................ 18**|



## **1. GENERAL DESCRIPTION** 

## **1.1. Introduction** 

FLEXXON industrial FxPrem I Series microSD 2.0 card has good reliability and wide compatibility. It can alternate communication protocol between SD mode and SPI mode. It’s well adapted for hand-held applications in industrial/medical markets already. 

## **1.2. Product Overview** 

- **Flash** 

- ￭ SLC 

- **Capacity** ￭ 128MB up to 512MB 

- **Support SD system specification version 2.0**  **Support SD SPI mode** 

 **Support CPRM (Content Protection for Recordable Media) of SD Card**  **Card removal during read operation will never harm the content**  **Password Protection of cards (optional)**  **Support Adaptive Wear Leveling**  **Sudden Power Loss management**  **Temperature Range** ￭ Operation: -40°C ~ 85°C ￭ Storage: -40°C ~ 85°C  **RoHS Compliant**  **SMART Function**  **Bus Speed Mode** ￭ **Non-UHS mode**  Default speed mode: 3.3V signaling, frequency up to 25MHz, up to 12.5MB/sec  High speed mode: 3.3V signaling, frequency up to 50MHz, up to 25MB/sec 

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## **2. PRODUCT SPECIFICATIONS** 

## **2.1. Performance** 

**Table 2-1 Performance of microSD (FxPrem I)** 

|**Capacity**|**Sequential**|**Sequential**|
|---|---|---|
||**Read (MB/s)**|**Write (MB/s)**|
|128MB|20|13|
|256MB|20|13|
|512MB|20|13|



## **NOTES:** 

1. The performance is obtained from TestMetrix Test (@500MB). 

2. Samples are made of SLC NAND Flash. 

3. Performance may vary from flash configuration and platform. 

## **2.2. Power** 

**Table 2-2 Power Consumption of microSD (FxPrem I)** 

|**Capacity**|**Read (mA)**|**Write (mA)**|**Standby**<br>**(uA)**|
|---|---|---|---|
|128MB|40|36|150|
|256MB|40|36|150|
|512MB|40|36|150|



## **2.3. MTBF** 

MTBF, an acronym for Mean Time Between Failures, is a measure of a device’s reliability. Its value represents the average time between a repair and the next failure. The higher the MTBF value, the higher the reliability of the device. The predicted result of FLEXXON’s FxPrem I microSD is more than 3,000,000 hours. 

## **2.4. Data Retention** 

- 10 years if > 90% life remaining (@25C) 

- 1 year if < 10% life remaining (@25C) 

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## **3. ENVIRONMENTAL SPECIFICATIONS** 

|**Test Items**|**Test Conditions**|
|---|---|
|**Storage Temperature**|-40°C ~ 85°C|
|**Operating Temperature**|-40°C~ 85°C|
|**Storage Humidity**|55°C, 95% RH|
|**Operating Humidity**|55°C, 95% RH|
|**Shock**|1500G, Half Sin Pulse Duration 0.5ms|
|**Vibration**|80Hz ~ 2000Hz/20G, 20Hz ~ 80Hz/1.52mm, 3 axis/30min|
|**Drop**|150cm free fall, 6 face of each unit|
|**Bending**|≥ 10N, Hold 1 min/5 times|
|**Torque**|0.1N-m or +/-2.5 deg, Hold 30 seconds/5 times|
|**Salt Spray**|Concentration: 3% NaCl, Temperature: 35°C, 24hours|
|**Waterproof**|Water temperature: 25°C<br>Water depth: The lowest point of unit is locating<br>1000mm below surface.<br>Storage for 30 mins|
|**Switch Cycle**|0.4~0.5 N, 1,000 times|
|**Durability**|10,000 times|
|**ESD**|Contact: +/- 4KV each item 25 times<br>Air: +/- 8KV 10 times|



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## **4. ELECTRICAL SPECIFICATIONS** 

## **4.1. DC Characteristics** 

## **4.1.1. Bus Operation Conditions for 3.3V Signaling** 

**Table 4-1 Threshold Level for High Voltage Range** 

**Parameter Symbol Min. Max Unit Condition** Supply Voltage VDD 2.7 3.6 V Output High Voltage VOH 0.75*VDD V IOH=-2mA VDD Min Output Low Voltage VOL 0.125*VDD V IOL=2mA VDD Min Input High Voltage VIH 0.625*VDD VDD+0.3 V Input Low Voltage VIL VSS-0.3 0.25*VDD V Power Up Time 250 ms From 0V to VDD min ~~ss~~ **Parameter Symbol Min. Max Unit Condition** Supply Voltage VDD 2.7 3.6 V Regulator Voltage VDDIO 1.7 1.95 V Generated by VDD Output High Voltage VOH 1.4 - V IOH=-2mA Output Low Voltage VOL - 0.45 V IOL=2mA Input High Voltage VIH 1.27 2.00 V Input Low Voltage VIL Vss-0.3 0.58 V ~~So~~ **Parameter Symbol Min Max. Unit Remarks** Input Leakage Current -2 2 uA DAT3 pull-up is disconnected. ~~grtft tl~~ **Table 4-2 Peak Voltage and Leakage Current Parameter Symbol Min Max. Unit Remarks** Peak voltage on all lines -0.3 VDD+0.3 V **All Inputs** Input Leakage Current -10 10 uA **All Outputs** Output Leakage Current -10 10 uA ~~==~~ 4 

## **4.1.2. Bus Signal Line Load** 

## **Bus Operation Conditions – Signal Line’s Load** 

Total Bus Capacitance = CHOST + CBUS + N CCARD 

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Parameter  symbol  Min  Max  Unit  Remark<br>Pull-up resistance  RCMD  10  100  kΩ  to prevent bus floating<br>RDAT<br>Total bus capacitance for each signal  CL 40  pF  1 card<br>line  CHOST+CBUS shall<br>not exceed 30 pF<br>Card Capacitance for each signal pin  CCARD 10 [1] pF<br>Maximum signal line inductance  16  nH<br>Pull-up resistance inside card (pin1)  RDAT3 10  90  kΩ  May be used for card<br>detection<br>Capacity Connected to Power Line  CC 5  uF  To prevent inrush current<br>**----- End of picture text -----**<br>


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## **4.1.3. Power Up Time of Host** 

Host needs to keep power line level less than 0.5V and more than 1ms before power ramp up. 

- **Power On or Power Cycle** Followings are requirements for Power on and Power cycle to assure a reliable SD Card hard reset. (1) Voltage level shall be below 0.5V (2) Duration shall be at least 1ms. **Power Supply Ramp Up** 

The power ramp up time is defined from 0.5V threshold level up to the operating supply voltage which is stable between VDD (min.) and VDD (max.) and host can supply SDCLK. Followings are recommendation of Power ramp up: 

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(1) Voltage of power ramp up should be monotonic as much as possible.<br>**----- End of picture text -----**<br>


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(2) The minimum ramp up time should be 0.1ms.<br>**----- End of picture text -----**<br>


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(3) The maximum ramp up time should be 35ms for 2.7-3.6V power supply.<br>(4) Host shall wait until VDD is stable.<br>(5) After 1ms VDD stable time, host provides at least 74 clocks before issuing the first command.<br>**----- End of picture text -----**<br>


## **Power Down and Power Cycle** 

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• When the host shuts down the power, the card VDD shall be lowered to less than 0.5Volt for a minimum<br>period of 1ms. During power down, DAT, CMD, and CLK should be disconnected or driven to logical 0 by<br>the host to avoid a situation that the operating current is drawn through the signal lines.<br>• If the host needs to change the operating voltage, a power cycle is required. Power cycle means the<br>power is turned off and supplied again. Power cycle is also needed for accessing cards that are already in<br>Inactive State.  To create a power cycle the host shall follow the power down description before power up<br>the card (i.e. the card VDD shall be once lowered to less than 0.5Volt for a minimum period of 1ms).<br>**----- End of picture text -----**<br>


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## **4.1.4. Power Up Time of Card** 

A device shall be ready to accept the first command within 1ms from detecting VDD min. Device may use up to 74 clocks for preparation before receiving the first command. 

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4.2. AC Characteristic<br>**----- End of picture text -----**<br>


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4.2.1. microSD Interface timing (Default)<br>**----- End of picture text -----**<br>


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**Parameter Symbol Min Max Unit Remark** ~~po~~ **Clock CLK (All values are referred to min(VIH) and max(VIL)** Clock frequency Data fPP Ccard≤ 10 pF 0 25 MHz ~~a~~ Transfer Mode (1 card) Clock frequency Ccard≤ 10 pF fOD 0(1)/100 400 KHz ~~a~~ Identification Mode ~~ee ee~~ (1 card) ~~ee ee~~ Ccard≤ 10 pF Clock low time tWL 10 ns ~~a~~ (1 card) Ccard≤ 10 pF Clock high time tWH 10 ns ~~a~~ ~~**ee** Ndee ee~~ (1 card) Ccard≤ 10 pF Clock rise time tTLH 10 ns (1 card) ~~a ee ee Ne~~ Ccard≤ 10 pF Clock fall time tTHL 10 ns ~~pT NN~~ (1 card) **Inputs CMD, DAT (referenced to CLK)** Ccard≤ 10 pF Input set-up time tISU 5 ns ~~eeee PN~~ Ccard(1 card≤ 10 pF ) Input hold time tIH 5 ns ~~Ee~~ **Outputs CMD** ~~ee,~~ **, DAT (referenced to CLK** ~~Cee~~ **)** (1 card) Output Delay time during CL≤ 40 pF tODLY 0 14 ns ~~ee~~ Data Transfer Mode (1 card) Output Delay time during CL≤ 40 pF tODLY 0 50 ns Identification Mode (1 card) ~~pC[NE] eee~~ (1) 0Hz means to stop the clock. The given minimum frequency range is for cases where continues clock is required. 

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## **4.2.2. microSD Interface Timing (High-Speed Mode)** 

|**Parameter**|**Symbol**|**Min**|**Max**|**Unit**|**Remark**|
|---|---|---|---|---|---|
|**Clock CLK(All values are referred to min(VIH) and max(VIL)**||||||
|Clock frequency Data Transfer Mode|fPP|0|50|MHz|Ccard≤ 10 pF<br>(1 card)|
|Clock low time|tWL|7||ns|Ccard≤ 10 pF<br>(1 card)|
|Clock high time|tWH|7||ns|Ccard≤ 10 pF<br>(1 card)|
|Clock rise time|tTLH||3|ns|Ccard≤ 10 pF<br>(1 card)|
|Clock fall time|tTHL||3|ns|Ccard≤ 10 pF<br>(1 card)|
|**Inputs CMD, DAT(referenced to CLK)**||||||
|Input set-up time|tISU|6||ns|Ccard≤ 10 pF<br>(1 card)|
|Input hold time|tIH|2||ns|Ccard≤ 10 pF<br>(1 card)|
|**Outputs CMD, DAT(referenced to CLK)**||||||
|Output Delay time during Data<br>Transfer Mode|tODLY||14|ns|CL≤ 40 pF<br>(1 card)|
|Output Hold time|TOH|2.5||ns|CL≤ 15 pF<br>(1 card)|
|Total System capacitance of each<br>line¹|CL||40|pF|CL ≤ 15 pF<br>(1 card)|



(1) In order to satisfy severe timing, the host shall drive only one card. 

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## **4.2.3. microSD Interface timing (SDR12, SDR25, SDR50 and SDR104 Modes)** 

## _**Input:**_ 

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Symbol  Min  Max  Unit  Remark<br>tCLK 4.80  -  ns  208MHz (Max.), Between rising edge, VCT= 0.975V<br>tCR, tCF < 0.96ns (max.) at 208MHz, CCARD=10pF<br>tCR, tCF < 2.00ns (max.) at 100MHz, CCARD=10pF<br>tCR, tCF -  0.2* tCLK ns<br>The absolute maximum value of tCR, tCF is 10ns<br>regardless of clock frequency<br>Clock Duty 30  70  %<br>Clock Signal Timing<br>SDR50 and SDR104 Input Timing:<br>**----- End of picture text -----**<br>


|**Symbol**|**Min**|**Max**|**Unit**|**SDR104 Mode**|
|---|---|---|---|---|
|tIS|1.40|-|ns|CCARD=10pF,VCT= 0.975V|
|tIH|0.80|-|ns|CCARD= 5pF,VCT= 0.975V|
|**Symbol**|**Min**|**Max**|**Unit**|**SDR50 Mode**|
|tIS|3.00|-|ns|CCARD=10pF,VCT= 0.975V|
|tIH|0.80|-|ns|CCARD= 5pF,VCT= 0.975V|



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## _**Output:**_ 

|**Symbol**|**Min**|**Max**|**Unit**|**Remark**|
|---|---|---|---|---|
|tODLY|-|7.5|ns|tCLK>=10.0ns,CL=30pF,usingdriver Type B,for SDR50|
|tODLY|-|14|ns|tCLK>=20.0ns, CL=40pF, using driver Type B, for SDR25 and<br>SDR12,|
|TOH|1.5|-|ns|Hold time at the tODLY (min.),CL=15pF|



## _**Output (SDR104 Mode):**_ 

|**Symbol**|**Min**|**Max**|**Unit**|**Remark**|
|---|---|---|---|---|
|tOP|0|2|Ul|Card Output Phase|
|△tOP|-350|+1550|ps|Delayvariable due to temperature change after tuning|
|tODW|0.60|-|Ul|tODW= 2.88ns at 208MHz|



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## **4.2.4. microSD Interface timing (DDR50 Modes)** 

|**Symbol**|**Min**|**Max**|**Unit**|**Remark**|
|---|---|---|---|---|
|tCLK|4.8|-|ns|50MHz (Max.), Between rising edge|
|tCR, tCF|-|0.2* tCLK|ns|tCR, tCF< 4.00ns (max.) at 50MHz, CCARD=10pF|
|Clock Duty|45|55|%||



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**Bus Timings – Parameters Values (DDR50 Mode)** 

|**Parameter**<br>~~po~~|**Symbol**<br>~~po~~|**Min**<br>~~po~~|**Max**<br>~~po~~|**Unit**<br>~~po~~|**Remark**<br>~~po~~|
|---|---|---|---|---|---|
|**Input CMD**(referenced to CLK risingedge)<br>~~ee~~||||||
|Input set-up time<br>~~ee~~|tISU<br>~~ee~~|6<br>~~ee~~|-<br>~~ee~~|ns<br>~~ee~~|Ccard≤ 10 pF<br>(1 card)<br>~~ee~~|
|Input hold time<br>~~a~~|tIH<br>|0.8<br>|-<br>|ns<br>|Ccard≤ 10 pF<br>(1 card)<br>|
|**Output CMD**(referenced to CLK risingedge)<br>~~a~~||||||
|Output Delay time<br>during Data Transfer<br>Mode<br>~~ee~~|tODLY<br>~~ee~~|~~ee~~|13.7<br>~~ee~~|ns<br>~~ee~~|CL≤ 30 pF<br>(1 card)<br>~~ee~~|
|Output Hold time<br>~~ee~~<br>~~a ~~|TOH<br>~~ee~~<br> ~~NS~~|1.5<br>~~ee~~<br>~~NS~~|-<br>~~ee~~<br>~~NS~~|ns<br>~~ee~~<br>~~NS~~|CL≥ 15 pF<br>(1 card)<br>~~ee~~<br>~~NS~~|
|**Inputs DAT**(referenced to CLK risingand fallingedges)<br>~~ey~~||||||
|Input set-up time<br>~~aey~~|tISU2x<br>~~ey~~|3<br>~~ey~~|-<br>~~ey~~|ns<br>~~ey~~|Ccard≤ 10 pF<br>(1 card)<br>~~ey~~|
|Input hold time<br>~~aey~~<br>~~aA~~|tIH2x<br>~~ey~~<br>~~aA~~|0.8<br>~~ey~~<br>~~aA~~|-<br>~~ey~~<br>~~aA~~|ns<br>~~ey~~<br>~~aA~~|Ccard≤ 10 pF<br>(1 card)<br>~~ey~~<br>~~aA~~|
|**Outputs DAT**(referenced to CLK risingand fallingedges)<br>~~aA~~<br>~~KY~~<br>~~a~~||||||
|Output Delay time<br>during Data Transfer<br>Mode<br>~~|~~<br>~~a~~|tODLY2x<br>~~|~~<br>~~¢\~~|-<br>~~|~~<br>~~KY~~<br>~~¢\~~|7.0<br>~~|~~<br>~~KY~~|ns<br>~~|~~<br>~~KY~~|CL≤ 25 pF<br>(1 card)<br>~~|~~|
|Output Hold time<br>~~a~~|TOH2x<br>~~¢\~~|1.5<br>~~KY~~<br>~~¢\~~|-<br>~~KY~~|ns<br>~~KY~~|CL≥ 15 pF<br>(1 card)|



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## **5. PAD ASSIGNMENT** 

**Table 5-1 microSD Memory Card Pad Assignment** 

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SD Mode  SPI Mode<br>ee<br>pin<br>Name  Type [1 ] Description  Name  Type  Description<br>ee| | |<br>1  DAT2  I/O/PP  Data Line[bit2]  RSV<br>a<br>I/O/PP  Card Detect/  Chip Select (neg<br>2  CD/DAT3  [2] CS  I  [3 ]<br>3  Data Line[bit3]  true)<br>3  CMD  PP  Command/Response  DI  I  Data In<br>esee ee eee<br>4  VDD  S  Supply voltage  VDD S  Supply voltage<br>aee ee<br>5  CLK  I  Clock  SCLK  I  Clock<br>aa ee ee<br>Supply voltage  Supply voltage<br>6  VSS  S  VSS S<br>ground  ground<br>7  DAT0  I/O/PP  Data Line[bit0]  DO  O/PP  Data Out<br>a ee ee ee<br>8  DAT1  I/O/PP  Data Line[bit1]  RSV<br>| | be|<br>**----- End of picture text -----**<br>


(1)  S: power supply, I: input; O: output using push-pull drivers; PP: I/O using push-pull drivers 

(2)  The extended DAT lines (DAT1-DAT3) are input on power up. They start to operate as DAT lines after SET_BUS_WIDTH command. The Host shall keep its own DAT1-DAT3 lines in input mode, as well, while they are not used. It is defined so, in order to keep compatibility to MultiMedia Cards. 

(3)  At power up this line has a 50KOhm pull up enabled in the card. This resistor serves two functions: Card detection and Mode Selection. For Mode Selection, the host can drive the line high or let it be pulled high to select SD mode. If the host wants to select SPI mode it should drive the line low. For Card detection, the host detects that the line is pulled high. This pull-up should be disconnected by the user during regular data transfer period, with SET_CLR_CARD_DETECT (ACMD42) command. 

14 

## **6. REGISTERS** 

|**Name**|**Width**|**Description**|
|---|---|---|
|CID|128bit|Card identification number; card individual number for identification.|
|RCA|16bit|Relative card address; local system address of a card, dynamically<br>suggested by the card and approved by the host during initialization.|
|DSR|16bit|Driver Stage Register; to configure the card’s output drivers.|
|CSD|128bit|Card Specific Data; Information about the card operation conditions.|
|SCR|64bit|SD Configuration Register; Information about the SD Memory Card's<br>Special Features capabilities|
|OCR|32bit|Operation conditions register.|
|SSR|512bit|SD Status; Information about the card proprietary features.|
|OCR|32bit|Card Status; Information about the card status.|



15 

## **7. PHYSICAL DIMENSION** ~~TO~~ 

**Dimension: 15mm (L) x 11mm (W) x 1mm (H)** 

16 

17 

## **8. ORDERING INFORMATION** 

|**Capacity**|**Part Number**|
|---|---|
|128MB|FDMM128MSE-N100|
|256MB|FDMM256MSE-N100|
|512MB|FDMM512MSE-N100|



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**----- Start of picture text -----**<br>
Revision History<br>Revision  Release Date  Description<br>1.0  2017/10  First release<br>**----- End of picture text -----**<br>


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