FDC8602

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## **FDC8602** 

**Dual N-Channel Shielded Gate PowerTrench[®] MOSFET 100 V, 1.2 A, 350 m** Ω 

## **Features** 

Shielded Gate MOSFET Technology Max rDS(on) = 350 mΩ at  VGS = 10 V, ID = 1.2 A Max rDS(on) = 575 mΩ at  VGS = 6 V, ID = 0.9 A High performance trench technology for extremely low rDS(on) High power and current handling capability in a widely used surface mount package Fast switching speed 100% UIL Tested RoHS Compliant 

## **General Description** 

This N-Channel MOSFET is produced using Fairchild Semiconductor‘s advanced PowerTrench **[®]** process that incorporates Shielded Gate technology. This process has been optimized for rDS(on), switching performance and ruggedness. 

## **Applications** 

Load Switch Synchronous Rectifier 

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D2<br>S1<br>D1<br>G2<br>S2<br>Pin 1 G1<br>SuperSOT [TM]  -6<br>**----- End of picture text -----**<br>


## **MOSFET Maximum Ratings** TA = 25 °C unless otherwise noted 

|**Symbol**<br>**Parameter**|||**Ratings**||**Units**|
|---|---|---|---|---|---|
|VDS<br>Drain to Source Voltage|||100||V|
|VGS<br>Gate to Source Voltage|||±20||V|
|ID<br>Drain Current   -Continuous<br>-Pulsed|Drain Current   -Continuous(Note 1a)||1.2<br>5||A<br>A|
|EAS<br>Single Pulse Avalanche Energy|(Note 3)||1.5||mJ|
|PD<br>Power Dissipation<br>Power Dissipation|ation(Note 1a)<br>ation(Note 1b)||0.96<br>0.69||W|
|TJ, TSTG<br>Operatingand Storage Junction Temperature Range|||-55 to +150||°C|
|**Thermal Characteristics**||||||
|RθJC<br>Thermal Resistance, Junction to Case<br>60<br>°C/W<br>RθJA<br>Thermal Resistance, Junction to Ambient(Note 1a)<br>130<br>~~[es~~||||||
|**Package Marking and Ordering Information**||||||
|**Device Marking**<br>**Device**<br>**Package**<br>**Reel Size**<br>**Tape Width**<br>**Quantity**<br>.862<br>FDC8602<br>SSOT-6<br>7 ’’<br>8 mm<br>3000 units<br>~~_i~~||||||



©2011 Fairchild Semiconductor Corporation **1** www.fairchildsemi.com FDC8602 Rev.C1 

**Electrical Characteristics** TJ = 25 °C unless otherwise noted 

|**Off Characteristics**<br>**On Characteristics**<br>**Dynamic Characteristics**<br>**Switching Characteristics**<br>**Symbol**<br>**Parameter**<br>BVDSS<br>Drain to Source Breakdown Voltage<br>ΔBVDSS<br>ΔTJ<br>Breakdown Voltage Temperature<br>Coefficient<br>IDSS<br>Zero Gate Voltage Drain Current<br>IGSS<br>Gate to Source Leakage Current<br>VGS(th)<br>Gate to Source Threshold Voltage<br>ΔVGS(th)<br>ΔTJ<br>Gate to Source Threshold Voltage<br>Temperature Coefficient<br>rDS(on)<br>Static Drain to Source On Resistance<br>gFS<br>Forward Transconductance<br>Ciss<br>Input Capacitance<br>Coss<br>Output Capacitance<br>Crss<br>Reverse Transfer Capacitance<br>Rg<br>Gate Resistance<br>td(on)<br>Turn-On DelayTime<br>tr<br>Rise Time<br>td(off)<br>Turn-Off DelayTime<br>tf<br>Fall Time<br>Qg(TOT)<br>Total Gate Charge<br>Qg(TOT)<br>Total Gate Charge<br>Qgs<br>Gate to Source Charge<br>Qgd<br>Gate to Drain “Miller” Charge<br>~~a~~<br>~~— fp~~<br>~~a~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|**Off Characteristics**<br>**On Characteristics**<br>**Dynamic Characteristics**<br>**Switching Characteristics**<br>**Symbol**<br>**Parameter**<br>BVDSS<br>Drain to Source Breakdown Voltage<br>ΔBVDSS<br>ΔTJ<br>Breakdown Voltage Temperature<br>Coefficient<br>IDSS<br>Zero Gate Voltage Drain Current<br>IGSS<br>Gate to Source Leakage Current<br>VGS(th)<br>Gate to Source Threshold Voltage<br>ΔVGS(th)<br>ΔTJ<br>Gate to Source Threshold Voltage<br>Temperature Coefficient<br>rDS(on)<br>Static Drain to Source On Resistance<br>gFS<br>Forward Transconductance<br>Ciss<br>Input Capacitance<br>Coss<br>Output Capacitance<br>Crss<br>Reverse Transfer Capacitance<br>Rg<br>Gate Resistance<br>td(on)<br>Turn-On DelayTime<br>tr<br>Rise Time<br>td(off)<br>Turn-Off DelayTime<br>tf<br>Fall Time<br>Qg(TOT)<br>Total Gate Charge<br>Qg(TOT)<br>Total Gate Charge<br>Qgs<br>Gate to Source Charge<br>Qgd<br>Gate to Drain “Miller” Charge<br>~~a~~<br>~~— fp~~<br>~~a~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|**Test Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>ID= 250 μA, VGS= 0 V<br>100<br>ID= 250 μA, referenced to 25 °C<br>73<br>VDS= 80 V, VGS = 0 V<br>1<br>VGS= ±20 V, VDS = 0 V<br>±100<br>VGS= VDS, ID= 250 μA<br>2<br>3.2<br>4<br>ID= 250 μA, referenced to 25 °C<br>-8<br>VGS= 10 V, ID= 1.2 A<br>285<br>350<br>VGS= 6 V, ID= 0.9 A<br>409<br>575<br>VGS= 10 V, ID= 1.2 A, TJ = 125 °C<br>489<br>600<br>VDS= 10 V, ID= 1.2 A<br>1.3<br>VDS= 50 V, VGS= 0 V,<br>f = 1MHz<br>53<br>70<br>17<br>25<br>0.8<br>5<br>1.6<br>VDD= 50 V, ID= 1.2 A,<br>VGS= 10 V, RGEN= 6 Ω<br>3.5<br>10<br>1.7<br>10<br>5.4<br>11<br>2.3<br>10<br>VGS= 0 V to 10 V<br>VDD= 50 V,<br>ID= 1.2 A<br>1.2<br>2<br>VGS= 0 V to 5 V<br>0.6<br>1<br>0.4<br>0.4<br>~~BO~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee ee eee ~~<br>~~ee ee ee ~~<br>~~ee ee ee ~~<br>~~ee ee ee ~~<br>~~ee ee ee ~~<br>~~ee ee ee ~~<br>~~**ee** ~~~~**ee** ~~~~**ee** ~~|**Units**<br>V<br>mV/°C<br>μA<br>nA<br>V<br>mV/°C<br>mΩ<br>S<br>pF<br>pF<br>pF<br>Ω<br>ns<br>ns<br>ns<br>ns<br>nC<br>nC<br>nC<br>nC<br> ~~ee~~<br> ~~ee~~<br> ~~ee~~<br> ~~ee~~<br> ~~ee~~<br> ~~ee~~<br> ~~**ee**~~|
|---|---|---|---|
|**Drain-Source Diode Characteristics**||||
|VSD<br>Source-Drain Diode  Forward Voltage||VGS = 0 V, IS = 1.2 A(Note 2)<br>0.86<br>1.3|V|
|trr<br>Reverse RecoveryTime<br>Qrr<br>Reverse RecoveryCharge||IF= 1.2 A, di/dt = 100 A/μs<br>27<br>43<br>12<br>21|ns<br>nC|



NOTES: 

1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. 

   - a) 130 °C/W when mounted on a 1 in[2 ] pad of  2 oz  copper 

   - b) 180 °C/W when mounted on a minimum pad of  2 oz  copper 

2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 

3. Starting TJ = 25 °C; N-ch: L = 3 mH, IAS = 1 A, VDD = 100 V, VGS = 10 V. 

©2011 Fairchild Semiconductor Corporation **2** www.fairchildsemi.com FDC8602 Rev.C1 

**Typical Characteristics** TJ = 25 °C unless otherwise noted 

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5 4<br>4 VGS = 10 V VGS = 8 V VGS =  7 V VGS = 5 V VGS = 6 V<br>3<br>3 VGS = 7 V<br>2<br>2 VGS =  6 V VGS = 8 V<br>PULSE DURATION = 80  μ s<br>DUTY CYCLE = 0.5% MAX 1<br>1 VGS = 5 V PULSE DURATION = 80DUTY CYCLE = 0.5% MAX  μ s VGS = 10 V<br>0 0<br>0 1 2 3 4 5 0 1 2 3 4 5<br>VDS, DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)<br>Figure 1.  On Region Characteristics Figure 2.  Normalized On-Resistance<br>vs Drain Current and Gate Voltage<br>2.0 1200<br>1.8 IVDGS = 1.2 A = 10 V ID = 1.2 A PULSE DURATION = 80DUTY CYCLE = 0.5% MAX  μ s<br>900<br>1.6<br>1.4 TJ = 125  [o] C<br>600<br>1.2<br>1.0<br>300<br>0.8 TJ = 25  [o] C<br>0.6 0<br>-75 -50 -25 0 25 50 75 100 125 150 5 6 7 8 9 10<br>TJ, JUNCTION TEMPERATURE ( [o] C) VGS, GATE TO SOURCE VOLTAGE (V)<br>Figure 3.  Normalized  On  Resistance                                         Figure 4.   On-Resistance vs  Gate to<br>vs Junction Temperature Source Voltage<br>5 10<br>PULSE DURATION = 80  μ s VGS = 0 V<br>DUTY CYCLE = 0.5% MAX<br>4 VDS = 5 V 1 TJ = 150  [o] C<br>3<br>0.1 TJ = 25 [ o] C<br>2<br>TJ = 150  [o] C<br>TJ = 25  [o] C 0.01<br>1<br>TJ = -55  [o] C<br>TJ = -55  [o] C<br>0 0.001<br>2 3 4 5 6 7 8 0.2 0.4 0.6 0.8 1.0 1.2<br>VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)<br>NORMALIZED<br>, DRAIN CURRENT (A)<br>ID<br>DRAIN TO SOURCE ON-RESISTANCE<br>)<br>Ω<br>m<br>(<br>DRAIN TO<br>,<br>NORMALIZED rDS(on)<br>SOURCE ON-RESISTANCE<br> DRAIN TO SOURCE ON-RESISTANCE<br>, DRAIN CURRENT (A)<br>ID<br>, REVERSE DRAIN CURRENT (A)<br>IS<br>**----- End of picture text -----**<br>


**Figure 5.  Transfer Characteristics** 

**Figure 6.    Source to Drain  Diode Forward Voltage vs Source Current** 

©2011 Fairchild Semiconductor Corporation **3** www.fairchildsemi.com FDC8602 Rev.C1 

**Typical Characteristics** TJ = 25 °C unless otherwise noted 

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10 500<br>ID = 1.2 A VDD = 50 V<br>8 C iss<br>6 VDD = 25 V VDD = 75 V 10 Coss<br>4<br>1<br>2 f = 1 MHz Crss<br>VGS = 0 V<br>0 0.1<br>0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0.1 1 10 100<br>Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)<br>Figure 7.  Gate Charge Characteristics Figure 8.  Capacitance vs Drain<br>to Source Voltage<br>2 10<br>1<br>T J  = 25 [ o] C 1 100 us<br>T J  = 100 [ o] C THIS AREA IS  1 ms<br>0.1 LIMITED BY r DS(on) 10 ms<br>SINGLE PULSE<br>TJ = MAX RATED 100 ms<br>TJ = 125  [o] C R θ JA = 180 [ o] C/W 1 s<br>0.01 TA = 25  [o] C 10 sDC<br>0.1 0.005<br>0.01 0.1 1 10 0.1 1 10 100 400<br>tAV, TIME IN AVALANCHE (ms) VDS, DRAIN to SOURCE VOLTAGE (V)<br>Figure 9. Unclamped Inductive                                  Figure 10.  Forward Bias Safe<br>Switching Capability Operating Area<br>100 VGS = 10 V SINGLE PULSE<br>R θ JA = 180  [o] C/W<br>T A  = 25  [o] C<br>10<br>1<br>0.5<br>10-4 10-3 10-2 10-1 1 10 100 1000<br>t, PULSE WIDTH (sec)<br>Figure 11.   Single  Pulse Maximum Power Dissipation<br>CAPACITANCE (pF)<br>, GATE TO SOURCE VOLTAGE (V)<br>GS<br>V<br>, DRAIN CURRENT (A)<br>ID<br>, AVALANCHE CURRENT (A)<br>IAS<br>, PEAK TRANSIENT POWER (W)<br>(PK)<br>P<br>**----- End of picture text -----**<br>


©2011 Fairchild Semiconductor Corporation **4** www.fairchildsemi.com FDC8602 Rev.C1 

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Typical Characteristics  TJ = 25 °C unless otherwise noted<br>2<br>DUTY CYCLE-DESCENDING ORDER<br>1<br>D = 0.5<br>      0.2<br>      0.1<br>      0.05<br>0.1       0.02       0.01 PDM<br>t1<br>t 2<br>SINGLE PULSE NOTES:<br>0.01 R θ JA  = 180 [o] C/W DUTY FACTOR: D = t PEAK TJ = PDM x Z θJA 1  x R /t2 θJA  + TA<br>0.005<br>10-4 10-3 10-2 10-1 1 10 100 1000<br>t, RECTANGULAR PULSE DURATION (sec)<br>Z JA θ<br>IMPEDANCE,<br>NORMALIZED THERMAL<br>**----- End of picture text -----**<br>


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Figure 12.  Junction-to-Ambient Transient Thermal Response Curve<br>**----- End of picture text -----**<br>


©2011 Fairchild Semiconductor Corporation **5** www.fairchildsemi.com FDC8602 Rev.C1 

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Dimensional Outline and Pad Layout<br>**----- End of picture text -----**<br>


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FDC8602 Dual N-Channel Shielded Gate PowerTrench<br>®<br> MOSFET<br>**----- End of picture text -----**<br>


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©2011 Fairchild Semiconductor Corporation 6 www.fairchildsemi.com<br>FDC8602 Rev.C1<br>**----- End of picture text -----**<br>


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|**Datasheet Identification**|**Product Status**|**Definition**|
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Rev. I64 

©2011 Fairchild Semiconductor Corporation **7** www.fairchildsemi.com 

FDC8602 Rev.C1 

ON Semiconductor and      are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 

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