FDC6304P

July 1997 

FAIRCHILD Pe 

## **FDC6304P Digital FET, Dual P-Channel** 

## **General Description                                                                    Features** 

These P-Channel enhancement mode field effect transistor are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is tailored to minimize on-state resistance at low gate drive conditions. This device is designed especially for application in battery power applications such as notebook computers and cellular phones. This device has excellent on-state resistance even at gate drive voltages as low as 2.5 volts. 

- -25 V, -0.46 A continuous, -1.0 A Peak. 

- RDS(ON) = 1.5 Ω @ VGS= -2.7 V 

- RDS(ON) = 1.1 Ω @ VGS = -4.5 V. 

- Very low level gate drive requirements allowing  direct operation in 3V circuits. VGS(th) < 1.5 V. 

- Gate-Source Zener for ESD ruggedness. >6kV Human Body Model. 

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SOT-23 SuperSOTTM-6 SuperSOTTM-8<br>Mark: .304<br>**----- End of picture text -----**<br>


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SO-8 SOT-223 SOIC-16<br>**----- End of picture text -----**<br>


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4 3<br>5 2<br>6 1<br>**----- End of picture text -----**<br>


**Absolute Maximum Ratings** TA = 25oC unless  other wise noted 

|**Absolute Maximum Ratings**|**Absolute Maximum Ratingsgss**TA = 25oC unless  other wise notedA = 25oC unless  other wise noted= 25oC unless  other wise noted<br>oC unless  other wise notedC unless  other wise noted|oC unless  other wise notedC unless  other wise noted|
|---|---|---|
|**Symbol**<br>**Parameter**|**Parameter**|**FDC6304P**|
|VDSS<br>Drain-Source Voltage|Drain-Source Voltage|-25|
|VGSS<br>Gate-Source Voltage|Gate-Source Voltage|-8|
|ID<br>Drain Current|Drain Current<br>- Continuous<br>- Pulsed|-0.46|
|||-1|
|PD<br>Maximum Power Dissipation<br>|Maximum Power Dissipation(Note 1a)<br> (Note 1b)|0.9|
|||0.7|
|TJ,TSTG<br>Operating and Storage Temperature Range|Operating and Storage Temperature Range|-55 to 150|
|ESD<br>Electrostatic Discharge  Rating MIL-STD-883D<br>Human Body  Model (100pf / 1500 Ohm)|Electrostatic Discharge  Rating MIL-STD-883D<br>Human Body  Model (100pf / 1500 Ohm)|6.0|



FDC6304P Rev.D 

© 1997 Fairchild Semiconductor Corporation 

## **Electrical Characteristics** (TA = 25[O] C unless otherwise noted ) 

|**Electrical**|**Characteristics **(TA= 25OC unless o|therwise noted )|therwise noted )|||||
|---|---|---|---|---|---|---|---|
|**Symbol**|**Parameter**|**Conditions**||**Min**|**Typ**|**Max**|**Units**|
|**OFF CHARACTERISTICS**||||||||
|BVDSS|Drain-Source Breakdown Voltage|VGS= 0 V,  ID= -250 µA||-25|||V|
|∆BVDSS/∆TJ|Breakdown Voltage Temp. Coefficient|ID= -250 µA, Referenced to  25<br>oC|||-22||mV /<br>oC|
|IDSS|Zero Gate Voltage  Drain Current|VDS= -20 V,  VGS= 0 V||||-1|µA|
||||TJ= 55°C|||-10|µA|
|IGSS|Gate - Body Leakage Current|VGS= -8 V,  VDS= 0 V||||-100|nA|
|**ON CHARACTERISTICS**(Note 2)||||||||
|∆VGS(th)/∆TJ|Gate Threshold Voltage Temp. Coefficient|ID= -250 µA, Referenced to  25<br>oC|||2.1||mV /<br>oC|
|VGS(th)|Gate Threshold Voltage|VDS= VGS,  ID= -250 µA||-0.65|-0.86|-1.5|V|
|RDS(ON)|Static Drain-Source On-Resistance|VGS= -2.7 V,  ID= -0.25 A|||1.22|1.5|Ω|
|||VGS= -4.5 V,  ID= -0.5 A|||0.87|1.1||
||||T**J**=125°C||1.21|2||
|ID(ON)|On-State Drain Current|VGS= -2.7 V,  VDS= -5 V||-0.5|||A|
|||VGS= -4.5 V,  VDS= -5 V||-1||||
|gFS|Forward Transconductance|VDS= -5 V,  ID= -0.5 A|||0.8||S|
|**DYNAMIC CHARACTERISTICS**||||||||
|Ciss|Input Capacitance|VDS= -10 V,  VGS= 0 V,<br>f  = 1.0 MHz|||62||pF|
|Coss|Output Capacitance||||35||pF|
|Crss|Reverse Transfer Capacitance||||9.5||pF|
|**SWITCHING CHARACTERISTICS**(Note 2)||||||||
|tD(on)|Turn - On Delay Time|VDD= -6 V,  ID= -0.5 A,<br>VGS= -4.5 V,  RGEN= 50Ω|||7|20|ns|
|tr|Turn - On Rise Time||||8|20|ns|
|tD(off)|Turn - Off Delay Time||||55|110|ns|
|tf|Turn - Off Fall Time||||35|70|ns|
|Qg|Total Gate Charge|VDS= -5 V,  ID= - 0.25 A,<br>VGS= -4.5 V|||1.1|1.5|nC|
|Qgs|Gate-Source Charge||||0.32||nC|
|Qgd|Gate-Drain Charge||||0.28||nC|
|**DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS**||||||||
|IS|Maximum Continuous Drain-Source Diode Forward Current|||||-0.5|A|
|VSD|Drain-Source Diode Forward Voltage|VGS= 0 V,  IS= -0.5 A (Note 2|)||-0.88|-1.2|V|



Notes: 

1. Rdesign while RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθCA is determined by the user's board design. θJC is guaranteed by 

a. 140OC/W on a 0.125 in2 pad of b. 180OC/W on a 0.005 in2 of pad 2oz copper. of 2oz copper. 

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. 

FDC6304P Rev.D 

## **Typical Electrical Characteristics** 

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-1.5<br>V      = -4.5VGS -3.5<br>-3.0<br>-1.25<br>-2.7<br>-1<br> -2.5<br>-0.75<br>-0.5  -2.0<br>-0.25<br> -1.5<br>0<br>0 -1 -2 -3 -4 -5<br>V     , DRAIN-SOURCE VOLTAGE (V)DS<br>D<br>I    , DRAIN-SOURCE CURRENT (A)<br>**----- End of picture text -----**<br>


**Figure 1. On-Region Characteristics** . 

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1.6<br>I   = -0.25AD<br>1.4 V     = -2.7VGS<br>1.2<br>1<br>0.8<br>0.6<br>-50 -25 0 25 50 75 100 125 150<br>T  , JUNCTION TEMPERATURE (°C)J<br>DS(ON)<br>R              , NORMALIZED<br>DRAIN-SOURCE ON-RESISTANCE<br>**----- End of picture text -----**<br>


**Figure 3. On-Resistance Variation with Temperature** . 

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-1<br>V     = -5VDS T   = -55°CJ<br>25°C<br>-0.75<br>125°C<br>-0.5<br>-0.25<br>0<br>-0.5 -1 -1.5 -2 -2.5 -3<br>V     , GATE TO SOURCE VOLTAGE (V)GS<br>I   , DRAIN CURRENT (A)D<br>**----- End of picture text -----**<br>


**Figure  5. Transfer Characteristics.** 

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2.5<br>V     = -2.0 VGS<br>2<br>-2.5<br>1.5 -2.7<br>-3.0<br>-3.5<br>1 -4.5<br>0.5<br>0 0.25 0.5 0.75 1<br>-I    , DRAIN CURRENT (A)D<br>Figure 2. On-Resistance Variation with<br>Drain Current and Gate Voltage .<br>5<br> 25°C  125°C I   = -0.5AD<br>4<br>3<br>2<br>1<br>0<br>-1 -1.5 -2 -2.5 -3 -3.5 -4 -4.5 -5<br>V      , GATE TO SOURCE VOLTAGE (V)GS<br>DS(on)<br>R           , NORMALIZED<br>DRAIN-SOURCE ON-RESISTANCE<br>DS(on)<br>R             , ON-RESISTANCE (OHM)<br>**----- End of picture text -----**<br>


## **Figure 4. On Resistance Variation with Gate-To- Source Voltage.** 

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0.5<br>V    = 0V GS T  = 125°CJ<br>0.1<br>25°C<br>0.01  -55°C<br>0.0001<br>0 0.2 0.4 0.6 0.8 1 1.2<br>-V     , BODY DIODE FORWARD VOLTAGE (V)SD<br>-I   , REVERSE DRAIN CURRENT (A)<br>S<br>**----- End of picture text -----**<br>


**Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.** 

FDC6304P Rev.D 

## **Typical Electrical And Thermal Characteristics** 

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5<br>I   = -0.25AD V     = 5VDS 10V<br>4 15V<br>3<br>2<br>1<br>0<br>0 0.2 0.4 0.6 0.8 1 1.2 1.4<br>Q    , GATE CHARGE (nC)g<br>Figure 7. Gate Charge Characteristics.<br>2<br>1<br>0.3<br>0.1<br>V     = -4.5VGS<br>SINGLE PULSE<br>0.03<br>R     = See Note 1a<br>θ [JA]<br>A T    = 25°CA<br>0.01<br>0.1 0.2 0.5 1 2 5 10 20 40<br>- V     , DRAIN-SOURCE VOLTAGE (V)DS<br>RDS(ON) LIMIT 10ms<br>1ms<br> 1s<br>100ms<br>DC<br>GS<br>-V      , GATE-SOURCE VOLTAGE (V)<br>D<br>-I   , DRAIN CURRENT (A)<br>**----- End of picture text -----**<br>


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150<br>100<br>C   iss<br>50<br>Coss<br>20<br>10 f = 1 MHz C  rss<br>V     = 0 V GS<br>5<br>0.1 0.3 0.5 1 5 10 15 25<br>-V     , DRAIN TO SOURCE VOLTAGE (V)DS<br>CAPACITANCE (pF)<br>**----- End of picture text -----**<br>


**Figure 8. Capacitance Characteristics** . 

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5<br>SINGLE PULSE<br>4<br>R     =See note 1a       θ [JA]<br>T  = 25°CA<br>3<br>2<br>1<br>0<br>0.01 0.1 1 10 100 300<br>SINGLE PULSE TIME (SEC)<br>POWER (W)<br>**----- End of picture text -----**<br>


**Figure 9. Maximum Safe Operating Area.** 

**Figure 10. Single Pulse Maximum Power Dissipation.** 

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1<br>0.5  D = 0.5<br>R       (t) = r(t)  θ [JA] *   R         θ [JA]<br>0.2   0.2      R         θ [JA] = See Note 1b<br> 0.1<br>0.1 P(pk)<br> 0.05<br>0.05  t  1<br> 0.02   t   2<br> 0.01  T  - T    = P  * R       (t)J A θ [JA]<br>0.02  Single Pulse<br>Duty Cycle, D = t   / t1 2<br>0.01<br>0.0001 0.001 0.01 0.1 1 10 100 300<br>t  , TIME (sec)1<br>r(t), NORMALIZED EFFECTIVE<br>TRANSIENT THERMAL RESISTANCE<br>**----- End of picture text -----**<br>


**Figure 11. Transient Thermal Response Curve** . 

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Note: Thermal characterization performed using the conditions described in note 1b.Transient thermal<br>response will change depending on the circuit board design.<br>**----- End of picture text -----**<br>


FDC6304P Rev.D 

## **TRADEMARKS** 

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. 

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||||||||
|---|---|---|---|---|---|---|
|ACEx™|FAST||OPTOLOGIC™|SMART START™|VCX™|
|Bottomless™|FASTr™|OPTOPLANAR™|STAR*POWER™|
|CoolFET™|FRFET™|PACMAN™|Stealth™|
|CROSSVOLT|™|GlobalOptoisolator™|POP™|SuperSOT™-3|
|DenseTrench™|GTO™|Power247™|SuperSOT™-6|
|DOME™|HiSeC™|PowerTrench||SuperSOT™-8|
|EcoSPARK™|ISOPLANAR™|QFET™|SyncFET™|
|E|[2]|CMOS|[TM]|LittleFET™|QS™|TinyLogic™|
|EnSigna|[TM]|MicroFET™|QT Optoelectronics™|TruTranslation™|
|FACT™|MicroPak™|Quiet Series™|UHC™|
|FACT Quiet Series™|MICROWIRE™|SILENT SWITCHER||UltraFET||

**----- End of picture text -----**<br>


STAR*POWER is used under license 

## **DISCLAIMER** 

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 

## **LIFE SUPPORT POLICY** 

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 

1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. 

## **PRODUCT STATUS DEFINITIONS** 

## **Definition of Terms** 

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Datasheet Identification Product Status Definition<br>Advance Information Formative or This datasheet contains the design specifications for<br>In Design product development. Specifications may change in<br>any manner without notice.<br>Preliminary First Production This datasheet contains preliminary data, and<br>supplementary data will be published at a later date.<br>Fairchild Semiconductor reserves the right to make<br>changes at any time without notice in order to improve<br>design.<br>No Identification Needed Full Production This datasheet contains final specifications. Fairchild<br>Semiconductor reserves the right to make changes at<br>any time without notice in order to improve design.<br>Obsolete Not In Production This datasheet contains specifications on a product<br>that has been discontinued by Fairchild semiconductor.<br>The datasheet is printed for reference information only.<br>**----- End of picture text -----**<br>


Rev. H4