FCU900N60Z
Power MOSFET, N Channel, 600 V, 4.5 A, 0.9 ohm, TO-251, Through Hole
- Manufacturer: ONSEMI
- Product type: Single MOSFETs
- Transistor Polarity:N Channel; Continuous Drain Current Id:4.5A; Drain Source Voltage Vds:600V; On Resistance Rds(on):0.82ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:2.5V; P
- MSL: -
- SVHC: Lead (23-Jan-2024)
- No. of Pins: 3Pins
- Channel Type: N Channel
- Product Range: -
- Qualification: -
- Power Dissipation: 52W
- Transistor Mounting: Through Hole
- Rds(on) Test Voltage: 10V
- Transistor Case Style: TO-251
- Drain Source Voltage Vds: 600V
- Operating Temperature Max: 150°C
- Continuous Drain Current Id: 4.5A
- Drain Source On State Resistance: 0.9ohm
- Gate Source Threshold Voltage Max: 2.5V
| Delivery and price | |
|---|---|
| Units per pack | 10 |
| Price | 1.02 € |
| Current stock | 50+ |
| Lead time | 7 days |
## FCU900N60Z ## MOSFET, N-Channel, SuperFET II **600 V, 4.5 A, 900 m** **www.onsemi.com Description** SuperFET[®] II MOSFET is ON Semiconductor’s brand−new high voltage super−junction (SJ) MOSFET family that is utilizing charge D balance technology for outstanding low on−resistance and lower gate charge performance. This technology is tailored to minimize conduction loss, provide superior switching performance, dv/dt rate and higher avalanche energy. Consequently, SuperFET II MOSFET is very suitable for the switching power applications such as PFC, G server/telecom power, FPD TV power, ATX power and industrial power applications. **Features** S • 675 V @ TJ = 150°C **N−Channel** • Typ. RDS(on) = 820 m | • Ultra Low Gate Charge (Typ. Qg = 13 nC) • Low Effective Output Capacitance (Typ. Coss(eff.) = 48.6 pF) • 100% Avalanche Tested • ESD Improved Capacity GDS • RoHS Compliant **DPAK3 CASE 369AP** ## **Applications** - LCD/LED/PDP TV and Monitor Lighting ## **MARKING DIAGRAM** - Solar Inverter - Charger **==> picture [42 x 27] intentionally omitted <==** **----- Start of picture text -----**<br> $Y&Z&3&K<br>FCU<br>900N60Z<br>**----- End of picture text -----**<br> **==> picture [166 x 48] intentionally omitted <==** **----- Start of picture text -----**<br> $Y = ON Semiconductor Logo<br>&Z = Assembly Plant Code<br>&3 = Numeric Date Code<br>&K = Lot Code<br>FCU900N60Z = Specific Device Code<br>**----- End of picture text -----**<br> **ORDERING INFORMATION Device Top Mark Package Shipping** FCU900N60Z FCU900N60Z DPAK3 70 Units/ Tube ~~SEE~~ Publication Order Number: **FCU900N60Z/D** **1** © Semiconductor Components Industries, LLC, 2012 **April, 2019 − Rev. 4** ## **FCU900N60Z** **ABSOLUTE MAXIMUM RATINGS** (TC = 25 ° C unless otherwise noted) |**ABSOLUTE MAX**|**IMUM RATINGS**(TC= 25°C unless otherwise noted)|**IMUM RATINGS**(TC= 25°C unless otherwise noted)||| |---|---|---|---|---| |**Symbol**|**Parameter**||**Value**|**Unit**| |VDSS|Drain to Source Voltage||600|V| |VGSS|Gate to Source Voltage|DC|±20|V| |||AC (f > 1 Hz)|±30|| |ID|Drain Current|Continuous (TC= 25°C)|4.5|A| |||Continuous (TC= 100°C)|2.8|| |IDM|Drain Current|Pulsed (Note 1)|13.5|A| |EAS|Single Pulsed Avalanche Energy (Note 2)||47.5|mJ| |IAR|Avalanche Current (Note 1)||1|A| |EAR|Repetitive Avalanche Energy (Note 1)||0.52|mJ| |dv/dt|MOSFET dv/dt||100|V/ns| ||Peak Diode Recovery dv/dt (Note 3)||20|| |PD|Power Dissipation|(TC= 25°C)|52|W| |||Derate above 25°C|0.42|W/°C| |TJ,TSTG|Operating and Storage Temperature Range||−55 to +150|°C| |TL|Maximum Lead Temperature for Soldering,1/8”from Case for 5 Seconds||300|°C| Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Repetitive rating: pulse−width limited by maximum junction temperature. 2. IAS = 1.0 A, VDD = 50 V, RG = 25 � , starting TJ = 25 ° C. 3. ISD ≤ 2.3 A, di/dt ≤ 200 A/ � s, VDD ≤ BVDSS, starting TJ = 25 ° C. ## **THERMAL CHARACTERISTICS** |**Symbol**|**Parameter**|**Value**|**Unit**| |---|---|---|---| |R�JC|Thermal Resistance, Junction to Case, Max.|2.4|°C/W| |R�JA|Thermal Resistance, Junction to Ambient, Max.|100|| **www.onsemi.com** **2** **FCU900N60Z** **ELECTRICAL CHARACTERISTICS** (TC = 25 ° C unless otherwise noted) |**ELECTRICAL**|**CHARACTERISTICS**(TC= 25°C unles|s otherwise noted)||||| |---|---|---|---|---|---|---| |**Symbol**|**Parameter**|**Test Conditions**|**Min.**|**Typ.**|**Max.**|**Unit**| |**OFF CHARACTERISTICS**||||||| |BVDSS|Drain to Source Breakdown Voltage|ID= 1 mA, VGS= 0 V, TJ= 25°C|625|−|−|V| |||ID= 1 mA, VGS= 0 V, TJ= 150°C|675|−|−|| |�BVDSS/�TJ|Breakdown Voltage Temperature Coeffi-<br>cient|ID= 1 mA, referenced to 25°C|−|0.67|−|V/°C| |BVDS|Drain to Source Avalanche Breakdown<br>Voltage|VGS= 0 V, ID= 4.5 V|−|700|−|V| |IDSS|Zero Gate Voltage Drain Current|VDS= 600 V, VGS= 0 V|−|−|1|�A| |||VDS= 600 V, TC= 125°C|−|−|10|| |IGSS|Gate to Body Leakage Current|VGS=±20 V, VDS= 0 V|−|−|±10|�A| |**ON CHARACTERISTICS**||||||| |VGS(th)|Gate Threshold Voltage|VGS= VDS, ID= 250�A|2.5|−|3.5|V| |RDS(on)|Static Drain to Source On Resistance|VGS= 10 V, ID= 2.3 A|−|0.82|0.90|�| |gFS|Forward Transconductance|VDS= 20 V, ID= 2.3 A|−|4.6|−|S| |**DYNAMIC CHARACTERISTICS**||||||| |Ciss|Input Capacitance|VDS= 40 V, VGS= 0 V,<br>f = 1 MHz|−|534|710|pF| |Coss|Output Capacitance||−|399|530|pF| |Crss|Reverse Transfer Capacitance||−|19.7|30|pF| |Coss|Output Capacitance|VDS= 380 V, VGS= 0 V, f = 1 MHz|−|11.1|−|pF| |Coss(eff.)|Effective Output Capacitance|VDS= 0 V to 480 V, VGS= 0 V|−|48.6|−|pF| |Qg(tot)|Total Gate Charge at 10 V|VDS= 380 V, ID= 2.3 A,<br>VGS= 10 V<br>(Note 4)|−|13.1|17|nC| |Qgs|Gate to Source Gate Charge||−|2.2|−|nC| |Qgd|Gate to Drain “Miller” Charge||−|4.5|−|nC| |ESR|Equivalent Series Resistance|f = 1 MHz|−|2.4|−|�| |**SWITCHING CHARACTERISTICS**||||||| |td(on)|Turn−On Delay Time|VDD= 380 V, ID= 2.3 A,<br>VGS= 10 V, RG= 4.7�<br>(Note 4)|−|10.9|32|ns| |tr|Turn−On Rise Time||−|5.3|21|ns| |td(off)|Turn−Off Delay Time||−|33.6|77|ns| |tf|Turn−Off Fall Time||−|11.9|34|ns| |**DRAIN−SOURCE DIODE CHARACTERISTIC**||||||| |IS|Maximum Continuous Drain to Source Diode Forward Current||−|−|4.5|A| |ISM|Maximum Pulsed Drain to Source Diode Forward Current||−|−|13.5|A| |VSD|Drain to Source Diode Forward Voltage|VGS= 0 V, ISD= 2.3 A|−|−|1.2|V| |trr|Reverse Recovery Time|VGS= 0 V, ISD= 2.3 A,<br>dIF/dt = 100 A/�s|−|156|−|ns| |Qrr|Reverse Recovery Charge||−|1.3|−|�C| Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Essentially independent of operating temperature. **www.onsemi.com** **3** **FCU900N60Z** ## **TYPICAL PERFORMANCE CHARACTERISTICS** **==> picture [444 x 615] intentionally omitted <==** **----- Start of picture text -----**<br> 20 20<br>VGS = 10.0 V * Notes:<br>10 8.0 V 10 1. VDS = 20 V<br>7.0 V 2. 250 � s Pulse Test<br>6.0 V<br>5.5 V<br>5.0 V 150 ° C<br>4.5 V<br>4.0 Vo<br>25 ° C<br>1 1<br>−55 ° C<br>* Notes:<br>1. 250 � s Pulse Test<br>2. TC = 25 ° C<br>0.1 0.1<br>0.2 1 10 20 2 4 6 8<br>VDS, Drain to Source Voltage [V] VGS, Gate to Source Voltage [V]<br>Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics<br>2.0 50<br>150 ° C<br>1.6 10<br>25 ° C<br>1.2<br>VGS = 10 V<br>1<br>VGS = 20 V<br>0.8<br>* Notes:<br>1. VGS = 0 V<br>* Note: TC = 25 ° C 2. 250 � s Pulse Test<br>0.4 0.1<br>0 3 6 9 12 0.4 0.8 1.2 1.6<br>ID, Drain Current [A] VSD, Body Diode Forward Voltage [A]<br>Figure 3. On−Resistance Variation Figure 4. Body Diode Forward Voltage<br>vs. Drain Current and Gate Voltage Variation vs. Source Current and Temperature<br>10000 10<br>Ciss = Cgs + Cgd (Cds = shorted)<br>Coss = Cds + Cgd<br>Crss = Cgd VDS = 120 V<br>8 V DS = 300 V<br>1000<br>VDS = 480 V<br>Ciss<br>6<br>100<br>Coss 4<br>10<br>* Note: C rss 2<br>1. VGS = 0 V<br>1 2. f = 1 MHz * Note: ID = 2.3 A<br>0.5 0<br>0.1 1 10 100 600 0 3 6 9 12 15<br>VDS, Drain to Source Voltage [A] Qg, Total Gate Charge [nC]<br>, Drain Current [A] , Drain Current [A]<br>ID ID<br>] �<br>, Drain to Source<br>On Resistance [<br>DS(ON)<br>R , Reverse Drain Current [A]<br>IS<br>Capacitances [pF]<br>, Gate to Source Voltage [V]<br>GS<br>V<br>**----- End of picture text -----**<br> **Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature** **Figure 5. Capacitance Characteristics** **Figure 6. Gate Charge Characteristics** **www.onsemi.com** **4** **FCU900N60Z** ## **TYPICAL PERFORMANCE CHARACTERISTICS** (continued) **==> picture [214 x 177] intentionally omitted <==** **----- Start of picture text -----**<br> 1.15<br>1.10<br>1.05<br>1.00<br>0.95<br>0.90 * Notes:<br>1. VGS = 0 V<br>2. ID = 1 mA<br>0.85<br>−100 −50 0 50 100 150 200<br>TJ, Junction Temperature [ � C]<br>, Drain to Source Breakdown Voltage [Normalized]<br>DSS<br>BV<br>**----- End of picture text -----**<br> **Figure 7. Breakdown Voltage Variation vs. Temperature** **==> picture [210 x 177] intentionally omitted <==** **----- Start of picture text -----**<br> 3.0<br>2.5<br>2.0<br>1.5<br>1.0<br>0.5 * Notes:<br>1. VGS = 10 V<br>2. ID = 2.3 A<br>0.0<br>−100 −50 0 50 100 150 200<br>TJ, Junction Temperature [ � C]<br>, Drain to Source<br>DS(on)<br>R<br>On−Resistance [Normalized]<br>**----- End of picture text -----**<br> **Figure 8. On−Resistance Variation vs. Temperature** **==> picture [204 x 394] intentionally omitted <==** **----- Start of picture text -----**<br> 20<br>10 10 � s<br>100 � s<br>1<br>1 ms<br>10 ms<br>Operation in This Area<br>DC<br>is Limited by RDS(on)<br>0.1<br>* Notes:<br>1. T C = 25 ° C<br>2. T J = 150 ° C<br>3. Single Pulse<br>0.01<br>0.1 1 10 100 1000<br>VDS, Drain to Source Voltage [V]<br>Figure 9. Maximum Safe Operating Area<br>2.8<br>2.4<br>2.0<br>1.6<br>1.2<br>0.8<br>0.4<br>0.0<br>0 100 200 300 400 500 600<br>VDS, Drain to Source Voltage [V]<br>, Drain Current [A]<br>ID<br>J]<br>�<br> [<br>oss<br>E<br>**----- End of picture text -----**<br> **==> picture [203 x 179] intentionally omitted <==** **----- Start of picture text -----**<br> 5<br>4<br>VGS = 10 V<br>3<br>2<br>1<br>0<br>25 50 75 100 125 150<br>TC, Case Temperature [ � C]<br>, Drain Current [A]<br>ID<br>**----- End of picture text -----**<br> **Figure 10. Maximum Drain Current vs. Case Temperature** **Figure 11. Eoss vs. Drain to Source Voltage** **www.onsemi.com** **5** **FCU900N60Z** **TYPICAL PERFORMANCE CHARACTERISTICS** (continued) **==> picture [325 x 165] intentionally omitted <==** **----- Start of picture text -----**<br> 3<br>0.5<br>1<br>0.2<br>PDM<br>0.1<br>0.05 t1<br>0.02 t2<br>0.01 Single pulse * Notes: 1. Z � JC (t) = 2.4 ° C/W Max.<br>2. Duty Factor, D = t1/t2<br>3. TJM −TC = PDM × Z � JC(t)<br>0.1<br>10 [−5] 10 [−4] 10 [−3] 10 [−2] 10 [−1] 10 [0]<br>VDS, Drain to Source Voltage [V]<br>C/W]<br>�<br>(t), Thermal Response [<br>JC<br>�<br>Z<br>**----- End of picture text -----**<br> **Figure 12. Transient Thermal Response Curve** **www.onsemi.com** **6** **FCU900N60Z** **==> picture [212 x 174] intentionally omitted <==** **----- Start of picture text -----**<br> RL<br>VDS<br>VGS<br>DUT<br>IG = const.<br>**----- End of picture text -----**<br> **==> picture [15 x 8] intentionally omitted <==** **----- Start of picture text -----**<br> VGS<br>**----- End of picture text -----**<br> **==> picture [188 x 160] intentionally omitted <==** **----- Start of picture text -----**<br> Qg<br>Qgs Qgd<br>Charge<br>**----- End of picture text -----**<br> **Figure 13. Gate Charge Test Circuit and Waveform** **==> picture [204 x 77] intentionally omitted <==** **----- Start of picture text -----**<br> RL<br>VDS<br>VGS VDD<br>RG<br>DUT<br>VGS<br>**----- End of picture text -----**<br> **==> picture [149 x 100] intentionally omitted <==** **----- Start of picture text -----**<br> VDS 90%<br>10%<br>VGS<br>td(on) tr td(off) tf<br>ton toff<br>**----- End of picture text -----**<br> **Figure 14. Resistive Switching Test Circuit and Waveforms** **==> picture [432 x 124] intentionally omitted <==** **----- Start of picture text -----**<br> L<br>VDS EAS � [1] 2 L IAS2<br>BVDSS<br>ID<br>IAS<br>RG VDD ID(t)<br>10 V DUT VDD VDS(t)<br>tp tp Time<br>**----- End of picture text -----**<br> **Figure 15. Unclamped Inductive Switching Test Circuit and Waveforms** **www.onsemi.com** **7** **FCU900N60Z** **==> picture [289 x 230] intentionally omitted <==** **----- Start of picture text -----**<br> DUT +<br>VDS<br>−<br>ISD<br>L<br>Driver<br>RG<br>Same type<br>as DUT VDD<br>VGS<br>� dv/dt controlled by RG<br>� ISD controlled by pulse period<br>**----- End of picture text -----**<br> **==> picture [325 x 257] intentionally omitted <==** **----- Start of picture text -----**<br> Gate Pulse Width<br>D �<br>VGS Gate Pulse Period 10 V<br>(Driver)<br>IFM, Body Diode Forward Current<br>ISD<br>(DUT) di/dt<br>IRM<br>Body Diode Reverse Current<br>VDS<br>(DUT) Body Diode Recovery dv/dt<br>VSD VDD<br>Body Diode<br>Forward Voltage Drop<br>**----- End of picture text -----**<br> **Figure 16. Peak Diode Recovery dv/dt Test Circuit and Waveforms** SuperFET is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. **www.onsemi.com** **8** MECHANICAL CASE OUTLINE **PACKAGE DIMENSIONS** **DPAK3 (STRAIGHT LEADS)** CASE 369AP ISSUE O DATE 30 SEP 2016 **==> picture [89 x 64] intentionally omitted <==** **==> picture [491 x 72] intentionally omitted <==** **----- Start of picture text -----**<br> DOCUMENT NUMBER: 98AON13816G Electronic versions are uncontrolled except when<br>accessed directly from the Document Repository. Printed<br>STATUS: ON SEMICONDUCTOR STANDARD<br>versions are uncontrolled except when stamped<br>“CONTROLLED COPY” in red.<br>NEW STANDARD:<br>© Semiconductor Components Industries, LLC, 2002 http://onsemi.com Case Outline Number:<br>October, 2002 − Rev. 0DESCRIPTION: DPAK3 (STRAIGHT LEADS) 1 PAGE 1 OF 2XXX<br>**----- End of picture text -----**<br> |**DOCUMENT NUMBER:**<br>**98AON13816G**<br>**PAGE 2 OF 2**<br>~~eT ©~~<br>~~——~~|**DOCUMENT NUMBER:**<br>**98AON13816G**<br>**PAGE 2 OF 2**<br>~~eT ©~~<br>~~——~~| |---|---| |**ISSUE**|**REVISION**<br>**DATE**| |O|RELEASED FOR PRODUCTION FROM FAIRCHILD TO251B03 TO ON<br>30 SEP 2016| ||SEMICONDUCTOR. REQ. BY I. CAMBALIZA.| **ON Semiconductor** and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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This literature is subject to all applicable copyright laws and is not for resale in any manner. Case Outline Number: © Semiconductor Components Industries, LLC, 2016 **September, 2016 − Rev. O** **369AP** ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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