FCPF11N60

## **Is Now Part of** 

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**March 2014 FCP11N60/FCPF11N60 General Description Features** SuperFET® MOSFET is Fairchild Semiconductor’s first • 650V @Tj = 150°C genera-tion of high voltage super-junction (SJ) MOSFET • Typ. Rds(on)=0.32Ω family that is utilizing charge balance technology for • Ultra low gate charge (typ. Qg=40nC) outstanding low on-resistance and lower gate charge • Low effective output capacitance (typ. Coss.eff=95pF) performance. This technology is tailored to minimize • 100% avalanche tested conduction loss, provide superior switch-ing performance, • RoHS Compliant dv/dt rate and higher avalanche energy. Con-sequently, SuperFET MOSFET is very suitable for the switching power applications such as PFC, server/telecom power, FPD TV power, ATX power and industrial power applications. **D G GDS TO-220 GDS TO-220F S** 

## **Absolute Maximum Ratings** TC = 25°C unless otherwise noted 

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Symbol Parameter FCP11N60 FCPF11N60 Units<br>ID Drain Current - Continuous (TC = 25°C) 11 11* A<br>- Continuous (TC = 100°C) 7 7* A<br>IDM Drain Current - Pulsed (Note 1) 33 33* A<br>VGSS Gate-Source Voltage ± 30 V<br>EAS Single Pulsed Avalanche Energy (Note 2) 340 mJ<br>IAR Avalanche Current (Note 1) 11 A<br>EAR Repetitive Avalanche Energy (Note 1) 12.5 mJ<br>dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns<br>PD Power Dissipation (TC = 25°C) 125 36 W<br>- Derate above 25°C 1.0 0.29 W/°C<br>TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C<br>Maximum lead temperature for soldering purposes,<br>TL 1/8 "  from case for 5 seconds 300 °C<br>* Drain current limited by maximum junction termperature<br>Thermal Characteristics<br>Symbol Parameter FCP11N60 FCPF11N60 Units<br>RθJC Thermal Resistance, Junction-to-Case 1.0 3.5 °C / W<br>RθCS Thermal Resistance, Case-to-Sink 0.5 -- °C / W<br>RθJA Thermal Resistance, Junction-to-Ambient 62.5 62.5 °C / W<br>——————<br>**----- End of picture text -----**<br>


- Drain current limited by maximum junction termperature 

©2008 Fairchild Semiconductor Corporation **1** FCP11N60/FCPF11N60 Rev. C0 

www.fairchildsemi.com 

## **Package Marking and Ordering Information** 

|**Electrical Characteristics**TC= 25°C unless otherwise noted<br>**Symbol**<br>**Parameter**<br>**Test Conditions**<br>**Min**<br>**Typ**<br>**Max**<br>**Units**<br>**Off Characteristics**<br>BVDSS<br>Drain-Source Breakdown Voltage<br>VGS= 0 V, ID= 250µA, TJ= 25°C<br>600<br>--<br>--<br>V<br>VGS= 0 V, ID= 250µA, TJ= 150°C<br>--<br>650<br>--<br>V<br>∆BVDSS<br>/∆TJ<br>Breakdown Voltage Temperature Coef-<br>ficient<br>ID= 250µA, Referenced to 25°C<br>--<br>0.6<br>--<br>V/°C<br>BVDS<br>Drain-Source Avalanche Breakdown<br>Voltage<br>VGS= 0 V, ID= 11 A<br>--<br>700<br>--<br>V<br>IDSS<br>Zero Gate Voltage Drain Current<br>VDS= 600 V, VGS= 0 V<br>--<br>--<br>1<br>µA<br>VDS= 480 V, TC= 125°C<br>--<br>--<br>10<br>µA<br>IGSSF<br>Gate-Body Leakage Current, Forward<br>VGS= 30 V, VDS= 0 V<br>--<br>--<br>100<br>nA<br>IGSSR<br>Gate-Body Leakage Current, Reverse<br>VGS= -30 V, VDS= 0 V<br>--<br>--<br>-100<br>nA<br>**On Characteristics**<br>VGS(th)<br>Gate Threshold Voltage<br>VDS= VGS, ID= 250µA<br>3.0<br>--<br>5.0<br>V<br>RDS(on)<br>Static Drain-Source<br>On-Resistance<br>VGS= 10 V, ID= 5.5 A<br>--<br>0.32<br>0.38<br>Ω<br>gFS<br>Forward Transconductance<br>VDS= 40 V, ID= 5.5 A<br>(Note 4)<br>--<br>9.7<br>--<br>S<br>**Dynamic Characteristics**<br>Ciss<br>Input Capacitance<br>VDS= 25 V, VGS= 0 V,<br>f = 1.0 MHz<br>--<br>1148<br>1490<br>pF<br>Coss<br>Output Capacitance<br>--<br>671<br>870<br>pF<br>Crss<br>Reverse Transfer Capacitance<br>--<br>63<br>82<br>pF<br>Coss<br>Output Capacitance<br>VDS= 480 V, VGS= 0 V,<br>f = 1.0 MHz<br>--<br>35<br>--<br>pF<br>Cosseff.<br>Effective Output Capacitance<br>VDS= 0V to 480 V, VGS= 0 V<br>--<br>95<br>--<br>pF<br>**Part Number**<br>**Top Mark**<br>**Package**<br>**Packing Method**<br>**Reel Size**<br>**Tape Width**<br>**Quantity**<br>FCP11N60<br>FCP11N60<br>TO-220<br>Tube<br>N/A<br>N/A<br>50 units<br>FCPF11N60<br>FCPF11N60<br>TO-220F<br>Tube<br>N/A<br>N/A<br>50 units<br>FCPF11N60T<br>FCPF11N60T<br>TO-220F<br>Tube<br>N/A<br>N/A<br>50 units<br>~~aa~~<br>~~oe ee~~<br>~~==~~|
|---|
|**Switching Characteristics**|
|td(on)<br>Turn-On Delay Time<br>VDD= 300 V, ID= 11 A,<br>RG= 25Ω<br>(Note 4, 5)<br>--<br>34<br>80<br>ns<br>tr<br>Turn-On Rise Time<br>--<br>98<br>205<br>ns<br>td(off)<br>Turn-Off Delay Time<br>--<br>119<br>250<br>ns<br>tf<br>Turn-Off Fall Time<br>--<br>56<br>120<br>ns<br>Qg<br>Total Gate Charge<br>VDS= 480 V, ID= 11 A,<br>VGS= 10 V<br>(Note 4, 5)<br>--<br>40<br>52<br>nC<br>Qgs<br>Gate-Source Charge<br>--<br>7.2<br>--<br>nC<br>Qgd<br>Gate-Drain Charge<br>--<br>21<br>--<br>nC<br>~~o_o~~|
|**Drain-Source Diode Characteristics and Maximum Ratings**|
|IS<br>Maximum Continuous Drain-Source Diode Forward Current<br>--<br>--<br>11<br>A<br>ISM<br>Maximum Pulsed Drain-Source Diode Forward Current<br>--<br>--<br>33<br>A<br>VSD<br>Drain-Source Diode Forward Voltage<br>VGS= 0 V, IS= 11 A<br>--<br>--<br>1.4<br>V<br>trr<br>Reverse Recovery Time<br>VGS= 0 V, IS= 11 A,<br>dIF/ dt = 100 A/µs<br>(Note 4)<br>--<br>390<br>--<br>ns<br>Qrr<br>Reverse Recovery Charge<br>--<br>5.7<br>--<br>µC<br>~~EE~~|
|**Notes:**|
|1. Repetitive Rating : Pulse width limited by maximum junction temperature|
|2. IAS= 5.5A, VDD= 50V, RG= 25Ω,Starting  TJ= 25°C|
|3. ISD ≤11A, di/dt≤200A/µs, VDD ≤BVDSS,Starting  TJ= 25°C|
|4. Pulse Test : Pulse width≤300µs, Duty cycle≤2%|
|5. Essentially independent of operating temperature|



©2008 Fairchild Semiconductor Corporation FCP11N60/FCPF11N60 Rev. C0 

www.fairchildsemi.com 

**2** 

## **Typical Characteristics** 

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102<br>Top :       15.0 V     VGS<br>   10.0 V<br>   8.0 V<br>101    7.0 V   6.5 V   6.0 V 101<br>Bottom :    5.5 V<br>150oC<br>100 100 25oC -55oC<br>* Notes :<br>10-1 1. 250 2. TC = 25µs Pulse TestoC * Note1. V2. 250 DS = 40Vµs Pulse Test<br>10-1 100 101 10-1 2 re 4 6 8 10<br>VDS, Drain-Source Voltage [V] VGS , Gate-Source Voltage  [V]<br>Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics<br>1.0<br>0.8<br>VGS = 10V 101<br>0.6<br>0.4 VGS = 20V 100 150 oC 25 oC<br>0.2 * Notes :<br>* Note : TJ = 25oC  1. V 2. 250 GS = 0Vµs Pulse Test<br>0.0 0 5 10 15 20 25 30 35 40 10-10.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6<br>ID, Drain Current [A] VSD , Source-Drain Voltage  [V]<br>Figure 3. On-Resistance Variation  vs. Figure 4. Body Diode Forward Voltage<br>Drain Current and Gate Voltage Variation vs. Source Current<br>and Temperature<br>6000 12<br>5000 CCCissossrss = C = C = Cgsgdds + C + Cgdgd (Cds = shorted) 10 VDSV = 250VDS = 100V<br>VDS = 400V<br>4000 8<br>EEE Z<br>3000 Coss 6<br>* Notes :<br>2000 Ciss 2. f = 1 MHz1. VGS = 0 V 4<br>1000 Crss 2<br>* Note : ID = 11A<br>0 0<br>10-1 100 101 0 5 10 15 20 25 30 35 40 45<br>VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC]<br>, Drain Current [A]ID  , Drain Current  [A]ID<br>],<br>Ω<br> [<br>DS(ON)<br>R<br>Drain-Source On-Resistance  , Reverse Drain Current  [A]<br>IDR<br>Capacitance [pF]<br>, Gate-Source Voltage [V]<br>GS<br>V<br>**----- End of picture text -----**<br>


**Figure 5. Capacitance Characteristics Figure 6. Gate  Charge Characteristics** 

©2008 Fairchild Semiconductor Corporation FCP11N60/FCPF11N60 Rev. C0 

www.fairchildsemi.com 

**3** 

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Typical Characteristics      (Continued)<br>1.2 3.0<br>2.5<br>1.1<br>2.0<br>1.0 1.5<br>1.0<br>* Notes :<br>0.9 2. I1. VDGS = 250  = 0 VµA 0.5 * Notes : 2. I 1. VDGS = 5.5 A = 10 V<br>0.8 0.0<br>-100 -50 0 50 100 150 200 -100 -50 0 50 100 150 200<br>TJ, Junction Temperature [oC] TJ, Junction Temperature [oC]<br>Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation<br>vs. Temperature vs. Temperature<br>102 Operation in This Area  102 Operation in This Area<br>is Limited by R DS(on) is Limited by R DS(on)<br>LO cols po eee Siti ‘< 22s~ sf sunk |- i + +bisipiessie + - wa: x ae<br>101 _——L oa é ——E  ———ana aN me ‘ SS ésBeal4 10 ms : 1 ms S. * 100 us nares sotSt1i1 101 ————————2 - - L Ps 4 a- s .x ~. ~e> s. sss .S s* 5 10 ms s 1 ms . . 100 us . Sageaxf}~ x 1'iI<br>100 DC — . . 4 1 100 |+ < 100 ms . < ~ s 1t<br>DC s~s1<br>nS i<br>10-1 * Notes :  2. T  1. T  3. Single PulseCJ = 150  = 25 oCoC 10-1 * Notes : 1. T 2. T 3. Single PulseCJ = 150  = 25 oCoC<br>10-2100 101 102 103 10-2100 101 102 103<br>VDS, Drain-Source Voltage [V] VDS, Drain-Source Voltage [V]<br>Figure 9-1. Maximum Safe Operating Area Figure 9-2. Maximum Safe Operating Area<br>for FCP11N60 for FCPF11N60<br>12.5<br>10.0<br>7.5<br>5.0<br>2.5<br>0.0<br>25 50 75 100 125 150<br>TC, Case Temperature [oC]<br>Figure 10. Maximum Drain Current<br>vs.  Case Temperature<br> , (Normalized)<br>, (Normalized)<br>DSS DS(ON)<br>BV R<br>Drain-Source Breakdown Voltage Drain-Source On-Resistance<br>FCP11N60 / FCPF11N60 — N-Channel SuperFET<br>®<br>MOSFET<br>, Drain Current [A]ID , Drain Current [A]ID<br>, Drain Current [A]ID<br>**----- End of picture text -----**<br>


www.fairchildsemi.com 

©2008 Fairchild Semiconductor Corporation **4** FCP11N60/FCPF11N60 Rev. C0 

## **Typical Characteristics** (Continued) 

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1 0 0<br>D =0.5<br>0.2<br>* N otes :<br>1 0 -1 0.050.1    1. Z   3. T2. D uty F a cto r, D = t θ JM JC - T(t) =  1 .0   C  =  P D MoC /W * Z1 θ/t M ax. JC2 (t)<br>0.02 PDM<br>0.01<br>t1<br>single pulse t2<br>1 0 -2<br>Fado<br>S ee<br>1 0 Se -5 l 1 0  Sesh -4 1 0 -3 S21) 1 0 -2 1 0 -1 1 0 0 1 0 1<br>t 1, S quare W ave P ulse D uration [sec]<br>Figure 11-1. Transient Thermal Response Curve for FCP11N60<br>D =0.5<br>10 0<br>0.2<br>mann rr lll<br>0.1 peelSo * N otes :<br>0.05 1 . Z θ JC(t) =  3.5  oC /W  M ax.<br>10 -1 0.02 2 . D uty F actor, D = t3 . T JM - T C  =  P D M * Z1 θ/t JC2 (t)<br>0.01 PDM<br>t1<br>single pulse t2<br>10 -210 Ee F -5 eatie 10 -4 eeterelcccc oon 10 -3 coc 10 -2  cenin 10 -1 eemenimi 10 0 eect 10 1<br>t 1, S quare W ave P ulse D uration [sec]<br>(t), T herm al R esponse<br>Z JCθ<br>(t), Therm al Response<br>Z JCθ<br>**----- End of picture text -----**<br>


**Figure 11-1. Transient Thermal Response Curve for FCP11N60** 

**Figure 11-2. Transient Thermal Response Curve for FCPF11N60** 

©2008 Fairchild Semiconductor Corporation FCP11N60/FCPF11N60 Rev. C0 

www.fairchildsemi.com 

**5** 

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Figure 12. Gate Charge Test Circuit & Waveform<br>VGS<br>Same Type<br>50KΩ as DUT Qg<br>12V 200nF 300nF 10V<br>VGS VDS Qgs Qgd<br>DUT<br>3mA<br>Charge<br>ms TL<br>Figure 13.  Resistive Switching Test Circuit & Waveforms<br>VDS RL VDS 90%<br>VGS VDD<br>RG<br>10%<br>DUT VGS<br>10V<br>td(on) tr td(off) tf<br>t on t off<br>Figure 14.  Unclamped Inductive Switching Test Circuit & Waveforms<br>VDS L EAS = ----12 L IAS2 --------------------BVBVDSSDSS- VDD<br>I D BVDSSIAS<br>RG VDD ID (t)<br>10V DUT VDD VDS (t)<br>t p t p Time<br>FCP11N60 / FCPF11N60 — N-Channel SuperFET<br>®<br>MOSFET<br>**----- End of picture text -----**<br>


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©2008 Fairchild Semiconductor Corporation<br>FCP11N60/FCPF11N60 Rev. C0<br>**----- End of picture text -----**<br>


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**Figure 15.  Peak Diode Recovery dv/dt Test Circuit & Waveforms** 

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DUT +<br>VDS<br>_<br>I SD<br>L<br>Driver<br>RG<br>Same Type<br>as DUT VDD<br>VGS • dv/dt controlled by  RG<br>• ISD controlled by pulse period<br>Gate Pulse Width<br>VGS D = --------------------------Gate Pulse Period 10V<br>( Driver )<br>as<br>IFM , Body Diode Forward Current<br>I SD<br>( DUT ) di/dt<br>IRM<br>4 Neo<br>Body Diode Reverse Current<br>VDS<br>( DUT ) Body Diode Recovery dv/dt<br>VSD VDD<br>tT<br>Body Diode<br>Forward Voltage Drop<br>**----- End of picture text -----**<br>


©2008 Fairchild Semiconductor Corporation FCP11N60/FCPF11N60 Rev. C0 

www.fairchildsemi.com 

**7** 

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SUPPLIER "B" PACKAGE<br>SHAPE �����<br>   3.50<br>10.67<br>SUPPLIER "A" PACKAGE 9.65 E<br>SHAPE<br>3.40<br>2.50<br>16.30<br>IF PRESENT, SEE NOTE "D" 13.90<br>E<br>16.51 9.40<br>15.42<br>8.13 E<br>1 2 3<br>[2.46] C 2.704.10<br>14.04<br>2.13 12.70<br>2.06<br>FRONT VIEWS<br>4.70 1.62 1.62<br>4.00 1.42 [  H] 2.67 1.10<br>2.40<br>"A1" 8.65 1.00<br>SEE NOTE "F" 7.59 0.55<br>�� ��<br>OPTIONAL 6.69 �� ��<br>6.06<br>CHAMFER<br>E<br>14.30<br>11.50<br>NOTE "I" BOTTOM VIEW<br>NOTES:<br>   A)  REFERENCE JEDEC, TO-220, VARIATION AB<br>   B)  ALL DIMENSIONS ARE IN MILLIMETERS.<br>   C)  DIMENSIONS COMMON TO ALL PACKAGE<br>SUPPLIERS EXCEPT WHERE NOTED [   ].<br>3 2 1    D)  LOCATION OF MOLDED FEATURE MAY VARY<br>       (LOWER LEFT CORNER, LOWER CENTER<br>        AND CENTER OF THE PACKAGE)<br>   E  DOES NOT COMPLY JEDEC STANDARD VALUE.<br>   F) "A1" DIMENSIONS AS BELOW:<br>SINGLE GAUGE = 0.51 - 0.61<br>DUAL GAUGE     = 1.10 - 1.45<br>   G)  DRAWING FILE NAME: TO220B03REV9<br>   H   PRESENCE IS SUPPLIER DEPENDENT<br>    I)   SUPPLIER DEPENDENT MOLD LOCKING HOLES<br>          IN HEATSINK.<br>0.60<br>0.36 2.85 BACK VIEW<br>2.10<br>SIDE VIEW<br>**----- End of picture text -----**<br>


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10.36 2.66<br>A B B<br>9.96 2.42<br>3.28<br>3.40 7.00 3.08<br>0.70<br>3.20<br>SEE NOTE "F" SEE NOTE "F"<br>6.88<br>6.48<br>1 X 45°<br>16.07<br>B<br>15.67<br>16.00<br>15.60<br> (3.23)  B<br>3<br>1<br>1.47<br>2.96<br>2.14 1.24<br>2.56<br>0.90<br>10.05 0.70<br>9.45 0.50 [M] A<br>30°<br>0.45<br>0.60<br>0.25 B<br>0.45<br> 2.54   2.54<br>4.90<br>B<br>4.50<br>NOTES:<br>  A. EXCEPT WHERE NOTED CONFORMS TO<br>EIAJ SC91A.<br>B DOES NOT COMPLY EIAJ STD. VALUE.<br>  C. ALL DIMENSIONS ARE IN MILLIMETERS.<br>  D. DIMENSIONS ARE EXCLUSIVE OF BURRS,<br> MOLD FLASH AND TIE BAR PROTRUSIONS.<br>  E. DIMENSION AND TOLERANCE AS PER ASME<br>Y14.5-1994.<br>  F. OPTION 1 - WITH SUPPORT PIN HOLE.<br>      OPTION 2 - NO SUPPORT PIN HOLE.<br>  G. DRAWING FILE NAME: TO220M03REV5<br>**----- End of picture text -----**<br>


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