FCP20N60.

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## **FCP20N60 / FCPF20N60 N-Channel SuperFET[®] MOSFET 600 V, 20 A, 190 m** Ω 

## **Features** 

- 650V @ TJ = 150°C 

- Typ. RDS(on) = 150 m Ω 

- Ultra Low Gate Charge (Typ. Qg = 75 nC ) 

- Low Effective Output Capacitance (Typ. Coss(eff.) = 165 pF ) 

- 100% Avalanche Tested 

## **Applications** 

## **Description** 

SuperFET[®] MOSFET is Fairchild Semiconductor’s first generation of high voltage super-junction (SJ) MOSFET family that is utilizing charge balance technology for outstanding low onresistance and lower gate charge performance. This technology is tailored to minimize conduction loss, provide superior switching performance, dv/dt rate and higher avalanche energy. Consequently, SuperFET MOSFET is very suitable for the switching power applications such as PFC, server/telecom power, FPD TV power, ATX power and industrial power applications. 

- Solar Inverter 

- AC-DC Power Supply 

**D G GDS TO-220 GDS TO-220F** > 2 ~~©)~~ **S Absolute Maximum Ratings Symbol Parameter FCP20N60 FCPF20N60 Unit** VDSS Drain-Source Voltage 600 V ID Drain Current - Continuous (TC = 25 ° C) 20 20* A - Continuous (TC = 100 ° C) 12.5 12.5* A IDM Drain Current - Pulsed (Note 1) 60 60* A ~~-——~~ VGSS Gate-Source Voltage ± 30 V EAS Single Pulsed Avalanche Energy (Note 2) 690 mJ IAR Avalanche Current (Note 1) 20 A EAR Repetitive Avalanche Energy (Note 1) 20.8 mJ dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns PD Power Dissipation (TC = 25 ° C) 208 39 W - Derate Above 25 ° C 1.67 0.3 W/ ° C ~~ec~~ TJ, TSTG Operating and Storage Temperature Range -55 to +150 ° C TL Maximum Lead Temperature for Soldering, 300 ° C 1/8” from Case for 5 Seconds *Drain current limited by maximum junction temperature. ~~a ee.ee~~ 

**Absolute Maximum Ratings** 

*Drain current limited by maximum junction temperature. 

## **Thermal Characteristics** 

**Symbol Parameter FCP20N60 FCPF20N60 Unit** R θ JC Thermal Resistance, Junction-to-Case 0.6 3.2 ° C/W R θ JA Thermal Resistance, Junction-to-Ambient 62.5 62.5 ° C/W ~~————~~ ©2008 Fairchild Semiconductor Corporation **1** FCP20N60 / FCPF20N60 Rev. C0 

www.fairchildsemi.com 

|**Package Marking and Ordering Information**<br>**Electrical Characteristics**TC= 25oC unless otherwise noted.<br>**Off Characteristics**<br>**On Characteristics**<br>**Dynamic Characteristics**<br>**Part Number**<br>**Top Mark**<br>**Package**<br>**Packing Method**<br>**Reel Size**<br>**Tape Width**<br>**Quantity**<br>FCP20N60<br>FCP20N60<br>TO-220<br>Tube<br>N/A<br>N/A<br>50 units<br>FCPF20N60<br>FCPF20N60<br>TO-220F<br>Tube<br>N/A<br>N/A<br>50 units<br>**Symbol**<br>**Parameter**<br>**Test Conditions**<br>**Min.**<br>**Typ.**<br>**Max.**<br>**Unit**<br>BVDSS<br>Drain to Source Breakdown Voltage<br>ID= 250μA, VGS= 0 V, TJ= 25oC<br>600<br>-<br>-<br>V<br>ID= 250μA, VGS= 0 V, TJ= 150oC<br>-<br>650<br>-<br>V<br>ΔBVDSS<br>/ΔTJ<br>Breakdown Voltage Temperature<br>Coefficient<br>ID= 250μA, Referenced to 25oC<br>-<br>0.6<br>-<br>V/oC<br>BVDS<br>Drain-Source Avalanche Breakdown<br>Voltage<br>VGS= 0 V, ID= 20 A<br>-<br>700<br>-<br>V<br>IDSS<br>Zero Gate Voltage Drain Current<br>VDS= 600 V, VGS= 0 V<br>-<br>-<br>1<br>μA<br>VDS= 480 V, TC= 125oC<br>-<br>-<br>10<br>IGSS<br>Gate to BodyLeakage Current<br>VGS= ±30 V, VDS= 0 V<br>-<br>-<br>±100<br>nA<br>VGS(th)<br>Gate Threshold Voltage<br>VGS= VDS, ID= 250μA<br>3.0<br>-<br>5.0<br>V<br>RDS(on)<br>Static Drain to Source On Resistance<br>VGS= 10 V, ID= 10 A<br>-<br>0.15<br>0.19<br>Ω<br>gFS<br>Forward Transconductance<br>VDS= 40 V, ID= 10 A<br>-<br>17<br>-<br>S<br>Ciss<br>Input Capacitance<br>VDS= 25 V, VGS= 0 V,<br>f = 1 MHz<br>-<br>2370<br>3080<br>pF<br>Coss<br>Output Capacitance<br>-<br>1280<br>1665<br>pF<br>Crss<br>Reverse Transfer Capacitance<br>-<br>95<br>-<br>pF<br>~~OC~~<br>~~SS See~~<br>~~—_—_—~~<br>~~ae~~|**Package Marking and Ordering Information**<br>**Electrical Characteristics**TC= 25oC unless otherwise noted.<br>**Off Characteristics**<br>**On Characteristics**<br>**Dynamic Characteristics**<br>**Part Number**<br>**Top Mark**<br>**Package**<br>**Packing Method**<br>**Reel Size**<br>**Tape Width**<br>**Quantity**<br>FCP20N60<br>FCP20N60<br>TO-220<br>Tube<br>N/A<br>N/A<br>50 units<br>FCPF20N60<br>FCPF20N60<br>TO-220F<br>Tube<br>N/A<br>N/A<br>50 units<br>**Symbol**<br>**Parameter**<br>**Test Conditions**<br>**Min.**<br>**Typ.**<br>**Max.**<br>**Unit**<br>BVDSS<br>Drain to Source Breakdown Voltage<br>ID= 250μA, VGS= 0 V, TJ= 25oC<br>600<br>-<br>-<br>V<br>ID= 250μA, VGS= 0 V, TJ= 150oC<br>-<br>650<br>-<br>V<br>ΔBVDSS<br>/ΔTJ<br>Breakdown Voltage Temperature<br>Coefficient<br>ID= 250μA, Referenced to 25oC<br>-<br>0.6<br>-<br>V/oC<br>BVDS<br>Drain-Source Avalanche Breakdown<br>Voltage<br>VGS= 0 V, ID= 20 A<br>-<br>700<br>-<br>V<br>IDSS<br>Zero Gate Voltage Drain Current<br>VDS= 600 V, VGS= 0 V<br>-<br>-<br>1<br>μA<br>VDS= 480 V, TC= 125oC<br>-<br>-<br>10<br>IGSS<br>Gate to BodyLeakage Current<br>VGS= ±30 V, VDS= 0 V<br>-<br>-<br>±100<br>nA<br>VGS(th)<br>Gate Threshold Voltage<br>VGS= VDS, ID= 250μA<br>3.0<br>-<br>5.0<br>V<br>RDS(on)<br>Static Drain to Source On Resistance<br>VGS= 10 V, ID= 10 A<br>-<br>0.15<br>0.19<br>Ω<br>gFS<br>Forward Transconductance<br>VDS= 40 V, ID= 10 A<br>-<br>17<br>-<br>S<br>Ciss<br>Input Capacitance<br>VDS= 25 V, VGS= 0 V,<br>f = 1 MHz<br>-<br>2370<br>3080<br>pF<br>Coss<br>Output Capacitance<br>-<br>1280<br>1665<br>pF<br>Crss<br>Reverse Transfer Capacitance<br>-<br>95<br>-<br>pF<br>~~OC~~<br>~~SS See~~<br>~~—_—_—~~<br>~~ae~~|**FCP20N60 / FCPF20N60 — N-Channel SuperFET® MOSFET**|
|---|---|---|
|**Switching Characteristics**<br>Coss<br>Output Capacitance<br>VDS= 480 V, VGS= 0 V, f = 1 MHz<br>-<br>65<br>85<br>pF<br>Coss(eff.)<br>Effective Output Capacitance<br>VDS= 0 V to 400 V, VGS= 0 V<br>-<br>165<br>-<br>pF<br>Qg<br>Total Gate Charge at 10V<br>VDS= 480 V, ID= 20 A,<br>VGS= 10 V<br>(Note 4)<br>-<br>75<br>98<br>nC<br>Qgs<br>Gate to Source Gate Charge<br>-<br>13.5<br>18<br>nC<br>Qgd<br>Gate to Drain “Miller” Charge<br>-<br>36<br>-<br>nC<br>~~=~~<br>~~__ BEEF~~|||
|**Drain-Source Diode Characteristics**<br>td(on)<br>Turn-On DelayTime<br>VDD= 300 V, ID= 20 A,<br>VGS= 10 V, RG= 25Ω<br>(Note 4)<br>-<br>62<br>135<br>ns<br>tr<br>Turn-On Rise Time<br>-<br>140<br>290<br>ns<br>td(off)<br>Turn-Off DelayTime<br>-<br>230<br>470<br>ns<br>tf<br>Turn-Off Fall Time<br>-<br>65<br>140<br>ns<br>~~=——~~<br>~~EE~~|||
|IS<br>Maximum Continuous Drain to Source Diode Forward Current<br>-<br>-<br>20<br>A<br>ISM<br>Maximum Pulsed Drain to Source Diode Forward Current<br>-<br>-<br>60<br>A<br>VSD<br>Drain to Source Diode Forward Voltage<br>VGS= 0 V, ISD= 20 A<br>-<br>-<br>1.4<br>V<br>trr<br>Reverse RecoveryTime<br>VGS= 0 V, ISD= 20 A,<br>dIF/dt = 100 A/μs<br>-<br>530<br>-<br>ns<br>Qrr<br>Reverse RecoveryCharge<br>-<br>10.5<br>-<br> μC<br>~~se~~|||
|**Notes:**|||
|1: Repetitive rating: pulse-width limited by maximum junction temperature.|||



- 2: IAS = 10 A, VDD = 50 V,  RG = 25 Ω , starting TJ = 25°C. 

- 3: ISD ≤ 20 A, di/dt ≤ 200 A/ μ s, VDD ≤ BVDSS, starting TJ = 25°C. 

- 4: Essentially independent of operating temperature typical characteristics. 

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©2008 Fairchild Semiconductor Corporation FCP20N60 / FCPF20N60 Rev. C0 

**2** 

## **Typical Performance Characteristics** 

## **Figure 1. On-Region Characteristics** 

## **Figure 2. Transfer Characteristics** 

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102<br>                    VTop :       15.0 VGS 102<br>                10.0 V<br>                  8.0 V<br>                  7.0 V<br>                  6.5 V<br>                  6.0 V<br>101 Bottom :    5.5 V 101 150 ° C<br>25 ° C<br>-55 ° C<br>100 100<br> Notes :  Note<br>   2. T    1. 250C = μ  25 s Pulse Test ° C    1. V   2. 250DS μ =s Pulse Test 40V<br>10 24 -1  ea 100 101 2 4 6 8 10<br>VDS, Drain-Source Voltage [V] VGS , Gate-Source Voltage  [V]<br>Figure 3. On-Resistance Variation vs.  Figure 4. Body Diode Forward Voltage<br>    Drain Current and Gate Voltage Variation vs. Source Current<br>and Temperatue<br>0.4 102<br>0.3<br>VGS = 10V 101<br>0.2<br>VGS = 20V<br>150 ° C 25 ° C<br>0.1 100<br> Notes :<br>   1. V GS  = 0V<br> Note : TJ = 25 ° C    2. 250 μ s Pulse Test<br>0.0<br>0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 0.2 iia 0.4 0.6 0.8 1.0 1.2 1.4 1.6<br>ID, Drain Current [A] VSD , Source-Drain Voltage  [V]<br>Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics<br>10000 12<br>9000 CCiss oss  = C = Cgs ds  + C + Cgd gd  (Cds = shorted) VDS = 100V<br>8000 C rss  = C gd 10 V DS  = 250V<br>7000 VDS = 400V<br>8<br>6000 C oss<br>5000 6<br> Notes :<br>4000 C iss    1. V   2. f = GS  1 MHz = 0 V<br>4<br>3000<br>2000 C rss 2<br>1000  Note : ID = 20A<br>010-1 10 am 0 101 0 0 10 20 30 40 50 60 70 80<br>VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC]<br>, Drain Current [A]ID  , Drain Current  [A]ID<br>],<br>Ω<br> [<br>DS(ON)<br>R<br> , Reverse Drain Current  [A]<br>Drain-Source On-Resistance IDR<br>Capacitance [pF]<br>, Gate-Source Voltage [V]<br>GS<br>V<br>**----- End of picture text -----**<br>


## **Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage** 

## **Figure 5. Capacitance Characteristics** 

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©2008 Fairchild Semiconductor Corporation FCP20N60 / FCPF20N60 Rev. C0 

**3** 

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Typical Performance Characteristics (Continued)<br>Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation<br>                 vs. Temperature    vs. Temperature<br>1.2 3.0<br>2.5<br>1.1<br>2.0<br>1.0 1.5<br>1.0<br> Notes :<br>0.9    1. V GS  = 0 V  Notes :<br>   2. ID = 250 μ A 0.5    1. V GS  = 10 V<br>   2. ID = 20 A<br>0.8 0.0<br>-100 -50 0 50 100 150 200 -100 -50 0 50 100 150 200<br>TJ, Junction Temperature [ ° C] TJ, Junction Temperature [ ° C]<br>Figure 9-1. Maximum Safe Operating Area Figure 9-2. Maximum Safe Operating Area<br>                    for  FCP20N60      for FCPF20N60<br>Operation in This Area  Operation in This Area<br>102 is Limited by R  DS(on) 102 is Limited by R  DS(on)<br>----[-----5eec--- eS eee - ostSapo i Se eeES = eeee= - I ee i<br>r = i?’ x ~ oa ~ ~S ~ +S ~s 100 us ~ ' 1 - “7s - = ~ tS ~ ~ a . ~ ~ ~ . ~ ~ ~ 100 us 1 1<br>101 2 = ~ ~ =~ ~ ~ 1 ms _— ~ ‘ 101 - 7 ca ~ at =. ~ ~ ~ ~ s ~ ~ ~ 1 ms ~ ~ ~ ~ ~ It '<br>= 2 DC - 10 ms s ~ ~ <so~ ~ 4| - *~ . . ~ < . ~ 100 ms . ~ 10 ms a . .~ < . ~ ~ . ~ \\<br>1010-10  Notes :    1. T    2. TCJ = 150  = 25 ° C ° C ‘| ' 1010-10  Notes :    1. T    2. TCJ = 150  = 25 ° C ° C DC + ~ ~ ~ . soso. “y‘1 | \<br>   3. Single Pulse    3. Single Pulse<br>10-2100 101 102 103 10-2100 101 102 103<br>VDS, Drain-Source Voltage [V] VDS, Drain-Source Voltage [V]<br>Figure 10. Maximum Drain Current<br>                   vs. Case Temperature<br>25<br>20<br>15<br>10<br>5<br>0<br>25 50 75 100 125 150<br>TC, Case Temperature [ ° C]<br>, (Normalized) , (Normalized)<br>DSS DS(ON)<br>BV R<br>Drain-Source On-Resistance<br>Drain-Source Breakdown Voltage<br>, Drain Current [A]ID , Drain Current [A]ID<br>, Drain Current [A]ID<br>**----- End of picture text -----**<br>


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©2008 Fairchild Semiconductor Corporation FCP20N60 / FCPF20N60 Rev. C0 

**4** 

**Typical Performance Characteristics (Continued)** 

## **Figure 11-1. Transient Thermal Response Curve for FCP20N60** 

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10 0<br>D =0.5<br>10 -1 0.2  N otes :   1. Z θ JC (t) =  0.6 ° C /W  M ax.<br>0.1    2. D uty Factor, D =t 1 /t 2<br>   3. T  JM  - T  C  = P  DM  * Z  θ JC (t)<br>0.05<br>0.02<br>PDM<br>0.01<br>10 -2 sin g le p ulse t1 t2<br>10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1<br>t 1   t , S quare W ave Pulse D uration [sec] 1, Rectangular Pulse Duration [sec]<br>C/W]<br>o<br>(t), Thermal Response<br>(t), Thermal Response [ZJC θ ZJC θ<br>**----- End of picture text -----**<br>


**Figure 11-2. Transient Thermal Response Curve for FCPF20N60** 

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D = 0.5<br>1 0 0<br>0.2<br>0.1  N otes :<br>0.05    1. Z   2. D uty F actor, D = t θ JC (t)  = 3 .2  ° C /W  M 1/t 2a x.<br>1 0 -1 0.02    3. T JM  - T C  =  P D M *  Z θ  JC ( t)<br>0.01<br>P DM<br>single pulse<br>1 0 -2 t1 t2<br>1 0 -5 1 0 -4 1 0 -3 1 0 -2 1 0 -1 1 0 0 1 0 1<br>t 1   t , S q u a re  W 1, Rectangular Pulse Duration [sec]       a ve  P u lse  D u ra tio n  [se c]<br>C/W]<br>o<br>(t), Thermal Response<br>(t), Thermal Response [ JC θ<br>Z Z JC θ<br>**----- End of picture text -----**<br>


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©2008 Fairchild Semiconductor Corporation FCP20N60 / FCPF20N60 Rev. C0 

**5** 

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IG = const.<br>a<br>Charge<br> Figure 12. Gate Charge Test Circuit & Waveform<br>VDS RL VDS 90%<br>VGS VDD<br>RG<br>10%<br>V 10V GS DUT VGS<br>td(on) tr td(off) tf<br>a t on t off<br>ed + ae<br> Figure 13. Resistive Switching Test Circuit & Waveforms<br>VDS L EAS = ----12 L IAS2 --------------------BVBVDSSDSS- VDD<br>I D BVDSSIAS<br>RG VDD ID (t)<br>VV 10V GSGS DUT VDD VDS (t)<br>>| fe<br>t p —— t p Time<br>**----- End of picture text -----**<br>


**Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms** 

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©2008 Fairchild Semiconductor Corporation FCP20N60 / FCPF20N60 Rev. C0 

**6** 

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DUT +<br>VDS<br>_<br>I SD<br>L<br>Driver<br>RG<br>Same Type<br>as DUT VDD<br>VGS • dv/dt controlled by  RG<br>• ISD controlled by pulse period<br>Gate Pulse Width<br>VGS D = --------------------------<br>Gate Pulse Period 10V<br>( Driver )<br>ff}<br>IFM , Body Diode Forward Current<br>I SD<br>( DUT ) di/dt<br>IRM<br>4 Ne<br>Body Diode Reverse Current<br>VDS<br>( DUT ) Body Diode Recovery dv/dt<br>VSD VDD<br>eerie<br>Body Diode<br>Forward Voltage Drop<br> Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms<br>**----- End of picture text -----**<br>


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©2008 Fairchild Semiconductor Corporation FCP20N60 / FCPF20N60 Rev. C0 

**7** 

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SUPPLIER "B" PACKAGE<br>SHAPE �����<br>   3.50<br>10.67<br>SUPPLIER "A" PACKAGE 9.65 E<br>SHAPE<br>3.40<br>2.50<br>16.30<br>IF PRESENT, SEE NOTE "D" 13.90<br>E<br>16.51 9.40<br>15.42<br>8.13 E<br>1 2 3<br>[2.46] C 2.704.10<br>14.04<br>2.13 12.70<br>2.06<br>FRONT VIEWS<br>4.70 1.62 1.62<br>4.00 1.42 [  H] 2.67 1.10<br>2.40<br>"A1" 8.65 1.00<br>SEE NOTE "F" 7.59 0.55<br>�� ��<br>OPTIONAL 6.69 �� ��<br>6.06<br>CHAMFER<br>E<br>14.30<br>11.50<br>NOTE "I" BOTTOM VIEW<br>NOTES:<br>   A)  REFERENCE JEDEC, TO-220, VARIATION AB<br>   B)  ALL DIMENSIONS ARE IN MILLIMETERS.<br>   C)  DIMENSIONS COMMON TO ALL PACKAGE<br>SUPPLIERS EXCEPT WHERE NOTED [   ].<br>3 2 1    D)  LOCATION OF MOLDED FEATURE MAY VARY<br>       (LOWER LEFT CORNER, LOWER CENTER<br>        AND CENTER OF THE PACKAGE)<br>   E  DOES NOT COMPLY JEDEC STANDARD VALUE.<br>   F) "A1" DIMENSIONS AS BELOW:<br>SINGLE GAUGE = 0.51 - 0.61<br>DUAL GAUGE     = 1.10 - 1.45<br>   G)  DRAWING FILE NAME: TO220B03REV9<br>   H   PRESENCE IS SUPPLIER DEPENDENT<br>    I)   SUPPLIER DEPENDENT MOLD LOCKING HOLES<br>          IN HEATSINK.<br>0.60<br>0.36 2.85 BACK VIEW<br>2.10<br>SIDE VIEW<br>**----- End of picture text -----**<br>


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10.36 2.66<br>A B B<br>9.96 2.42<br>3.28<br>3.40 7.00 3.08<br>0.70<br>3.20<br>SEE NOTE "F" SEE NOTE "F"<br>6.88<br>6.48<br>1 X 45°<br>16.07<br>B<br>15.67<br>16.00<br>15.60<br> (3.23)  B<br>3<br>1<br>1.47<br>2.96<br>2.14 1.24<br>2.56<br>0.90<br>10.05 0.70<br>9.45 0.50 [M] A<br>30°<br>0.45<br>0.60<br>0.25 B<br>0.45<br> 2.54   2.54<br>4.90<br>B<br>4.50<br>NOTES:<br>  A. EXCEPT WHERE NOTED CONFORMS TO<br>EIAJ SC91A.<br>B DOES NOT COMPLY EIAJ STD. VALUE.<br>  C. ALL DIMENSIONS ARE IN MILLIMETERS.<br>  D. DIMENSIONS ARE EXCLUSIVE OF BURRS,<br> MOLD FLASH AND TIE BAR PROTRUSIONS.<br>  E. DIMENSION AND TOLERANCE AS PER ASME<br>Y14.5-1994.<br>  F. OPTION 1 - WITH SUPPORT PIN HOLE.<br>      OPTION 2 - NO SUPPORT PIN HOLE.<br>  G. DRAWING FILE NAME: TO220M03REV5<br>**----- End of picture text -----**<br>


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