FCH040N65S3-F155

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## **FCH040N65S3** 

**N-Channel SuperFET[® ] III MOSFET 650 V, 65 A, 40 m** Ω 

## **Features** 

- 700 V @ TJ = 150[o] C 

- Typ. RDS(on) = 35.4 mΩ 

- Ultra Low Gate Charge (Typ. Qg = 136 nC) 

- Low Effective Output Capacitance (Typ. Coss(eff.) = 1154 pF) 

- 100% Avalanche Tested 

- RoHS Compliant 

## **Description** 

SuperFET[®] III MOSFET is ON Semiconductor’s brand-new high voltage super-junction (SJ) MOSFET family that is utilizing charge balance technology for outstanding low on-resistance and lower gate charge performance. This advanced technology is tailored to minimize conduction loss, provide superior switching performance, and withstand extreme dv/dt rate. Consequently, SuperFET III MOSFET is very suitable for various power system for miniaturization and higher efficiency. 

## **Applications** 

- Telecom / Sever Power Supplies 

- Industrial Power Supplies 

- UPS / Solar 

**==> picture [51 x 59] intentionally omitted <==**

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D<br>G<br>**----- End of picture text -----**<br>


|||**G**<br>**D S**<br>**TO-247**<br>**long leads**<br>a|**G**|**S**<br>~~&~~|**S**<br>~~&~~|**S**<br>~~&~~|**S**<br>~~&~~|**S**<br>~~&~~|**S**<br>~~&~~||
|---|---|---|---|---|---|---|---|---|---|---|
|**Absolute Maximum Ratings  **TC= 25oC unless otherwise noted.|||||||||||
|**Symbol**<br>**Parameter**<br>**FCH040N65S3_F155**<br>**Unit**<br>VDSS<br>Drain to Source Voltage<br>650<br>V<br>VGSS<br>Gate to Source Voltage<br>- DC<br>±30<br>V<br>- AC(f > 1 Hz)<br>±30<br>ID<br>Drain Current<br>- Continuous(TC= 25oC)<br>65<br>A<br>- Continuous(TC= 100oC)<br>41<br>~~es~~|||||||||||
|IDM||Drain Current<br>- Pulsed|- Pulsed|- Pulsed    (Note 1)|||||162.5|A|
|EAS||Single Pulsed Avalanche Energy||(Note 2)|||||358|mJ|
|IAS||Avalanche Current|Avalanche Current|Avalanche Current(Note 1)|||||8.1|A|
|EAR||Repetitive Avalanche Energy||(Note 1)|||||4.17|mJ|
|||MOSFET dv/dt|||||||100||
|dv/dt||||||||||V/ns|
|||Peak Diode Recovery dv/dt|Peak Diode Recovery dv/dt|Peak Diode Recovery dv/dt(Note 3)|||||20||
|PD||Power Dissipation<br>(TC= 25oC)<br>- Derate Above 25oC|||||||417<br>3.33|W<br>W/oC|
|TJ, TSTG||Operating and Storage Temperature Range|||||||-55 to +150|oC|
|TL||Maximum Lead Temperature for Soldering, 1/8” from Case for 5 Seconds|Maximum Lead Temperature for Soldering, 1/8” from Case for 5 Seconds||||||300|oC|
|**Thermal Characteristics**|||||||||||
|**Symbol**<br>**Parameter**<br>**FCH040N65S3_F155**<br>**Unit**<br>RθJC<br>Thermal Resistance, Junction to Case, Max.<br>0.3<br>oC/W<br>RθJA<br>Thermal Resistance, Junction to Ambient, Max.<br>40<br>~~ae~~|||||||||||



Semiconductor Components Industries, LLC, 2017                                                                                              Publication Order Number: January, 2017, Rev. 1.0                                                                                                                                                    FCH040N65S3/D 

**1** 

## **Package Marking and Ordering Information** 

|**Part Number**|**Part Number**|**Top Mark**|**Package**|**Package**|**Packing Method**|**Reel Size**|**Reel Size**|**Tape Width**|**Tape Width**|**Tape Width**|**Quantity**|**Quantity**|
|---|---|---|---|---|---|---|---|---|---|---|---|---|
|FCH040N65S3_F155||FCH040N65S3|TO-247 G03||Tube|N/A||N/A|||30 units||
|**Electrical Characteristics**TC= 25oC unless otherwise noted.|||||||||||||
|**Symbol**|**Parameter**|||**Test Conditions**|||**Min.**||**Typ.**|**Max.**||**Unit**|
|**Off Characteristics**|||||||||||||
|BVDSS|Drain to Source Breakdown Voltage|||VGS= 0 V, ID= 1 mA, TJ= 25°C|||650||-|-||V|
|||||VGS= 0 V, ID= 1 mA, TJ= 150°C|||700||-|-||V|
|ΔBVDSS<br>/ΔTJ|Breakdown Voltage Temperature<br>Coefficient|||ID= 10 mA, Referenced to 25oC|||-||0.64|-||V/oC|
|IDSS|Zero Gate Voltage Drain Current|||VDS= 650 V, VGS= 0 V|||-||-|1||μA|
|||||VDS= 520 V, TC= 125oC|||-||4.5|-|||
|IGSS|Gate to BodyLeakage Current|||VGS= ±30 V, VDS= 0 V|||-||-|±100||nA|
|**On Characteristics**|||||||||||||
|VGS(th)|Gate Threshold Voltage|||VGS= VDS, ID= 6.5 mA|||2.5||-|4.5||V|
|RDS(on)|Static Drain to Source On Resistance|||VGS= 10 V, ID= 32.5 A|||-||35.4|40||mΩ|
|gFS|Forward Transconductance|||VDS= 20 V, ID= 32.5 A|||-||46|-||S|
|**Dynamic Characteristics**|||||||||||||
|Ciss|Input Capacitance|||VDS= 400 V, VGS= 0 V,<br>f = 1 MHz|||-||4740|-||pF|
|Coss|Output Capacitance||||||-||120|-||pF|
|Coss(eff.)|Effective Output Capacitance|||VDS= 0 V to 400 V, VGS= 0 V|||-||1154|-||pF|
|Coss(er.)|Energy Related Output Capacitance|||VDS= 0 V to 400 V, VGS= 0 V|||-||171|-||pF|
|Qg(tot)|Total Gate Charge at 10V|||VDS= 400 V, ID= 32.5 A,<br>VGS= 10 V<br>(Note 4)|||-||136|-||nC|
|Qgs|Gate to Source Gate Charge||||||-||33|-||nC|
|Qgd|Gate to Drain “Miller” Charge||||||-||59|-||nC|
|ESR|Equivalent Series Resistance|||f = 1 MHz|||-||0.7|-||Ω|
|**Switching Characteristics**|||||||||||||
|td(on)|Turn-On DelayTime|||VDD= 400 V, ID= 32.5 A,<br>VGS= 10 V, Rg= 3.3Ω<br>(Note 4)|||-||35|-||ns|
|tr|Turn-On Rise Time||||||-||51|-||ns|
|td(off)|Turn-Off DelayTime||||||-||95|-||ns|
|tf|Turn-Off Fall Time||||||-||30|-||ns|
|**Drain-Source Diode Characteristics**|||||||||||||
|IS|Maximum Continuous Drain to Source Diode Forward Current||||||-||-|65||A|
|ISM|Maximum Pulsed Drain to Source Diode Forward Current||||||-||-|162.5||A|
|VSD|Drain to Source Diode Forward Voltage|||VGS= 0 V, ISD= 32.5 A|||-||-|1.2||V|
|trr|Reverse RecoveryTime|||VGS= 0 V, ISD= 32.5 A,<br>dIF/dt = 100 A/μs|||-||534|-||ns|
|Qrr|Reverse RecoveryCharge||||||-||13.6|-||μC|



## **Notes:** 

1. Repetitive rating: pulse-width limited by maximum junction temperature. 

2. IAS = 8.1 A, RG = 25 Ω, starting TJ = 25°C. 

3. ISD ≤ 32.5 A, di/dt ≤ 200 A/μs, VDD ≤ 400 V, starting TJ = 25°C. 

4. Essentially independent of operating temperature typical characteristics. 

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**2** 

## **Typical Performance Characteristics** 

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Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics<br>200 300<br>VGS =  10.0V<br>             8.0V<br>100<br>             7.0V<br>             6.5V             6.0V 100 150oC<br>             5.5V<br>25 o C<br>10<br>10 o<br>-55 C<br>*Notes:<br>*Notes:<br>   1. 250 μ s Pulse Test    1. V DS  = 20V<br>   2. TC = 25 [o] C    2. 250 μ s Pulse Test<br>1 1<br>0.2 1 10 20 3 4 5 6 7 8 9<br>VDS, Drain-Source Voltage[V] VGS, Gate-Source Voltage[V]<br>, Drain Current[A] , Drain Current[A]<br>ID ID<br>**----- End of picture text -----**<br>


**Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage** 

**Figure 4. Body Diode Forward Voltage Variation vs. Source Current** 

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**----- Start of picture text -----**<br>
0.06 1000<br>100<br>0.05<br>10  150 [o] C<br>0.04 V GS  = 10V<br>V GS  = 20V 1<br>25 [o] C<br>0.03<br>0.1<br>0.02 *Notes:<br>0.01<br>1. VGS = 0V<br>*Note: TC = 25 [o] C 2. 250 μ s Pulse Test<br>0.01 0.001<br>0 60 120 180 0.0 0.5 1.0 1.5<br>ID, Drain Current [A] VSD, Body Diode Forward Voltage [V]<br>Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics<br>105 10<br>104 C iss<br>8<br>103 V DS  = 130V V DS  = 400V<br>Coss 6<br>102<br>*Note: 4<br>10    1. VGS = 0V<br>   2. f = 1MHz<br>1 C iss  = C gs  + C gd  (C ds  = shorted) C rss 2<br>Coss = Cds + Cgd<br>Crss = Cgd *Note: ID = 32.5A<br>10-110-1 1 10 102 103 0 0 50 100 150<br>VDS, Drain-Source Voltage [V] Qg, Total Gate Charge [nC]<br>] Ω<br>DS(ON),<br>R<br>, Reverse Drain Current [A]<br>IS<br>Drain-Source On-Resistance [<br>, Gate-Source Voltage [V]<br>Capacitances [pF]<br>GS<br>V<br>**----- End of picture text -----**<br>


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**3** 

## **Typical Performance Characteristics** (Continued) 

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**----- Start of picture text -----**<br>
       Figure 7. Breakdown Voltage Variation                      Figure 8. On-Resistance Variation<br>                        vs. Temperature                                                            vs. Temperature<br>1.2 3.0<br>*Notes:<br>   1. VGS = 0V<br>   2. ID = 10mA 2.5<br>1.1<br>2.0<br>1.0 1.5<br>1.0<br>0.9<br>0.5 *Notes:<br>   1. VGS = 10V<br>   2. ID = 32.5A<br>0.8 0.0<br>-50 0 50 100 150 -50 0 50 100 150<br>TJ, Junction Temperature [ [o] C] TJ, Junction Temperature [ [o] C]<br>          Figure 9. Maximum Safe Operating Area                   Figure 10. Maximum Drain Current<br>                                                                                                                     vs. Case Temperature<br>200 80<br>100 10 μ s<br>100 μ s<br>60<br>10 1ms<br>DC<br>Operation in This Area<br>is Limited by R DS(on) 40<br>1<br>*Notes:<br>0.1 20<br>   1. TC = 25 [o] C<br>   2. TJ = 150 [o] C<br>   3. Single Pulse<br>0.01 0<br>1 10 100 1000 25 50 75 100 125 150<br>VDS, Drain-Source Voltage [V] TC, Case Temperature [ [o] C]<br>, [Normalized] , [Normalized]<br>DSS DS(on)<br>BV R<br>Drain-Source On-Resistance<br>Drain-Source Breakdown Voltage<br>, Drain Current [A]<br>ID<br>, Drain Current [A]<br>ID<br>**----- End of picture text -----**<br>


- **Figure 11. Eoss vs. Drain to Source Voltage** 

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30<br>25<br>20<br>15<br>10<br>5<br>0<br>0 130 260 390 520 650<br>VDS, Drain to Source Voltage [V]<br>J]<br>μ<br> [<br>OSS<br>E<br>**----- End of picture text -----**<br>


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**4** 

## **Typical Performance Characteristics** (Continued) 

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**----- Start of picture text -----**<br>
                                                  Figure 12. Transient Thermal Response Curve<br>1<br>0.5<br>0.1<br>0.2<br>0.1 PDM<br>0.05 t1<br>0.01 0.01 0.02 *Notes: t2<br>Single pulse    1. Z θ JC(t) = 0.3 [o] C/W Max.<br>   2. Duty Factor, D= t 1 /t 2<br>   3. TJM - TC = PDM * Z θ JC(t)<br>0.001<br>10-5 10-4 10-3 10-2 10-1 100<br>t1, Rectangular Pulse Duration [sec]<br>oC/W]Thermal Response [<br>(t),<br>ZJC θ<br>**----- End of picture text -----**<br>


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**5** 

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**----- Start of picture text -----**<br>
IG = const.<br>F<br>Charge<br> Figure 13. Gate Charge Test Circuit & Waveform<br>VDS RL VDS 90%<br>VGS VDD<br>RG<br>10%<br>V 10V GS DUT VGS<br>td(on) tr td(off) tf<br>=n wa t on 4S t off<br> Figure 14. Resistive Switching Test Circuit & Waveforms<br>Vos oyL Eas= >4 Llas5<br>| D ~ dD BVpss = —_<br>of las |— _<br>: Rnr <r) FF Voo lo(t)<br>VGS TL DUT Vop<br>**----- End of picture text -----**<br>


**Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms** 

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**6** 

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**----- Start of picture text -----**<br>
DUT +<br>VDS<br>_<br>I SD<br>L<br>Driver<br>RG<br>Same Type<br>as DUT VDD<br>VGS • dv/dt controlled by  RG<br>• ISD controlled by pulse period<br>Gate Pulse Width<br>VGS D = --------------------------<br>Gate Pulse Period 10V<br>( Driver )<br>IFM , Body Diode Forward Current<br>I SD<br>( DUT ) di/dt<br>IRM<br>Body Diode Reverse Current<br>VDS<br>( DUT ) Body Diode Recovery dv/dt<br>VSD VDD<br>Body Diode<br>Forward Voltage Drop<br>**----- End of picture text -----**<br>


**Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms** 

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**7** 

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[15.87] [E] [4.82] 4.58 [E] B<br>15.37<br>A<br>  12.81  E<br>4.13<br>3.53 6.85 3.65 [E]<br>6.61 3.51<br>0.254 [M] B A [M]<br>[5.58] [E]<br>5.34 [1.35]<br>5.20 0.51<br>4.96<br>  13.08 MIN<br>[20.82] [E]<br>20.32<br>1 3<br>3 1<br>[1.87]<br>[3.93] [E] 1.53 [(2X)  ]<br>3.69<br>  1.60   [20.25] [E]<br>19.75<br>[2.77]<br>2.43<br>[0.71]<br>0.51<br>5.56 [2.66]<br>2.29<br>11.12<br>[1.35]<br>1.17<br>0.254 [M] B A [M]<br>**----- End of picture text -----**<br>


NOTES: UNLESS OTHERWISE SPECIFIED. 

A.  PACKAGE REFERENCE: JEDEC TO-247, ISSUE E, VARIATION AB, DATED JUNE, 2004. B.  DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS. 

**==> picture [99 x 44] intentionally omitted <==**

- C.  ALL DIMENSIONS ARE IN MILLIMETERS. 

- D.  DRAWING CONFORMS TO ASME Y14.5 - 1994 

> E DOES NOT COMPLY JEDEC STANDARD VALUE 

- F.   DRAWING FILENAME: MKT-TO247G03_REV02 

ON Semiconductor and      are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 

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**1**