FCB20N60TM

## **ON Semiconductor** 

## **Is Now** 

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## **FCB20N60** 

## **N-Channel SuperFET[®] MOSFET** 

## **600 V, 20 A, 190 mΩ** 

## **Features** 

- 650 V @TJ = 150 °C 

- Typ. RDS(on) = 150 m 

- Ultra Low Gate Charge (Typ. Qg = 75 nC) 

- Low Effective Output Capacitance (Typ. Coss.eff = 165 pF) 

- 100% Avalanche Tested 

- RoHS Compliant 

## **Description** 

SuperFET[®] MOSFET is Fairchild Semiconductor’s first generation of high voltage super-junction (SJ) MOSFET family that is utilizing charge balance technology for outstanding low onresistance and lower gate charge performance. This technology is tailored to minimize conduction loss, provide superior switching performance, dv/dt rate and higher avalanche energy. Consequently, SuperFET MOSFET is very suitable for the switching power applications such as PFC, server/telecom power, FPD TV power, ATX power and industrial power applications. 

## **Application** 

- Lighting • AC-DC Power Supply 

- Solar Inverter 

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D<br>D<br>G<br>G<br>S D [2] -PAK<br>S<br>MOSFET Maximum Ratings  TC = 25 [o] C unless otherwise noted<br>A. Symbol Parameter iA FCB20N60TM Unit Le<br>I VDSS Drain to Source Voltage 600 V<br>ID Drain Current eea - Continuous - Continuous ((TTCC = 25 = 100 [o] C [o] C) ) 12.520 A<br>DO IDM Drain Current - Pulsed                                                (Note 1) 60.0 A<br>|AC VGSS Gate to Source Voltage ±30 V<br>EAS Single Pulsed Avalanche Energy (Note 2) 690 mJ<br>| HM aC<br>IAR Avalanche Current                                                                                       (Note 1) 20 A<br>| a «i eae<br>EAR Repetitive Avalanche Energy (Note 1) 20.8 mJ<br>CO  i Sy<br>a dv/dt Peak Diode Recovery dv/dt                                                                          (Note 3) 4.5 ~§ V/ns<br>PD Power Dissipation - Derate above 25(TC = 25 [o] C) [o] C 1.67208 W/W [o] C<br>PfCe TJ, TSTG Operating and Storage Temperature Ran _ ge | _A -55 to +150 — ii oC ik\<br>TL Maximum Lead Temperature for Soldering Purpose,1/8” from Case for 5 Seconds 300 oC<br>Thermal Characteristics<br>Symbol Parameter FCB20N60TM Unit<br>RJC Thermal Resistance, Junction to Case, Max             0.6<br>Thermal Resistance, Junction to Ambient (minimum pad of 2 oz copper), Max. 62.5 oC/W<br>RJA<br>Thermal Resistance, Junction to Ambient (1 in [2]  pad of 2 oz copper), Max.              40<br>**----- End of picture text -----**<br>


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©2005 Fairchild Semiconductor Corporation FCB20N60 Rev. C1 

**1** 

## **Package Marking and Ordering Information** 

|**Electrical Characteristics**TC= 25oC unless otherwise noted<br>**Off Characteristics**<br>**On Characteristics**<br>**Dynamic Characteristics**<br>**Switching Characteristics**<br>**Device Marking**<br>**Device**<br>**Package**<br>**Reel Size**<br>**Tape Width**<br>**Quantity**<br>FCB20N60<br>FCB20N60TM<br>D2-PAK<br>330mm<br>24m<br>800<br>**Symbol**<br>**Parameter**<br>**Test Conditions**<br>**Min.**<br>**Typ.**<br>**Max.**<br>**Unit**<br>BVDSS<br>Drain to Source Breakdown Voltage<br>VGS= 0 V,ID= 250A, TC= 25oC<br>600<br>-<br>-<br>V<br>VGS= 0 V,ID= 250A, TC= 150oC<br>-<br>650<br>-<br>V<br>BVDSS<br>/TJ<br>Breakdown Voltage Temperature<br>Coefficient<br>ID= 250A, Referenced to 25oC<br>-<br>0.6<br>-<br>V/oC<br>BVDS<br>Drain-Source Avalanche Breakdown<br>Voltage<br>VGS= 0 V, ID= 20 A<br>-<br>700<br>-<br>V<br>IDSS<br>Zero Gate Voltage Drain Current<br>VDS= 600 V, VGS= 0 V<br>-<br>-<br>1<br>A<br>VDS= 480 V, VGS= 0 V, TC= 125oC<br>-<br>-<br>10<br>IGSS<br>Gate to Body Leakage Current<br>VGS= ±30 V, VDS= 0 V<br>-<br>-<br>±100<br>nA<br>VGS(th)<br>Gate Threshold Voltage<br>VGS= VDS, ID= 250A<br>3.0<br>-<br>5.0<br>V<br>RDS(on)<br>Static Drain to Source On Resistance<br>VGS= 10 V, ID= 10 A<br>-<br>0.15<br>0.19<br><br>gFS<br>Forward Transconductance<br>VDS= 40 V, ID= 10 A<br>-<br>17<br>-<br>S<br>Ciss<br>Input Capacitance<br>VDS= 25 V, VGS= 0 V<br>f = 1.0 MHz<br>-<br>2370<br>3080<br>pF<br>Coss<br>Output Capacitance<br>-<br>1280<br>1665<br>pF<br>Crss<br>Reverse Transfer Capacitance<br>-<br>95<br>-<br>pF<br>Coss<br>Output Capacitance<br>VDS= 480 V, VGS= 0 V, f = 1.0 MHz<br>-<br>65<br>85<br>pF<br>Cosseff.<br>Effective Output Capacitance<br>VDS= 0 V to 400 V, VGS= 0 V<br>-<br>165<br>-<br>pF<br>td(on)<br>Turn-On DelayTime<br>VDD= 300 V, ID= 20 A<br>RG= 25<br>(Note 4)<br>-<br>62<br>135<br>ns<br>tr<br>Turn-On Rise Time<br>-<br>140<br>290<br>ns<br>td(off)<br>Turn-Off DelayTime<br>-<br>230<br>470<br>ns<br>tf<br>Turn-Off Fall Time<br>-<br>65<br>140<br>ns<br>Qg(tot)<br>Total Gate Charge at 10V<br>VDS= 480 V, ID= 20 A,<br>VGS= 10 V<br>(Note 4)<br>-<br>75<br>98<br>nC<br>Qgs<br>Gate to Source Gate Charge<br>-<br>13.5<br>18<br>nC<br>Qgd<br>Gate to Drain “Miller” Charge<br>-<br>36<br>-<br>nC<br>~~———————~~<br>~~SSee~~<br>~~=e~~|
|---|
|**Drain-Source Diode Characteristics**|
|IS<br>Maximum Continuous Drain to Source Diode Forward Current<br>-<br>-<br>20<br>A<br>ISM<br>Maximum Pulsed Drain to Source Diode Forward Current<br>-<br>-<br>60<br>A<br>VSD<br>Drain to Source Diode Forward Voltage<br>VGS = 0 V, ISD= 20 A<br>-<br>-<br>1.4<br>V<br>trr<br>Reverse RecoveryTime<br>VGS= 0 V, ISD= 20 A<br>dIF/dt = 100 A/s<br>-<br>530<br>-<br>ns<br>Qrr<br>Reverse RecoveryCharge<br>-<br>10.5<br>-<br> C<br>~~=e~~|
|**Notes:**|
|1. Repetitive Rating: Pulse width limited by maximum junction temperature|



2. IAS = 10 A, VDD = 50 V, RG = 25 , Starting TJ = 25C 

3. ISD  20 A, di/dt  200 A/s, VDD  BVDSS, Starting TJ = 25C 

4. Essentially Independent of Operating Temperature Typical Characteristics 

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©2005 Fairchild Semiconductor Corporation FCB20N60 Rev. C1 

**2** 

## **Typical Performance Characteristics** 

## **Figure 1. On-Region Characteristics** 

## **Figure 2. Transfer Characteristics** 

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102<br>                    VGS 102<br>Top :       15.0 V<br>                10.0 V<br>                  8.0 V<br>                  7.0 V<br>                  6.5 V<br>101                   6.0 V Bottom :    5.5 V 101 150C<br>25C<br>-55C<br>100 100<br> Notes :  Note<br>   1. 250    2. T C =   25 s Pulse Test C    1. V   2. 250DS =s Pulse Test 40V<br>10 Se -1 100 Sra 101 2 4 6 8 ; 10<br>VDS, Drain-Source Voltage [V] VGS , Gate-Source Voltage  [V]<br>Figure 3. On-Resistance Variation vs.  Figure 4. Body Diode Forward Voltage<br>     Drain Current and Gate Voltage Variation vs. Source Current<br>and Temperatue<br>0.4 102<br>0.3<br>VGS = 10V 101<br>0.2<br>VGS = 20V<br>150C 25C<br>0.1 100<br> Notes :<br>   1. V GS  = 0V<br>Note : TJ = 25C    2. 250s Pulse Test<br>0.0<br>0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 0.2 ia 0.4 0.6 0.8 1.0 1.2 1.4 1.6<br>ID, Drain Current [A] VSD , Source-Drain Voltage  [V]<br>Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics<br>10000 12<br>9000 CCiss oss  = C = Cgs ds  + C + Cgd gd  (Cds = shorted) VDS = 100V<br>8000 C rss  = C gd 10 V DS  = 250V<br>7000 VDS = 400V<br>8<br>6000 C oss<br>5000 6<br> Notes :<br>4000 C iss    1. V   2. f = GS  1 MHz = 0 V<br>4<br>3000<br>2000 C rss 2<br>1000 Note : ID = 20A<br>010-1 10 = 0 101 0 0 10 20 30 40 50 60 70 80<br>VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC]<br>, Drain Current [A]ID  , Drain Current  [A]ID<br>],<br> [O<br>DS(ON)<br>R<br> , Reverse Drain Current  [A]<br>Drain-Source On-Resistance IDR<br>Capacitance [pF]<br>, Gate-Source Voltage [V]<br>GS<br>V<br>**----- End of picture text -----**<br>


## **Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage** 

## **Figure 5. Capacitance Characteristics** 

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©2005 Fairchild Semiconductor Corporation FCB20N60 Rev. C1 

**3** 

## **Typical Performance Characteristics (Continued)** 

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Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation<br>                 vs. Temperature  vs. Temperature<br>1.2 3.0<br>2.5<br>1.1<br>2.0<br>1.0 1.5<br>1.0<br> Notes :<br>0.9    1. V GS  = 0 V  Notes :<br>   2. ID = 250A 0.5    1. V GS  = 10 V<br>   2. ID = 20 A<br>0.8 0.0<br>-100 -50 0 50 100 150 200 -100 -50 0 50 100 150 200<br>TJ, Junction Temperature [C] TJ, Junction Temperature [C]<br>Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current<br>vs. Case Temperature<br>25<br>Operation in This Area<br>102 is Limited by R  DS(on)<br>----|-----5e<2----5----%2------,- - - ~ ~ Rad ~ ~ 100 us 1 20<br>101 on 2 e - ual ~ ae ~~Mis. s~+ 10 ms - ~ 1 ms [-] . ~ ~<~ “I' |1 15<br>a 1<br>DC soo<br>100 ‘1 1<br>1 10<br> Notes :<br>10-1    1. T    2. TCJ = 150  = 25C C 5<br>   3. Single Pulse<br>10-2100 101 102 103 025 50 75 100 125 150<br>VDS, Drain-Source Voltage [V] TC, Case Temperature [C]<br>Figure 11. Transient Thermal Response Curve<br>10 0<br>D =0.5<br>10 -1 0.2  N otes :   1. Z  JC (t) =  0.6 C /W  M ax.<br>0.1    2. D uty Factor, D =t 1 /t 2<br>   3. T  JM  - T  C  = P  DM  * Z   JC (t)<br>0.05<br>PDM<br>0.02<br>0.01 t 1 t2<br>10 -2 sin g le p ulse<br>10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1<br>t 1, S quare W ave Pulse D uration [sec]<br>, (Normalized) , (Normalized)<br>DSS DS(ON)<br>BV R<br>Drain-Source On-Resistance<br>Drain-Source Breakdown Voltage<br>, Drain Current [A]ID , Drain Current [A]ID<br>oC/W]   (t), Thermal Response [   Z(t), Thermal ResponseZJCJC<br>**----- End of picture text -----**<br>


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**4** 

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 Figure 12. Gate Charge Test Circuit & Waveform<br>VGS<br>Same Type<br>50KΩ as DUT Qg<br>12V 200nF 300nF 10V<br>VGS VDS Qgs Qgd<br>DUT<br>IG = const. 3mA<br>Charge<br> Figure 13. Resistive Switching Test Circuit & Waveforms<br>VDS RL VDS 90%<br>VGS VDD<br>RG<br>10%<br>V 10V GS DUT VGS<br>td(on) tr td(off) tf<br>t on t off<br> Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms<br>VDS L EAS = ----12 L IAS2 --------------------BVBVDSSDSS- VDD<br>I D BVDSSIAS<br>RG VDD ID (t)<br>VV 10V GSGS DUT VDD VDS (t)<br>t p t p Time<br>**----- End of picture text -----**<br>


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©2005 Fairchild Semiconductor Corporation FCB20N60 Rev. C1 

**5** 

**Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms** 

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DUT +<br>VDS<br>_<br>I SD<br>L<br>Driver<br>RG<br>Same Type<br>as DUT VDD<br>VGS • dv/dt controlled by  RG<br>• ISD controlled by pulse period<br>Gate Pulse Width<br>VGS D = --------------------------<br>Gate Pulse Period 10V<br>( Driver )<br>ff}<br>IFM , Body Diode Forward Current<br>I SD<br>( DUT ) di/dt<br>IRM<br>4 Ne<br>Body Diode Reverse Current<br>VDS<br>( DUT ) Body Diode Recovery dv/dt<br>VSD VDD<br>eerie<br>Body Diode<br>Forward Voltage Drop<br>**----- End of picture text -----**<br>


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©2005 Fairchild Semiconductor Corporation FCB20N60 Rev. C1 

**6** 

## **Mechanical Dimensions** 

## TO-263 2L (D[2] PAK) 

## **Figure 16. 2LD,TO263, Surface Mount** 

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. 

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: 

_http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TT263-002_ 

Dimension in Millimeters 

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## **TRADEMARKS** 

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## **Definition of Terms** 

|**Datasheet Identification**|**Product Status**|**Definition**|
|---|---|---|
|Advance Information|Formative / In Design|Datasheet contains the design specifications for product development. Specifications<br>may change in any manner without notice.|
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Rev. I66 

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