ESD5Z5.0T1G

## ESD5Z2.5T1G Series, SZESD5Z2.5T1G Series 

## Transient Voltage Suppressors 

## **Micro−Packaged Diodes for ESD Protection** 

The ESD5Z Series is designed to protect voltage sensitive components from ESD and transient voltage events. Excellent clamping capability, low leakage, and fast response time, make these parts ideal for ESD protection on designs where board space is at a premium. Because of its small size, it is suited for use in cellular phones, portable devices, digital cameras, power supplies and many other portable applications. 

## **Specification Features:** 

- Low Clamping Voltage 

- Small Body Outline Dimensions: 

   - 0.047″ x 0.032″ (1.20 mm x 0.80 mm) 

- Low Body Height: 0.028″ (0.7 mm) 

- Stand−off Voltage: 2.5 V − 12 V 

- Peak Power up to 240 Watts @ 8 x 20 s Pulse 

- Low Leakage 

- Response Time is Typically < 1 ns 

- ESD Rating of Class 3 (> 16 kV) per Human Body Model 

- IEC61000−4−2 Level 4 ESD Protection 

- IEC61000−4−4 Level 4 EFT Protection 

- SZ Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable 

- These Devices are Pb−Free and are RoHS Compliant* 

## **Mechanical Characteristics:** 

> **CASE:** Void-free, transfer-molded, thermosetting plastic Epoxy Meets UL 94 V−0 **LEAD FINISH:** 100% Matte Sn (Tin) 

**MOUNTING POSITION:** Any **QUALIFIED MAX REFLOW TEMPERATURE:** 260°C 

Device Meets MSL 1 Requirements 

## **http://onsemi.com** 

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SOD−523<br>CASE 502<br>STYLE 1<br>1 2<br>Cathode Anode<br>MARKING DIAGRAM<br>XX<br>1 1 2<br>XX = Specific Device Code<br>M = Date Code<br>= Pb−Free Package<br>(Note: Microdot may be in either location)<br>*Date Code orientation may vary<br>depending upon manufacturing location.<br>ORDERING INFORMATION<br>Device Package Shipping [†]<br>SZ/ESD5ZxxxT1G SOD−523 3000 /<br>Pb−Free Tape & Reel<br>ESD5ZxxxT5G SOD−523 8000 /<br>Pb−Free Tape & Reel<br>———<br>†For information on tape and reel specifications,<br>including part orientation and tape sizes, please<br>refer to our Tape and Reel Packaging Specifications<br>Brochure, BRD8011/D.<br>M<br>**----- End of picture text -----**<br>


## **DEVICE MARKING INFORMATION** 

See specific marking information in the device marking column of the Electrical Characteristics tables starting on page 3 of this data sheet. 

> *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

Publication Order Number: **ESD5Z2.5T1/D** 

**1** 

© Semiconductor Components Industries, LLC, 2014 **December, 2014 − Rev. 13** 

**ESD5Z2.5T1G Series, SZESD5Z2.5T1G Series** 

## **MAXIMUM RATINGS** 

|**MAXIMUM RATINGS**||||
|---|---|---|---|
|**Rating**|**Symbol**|**Value**|**Unit**|
|IEC 61000−4−2 (ESD)<br>Contact<br>Air||±30<br>±30|kV|
|IEC 61000−4−4 (EFT)||40|A|
|ESD Voltage<br>Per Human Body Model<br>Per Machine Model||16<br>400|kV<br>V|
|Total Power Dissipation on FR−4 Board (Note 1) @ TA= 25°C|°PD°|500|mW|
|Junction and Storage Temperature Range|TJ, Tstg|−55 to +150|°C|
|Lead Solder Temperature − Maximum (10 Second Duration)|TL|260|°C|



Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 

1. FR−4 printed circuit board, single−sided copper, mounting pad 1 cm[2] . 

See Application Note AND8308/D for further description of survivability specs. 

## **ELECTRICAL CHARACTERISTICS** 

(TA = 25 ° C unless otherwise noted) 

|(TA= 25°C|unless otherwise noted)|
|---|---|
|**Symbol**|**Parameter**|
|IPP|Maximum Reverse Peak Pulse Current|
|VC|Clamping Voltage @ IPP|
|VRWM|Working Peak Reverse Voltage|
|IR|Maximum Reverse Leakage Current @ VRWM|
|VBR|Breakdown Voltage @ IT|
|IT|Test Current|
|IF|Forward Current|
|VF|Forward Voltage @ IF|
|Ppk|Peak Power Dissipation|
|C|Max. Capacitance @VR= 0 and f = 1 MHz|



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I<br>IF<br>VC VBR VRWM<br>V<br>IR VF<br>IT<br>IPP<br>Uni−Directional TVS<br>**----- End of picture text -----**<br>


*See Application Note AND8308/D for detailed explanations of datasheet parameters. 

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**ESD5Z2.5T1G Series, SZESD5Z2.5T1G Series** 

**ELECTRICAL CHARACTERISTICS** (TA = 25 ° C unless otherwise noted, VF = 1.1 V Max. @ IF = 10 mA for all types) 

|**Device***|**Device**<br>**Marking**|**VRWM**<br>**(V)**|**IR ( A)**<br>**@ VRWM**|**VBR (V)**<br>**@ IT**<br>(Note 2)|**IT**|**VC (V)**<br>**@ IPP =**<br>**5.0 A**†|**VC (V) @**<br>**Max IPP**†|**IPP**<br>**(A)**†|**Ppk**<br>**(W)**†|**C**<br>**(pF)**|**VC**|
|---|---|---|---|---|---|---|---|---|---|---|---|
|||**Max**|**Max**|**Min**|**mA**|**Typ**|**Max**|**Max**|**Max**|**Typ**|**Per**<br>**IEC61000−4−2**<br>(Note 3)|
|ESD5Z2.5T1G/T5G|ZD|2.5|6.0|4.0|1.0|6.5|10.9|11.0|120|145|Figures 1 and 2<br>See Below<br>(Note 4)|
|ESD5Z3.3T1G/T5G|ZE|3.3|0.05|5.0|1.0|8.4|14.1|11.2|158|105||
|ESD5Z5.0T1G/T5G|ZF|5.0|0.05|6.2|1.0|11.6|18.6|9.4|174|80||
|ESD5Z6.0T1G/T5G|ZG|6.0|0.01|6.8|1.0|12.4|20.5|8.8|181|70||
|ESD5Z7.0T1G/T5G|ZH|7.0|0.01|7.5|1.0|13.5|22.7|8.8|200|65||
|ESD5Z12T1G/T5G|ZM|12|0.01|14.1|1.0|17|25|9.6|240|55||



Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 

* Includes SZ-prefix devices where applicable. 

†Surge current waveform per Figure 5. 

2. VBR is measured with a pulse test current IT at an ambient temperature of 25 ° C. 

3. For test procedure see Figures 3 and 4 and Application Note AND8307/D. 

4. ESD5Z5.0T1G shown below. Other voltages available upon request. 

**Figure 1. ESD Clamping Voltage Screenshot Positive 8 kV contact per IEC 61000−4−2** 

**Figure 2. ESD Clamping Voltage Screenshot Negative 8 kV contact per IEC 61000−4−2** 

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**ESD5Z2.5T1G Series, SZESD5Z2.5T1G Series** 

## **IEC 61000−4−2 Spec.** 

|**Level**|**Test Volt-**<br>**age (kV)**|**First Peak**<br>**Current**<br>**(A)**|**Current at**<br>**30 ns (A)**|**Current at**<br>**60 ns (A)**|
|---|---|---|---|---|
|1|2|7.5|4|2|
|2|4|15|8|4|
|3|6|22.5|12|6|
|4|8|30|16|8|



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IEC61000−4−2 Waveform<br>Ipeak<br>100%<br>90%<br>I @ 30 ns<br>I @ 60 ns<br>10%<br>tP = 0.7 ns to 1 ns<br>**----- End of picture text -----**<br>


**Figure 3. IEC61000−4−2 Spec** 

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ESD Gun Oscilloscope<br>TVS<br>50  �<br>Cable 50  �<br>**----- End of picture text -----**<br>


**Figure 4. Diagram of ESD Test Setup** 

## **The following is taken from Application Note AND8308/D − Interpretation of Datasheet Parameters for ESD Devices.** 

## **ESD Voltage Clamping** 

For sensitive circuit elements it is important to limit the voltage that an IC will be exposed to during an ESD event to as low a voltage as possible. The ESD clamping voltage is the voltage drop across the ESD protection diode during an ESD event per the IEC61000−4−2 waveform. Since the IEC61000−4−2 was written as a pass/fail spec for larger 

systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. ON Semiconductor has developed a way to examine the entire voltage waveform across the ESD protection diode over the time domain of an ESD pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all ESD protection diodes. For more information on how ON Semiconductor creates these screenshots and how to interpret them please refer to AND8307/D. 

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100<br>tr PEAK VALUE IRSM @ 8 �s<br>90<br>80 PULSE WIDTH (tP) IS DEFINED<br>AS THAT POINT WHERE THE<br>70 PEAK CURRENT DECAY = 8 �s<br>60<br>HALF VALUE IRSM/2 @ 20 �s<br>50<br>40<br>30<br>tP<br>20<br>10<br>0<br>0 20 40 60 80<br>t, TIME ( � s)<br>% OF PEAK PULSE CURRENT<br>**----- End of picture text -----**<br>


**Figure 5. 8 X 20 � s Pulse Waveform** 

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**4** 

**ESD5Z2.5T1G Series, SZESD5Z2.5T1G Series** 

## **PACKAGE DIMENSIONS** 

**SOD−523** CASE 502 ISSUE E 

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−X−<br>D<br>-— —— −Y−<br>E<br>1 2<br>2X b rq<br>0.08 M X Y<br>TOP VIEW<br>A<br>ido<br>c IL HE<br>SIDE VIEW<br>Soa 2X L<br>2X L2<br>BOTTOM VIEW<br>**----- End of picture text -----**<br>


NOTES: 

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 

2. CONTROLLING DIMENSION: MILLIMETERS. 

3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 

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4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PRO-<br>TRUSIONS, OR GATE BURRS.<br>MILLIMETERS<br>DIM MIN NOM MAX<br>A 0.50 0.60 0.70<br>b 0.25 0.30 0.35<br>c 0.07 0.14 0.20<br>D 1.10 1.20 1.30<br>E 0.70 0.80 0.90<br>H E 1.50 1.60 1.70<br>L 0.30 REF<br>L2 0.15 0.20 0.25<br>====<br>STYLE 1:<br>PIN 1. CATHODE (POLARITY BAND)<br>2. ANODE<br>**----- End of picture text -----**<br>


## **RECOMMENDED** 

## **SOLDERING FOOTPRINT*** 

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2X 1.80<br>0.48 2X<br>0.40<br>PACKAGE<br>OUTLINE DIMENSION: MILLIMETERS<br>**----- End of picture text -----**<br>


*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

**ON Semiconductor** and          are registered trademarks of Semiconductor Components Industries, LLC (SCILLC).  SCILLC reserves the right to make changes without further notice to any products herein.  SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time.  All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.  SCILLC does not convey any license under its patent rights nor the rights of others.  SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.  Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.  SCILLC is an Equal Opportunity/Affirmative Action Employer.  This literature is subject to all applicable copyright laws and is not for resale in any manner. 

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**ESD5Z2.5T1/D** 

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