EFC6601R-TR
Dual MOSFET, N Channel
- Manufacturer: ONSEMI
- Product type: Dual MOSFETs
- Transistor Polarity:Dual N Channel; Continuous Drain Current Id:-; Drain Source Voltage Vds:-; On Resistance Rds(on):-; Rds(on) Test Voltage Vgs:-; Threshold Voltage Vgs:-; Power Diss
- MSL: MSL 1 - Unlimited
- SVHC: No SVHC (25-Jun-2025)
- No. of Pins: 6Pins
- Channel Type: N Channel
- Product Range: -
- Qualification: -
- Transistor Case Style: EFCP
- Operating Temperature Max: 150°C
- Power Dissipation N Channel: 2W
- Power Dissipation P Channel: 2W
- Drain Source Voltage Vds N Channel: -
- Drain Source Voltage Vds P Channel: -
- Continuous Drain Current Id N Channel: -
- Continuous Drain Current Id P Channel: -
- Drain Source On State Resistance N Channel: -
- Drain Source On State Resistance P Channel: -
| Delivery and price | |
|---|---|
| Units per pack | 5000 |
| Price | 0.232 € |
| Current stock | 10+ |
| Lead time | 30 days |
**Ordering number : ENA2151A** ## **EFC6601R** ## **N-Channel Power MOSFET 24V, 13A, 11.5m** Ω **, Dual EFCP** http://onsemi.com ## **Features** - 2.5V drive - Common-drain type - Protection diode in • Halogen free compliance - 2KV ESD HBM ## **Specifi cations** ## **Absolute Maximum Ratings** at Ta=25°C **==> picture [471 x 451] intentionally omitted <==** **----- Start of picture text -----**<br> Parameter Symbol Conditions Ratings Unit<br>Source-to-Source Voltage VSSS 24 V<br>Gate-to-Source Voltage VGSS ±12 V<br>Source Current (DC) IS 13 A<br>Source Current (Pulse) ISP PW ≤ 10 μ s, duty cycle ≤ 1% 60 A<br>Total Dissipation PT When mounted on ceramic substrate (5000mm2 × 0.8mm) 2.0 W<br>Channel Temperature Tch 150 °C<br>Storage Temperature Tstg --55 to +150 °C<br>Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating<br>Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.<br>PR<br>Package Dimensions Product & Package Information<br>unit : mm (typ) • Package : EFCP<br>7073-001 • JEITA, JEDEC : -<br>• Minimum Packing Quantity : 5,000 pcs./reel<br>2.7 EFC6601R-TR<br>6 5 4<br>fC Taping Type : TR Marking<br>MA<br>TR LOT No.<br>1 2 3<br>Electrical Connection<br>LI 4, 6<br>0.65<br>1 : Source1<br>2 : Gate1<br>3 : Source1<br>Rg<br>4 : Source2<br>5<br>5 : Gate2<br>6 : Source2<br>0.3<br>EFCP2718-6CE-020<br>Rg<br>2<br>oe<br>Rg=200 Ω 1, 3<br>1.81<br>0.2<br>0.65<br>**----- End of picture text -----**<br> Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. PR Semiconductor Components Industries, LLC, 2013 **July, 2013** 12313 TKIM TC-00002865/N2112 TKIM TC-00002837/HD 121009 PF No. A2151-1/8 **EFC6601R** ## **Electrical Characteristics** at Ta=25°C |**Electrical Characteristics **at Ta|=25°C|||||| |---|---|---|---|---|---|---| |Parameter|Symbol|Conditions|Ratings|||Unit| ||||min|typ|max|| |Source-to-Source Breakdown Voltage|V(BR)SSS|IS=1mA, VGS=0V<br>Test Circuit 1|24|||V| |Zero-Gate Voltage Source Current|ISSS|VSS=20V, VGS=0V<br>Test Circuit 1|||1|μA| |Gate-to-Source Leakage Current|IGSS|VGS=±8V, VSS=0V<br>Test Circuit 2|||±1|μA| |Cutoff Voltage|VGS(off)|VSS=10V, IS=1mA<br>Test Circuit 3|0.5||1.3|V| |Forward Transfer Admittance|| yfs||VSS=10V, IS=3A<br>Test Circuit 4||15.5||S| |Static Source-to-Source On-State Resistance|RSS(on)1|IS=3A, VGS=4.5V<br>Test Circuit 5|6.6|9.5|11.5|mΩ| ||RSS(on)2|IS=3A, VGS=4.0V<br>Test Circuit 5|7.0|10|12|mΩ| ||RSS(on)3|IS=3A, VGS=3.8V<br>Test Circuit 5|7.3|10.5|13|mΩ| ||RSS(on)4|IS=3A, VGS=3.1V<br>Test Circuit 5|8.0|11.5|15|mΩ| ||RSS(on)5|IS=3A, VGS=2.5V<br>Test Circuit 5|9.0|13|17|mΩ| |Turn-ON Delay Time|td(on)|VDD=10V, VGS=4.5V, IS=3A<br>Test Circuit 7||280||ns| |Rise Time|tr|||630||ns| |Turn-OFF Delay Time|td(off)|||53000||ns| |Fall Time|tf|||47000||ns| |Total Gate Charge|Qg|VDD=10V, VGS=4.5V, IS=13ATest Circuit 8||48||nC| |Forward Source-to-Source Voltage|VF(S-S)|IS=3A, VGS=0V<br>Test Circuit 6||0.76|1.2|V| ## **Ordering Information** |**Ordering Information**|||| |---|---|---|---| |Device|Package|Shipping|memo| |EFC6601R-TR|EFCP|5,000pcs./reel|Pb Free and Halogen Free| No. A2151-2/8 **EFC6601R** ## **Test circuits are example of measuring FET1 side** **==> picture [492 x 705] intentionally omitted <==** **----- Start of picture text -----**<br> Test Circuit 1 Test Circuit 2<br>ISSS IGSS<br>S2 S2<br>G2 A G2<br>G1 VSS G1<br>A<br>S1 VGS S1 When FET1 is measured,<br>Gate and Source of FET2<br>are short-circuited.<br>Test Circuit 3 Test Circuit 4<br>VGS(off) | yfs |<br>S2 S2<br>G2 A G2 A<br>When FET1 is measured,<br>Gate and Source of FET2<br>are short-circuited.<br>G1 VSS G1 VSS<br>VGS VGS<br>S1 S1 When FET1 is measured,<br>Gate and Source of FET2<br>are short-circuited.<br>Test Circuit 6<br>Test Circuit 5<br>VF(S-S)<br>RSS(on)<br>S2 S2<br>IS 4.5V IF<br>G2 G2<br>V V<br>G1 G1<br>VGS=0V<br>VGS<br>S1 S1 When FET1 is<br>measured,+4.5V is added to<br>VGS of FET2.<br>Test Circuit 8<br>Test Circuit 7<br>td(on), tr, td(off), tf Qg<br>S2 S2<br>RL A<br>G2 G2<br>When FET1 is measured,<br>Gate and Source of FET2<br>are short-circuited. V IG =1mA<br>G1 G1 RL<br>R R<br>VDD<br>S1 S1<br>PG PG 50 Ω VDD When FET1 is measured,<br>Gate and Source of FET2<br>are short-circuited.<br>**----- End of picture text -----**<br> No. A2151-3/8 **EFC6601R** **==> picture [482 x 738] intentionally omitted <==** **----- Start of picture text -----**<br> RSS(on) -- VGS RSS(on) -- Ta<br>50 20<br>Ta=25°C<br>45 IS=3A 18<br>40 16<br>35 14<br>30 12<br>25 10<br>20 8<br>15 6<br>10 4<br>5 2<br>0 0<br>0 2 4 6 8 10 --60 --40 --20 0 20 40 60 80 100 120 140 160<br>Gate to Source Voltage, VGS -- V IT16976 Ambient Temperature, Ta -- °C IT16977<br>Qg -- VGS IS -- VSS<br>4.5 6.0<br>VSS=10V<br>5.5<br>4.0 IS=13A<br>5.0<br>3.5<br>4.5<br>3.0 4.0<br>3.5<br>2.5<br>3.0<br>2.0<br>2.5<br>1.5 2.0<br>1.5<br>1.0<br>1.0<br>0.5<br>0.5<br>0 0<br>0 10 20 30 40 50 60 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0<br>Total Gate Charge, Qg -- nC IT16978 Drain to Source Voltage, VSS -- V IT16979<br>IS -- VGS | yfs | -- IS<br>15 3<br>14 V SS =10V 2 VSS=10V<br>13 10<br>12 7<br>5<br>11 3<br>10 2<br>9<br>1.0<br>8 7<br>7 5<br>3<br>6<br>2<br>5<br>4 0.1<br>7<br>3 5<br>2 3<br>1 2<br>0 0.01<br>0 0.5 1.0 1.5 2.0 0.001 2 3 5 70.01 2 3 5 7 0.1 2 3 5 71.0 2 3 5 7 10 2<br>Gate to Source Voltage, VGS -- V IT16980 Source Current, IS -- A IT16981<br>10 IS -- VF(S-S) 100K S/W Time -- ID<br>7 VGS=0V<br>5 5<br>3 3<br>2 2<br>1.0 10K<br>7<br>5 5<br>3 3<br>2 2<br>0.1 1K<br>7<br>5 5<br>td(on)<br>3 3<br>2 2 VSS=10V<br>0.01 100 VGS=4.5V<br>0 0.4 0.5 0.6 0.7 0.8 0.9 0.01 2 3 5 7 0.1 2 3 5 7 1.0 2 3 5 7 10 2<br>Forward Source to Source Voltage, VF(S-S) -- V IT16982 Source Current, IS -- A IT16983<br>7<br>7<br>7<br>tf<br>IS=3A, VGS=4V<br>IS=3A, VGS=4.5V<br>IS=3A, VGS=3.1V<br>IS=3A, VGS=3.8V<br>IS=3A, VGS=2.5V<br>tr<br>VGS=1.5V<br>°C<br>75<br>td(off)<br>°C<br>Ta= --25<br>°C<br>25<br>°C<br>Ta=75 °C<br>25<br>3.1V<br>4.0V<br>°C<br>--25<br>2.5V<br>°C<br>Ta=75<br>°C<br>--25<br>4.5V<br>10.0V<br>°C<br>25<br>Ω Ω<br>Static Source to Source On State Resistance, RSS(on) -- m Static Source to Source On State Resistance, RSS(on) -- m<br>Drain Current, IS -- A<br>Gate to Source Voltage, VGS -- V<br>| -- S<br>fs<br>y<br>|<br>Source Current, IS -- A<br>Forward Transfer Admittance,<br>Source Current, IF -- A<br>Switching Time, S/W Time -- ns<br>**----- End of picture text -----**<br> No. A2151-4/8 **EFC6601R** **==> picture [468 x 184] intentionally omitted <==** **----- Start of picture text -----**<br> A S O PT -- Ta<br>100 2.5<br>7 When mounted on ceramic substrate<br>5 (5000mm [2] ×0.8mm)<br>3<br>2<br>2.0<br>10<br>7<br>5<br>3 1.5<br>2<br>1.0<br>7 Operation in this area<br>5 is limited by R DS (on). 1.0<br>3<br>2<br>0.1<br>7 0.5<br>5 Ta=25°C<br>3<br>2 Single pulse<br>0.01 When mounted on ceramic substrate (5000mm [2] ×0.8mm) 0<br>0.01 2 3 5 7 0.1 2 3 5 7 1.0 2 3 5 7 10 2 3 5 0 20 40 60 80 100 120 140<br>Source Voltage to Source Voltage, VSS -- V IT16984 Ambient Temperature, Ta -- °C IT16985<br>ISP=60A(PW≤10μs)<br>IS=13A<br>100<br>μs<br>DC operation<br>10ms<br>1ms<br>100ms<br>Source Current, IS -- A<br>Total Dissipation, PT -- W<br>**----- End of picture text -----**<br> No. A2151-5/8 **EFC6601R** **Taping Specifi cation** EFC6601R-TR **==> picture [354 x 128] intentionally omitted <==** **==> picture [202 x 99] intentionally omitted <==** **==> picture [364 x 116] intentionally omitted <==** No. A2151-6/8 **EFC6601R** **==> picture [81 x 22] intentionally omitted <==** **----- Start of picture text -----**<br> Outline Drawing<br> EFC6601R-TR<br>**----- End of picture text -----**<br> ## **Land Pattern Example** **==> picture [482 x 370] intentionally omitted <==** **----- Start of picture text -----**<br> Mass (g) Unit Unit: mm<br>0.0024<br>* For reference [mm]<br>**----- End of picture text -----**<br> No. A2151-7/8 **EFC6601R** Note on usage : Since the EFC6601R is a MOSFET product, please avoid using this device in the vicinity of highly charged objects. ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PS No. A2151-8/8
Updated at June 9, 2026
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