DMG4822SSD-13

**DMG4822SSD DUAL N-CHANNEL ENHANCEMENT MODE MOSFET** 

## **Product Summary** 

|**BVDSS**|**RDS(ON) max**|**ID max**<br>**TA = +25°C**|
|---|---|---|
|30V|20mΩ @ VGS= 10V|10A|



## **Features and Benefits** 

- Low On-Resistance 

- Low Input Capacitance 

- Low Input/Output Leakage 

- Low Gate Resistance 

- Fast Switching Speed 

## **Description** 

This MOSFET has been designed to minimize the on-state resistance (RDS(ON)) and yet maintain superior switching performance, making it ideal for high efficiency power management applications. 

- **Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)** 

- **Halogen and Antimony Free. “Green” Device (Note 3)** 

- **An Automotive-Compliant Part is Available Under Separate Datasheet (DMG4822SSDQ)** 

## **Applications** 

## **Mechanical Data** 

   - Case: SO-8 

- General Purpose Interfacing Switch 

- Power Management Functions 

- DC-DC Converters 

- Analog Switch 

- Case Material: Molded Plastic, "Green" Molding Compound. UL Flammability Classification Rating 94V-0 

- Moisture Sensitivity: Level 1 per J-STD-020 

- Terminal Connections Indicator: See Diagram 

- Terminals: Finish  NiPdAu over Copper Leadframe. Solderable per MIL-STD-202, Method 208 cZ9) 

- Weight: 0.072 grams (Approximate) 

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SO-8<br>**----- End of picture text -----**<br>


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D1 D2<br>S1 D1<br>G1 D1<br>S2 D2 G1 G2<br>G2 D2<br>|8] 6 &<br>Top View  S1 S2<br>Internal Schematic<br>N-Channel MOSFET  N-Channel MOSFET<br>**----- End of picture text -----**<br>


## **Ordering Information** (Note 4) 

|**Ordering Informationg Information Information** (Note 4)|||
|---|---|---|
|**Part Number**|**Case**|**Packaging**|
|DMG4822SSD-13|SO-8|2,500/Tape &Reel|



Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant. 

2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and 

Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. 

4. For packaging details, go to our website at https://www.diodes.com/design/support/packaging/diodes-packaging/. 

## **Marking Information** 

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8 5 8 5<br>PL ELT) CI PT TE ty Ty<br>     = Manufacturer’s Marking<br>G4822SD = Product Type Marking Code<br>G4822SD G4822SD YYWW = Date Code Marking<br>YY or YY = Year (ex: 19 = 2019)<br>YY WW YY WW<br>WW = Week (01 to 53)<br>O<br>1 4 1 4<br>PT LI LI Lo PP LI LI<br>**----- End of picture text -----**<br>


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DMG4822SSD Document number: DS35403  Rev. 3 - 2 

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## **Maximum Ratings** (@TA = +25°C, unless otherwise specified.) 

|||||||
|---|---|---|---|---|---|
|**Characteristic**|||**Symbol**|**Value**|**Unit**|
|Drain-Source Voltage|||VDSS|30|V|
|Gate-Source Voltage|||VGSS|±25|V|
|Continuous Drain Current (Note 5) VGS= 10V|Steady<br>State|TA= +25°C<br>TA= +85°C|ID|10<br>6.6|A|
|Pulsed Drain Current(Note 6)|||IDM|60|A|
|Avalanche Current(Notes 7 & 8)|||IAR|1.68|A|
|Repetitive Avalanche EnergyL = 0.3mH(Notes 7 & 8)|||EAR|12.8|mJ|



## **Thermal Characteristics** (@TA = +25°C, unless otherwise specified.) 

|**Thermal Characteristics**(@TA = +25°C, unless otherwise specified.)A = +25°C, unless otherwise specified.)= +25°C, unless otherwise specified.)|(@TA = +25°C, unless otherwise specified.)A = +25°C, unless otherwise specified.)= +25°C, unless otherwise specified.)|||
|---|---|---|---|
|**Characteristic**|**Symbol**|**Value**|**Unit**|
|Total Power Dissipation(Note 5)|PD|1.42|W|
|Thermal Resistance,Junction to Ambient(Note 5)|RθJA|88.4|°C/W|
|Operating and Storage Temperature Range|TJ, TSTG|-55 to +150|°C|



## **Electrical Characteristics** (@TA = +25°C, unless otherwise specified.) 

|**Electrical Characteristics**(@TA = +25°C, unless otherwise specified.)A = +25°C, unless otherwise specified.)= +25°C, unless otherwise specified.)|**Electrical Characteristics**(@TA = +25°C, unless otherwise specified.)A = +25°C, unless otherwise specified.)= +25°C, unless otherwise specified.)|**Electrical Characteristics**(@TA = +25°C, unless otherwise specified.)A = +25°C, unless otherwise specified.)= +25°C, unless otherwise specified.)|**Electrical Characteristics**(@TA = +25°C, unless otherwise specified.)A = +25°C, unless otherwise specified.)= +25°C, unless otherwise specified.)|**Electrical Characteristics**(@TA = +25°C, unless otherwise specified.)A = +25°C, unless otherwise specified.)= +25°C, unless otherwise specified.)|**Electrical Characteristics**(@TA = +25°C, unless otherwise specified.)A = +25°C, unless otherwise specified.)= +25°C, unless otherwise specified.)|**Electrical Characteristics**(@TA = +25°C, unless otherwise specified.)A = +25°C, unless otherwise specified.)= +25°C, unless otherwise specified.)|
|---|---|---|---|---|---|---|
||||||||
|**Characteristic**|**Symbol**|**Min**|**Typ **|**Max**|**Unit**|**Test Condition**|
|**OFF CHARACTERISTICS(Note 9) **|||||||
|Drain-Source Breakdown Voltage|BVDSS|30|—|—|V|VGS= 0V,ID= 250μA|
|Zero Gate Voltage Drain Current|IDSS|—|—|1|μA|VDS= 30V,VGS= 0V|
|Gate-Source Leakage|IGSS|—|—|±100|nA|VGS= ±25V,VDS= 0V|
|**ON CHARACTERISTICS(Note 9) **|||||||
|Gate Threshold Voltage<br>~~ee~~|VGS(TH)<br>~~ee~~|1<br>~~ee~~|—<br>~~ee~~|3<br>~~ee~~|V<br>~~ee~~|VDS= VGS,ID= 250μA<br>~~ee~~|
|Static Drain-Source On-Resistance<br>~~ee~~|RDS(ON)<br>~~ee~~|—<br>~~ee~~|13.4<br>~~ee~~|20<br>~~ee~~|mΩ<br>~~ee~~|VGS= 10V,ID= 8.5A<br>~~ee~~|
|||—<br>~~ee~~|19.5<br>~~ee~~|31<br>~~ee~~||VGS= 4.5V,ID= 6A<br>~~ee~~|
|Forward Transfer Admittance<br>~~ee~~||Yfs|<br>~~ee~~|—<br>~~ee~~|20<br>~~ee~~|—<br>~~ee~~|mS<br>~~ee~~|VDS= 5V,ID= 8.5A<br>~~ee~~|
|Diode Forward Voltage|VSD|—|0.4|1.0|V|VGS= 0V,IS= 1A|
|**DYNAMIC CHARACTERISTICS(Note 10)**|||||||
|Input Capacitance<br>~~—~~|Ciss<br>~~—~~|—<br>~~—~~|478.9<br>~~—~~|—<br>~~—~~|pF<br>~~—~~|VDS= 16V, VGS= 0V,<br>f = 1MHz<br>~~—~~|
|Output Capacitance<br>~~—~~|Coss<br>~~—~~|—<br>~~—~~|96.7<br>~~—~~|—<br>~~—~~|pF<br>~~—~~||
|Reverse Transfer Capacitance<br>~~—~~|Crss<br>~~—~~|—<br>~~—~~|61.4<br>~~—~~|—<br>~~—~~|pF<br>~~—~~||
|Gate Resistance<br>~~—~~<br>~~———~~|Rg<br>~~—~~|—<br>~~—~~|1.1<br>~~—~~|—<br>~~—~~<br>~~ee~~|Ω<br>~~—~~<br>~~ee~~|VDS= 0V,VGS= 0V,f = 1MHz<br>~~—~~<br>~~eee~~|
|Total Gate Charge(VGS= 4.5V)<br>~~———~~|Qg|—|5|—<br>~~ee~~|nC<br>~~ee~~|VGS= 10V, VDS= 15V,<br>ID= 8.5A<br>~~eee~~<br>~~eee~~|
|Total Gate Charge(VGS= 10V)<br>~~———~~|Qg|—|10.5|—<br>~~ee~~|nC<br>~~ee~~||
|Gate-Source Charge<br>~~———~~|Qgs|—|1.8|—<br>~~ee~~|nC<br>~~ee~~||
|Gate-Drain Charge<br>~~———~~<br>~~——_—~~|Qgd|—|1.6|—<br>~~ee~~<br>~~eee~~|nC<br>~~ee~~<br>~~eee~~||
|Turn-On DelayTime<br>~~———~~<br>~~——_—~~|tD(ON)|—|2.9|—<br>~~ee~~<br>~~eee~~|ns<br>~~ee~~<br>~~eee~~|VDS= 15V, VGS= 10V,<br>RL= 1.8Ω, RG= 3Ω<br>~~eee~~<br>~~eee~~|
|Turn-On Rise Time<br>~~———~~<br>~~——_—~~|tR|—|7.9|—<br>~~ee~~<br>~~eee~~|ns<br>~~ee~~<br>~~eee~~||
|Turn-Off DelayTime<br>~~——_—~~|tD(OFF)|—|14.6|—<br>~~eee~~|ns<br>~~eee~~||
|Turn-Off Fall Time<br>~~——_—~~|tF|—|3.1|—<br>~~eee~~|ns<br>~~eee~~||



- Notes: 5. Device mounted on FR-4 PCB, with minimum recommended pad layout. 

   6. Device mounted on minimum recommended pad layout test board, 10μs pulse duty cycle = 1% . 

   7. Repetitive rating, pulse width limited by junction temperature. 

   8. IAR and EAR ratings are based on low frequency and duty cycles to keep TJ = +25°C . 

   9. Short duration pulse test used to minimize self-heating effect. 

   10. Guaranteed by design. Not subject to product testing. 

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30  20<br>V     = 5.0VDS<br>25<br>15<br>)<br>20  oo N [T(A] LLL Ave V     (V) @ 150°CGS LL<br>15  / oA) @ Vigg=4. ff | 10 rT |-<br>[Eoomecoss C [URRE] Ave V     (V) @ 125°CGS /<br>I [N]<br>10  D [RA] Ave V     (V) @ 85°CGS<br>Yo , D 5 o<br>I<br>5  Ave V     (V) @ 25°CGS<br>| AAR =o j<br>Ave V     (V) @ -55°CGS<br>0  A 0 Aan<br>0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.5 1 1.5 2 2.5 3 3.5 4<br>VDS, DRAIN-SOURCE VOLTAGE (V) V    , GATE-SOURCE VOLTAGE (V)GS<br>Fig.1 Typical Output Characteristic Fig.2 Typical Transfer Characteristics<br>0.05 0.04<br> )<br>RDS(ON)() Ave @ VGS=3.5V ( V     = 10VGS<br>N [CE]<br>0.04 T [A] Ave R           (  )DS(ON) [] [@ 150°C]<br>0.03<br>I [S] S an<br>0.03 at+t++H7 = LEee ee Ave R           (  )DS(ON) [] [@ 125°C]<br>O [N] [-] [RE]<br>RDS(ON)() Ave @ VGS=4.5V 0.02 Ave R           (  )DS(ON) [] [@ 85°C]<br>+t. ————<br>0.02 oo O [URCE] = Ave R           (  )DS(ON) [] [@ 25°C]<br>RDS(ON)() Ave @ VGS=10V I [N] [-] [S] 0.01 Ave R           (  )DS(ON) [] [@ -55°C]<br>0.01 D [RA]<br>,<br>( [ON)]<br>D [S]<br>R<br>0 oe 0 OR<br>0 5 10 15 20 25 30 0 5 10 15 20 25 30<br>IDI, DRAIN-SOURCE CURRENT (A) D, DRAIN-SOURCE CURRENT I  , DRAIN CURRENT (A)D<br>Fig. 3 Typical On-Resistance vs.  Fig. 4 Typical On-Resistance vs.<br>Drain Current and Gate Voltage  Drain Current and Temperature<br>1.7 0.06<br>RDS(ON)( [] )<br>@ VGS=10V, ID=10A<br>1.5 TTB 0.05 Oto<br>1.3 0.04 R@ VDS(ON)GS=4.5V, I( [] ) D=5A<br>1.1 coer 0.03 A<br>RDS(ON)( [] )<br>@ VGS=4.5V, ID=5A<br>aT] 0.02 EEer<br>0.9<br>74 BerasPra RDS(ON)( [] )<br>@ VGS=10V, ID=10A<br>0.7 SPP) = 0.01  EE<br>0.5 CREE 0 EE<br>- 50 -25 0 25 50 75 100 125 150 - 50 -25 0 25 50 75 100 125 150<br>TJ, JUNCTION TEMPERATURE (C) TJ, JUNCTION TEMPERATURE (C)<br>Fig. 5 On-Resistance Variation with Temperature Fig. 6 On-Resistance Variation with Temperature<br>(NORMALIZED)<br>, DRAIN-SOURCE ON-RESISTANCE<br>DS(ON)<br>R<br>)<br>, DRAIN-SOURCE ON-RESISTANCE (<br>R<br>DS(ON)<br>, DRAIN CURRENT (A)<br>ID<br>RES STANCE Ω<br>SOURCE ON<br>  DRA N<br>DS(ON)<br>, DRAIN CURRENT (A)<br> I<br>D<br>)<br>, DRAIN-SOURCE ON-RESISTANCE (<br>R<br>DS(ON)<br>**----- End of picture text -----**<br>


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2<br>1.8 TTT<br>1.6 RTE<br>~ T ETT)<br>1.4 RW<br>Vth (V) @ IVTH (V) @ IDD=250=250µA  礎 VVth (VTH (V ) @ I DD =1m AA<br>1.2<br>oo:aea<br>1 ||<br>0.8<br>0.6 [teeCEPCCAPA)Ne.eT N<br>-50 -25 0 25 50 75 100 125 150<br>TJ, JUNCTION TEMPERATURE (C)<br>Fig. 7 Gate Threshold Variation vs. Junction Temperature Fig. 7 Gate Threshold Variation vs. Ambient Temperature<br>10000 — SSS SSS<br>) I      (nA) Ave @ 150°CDSS<br>N [T(nA] 1000 es ee ee a<br>I      (nA) Ave @ 125°CDSS<br>2 ——<br>C [URRE]<br>CESS<br>G [E] 100 Te<br>AK ce Ee<br>A<br>——<br>I      (nA) Ave @ 85°CDSS<br>I [NLE] 10 ee<br>D [RA] I      (nA) Ave @ 25°CDSS<br>, S —=—— — ee<br>SD a<br>I<br>1<br>0 ttt 5 10 15 20 25 30<br>V    , DRAIN-SOURCE VOLTAGE (V)DS<br>Fig. 9 Typical Drain-Source Leakage Current vs. Voltage<br>, Gate Threshold Voltage<br>V<br>, GATE THRESHOLD VOLTAGE (V) GS(th)<br>GS(TH)<br>V<br>, DRAIN LEAKAGE CURRENT (nA)<br>IDSS<br>**----- End of picture text -----**<br>


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10<br>VDS=15V, ID=10A<br>8<br>6<br>4<br>_/f<br>2<br>0<br>0 2 4 6 8 10 12<br>QQGg - (nC) (nC)<br>Fig. 11 Gate Charge<br> (V)<br>V<br>GS<br>**----- End of picture text -----**<br>


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20<br>18<br>Cr<br>16<br>14 TTT<br>eee<br>12 SERSTy yyy<br>10<br>8 ott<br>tt VVSDSD(V) @ T(V)@TAA=25=25°C  癈<br>6 TT<br>4<br>CELEttt<br>2<br>eee<br>0 CC taTTTtt<br>0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2<br>VSD, SOURCE-DRAIN VOLTAGE (V)<br>Fig.8   Diode Forward Voltage vs. Current<br>1000<br>———————————<br>Ciss Ave(pF)<br>fo<br>a ee eee<br>Coss Ave(pF)<br>100  SE\<br>-———— 4S ptt<br>Crss Ave(pF)<br>eee eee<br>tt<br>ee f=1MHz ee ee ee<br>10  | fp<br>0 4 8 12 16 20<br>VDS, DRAIN-SOURCE VOLTAGE (V)<br>Fig. 10 Typical Junction Capacitance<br>100<br>RDS(ON) PW = 100µs<br>Limited<br>PRE ESTING<br>10<br>PORN ZN<br>1  PW = 1ms<br>PW = 10ms  TONSA<br>0.1  TTJ(Max) C = 25= 150 ℃ ℃ PW = 100ms<br>Single Pulse  PW = 1s<br>DUT on 1*MRP<br>Board VGS = 10V fTee PW = 10s DC  2 ell|<br>0.01<br>0.1  1  10  100<br>VDS, DRAIN-SOURCE VOLTAGE (V)<br>Fig. 12 SOA, Safe Operation Area<br>, SOURCE CURRENT (A)<br>IS<br>, DRAIN CURRENT (A)<br>ID<br>, JUNCTION CAPACITANCE (pF)<br>C<br>T<br>, SOURCE CURRENT (V)<br>IS<br>**----- End of picture text -----**<br>


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'imeoerreoserRaATED<br>1<br>|<br>a<br>A r(t) @ D=0.5 emNGeee<br>| r(t) @ D=0.9 Z<br>r(t) @ D=0.3 r(t) @ D=0.7<br>0.1 ee| e atcommert ee| LE| | |<br>FOaeg r(t) @ D=0.1 HAee7grNO OOEE Et EEE<br>r(t) @ D=0.05<br>FL 8ice07 iin0<br>r(t) @ D=0.02 TT<br>0.01 caeJt PAL || ILIMI LTT LUA ELAINE ETI LUT<br>EOit r(t) @ D=0.01 peo SSEa ot”,ATAT erGOTT<br>FE r(t) @ D=0.005 IE tio RθJARthja(t)=r(t) * Rthja(t) = r(t) * RθJA |<br>— [PAT] RDuty Cycle, D = t1 / t2 θJA Rthja=90 C/WDuty Cycle, D=t1 /  t2= 90 ℃ /W<br>r(t) @ D=Single Pulse<br>0.001<br>0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000<br>t1, PULSE DURATION TIME (sec)<br>Fig. 12 Transient Thermal ResistanceFig. 13 Transient Thermal Resistance<br>r(t), TRANSIENT THERMAL RESISTANCE<br>**----- End of picture text -----**<br>


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ge Outline Dimensions e Outline Dimensions<br>Please see http://www.diodes.com/package-outlines.html for the latest version.<br>SO-8<br>SO-8<br>Dim  Min  Max  Typ<br>A  1.40 1.50 1.45<br>E<br>A1  0.10  0.20  0.15<br>b  0.30  0.50  0.40<br>1 c  0.15  0.25  0.20<br>D  4.85  4.95  4.90<br>E  5.90  6.10  6.00<br>E1  3.80  3.90  3.85<br>b E0  3.85  3.95  3.90<br>E1 e  --  --  1.27<br>h h  -  --  0.35<br>Q L   0.62  0.82  0.72<br>7° Q 0.60 0.70 0.65<br>c<br>All Dimensions in mm<br>===5<br>A 4°± 3°<br>G auge Plane<br>S eating Plane<br>L<br>e A1 E0<br>D<br>9° (All sides)<br>R 0.1<br>45°<br>**----- End of picture text -----**<br>


## **Package Outline Dimensions e Outline Dimensions** 

Please see http://www.diodes.com/package-outlines.html for the latest version. 

## **Suggested Pad Layout** 

Please see http://www.diodes.com/package-outlines.html for the latest version. 

**SO-8** 

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ee X1<br>Y1<br>_<br>Y<br>ne C X<br>**----- End of picture text -----**<br>


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Dimensions Value (in mm)<br>C 1.27<br>X  0.802<br>X1  4.612<br>Y  1.505<br>Y1  6.50<br>**----- End of picture text -----**<br>


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**DMG4822SSD IMPORTANT NOTICE** DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or trademark rights, nor the rights of others. Any Customer or user of this document or products described herein in such applications shall assume all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diodes Incorporated website, harmless against all damages. Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel. Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorized application, Customers shall indemnify and hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized application. Products described herein may be covered by one or more United States, international or foreign patents pending. Product names and markings noted herein may also be covered by one or more United States, international or foreign trademarks. This document is written in English but may be translated into multiple languages for reference. Only the English version of this document is the final and determinative format released by Diodes Incorporated. **LIFE SUPPORT** Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express written approval of the Chief Executive Officer of Diodes Incorporated. As used herein: A.   Life support devices or systems are devices or systems which: [| 1. are intended to implant into the body, or 2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in significant injury to the user. B.   A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or to affect its safety or effectiveness. Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems. Copyright © 2019, Diodes Incorporated **www.diodes.com**[J] DMG4822SSD 7 of 7 May 2019 Document number: DS35403  Rev. 3 - 2 **www.diodes.com** © Diodes Incorporated 

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