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DMC4050SSD-13
Dual MOSFET, Complementary N and P Channel, 40 V, 40 V, 5.3 A, 5.3 A, 0.045 ohm
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- Manufacturer: DIODES INC.
- Product type: Dual MOSFETs
- SVHC: No SVHC (25-Jun-2025)
- No. of Pins: 8Pins
- Channel Type: Complementary N and P Channel
- Product Range: -
- Qualification: -
- Transistor Case Style: SOIC
- Operating Temperature Max: 150°C
- Power Dissipation N Channel: 1.8W
- Power Dissipation P Channel: 1.8W
- Drain Source Voltage Vds N Channel: 40V
- Drain Source Voltage Vds P Channel: 40V
- Continuous Drain Current Id N Channel: 5.3A
- Continuous Drain Current Id P Channel: 5.3A
- Drain Source On State Resistance N Channel: 0.045ohm
- Drain Source On State Resistance P Channel: 0.045ohm
| Delivery and price | |
|---|---|
| Units per pack | 5000 |
| Price | 0.239 € |
| Current stock | 1000+ |
| Lead time | 30 days |
**DMC4050SSD** ## **40V COMPLEMENTARY PAIR ENHANCEMENT MODE MOSFET** ## **Product Summary** |**Product Summaryy**|**Product Summaryy**|**Product Summaryy**|**Product Summaryy**| |---|---|---|---| ||||| |**Device**|**V(BR)DSS**|**RDS(ON)Max**|**ID Max**<br>**TA = +25°C**<br>(Notes 6 & 8)| |Q1|40V|45mΩ @ VGS= 10V|5.5A| |||60mΩ @ VGS= 4.5V|4.2A| |Q2|-40V|45mΩ @ VGS= -10V|-5.8A| |||60mΩ @ VGS= -4.5V|-4.2A| ## **Description and Applications** This MOSFET is designed to ensure that RDS(ON) of N and P channel FET are matched to minimize losses in both arms of the bridge. The DMC4040SSD is optimized for use in 3-phase brushless DC motor circuits (BLDC), and CCFL backlighting. - 3-Phase BLDC Motor - CCFL Backlighting ## **Features and Benefits** - Matched N & P RDS(ON) – Minimizes Power Losses - Fast Switching – Minimizes Switching Losses - Dual Device – Reduces PCB Area - **Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)** - **Halogen and Antimony Free. “Green” Device (Note 3)** - **For automotive applications requiring specific change control (i.e.: parts qualified to AEC-Q100/101/200, PPAP capable, and manufactured in IATF 16949 certified facilities), please refer to the related automotive grade (Q-suffix) part. A listing can be found at -** - **https://www.diodes.com/products/automotive/automotive products/.** - **This part is qualified to JEDEC standards (as referenced in AEC-Q) for High Reliability. https://www.diodes.com/quality/product-definitions/** - **An Automotive-Compliant Part is Available Under Separate Datasheet (DMC4055SSDQ)** ## **Mechanical Data** - Case: SO-8 - Case Material: Molded Plastic, “Green” Molding Compound. UL Flammability Classification Rating 94V-0 - Moisture Sensitivity: Level 1 per J-STD-020 - Terminals: Finish – Matte Tin Annealed over Copper Leadframe. Solderable per MIL-STD-202, Method 208 - Weight: 0.074 grams (Approximate) **==> picture [22 x 8] intentionally omitted <==** **----- Start of picture text -----**<br> SO-8<br>**----- End of picture text -----**<br> **==> picture [416 x 111] intentionally omitted <==** **----- Start of picture text -----**<br> D1 D2<br>S1 D1<br>G1 D1<br>G1 G2<br>S2 D2<br>G2 D2 S1 S2<br>Top View Top View Equivalent Circuit<br>**----- End of picture text -----**<br> ## **Ordering Information** (Note 4) |**Ordering Informationg Information Information** (Note 4)||| |---|---|---| |**Product**|**Case**|**Packaging**| |DMC4050SSD-13|**SO-8**|2500/Tape &Reel| Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant. 2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. 4. For packaging details, go to our website at http://www.diodes.com/products/packages.html. 1 of 12 **www.diodes.com** DMC4050SSD Document number: DS33310 Rev. 4 - 2 April 2021 © Diodes Incorporated **DMC4050SSD** ## **Marking Information** **==> picture [44 x 22] intentionally omitted <==** **----- Start of picture text -----**<br> C4050SD<br>YY WW<br>**----- End of picture text -----**<br> = Manufacturer’s Marking C4050SD = Product Type Marking Code YYWW = Date Code Marking YY or YY= Year (ex: 20 = 2020) WW = Week (01 - 53) |**Maximum Ratings **(@TA= +25°C, unless otherwise specified.)|**Maximum Ratings **(@TA= +25°C, unless otherwise specified.)|**Maximum Ratings **(@TA= +25°C, unless otherwise specified.)||||| |---|---|---|---|---|---|---| |**Characteristic**<br>~~GO~~|||**Symbol**<br>~~GO~~|**N-Channel - Q1**<br>~~GO~~|**P-Channel - Q2**<br>~~GO~~|**Units**<br>~~GO~~| |Drain-Source Voltage<br>~~ee~~|||VDSS<br>~~ee~~|40<br>~~ee~~|-40<br>~~ee~~|V<br>~~ee~~| |Gate-Source Voltage<br>~~ee~~<br>~~—_|~~|||VGSS<br>~~ee~~|20<br>~~ee~~|20<br>~~ee~~|| |Continuous Drain Current<br>~~—_|~~<br>~~SS~~|VGS= 10V<br>~~—_|~~<br>|(Notes 6 & 8)|ID<br>|5.8|-5.8|A| |||TA= +70°C(Notes 6 & 8)<br>||4.38<br>|-4.52<br>|| |||(Notes 5 & 8)<br>||4.2<br>|-4.2<br>|| |||(Notes 5 & 9)<br>||5.3<br>|-5.3<br>|| |Pulsed Drain Current<br>~~—_|~~<br>~~SS~~|VGS= 10V<br>~~—_|~~<br>|(Notes 7 & 8)<br>|IDM<br>|24.1<br>|-24.9<br>|| |Continuous Source Current(BodyDiode)<br>~~—_|~~<br>~~SSee~~||(Notes 6 & 8)<br>~~ee~~|IS<br>~~ee~~|2.5<br>~~ee~~|-2.5<br>~~ee~~|| |Pulsed Source Current(BodyDiode)<br>~~—_|~~<br>~~ee~~||(Notes 7 & 8)<br>~~ee~~|ISM<br>~~ee~~|24.1<br>~~ee~~|-24.9<br>~~ee~~|| ## **Thermal Characteristics** |**Thermal Characteristics **|**Thermal Characteristics **|||| |---|---|---|---|---| |**Characteristic**||**Symbol**|**Value**|**Unit**| |Power Dissipation<br>Linear Derating Factor|(Notes 5 & 8)|PD|1.25|W<br>mW/°C| ||(Notes 5 & 9)||1.8|| ||(Notes 6 & 8)||2.14|| |Thermal Resistance, Junction to Ambient|(Notes 5 & 8)|RθJA|100|°C/W| ||(Notes 5 & 9)||70|| ||(Notes 6 & 8)||58|| |Thermal Resistance,Junction to Lead|(Notes 5 & 10)|RθJL|51|| |Operatingand Storage Temperature Range||TJ,TSTG|-55 to +150|°C| Notes: 5. For a device surface mounted on 25mm x 25mm x 1.6mm FR4 PCB with high coverage of single sided 1oz copper, in still air conditions; the device is measured when operating in a steady-state condition. 6. Same as note (5), except the device is measured at t 10 sec. 7. Same as note (5), except the device is pulsed with D = 0.02 and pulse width 300µs. 8. For a dual device with one active die. 9. For a device with two active die running at equal power. 10. Thermal resistance from junction to solder-point (at the end of the drain lead). 2 of 12 **www.diodes.com** DMC4050SSD Document number: DS33310 Rev. 4 - 2 April 2021 © Diodes Incorporated **DMC4050SSD** ## **Thermal Characteristics** (continued) **==> picture [436 x 355] intentionally omitted <==** **----- Start of picture text -----**<br> R DS(ON) ===. a_i RDS(ON) ===...<br>10 Limited 10 Limited<br>pee NN TSS Poe aa<br>1 DC 1 DC<br>ae a, SS SU SiS ea a,SS a<br>1s 1s<br>100ms 100ms<br>100m een 10ms yin, Shs! 100m Seem 10ms LTA NI<br>Single Pulsegle Pulsele Pulse 1ms Single Pulse 1ms<br>T amb = 25 ° C 100us Tamb= 25°C 100us<br>10m One active die ==ee-] 10m One active die F——-FAtf| yyy EHff -|<br>0.1 1 10 0.1 1 10<br>VDS Drain-Source Voltage (V)DS Drain-Source Voltage (V) Drain-Source Voltage (V) -VDS Drain-Source Voltage (V)<br>N-channel Safe Operating Area P-channel Safe Operating Area<br>2.0<br>100 R(theta junction-to-ambient), R JA om TTT TTT<br>One active die L TTI<br>80 zo"AriMMII 1.5 PNXQ Two active die 7]<br>aE? PND | |<br>60 D=0.5 One active die<br>1.0<br>Pcie et Wf TT XK |<br>40 CTASel “MA A PNAS<br>TH TACT XS<br>D=0.2 Single Pulse<br>0.5<br>cr A CCCI<br>20 D=0.05<br>OZ | PIN A<br>0 CTSeASCt D=0.1 ollllCTTCT 0.0 PoSN<br>100µ 1m 10m 100m 1 10 100 1k 0 25 50 75 100 125 150<br>Pulse Width (s) Temperature (°C)<br>Transient Thermal Impedance Derating Curve<br> Drain Current (A)IDIDD Drain Current (A)-ID<br>Thermal Resistance (°C/W) Max Power Dissipation (W)<br>**----- End of picture text -----**<br> **==> picture [183 x 150] intentionally omitted <==** **----- Start of picture text -----**<br> R<br>DS(ON)<br>10 Limited<br>pee<br>DC<br>1<br>ae a, SS SU<br>1s<br>100ms<br>100m een 10ms yin,<br>Single Pulsegle Pulsele Pulse 1ms<br>T = 25 ° C 100us<br>amb<br>10m One active die<br>0.1 1 10<br>VDS Drain-Source Voltage (V)DS Drain-Source Voltage (V) Drain-Source Voltage (V)<br> Drain Current (A)IDIDD<br>**----- End of picture text -----**<br> **==> picture [216 x 144] intentionally omitted <==** **----- Start of picture text -----**<br> Single Pulse<br>100 aam,ee ee T amb = 25°C | HH<br>One active die<br>SN<br>PIE ae He<br>2 TIN TTI TTT PTT<br>10 ATITITSTUM CTT<br>PTO TT TTT TT TT TT TTT<br>PT TT TINCT PTT<br>Rl<br>1 TIVE EET ETE EI LT TiS Coa<br>100µ 1m 10m 100m 1 10 100 1k<br>Pulse Width (s)<br>Maximum Power (W)<br>**----- End of picture text -----**<br> **Pulse Power Dissipation** 3 of 12 **www.diodes.com** DMC4050SSD Document number: DS33310 Rev. 4 - 2 April 2021 © Diodes Incorporated **DMC4050SSD** **Electrical Characteristics** (Q1 N-Channel) (@TA = +25°C, unless otherwise specified.) **==> picture [523 x 263] intentionally omitted <==** **----- Start of picture text -----**<br> ||||||||||||| |---|---|---|---|---|---|---|---|---|---|---|---| |Characteristic|Symbol|Min|Typ|Max|Unit|Test Condition| |OFF CHARACTERISTICS|(Note 11)| |es|Drain-Source Breakdown Voltage|BVDSS|40|—|—|V|VGS = 0V, ID = 250μA| |Zero Gate Voltage Drain Current TJ = +25°C|IDSS|—|—|1.0|µA|VDS = 40V, VGS = 0V| |a|GD|QO|GO| |Gate-Source Leakage|IGSS|—|—|±100|nA|VGS = ±20V, VDS = 0V| |a|GO|GO| |ON CHARACTERISTICS|(Note 11)| |CG|Gate Threshold Voltage|VGS(th)|0.8|1.3|1.8|V|VDS = VGS, ID = 250μA| |GO|CO|QO| |20|45|VGS = 10V, ID = 3A| |ee|Static Drain-Source On-Resistance|RDS(ON)|—|33|60|mΩ|VGS = 4.5V, ID = 3A| |Forward Transfer Admittance||Yfs||—|12.6|—|S|VDS = 5V, ID = 3A| |a|Diode Forward Voltage (Note 11)|VSD|—|0.7|1.0|V|VGS = 0V, IS = 1A| |DYNAMIC CHARACTERISTICS|(Note 12)| |Input Capacitance|Ciss|—|1790.8|—|pF| |PO|Output Capacitance|Coss|—|160.6|—|pF|Vf = 1.0MHz DS = 20V, VGS = 0V,| |——|Reverse Transfer Capacitance|ee|Crss|ee|—|120.5|ee|ee|—|ee|pF| |Gate Resistance|Rg|—|1.03|—|Ω|VDS = 0V, VGS = 0V, f = 1MHz| |Total Gate CharGate-Source Charge ge|QQgsg|— —|37.56 7.8|— —|nC nC|VIDGS = 3A = 10V, VDS = 20V,| |Gate-Drain Charge|Qgd|—|6.6|—|nC| |ee|Turn-On Delay Time|tD(on)|—|8.08|—|nS| |Turn-On Rise Time|tr|—|15.14|—|nS|VGS = 10V, VDS = 20V,| |Turn-Off Delay Time|tD(off)|—|24.29|—|nS|ID = 3A| |Turn-Off Fall Time|tf|—|5.27|—|nS| |——|ee| **----- End of picture text -----**<br> **Electrical Characteristics** (Q2 P-Channel) (@TA = +25°C, unless otherwise specified.) **==> picture [523 x 264] intentionally omitted <==** **----- Start of picture text -----**<br> ||||||||| |---|---|---|---|---|---|---|---| |Characteristic|Symbol|Min|Typ|Max|Unit|Test Condition| |OFF CHARACTERISTICS|(Note 11)| |——————————————|Drain-Source Breakdown Voltage|BVDSS|-40|—|—|V|VGS = 0V, ID = -250μA| |Zero Gate Voltage Drain Current TJ = +25°C|IDSS|—|—|-1.0|μA|VDS = -40V, VGS = 0V| |ee|Gate-Source Leakage|IGSS|—|—|±100|nA|VGS = ±20V, VDS = 0V| |ON CHARACTERISTICS|(Note 11)| |GG|Gate Threshold Voltage|VGS(th)|-0.8|-1.3|-1.8|V|VDS = VGS, ID = -250μA| |GO|SO|(O| |28|45|VGS = -10V, ID = -3A| |Static Drain-Source On-Resistance|RDS(ON)|—|30|60|mΩ|VGS = -4.5V, ID = -3A| |ee|Forward Transfer Admittance||Yfs||—|16.6|—|S|VDS = -5V, ID = -3A| |PO|Diode Forward Voltage (Note 11)|VSD|—|-0.7|-1.0|V|VGS = 0V, IS = -1A| |DYNAMIC CHARACTERISTICS|(Note 12)| |PO|Input Capacitance|Ciss|—|1643.17|—|pF| |Output Capacitance|Coss|—|179.13|—|pF|VDS = -20V, VGS = 0V,| |f = 1.0MHz| |Reverse Transfer Capacitance|Crss|—|127.82|—|pF| |Gate Resistance|Rg|—|6.43|—|Ω|VDS = 0V, VGS = 0V, f = 1MHz| |a|Total Gate CharGate-Source Charge ge|QQgsg|— —|33.66 5.54|— —|nC nC|VIDGS = -3A = -10V, VDS = -20V,| |Gate-Drain Charge|Qgd|—|7.30|—|nC| |i|Turn-On Delay Time|tD(on)|—|6.85|—|nS| |Turn-On Rise Time|tr|—|14.72|—|nS|VGS = -10V, VDS = -20V,| |Turn-Off Delay Time|tD(off)|—|53.65|—|nS|ID = -3A| |Turn-Off Fall Time|tf|—|30.86|—|nS| |——|Notes:|11. Short duration pulse test used to minimize self-heating effect.|ee| **----- End of picture text -----**<br> Notes: 11. Short duration pulse test used to minimize self-heating effect. 12. Guaranteed by design. Not subject to production testing. 4 of 12 **www.diodes.com** DMC4050SSD Document number: DS33310 Rev. 4 - 2 April 2021 © Diodes Incorporated **DMC4050SSD** **Typical Characteristics** (Q1 N-Channel) **==> picture [481 x 656] intentionally omitted <==** **----- Start of picture text -----**<br> 30 30<br>25 VGS = 8.0V 25 VDS = 5V<br>20 FSS VGS = 4.5V 20<br>5 cco<br>15 Tr 15 |<br>VGS = 4.0V<br>10 10<br>Ly TUTTEBERRRGRY En<br>VGS = 3.5V TA = 150°C<br>5 5 T A = 125°C TA = 25°CT A = 85°C<br>VGS = 2.5V VGS = 3.0V TA = -55°C<br>0 Ze 0 Le<br>0 0.5 1 1.5 2 0 1 2 3 4 5<br>VDS, DRAIN-SOURCE VOLTAGE (V) VGS, GATE-SOURCE VOLTAGE (V)<br>Fig. 1 Typical Output Characteristic Fig. 2 Typical Transfer Characteristic<br>0.06 0.04<br>VGS = 10V<br>0.05<br>eee<br>0.03<br>0.04<br>P| || | ft|fefe<br>VGS = 4.5V TA = 150°C<br>0.03 0.02<br>TA = 125°C<br>——E T A = 85°C<br>0.02<br>VGS = 10V 0.01 SSS TA = 25°C<br>TA = -55°C<br>0.01<br>TT =<br>0 0 | | | f<br>P| | [Tt 7<br>0 5 10 15 20 25 30 0 5 10 15 20 25 30<br>ID, DRAIN-SOURCE CURRENT (A) ID, DRAIN CURRENT (A)<br>Fig. 3 Typical On-Resistance Fig. 4 Typical On-Resistance<br>vs. Drain Current and Gate Voltage vs. Drain Current and Temperature<br>1.7 0.06<br>1.5 Ht) V GS = 10V 0.05 LEE ELL<br>ID = 20A<br>1.3 0.04<br>EERE ae ttt ee<br>1.1 VGSID = 10A = 4.5V 0.03 V I GS D = 10A = 4.5V<br>0.9 aoeanee 0.02 poaeenan<br>ae aa | tte<br>0.7 0.01 V GS = 10V<br>ID = 20A<br>0.5 ZannPEE ELELE 0 aaaeenneLEE LELL<br>-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150<br>TA, AMBIENT TEMPERATURE (°C) TA, AMBIENT TEMPERATURE (°C)<br>Fig. 5 On-Resistance Variation with Temperature<br>Fig. 6 On-Resistance Variation with Temperature<br>)<br>, DRAIN-SOURCE ON-RESISTANCE (<br>R<br>DS(ON)<br>D<br>, DRAIN CURRENT (A)<br>I<br>)<br>, DRAIN-SOURCE ON-RESISTANCE (<br>R<br>DSON<br>, DRAIN-SOURCE<br>DSON<br>R<br>ON-RESISTANCE (NORMALIZED)<br>, DRAIN CURRENT (A)<br>ID<br>)<br>, DRAIN-SOURCE ON-RESISTANCE (<br>DS(ON)<br>R<br>**----- End of picture text -----**<br> 5 of 12 **www.diodes.com** DMC4050SSD Document number: DS33310 Rev. 4 - 2 April 2021 © Diodes Incorporated **DMC4050SSD** **==> picture [218 x 662] intentionally omitted <==** **----- Start of picture text -----**<br> 3.0<br>2.7 P| | | | ff fd]<br>2.4 Pt | | ft ff |<br>2.1<br>P| | | ff ft ff<br>1.8 Pt | | ft ff |<br>1.5 ID = 1mA<br>1.2 ro<br>—<br>0.9 P| ft | I top D = 250µA<br>0.6<br>P| | | | ff |<br>0.3 P| | | | | ft ff<br>0 | | | | | ff |<br>-50 -25 0 25 50 75 100 125 150<br>TA, AMBIENT TEMPERATURE (°C)<br>Fig. 7 Gate Threshold Variation vs. Ambient Temperature<br>10,000 —+SSS SS Ciss SS<br>1,000 | | fT+, ft<br>=e<br>—— Coss<br>100 a C rss ee ee<br>= SS<br>————_——<br>ee ee ee f = 1MHz<br>10<br>ITT EE<br>0 5 10 15 20 25 30<br>VDS, DRAIN-SOURCE VOLTAGE (V)<br>Fig. 9 Typical Total Capacitance<br>10<br>8 VDS = 20V<br>ID = 12A<br>6 ADLEELA<br>4 oYBZanii<br>2 ff LL<br>0 ZTE EEE<br>0 5 10 15 20 25 30 35 40<br>Qg, TOTAL GATE CHARGE (nC)<br>Fig. 11 Gate-Charge Characteristics<br>C, CAPACITANCE (pF)<br>GS(TH)<br>, GATE THRESHOLD VOLTAGE (V)<br>V<br>, GATE-SOURCE VOLTAGE (V)<br>V<br>GS<br>**----- End of picture text -----**<br> **==> picture [216 x 443] intentionally omitted <==** **----- Start of picture text -----**<br> 2018 Pt | ft | |yp<br>16 Pt | tt | yu<br>14 TA = 25 ° C<br>12 fePt | ft po<br>10<br>8 PtPi |tttttt| tdEA tf<br>6 Pt | ft | | de<br>4<br>Pi ttt tT ve tt<br>2 Pi] tt<br>0 P| |iLLfet| tt<br>0.2 0.4 0.6 0.8 1.0 1.2<br>VSD, SOURCE-DRAIN VOLTAGE (V)<br>Fig. 8 Diode Forward Voltage vs. Current<br>10,000 ==<br>1,000 SS TA = SS 150°C<br>EEE== ae<br>—————— T A = 125°C<br>100 Prtsts), ft<br>oT T A = 85°C<br>10 Peeters tt<br>TA = 25°C<br>Se<br>(=e t+}<br>1<br>SS<br>0 5 10 15 20 25 30 35 40<br>VDS, DRAIN-SOURCE VOLTAGE (V)<br>Fig. 10 Typical Leakage Current<br>vs. Drain-Source Voltage<br>, LEAKAGE CURRENT (nA)<br>IDSS<br>, SOURCE CURRENT (A)<br>IS<br>**----- End of picture text -----**<br> 6 of 12 **www.diodes.com** DMC4050SSD Document number: DS33310 Rev. 4 - 2 April 2021 © Diodes Incorporated **DMC4050SSD** **==> picture [396 x 213] intentionally omitted <==** **----- Start of picture text -----**<br> 1 FeaSS Sarr ———————<br>BS D = 0.7<br>D = 0.5<br>FN ETH<br>D = 0.3 A<br>PT TTT EN err IT TP<br>0.1 UITme C U THE| A LUTE I LLIN LI<br>es D = 0.1 ncss naae eieetee<br>ee Ps<br>D = 0.05 D = 0.9<br>Oe<br>EE | PTT RJA(t) = r(t) * RJA | TT<br>e D = 0.02 r) R JA = 94°C/W Baill<br>0.01 TT D = 0.01 o>aill LTT TINE | P(pk) ————eeeetll<br>Mf | t1 | | | SEEEEE<br>eeTg D = 0.005 feTY ee eeee ee T J - T Ab A t =2 P * R JA (t) TT TT TTT<br>= a Duty Cycle, D = t1/t2 | TTT<br>D = Single Pulse<br>0.001<br>0.0001 0.001 0.01 0.1 1 10 100 1,000<br>t1, PULSE DURATION TIME (s)<br>Fig. 12 Transient Thermal Response<br>r(t), TRANSIENT THERMAL RESISTANCE<br>**----- End of picture text -----**<br> 7 of 12 **www.diodes.com** DMC4050SSD Document number: DS33310 Rev. 4 - 2 April 2021 © Diodes Incorporated **DMC4050SSD** ## **Typical Characteristics** (Q2 P-Channel) **==> picture [477 x 433] intentionally omitted <==** **----- Start of picture text -----**<br> 30 30<br>25 25 VDS = -5V TA = 150°C<br>TA = 85°C<br>20 os 20 ee T A = 25°C TA = 125 ° C<br>TA = -55°C<br>15 15<br>10 | [fo 10 }<br>5 aa 5 BRRRED ALRE<br>=< COPA<br>0 0<br>0 ———— 0.5 1 1.5 2 0 LLLP 1 2 LET 3 4 5<br>-VDS, DRAIN-SOURCE VOLTAGE (V) -VGS, GATE-SOURCE VOLTAGE (V)<br>Fig. 13 Typical Output Characteristic Fig. 14 Typical Transfer Characteristic<br>0.05 0.04<br>V GS = -10V<br>0.04<br>Pf |ey_ VGS = -4.5V 0.03 FRAEEr TA = 150°C<br>0.03 T A = 125°C<br>TA = 85°C<br>2 VGS = -10V 0.02 ————<br>0.02 TA = 25°C<br>To<br>TA = -55°C<br>0.01<br>0.01<br>0 PPEHt 0 RRR=<br>0 5 10 15 20 25 30 0 5 10 15 20 25 30<br>ET PE) | Geer<br>-ID, DRAIN-SOURCE CURRENT (A) -ID, DRAIN CURRENT (A)<br>Fig. 15 Typical On-Resistance Fig. 16 Typical On-Resistance<br>vs. Drain Current and Gate Voltage vs. Drain Current and Temperature<br>D<br>, DRAIN CURRENT (A)<br>-I<br>DS(ON)<br>)<br>, DRAIN-SOURCE ON-RESISTANCE (<br>R<br>DS(ON)<br>)<br>, DRAIN-SOURCE ON-RESISTANCE (<br>R<br>, DRAIN CURRENT (A)<br>-I<br>D<br>**----- End of picture text -----**<br> 8 of 12 **www.diodes.com** DMC4050SSD Document number: DS33310 Rev. 4 - 2 April 2021 © Diodes Incorporated **==> picture [508 x 703] intentionally omitted <==** **----- Start of picture text -----**<br> |<br>1.7 0.06<br>DMC4050SSD<br>1.5 V GS = -10V 0.05<br>ID = -20A<br>err 1.3 BRRr = EA 0.04 TtTo<br>VGS = -4.5V<br>ID = -10A<br>1.1 [ii 0.03 VGS = -4.5V | ee<br>ID = -10A<br>oA pt [-] | | eer<br>0.9 0.02<br>VGS = -10V<br>att aaelorTh pene ID = -20A r_<br>0.7 0.01<br>0.5 0<br>-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150<br>TA, AMBIENT TEMPERATURE (°C) TA, AMBIENT TEMPERATURE (°C)<br>Fig. 17 On-Resistance Variation with Temperature Fig. 18 On-Resistance Variation with Temperature<br>2.0 201816 PTETPEELETELET TALYE<br>1.5<br>14 TA = 25°C<br>12 fePT ey ty yy<br>1.0 I D = -1mA 10 PTET<br>8 PTET TET ey<br>ID = -250µA<br>6 PT ELTTETLTE<br>0.5<br>4 PT TETTyeEI<br>2 PTET<br>0 0 PTPPETEAT LLLTyy<br>-50 -25 0 25 50 75 100 125 150 0.2 0.4 0.6 0.8 1.0 1.2<br>TA, AMBIENT TEMPERATURE (°C) -VSD, SOURCE-DRAIN VOLTAGE (V)<br>Fig. 19 Gate Threshold Variation vs. Ambient Temperature Fig. 20 Diode Forward Voltage vs. Current<br>10,000 ———— 10,000 ae<br>TA = 150°C<br>a 1,000 ee<br>Ciss<br>1,000 a SSS<br>Ne eeSSS T A = 125°C ==<br>C oss 100<br>SS Pte<br>> ty<br>100 _— Crss =SSSSS= SSS TA = 85°C<br>———— 10 SSS ES<br>ota ptSS S S |TtSSSSS<br>TA = 25°C<br>10 Pot fT f ft ft 1 afe ee i<br>0 5 10 15 20 25 30 0 5 10 15 20 25 30 35 40<br>-VDS, DRAIN-SOURCE VOLTAGE (V) -VDS, DRAIN-SOURCE VOLTAGE (V)<br>Fig. 21 Typical Total Capacitance Fig. 22 Typical Leakage Current<br>vs. Drain-Source Voltage<br>C, CAPACITANCE (pF)<br>)<br>, DRAIN-SOURCE ON-RESISTANCE (<br>DSON<br>R<br>DSS<br>, LEAKAGE CURRENT (nA)<br>-I<br>, DRAIN-SOURCE<br>DSON<br>R<br>ON-RESISTANCE (NORMALIZED)<br>, GATE THRESHOLD VOLTAGE (V)<br>GS(TH)<br>-V<br>S<br>, SOURCE CURRENT (A)<br>-I<br>**----- End of picture text -----**<br> 9 of 12 **www.diodes.com** DMC4050SSD Document number: DS33310 Rev. 4 - 2 April 2021 © Diodes Incorporated **DMC4050SSD** **==> picture [203 x 210] intentionally omitted <==** **----- Start of picture text -----**<br> 10<br>8 mw /mur mi VDS = -20V y<br>ID = -12A<br>6<br>4<br>2<br>0<br>0 5 10 15 20 25 30 35 40<br>Qg, TOTAL GATE CHARGE (nC)<br>Fig. 23 Gate-Charge Characteristics<br>, GATE-SOURCE VOLTAGE (V)<br>GS<br>-V<br>**----- End of picture text -----**<br> **==> picture [395 x 212] intentionally omitted <==** **----- Start of picture text -----**<br> 1 ee<br>D = 0.7 RCE EISEN SEI caer oem<br>Sa D = 0.5 re<br>BR NEO ECE<br>D = 0.3<br>aT<br>0.1 | eTPIM aTITIMT TTT LTT<br>D = 0.1<br>Ce er UA TEN PTTa)<br>D = 0.05 SA D = 0.9 R JA (t) = r(t) * R JA LTT)<br>POI ee COE RJA = 94°C/W Coo<br>A en |<br>D = 0.02<br>0.01 D = 0.01 aUA LATIM aLTTE TT P(pk) Ty t1 IllCTT<br>Re D = 0.005 TJ - T FR A = P t 2 * RJA ~ (t) Gt<br>TSCOII rr rT er Duty Cycle, D = t1/t2 LTT)mull<br>D = Single Pulse<br>0.001<br>0.0001 0.001 0.01 0.1 1 10 100 1,000<br>t1, PULSE DURATION TIME (s)<br>Fig. 24 Transient Thermal Response<br>r(t), TRANSIENT THERMAL RESISTANCE<br>**----- End of picture text -----**<br> 10 of 12 **www.diodes.com** DMC4050SSD Document number: DS33310 Rev. 4 - 2 April 2021 © Diodes Incorporated **DMC4050SSD** ## **Package Outline Dimensions** Please see http://www.diodes.com/package-outlines.html for the latest version. **==> picture [506 x 241] intentionally omitted <==** **----- Start of picture text -----**<br> SO-8<br>SO-8<br>E —— Dim Min Max Typ<br>A 1.40 1.50 1.45<br>A1 0.10 0.20 0.15<br>1<br>b 0.30 0.50 0.40<br>c 0.15 0.25 0.20<br>D 4.85 4.95 4.90<br>E 5.90 6.10 6.00<br>b<br>E1 E1 3.80 3.90 3.85<br>h E0 3.85 3.95 3.90<br>Q e -- -- 1.27<br>7° h - -- 0.35<br>c L 0.62 0.82 0.72<br>A 4°±3° Q 0.60 0.70 0.65<br>All Dimensions in mm<br>G auge Plane<br>S eating Plane<br>L<br>e A1 st E0<br>D<br>9° (All sides)<br>R 0.1<br>45°<br>**----- End of picture text -----**<br> ## **Suggested Pad Layout** Please see http://www.diodes.com/package-outlines.html for the latest version. ## **SO-8** **==> picture [149 x 174] intentionally omitted <==** **----- Start of picture text -----**<br> podoc X1<br>Y1<br>Y<br>‘noon,<br>C X<br>**----- End of picture text -----**<br> **==> picture [104 x 56] intentionally omitted <==** **----- Start of picture text -----**<br> Dimensions Value (in mm)<br>C 1.27<br>X 0.802<br>X1 4.612<br>Y 1.505<br>Y1 6.50<br>**----- End of picture text -----**<br> 11 of 12 **www.diodes.com** DMC4050SSD Document number: DS33310 Rev. 4 - 2 April 2021 © Diodes Incorporated **DMC4050SSD** ## **IMPORTANT NOTICE** 1. DIODES INCORPORATED AND ITS SUBSIDIARIES (“DIODES”) MAKE NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO ANY INFORMATION CONTAINED IN THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). 2. The Information contained herein is for informational purpose only and is provided only to illustrate the operation of Diodes products described herein and application examples. Diodes does not assume any liability arising out of the application or use of this document or any product described herein. This document is intended for skilled and technically trained engineering customers and users who design with Diodes products. Diodes products may be used to facilitate safety-related applications; however, in all instances customers and users are responsible for (a) selecting the appropriate Diodes products for their applications, (b) evaluating the suitability of the Diodes products for their intended applications, (c) ensuring their applications, which incorporate Diodes products, comply the applicable legal and regulatory requirements as well as safety and functional-safety related standards, and (d) ensuring they design with appropriate safeguards (including testing, validation, quality control techniques, redundancy, malfunction prevention, and appropriate treatment for aging degradation) to minimize the risks associated with their applications. 3. Diodes assumes no liability for any application-related information, support, assistance or feedback that may be provided by Diodes from time to time. Any customer or user of this document or products described herein will assume all risks and liabilities associated with such use, and will hold Diodes and all companies whose products are represented herein or on Diodes’ websites, harmless against all damages and liabilities. 4. Products described herein may be covered by one or more United States, international or foreign patents and pending patent applications. Product names and markings noted herein may also be covered by one or more United States, international or foreign trademarks and trademark applications. Diodes does not convey any license under any of its intellectual property rights or the rights of any third parties (including third parties whose products and services may be described in this document or on Diodes’ website) under this document. 5. Diodes products are provided subject to Diodes’ Standard Terms and Conditions of Sale (https://www.diodes.com/about/company/terms-and-conditions/terms-and-conditions-of-sales/) or other applicable terms. This document does not alter or expand the applicable warranties provided by Diodes. Diodes does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel. 6. Diodes products and technology may not be used for or incorporated into any products or systems whose manufacture, use or sale is prohibited under any applicable laws and regulations. Should customers or users use Diodes products in contravention of any applicable laws or regulations, or for any unintended or unauthorized application, customers and users will (a) be solely responsible for any damages, losses or penalties arising in connection therewith or as a result thereof, and (b) indemnify and hold Diodes and its representatives and agents harmless against any and all claims, damages, expenses, and attorney fees arising out of, directly or indirectly, any claim relating to any noncompliance with the applicable laws and regulations, as well as any unintended or unauthorized application. 7. While efforts have been made to ensure the information contained in this document is accurate, complete and current, it may contain technical inaccuracies, omissions and typographical errors. Diodes does not warrant that information contained in this document is error-free and Diodes is under no obligation to update or otherwise correct this information. Notwithstanding the foregoing, Diodes reserves the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described herein. This document is written in English but may be translated into multiple languages for reference. Only the English version of this document is the final and determinative format released by Diodes. 8. Any unauthorized copying, modification, distribution, transmission, display or other use of this document (or any portion hereof) is prohibited. Diodes assumes no responsibility for any losses incurred by the customers or users or any third parties arising from any such unauthorized use. Copyright © 2021 Diodes Incorporated **www.diodes.com** 12 of 12 **www.diodes.com** DMC4050SSD Document number: DS33310 Rev. 4 - 2 April 2021 © Diodes Incorporated
Updated at June 9, 2026
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