CYBT-213043-02

Bluetooth Module, 5 Version, 3Mbps, -95dBm, 1.71 to 3.3 V Supply, -30 °C to 85 °C

⚠️ Reference pricing provided. In case of supply shortages, we will connect you with our trusted procurement partners to ensure your project's continuity.
Manufacturer: INFINEON
Product type: Bluetooth Modules & Adaptors
SVHC: No SVHC (25-Jun-2025)
Interfaces: I2C, I2S, SPI, UART
Product Range: -
Certifications: CE, FCC, ISED, MIC
Bluetooth Class: Class 2
Bluetooth Version: Bluetooth LE 5.0
Supply Voltage Range: 1.71 V to 3.3 V
Receiver Sensitivity Rx: -95 dBm
Operating Temperature Range: -30 °C to 85 °C
Delivery and price
Units per pack	250
Price	5.33 €
Current stock	200+
Lead time	30 days
Datasheet
## **CYBT-213043-02** - A/™“| q **AIROC™ Bluetooth® & Bluetooth® LE module** 

## **General description** 

The CYBT-213043-02 is a dual-mode Bluetooth® BR/EDR and Low Energy wireless module solution. The CYBT-213043-02 includes an onboard crystal oscillator, passive components, and the Infineon CYW20819 silicon device. 

The CYBT-213043-02 supports a number of peripheral functions (ADC, PWM), as well as multiple serial communication protocols (UART, SPI, I[2] C, I[2] S/PCM). The CYBT-213043-02 includes a royalty-free stack compatible with Bluetooth® 5.0 in a 12.0 × 16.61 × 1.70 mm module form-factor. 

The CYBT-213043-02 includes an integrated PCB trace antenna, is qualified by Bluetooth® SIG, and includes regulatory certification approval for FCC, ISED, MIC, and CE. 

## **Features** 

- Module description 

- Module size: 12.00 mm × 16.61 mm × 1.70 mm 

- Complies with Bluetooth® Core Specification version 5.0 and includes support for BR, EDR 2/3 Mbps, eSCO, Bluetooth® LE, LE 2 Mbps, as well as Bluetooth® Mesh. 

- QDID: **154138** 

- Declaration ID: **D043205** 

- Certified to FCC, ISED, MIC, and CE standards 

- 256-KB on-chip Flash, 176-KB on-chip RAM 

- Industrial temperature range: –30°C to +85°C 

- Integrated Arm® Cortex®-M4 microprocessor core with floating point unit (FPU) 

- RF characteristics 

- Maximum TX output power: +4.0 dBm 

- Bluetooth® LE RX Receive Sensitivity: –95.0 dBm 

- Power consumption 

- TX current consumption 

- Bluetooth® LE silicon: 5.8 mA (radio only, 4 dBm) 

- RX current consumption 

- Bluetooth® silicon: 5.9 mA (radio only) 

- Infineon CYW20819 silicon low power mode support 

- PDS: 16.5 µA with 176 KB RAM retention 

- ePDS: 8.7 µA 

- HIDOFF (wake on external or timed interrupt): 1.75 µA 

- Functional capabilities 

- Up to 22 GPIOs 

- I[2] C, I2S, UART, and PCM interfaces 

- Two Quad-SPI interfaces 

- Auxiliary ADC with up to 15 analog channels 

- Programmable key scan 20 × 8 matrix 

- General-purpose timers and six PWMs 

- Real-time clock (RTC) and watchdog timers (WDT) 

- Bluetooth® Basic Rate (BR) and Enhanced Data Rate (EDR) support 

- Bluetooth® LE protocol stack supporting generic access profile (GAP) Central, Peripheral, Observer, or Broadcaster roles 

Please read the Important Notice and Warnings at the end of this document 

Datasheet www.infineon.com 

002-26540 Rev. *E 

2024-05-03 

page 1 

**AIROC™ Bluetooth® & Bluetooth® LE module** 

Benefits 

## **Benefits** 

CYBT-213043-02 is fully integrated and certified solution that provides all necessary components required to operate Bluetooth® communication standards. 

- Proven hardware design ready to use 

- Ultra-flexible supermux I/O design allows maximum flexibility for GPIO function assignment 

- Over-the-air update capable for development or field updates 

- Bluetooth® SIG qualified 

- ModusToolbox™ provides an easy-to-use integrated design environment (IDE) to configure, develop, program, and test your Bluetooth® application 

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**AIROC™ Bluetooth® & Bluetooth® LE module** 

Table of contents 

## **Table of contents** 

**General description ...........................................................................................................................1 Features ...........................................................................................................................................1 Benefits............................................................................................................................................2 Table of contents...............................................................................................................................3 1 More information............................................................................................................................5** 1.1 References...............................................................................................................................................................5 1.2 Development environments...................................................................................................................................5 1.2.1 ModusToolbox™ Integrated Development Environment (IDE)..........................................................................5 1.3 Technical support...................................................................................................................................................5 **2 Overview .......................................................................................................................................6** 2.1 Functional block diagram.......................................................................................................................................6 2.2 Module description.................................................................................................................................................7 2.2.1 Module dimensions and drawing........................................................................................................................7 **3 Pad connection interface.................................................................................................................9 4 Recommended Host PCB layout .....................................................................................................11 5 Module connections ......................................................................................................................14 6 Connections and optional external components..............................................................................18** 6.1 Power connections (VDD).....................................................................................................................................18 6.2 External Reset (XRES)............................................................................................................................................18 6.3 HCI UART connections..........................................................................................................................................18 6.4 External component recommendation ...............................................................................................................19 6.4.1 Power supply circuitry.......................................................................................................................................19 **7 Critical components list.................................................................................................................20 8 Antenna design.............................................................................................................................21 9 Bluetooth® Baseband Core.............................................................................................................22 10 Power Management Unit .............................................................................................................23 11 Integrated radio transceiver ........................................................................................................24** 11.1 Transmitter path.................................................................................................................................................24 11.1.1 Digital modulator.............................................................................................................................................24 11.1.2 Power amplifier................................................................................................................................................24 11.2 Receiver path ......................................................................................................................................................24 11.2.1 Digital demodulator and bit synchronizer......................................................................................................24 11.2.2 Receiver signal strength indicator ..................................................................................................................24 11.3 Local oscillator....................................................................................................................................................24 **12 Microcontroller unit ....................................................................................................................25** 12.1 External reset ......................................................................................................................................................25 12.2 32-kHz crystal oscillator .....................................................................................................................................26 12.3 Power Modes.......................................................................................................................................................27 12.4 Firmware .............................................................................................................................................................27 12.5 Watchdog ............................................................................................................................................................27 12.6 Lockout functionality..........................................................................................................................................27 12.7 True Random Number Generator ......................................................................................................................27 **13 Peripherals and Communication interfaces...................................................................................28** 13.1 I2C........................................................................................................................................................................28 13.2 HCI UART interface..............................................................................................................................................28 13.3 Peripheral UART interface..................................................................................................................................28 13.4 Serial Peripheral interface..................................................................................................................................28 13.5 ADC Port ..............................................................................................................................................................29 13.6 GPIO port.............................................................................................................................................................29 13.7 PWM.....................................................................................................................................................................30 13.8 PDM microphone ................................................................................................................................................31 

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## **AIROC™ Bluetooth® & Bluetooth® LE module** 

## Table of contents 

13.9 I2S interface ........................................................................................................................................................31 13.10 PCM interface ....................................................................................................................................................32 13.10.1 Slot mapping..................................................................................................................................................32 13.10.2 Frame synchronization..................................................................................................................................32 13.10.3 Data formatting..............................................................................................................................................32 **14 Electrical characteristics .............................................................................................................33** 14.1 Current consumption .........................................................................................................................................34 14.2 Silicon Core Buck Regulator...............................................................................................................................34 14.3 Digital LDO...........................................................................................................................................................35 14.4 RF LDO .................................................................................................................................................................36 14.5 Digital I/O characteristics ...................................................................................................................................37 14.6 ADC characteristics.............................................................................................................................................38 **15 Chipset RF specifications .............................................................................................................40 16 Timing and AC characteristics ......................................................................................................43** 16.1 UART Timing........................................................................................................................................................43 16.2 SPI Timing ...........................................................................................................................................................44 16.3 I2C Compatible Interface Timing .......................................................................................................................46 16.4 I2S Interface Timing............................................................................................................................................47 **17 Environmental specifications.......................................................................................................49** 17.1 Environmental compliance................................................................................................................................49 17.2 RF certification....................................................................................................................................................49 17.3 Safety certification..............................................................................................................................................49 17.4 Environmental conditions..................................................................................................................................49 17.5 ESD and EMI protection......................................................................................................................................49 **18 Regulatory information ...............................................................................................................50** 18.1 FCC.......................................................................................................................................................................50 18.2 ISED......................................................................................................................................................................51 18.3 European Declaration of Conformity.................................................................................................................52 18.4 MIC Japan............................................................................................................................................................53 **19 Packaging ..................................................................................................................................54 20 Ordering information ..................................................................................................................56 21 Acronyms ...................................................................................................................................57 22 Document conventions................................................................................................................58** 22.1 Units of measure.................................................................................................................................................58 **Revision history ..............................................................................................................................59** 

Datasheet 

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**AIROC™ Bluetooth® & Bluetooth® LE module** 

More information 

## **1 More information** 

Infineon provides a wealth of data at **www.infineon.com** to help you to select the right module for your design, and to help you to quickly and effectively integrate the module into your design. 

## **1.1 References** 

- Overview: **AIROC™ Bluetooth® & Multiprotocol** 

- Development Kits: 

- **CYBT-213043-EVAL** , CYBT-213043-02 Evaluation Board 

- **CYBT-213043-MESH** , Mesh Evaluation Kit 

- **CYW920819Q40EVB-01** , Evaluation Kit for CYW20819 silicon device 

- Test and Debug Tools: 

- **CYSmart** , Bluetooth® LE Test and Debug Tool (Windows) 

- **CYSmart Mobile** , Bluetooth® LE Test and Debug Tool (Android/iOS Mobile App) 

- Knowledge Base Article 

- **KBA97095** - AIROC™ Bluetooth® LE module Placement 

- **RF Regulatory Certifications for CYBT-213043-02 EZ-BT WICED Modules** 

- **KBA213976** - FAQ for Bluetooth® LE and Regulatory Certifications with AIROC™ Bluetooth® LE modules 

- **KBA210802** - Queries on Bluetooth® LE Qualification and Declaration Processes 

- **KBA218122** - 3D Model Files for AIROC™ Bluetooth® & Bluetooth® LE modules 

- **KBA223428** - Programming an AIROC™ Bluetooth® LE module 

- **KBA225450** - Putting 2073x, 2070x, and 20719 Based Devices or Modules in HCI Mode 

## **1.2 Development environments** 

## **1.2.1 ModusToolbox™ Integrated Development Environment (IDE)** 

**ModusToolbox™** simplifies development for IoT designers. It delivers easy-to-use tools and a familiar microcontroller (MCU) integrated development environment (IDE) for Windows®, macOS®, and Linux®. It provides a sophisticated environment for system setup, wireless connectivity libraries, power analysis, application-specific configurators for Bluetooth® Low Energy, CAPSENSE™, as well as other peripherals. 

In addition, code examples, documentation, technical support and community forums are available to help your IoT development process along. These tools and features enable an IoT designer to develop innovative IoT applications efficiently and with ease. 

## **1.3 Technical support** 

- **Infineon Community:** Whether you are a customer, partner, or a developer interested in the latest innovations, the Infineon Developer Community offers you a place to learn, share, and engage with both Infineon experts and other embedded engineers around the world. 

- Visit our **support** page or contact a **local sales representatives** . If you are in the United States, you can talk to our technical support team by calling our toll-free number: +1-800-541-4736. Select option 2 at the prompt. 

Datasheet 

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**AIROC™ Bluetooth® & Bluetooth® LE module** 

Overview 

## **2 Overview** 

## **2.1 Functional block diagram** 

**Figure 1** illustrates the CYBT-213043-02 functional block diagram. 

**Figure 1 Functional block diagram** 

**Note:** General Purpose Input/Output pins shown in **Figure 1** are configurable to any specified input or output function in the SuperMux table detailed in **Table 5** in the **“Module connections”** on page 14. 

**Note:** The total number of GPIOs available on the CYBT-213043-02 is 22. Peripheral and/or Serial communication functions are implemented using these 22 GPIOs. 

Datasheet 

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**AIROC™ Bluetooth® & Bluetooth® LE module** 

Overview 

## **2.2 Module description** 

The CYBT-213043-02 module is a complete module designed to be soldered to the applications main board. 

## **2.2.1 Module dimensions and drawing** 

Infineon reserves the right to select components from various vendors to achieve the Bluetooth® module functionality. Such selections will still guarantee that all mechanical specifications and module certifications are maintained. The CYBT-213043-02 will be held within the physical dimensions shown in the mechanical drawings in **Figure 2** . All dimensions are in millimeters (mm). 

## **Table 1 Module design dimensions** 

|**Table 1**<br>**Module design dimensions**||||
|---|---|---|---|
|**Dimension item**|||**Specification**|
|Module dimensions<br>Antenna location dimensions|Length (X)<br>Width (Y)<br>Length (X)<br>Width (Y)<br>~~OO~~<br>~~OO~~<br>~~__~~||12.00 ± 0.15 mm<br>16.61 ± 0.15 mm<br>12.00 mm<br>4.55 mm|
|PCB thickness||Height (H)<br>~~—~~|0.50 ± 0.10 mm|
|Shield height||Height (H)<br>~~OO~~|1.20 mm typical|
|Maximum component height||Height (H)<br>~~oo~~|0.80 mm typical|
|Total module thickness (bottom of module to top of shield)||Height (H)|1.70 mm typical|



See **Figure 2** for the mechanical reference drawing for CYBT-213043-02. 

Datasheet 

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**AIROC™ Bluetooth® & Bluetooth® LE module** 

## Overview 

## **Side View** 

**Side View** 

## **Top View (Seen from Top)** 

**==> picture [162 x 11] intentionally omitted <==**

**----- Start of picture text -----**<br>
Bottom View (Seen from Bottom)<br>**----- End of picture text -----**<br>


**Figure 2 Module mechanical drawing** 

## **Note** 

1. No metal should be located beneath or above the antenna area. Only bare PCB material should be located beneath the antenna area. For more information on the recommended host PCB layout, see **“Recommended Host PCB layout”** on page 11. 

Datasheet 

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**AIROC™ Bluetooth® & Bluetooth® LE module** 

Pad connection interface 

## **3 Pad connection interface** 

As shown in the bottom view of **Figure 2** , the CYBT-213043-02 has 28 connections to a host board via solder pads (SP). **Table 2** and **Figure 3** detail the solder pad length, width, and pitch dimensions of the CYBT-213043-02 module. 

## **Table 2 Connection description** 

|**Connections**|**Connection type**|**Pad length dimension**|**Pad width dimension**|
|---|---|---|---|
|35|Solder Pad|1.02 mm|0.61 mm|



**Solder Pad connections (Seen from Bottom)** 

## **Figure 3 Solder Pad dimensions (Seen from Bottom)** 

To maximize RF performance, the host layout should follow these recommendations: 

1. Antenna Area Keepout: The host board directly below the antenna area of the Infineon module (see **Figure 2** ) must contain no ground or signal traces. This keep out area requirement applies to all layers of the host board. 

2. Module Placement: The ideal placement of the Infineon Bluetooth® module is in a corner of the host board with the PCB antenna located at the far corner. This placement minimizes the additional recommended keep out area stated in item 3 below. Refer to **AN96841** for module placement best practices. 

3. Optional Keepout: To maximize RF performance, the area immediately around the Infineon Bluetooth® module PCB antenna may contain an additional keep out area, where there are no grounding or signal traces. The keep out area applies to all layers of the host board. The recommended dimensions of the host PCB keep out area are shown in **Figure 4** (dimensions are in mm). 

Datasheet 

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**AIROC™ Bluetooth® & Bluetooth® LE module** 

Pad connection interface 

**Optional Host PCB Keep Out Area around PCB Antenna (Seen from Bottom)** 

**Figure 4 Optional Additional Host PCB Keep Out Area around the CYBT-213043-02 PCB Antenna** 

Datasheet 

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**AIROC™ Bluetooth® & Bluetooth® LE module** 

Recommended Host PCB layout 

## **4 Recommended Host PCB layout** 

**Figure 5** , **Figure 6** , **Figure 7** , and **Table 3** provide details that can be used for the recommended host PCB layout pattern for the CYBT-213043-02. Dimensions are in millimeters unless otherwise noted. Pad length of 1.27 mm (0.633 mm from center of the pad on either side) shown in **Figure 7** is the minimum recommended host pad length. The host PCB layout pattern can be completed using either **Figure 5** , **Figure 6** , or **Figure 7** . It is not necessary to use all figures to complete the host PCB layout pattern. 

**Top View (Seen on Host PCB)** 

## **Figure 5 CYBT-213043-02 Host layout (Dimensioned)** 

**Top View (Seen on Host PCB)** 

## **Figure 6 CYBT-213043-02 Host layout (Relative to Origin)** 

Datasheet 

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**AIROC™ Bluetooth® & Bluetooth® LE module** 

Recommended Host PCB layout 

**Table 3** provides the center location for each solder pad on the CYBT-213043-02. All dimensions are referenced to the center of the solder pad. Refer to **Figure 7** for the location of each module solder pad. 

|**Solder Pad (Center of Pad)**|**Location (X, Y) from Origin (mm)**<br>~~OO~~|**Dimension from Origin (mils)**|
|---|---|---|
|1|(0.38, 4.85)<br>~~OO~~<br>~~OO~~|(14.96, 190.94)|
|2|(0.38, 5.75)<br>~~OO~~<br>~~OO~~|(14.96, 226.38)|
|3|(0.38, 6.65)<br>~~OO~~|(14.96, 261.81)|
|4|(0.38, 7.56)<br>~~OO~~<br>~~OO~~|(14.96, 297.64)|
|5|(0.38, 8.46)<br>~~OO~~<br>~~OO~~|(14.96, 333.07)|
|6|(0.38, 9.36)<br>~~OO~~<br>~~OO~~|(14.96, 368.50)|
|7|(0.38, 10.26)<br>~~OO~~|(14.96, 403.94)|
|8|(0.38, 11.16)<br>~~OO~~|(14.96, 439.37)|
|9|(0.38, 12.07)<br>~~OO~~<br>~~OO~~|(14.96, 475.20)|
|10|(0.38, 12.97)<br>~~OO~~<br>~~OO~~|(14.96, 510.63)|
|11|(0.38, 13.87)<br>~~OO~~|(14.96, 546.06)|
|12|(0,38, 14.77)<br>~~OO~~|(14.96, 581.49)|
|13|(1.49, 16.23)<br>~~OO~~<br>~~OO~~|(58.66, 638.98)|
|14|(2.39, 16.23)<br>~~OO~~<br>~~OO~~|(94.09, 638.98)|
|15|(3.30, 16.23)<br>~~OO~~|(129.92, 638.98)|
|16|(4.20, 16.23)<br>~~OO~~|(165.35, 638.98)|
|17|(5.10, 16.23)<br>~~OO~~<br>~~OO~~|(200.79, 638.98)|
|18|(6.00, 16.23)<br>~~OO~~<br>~~OO~~|(236.22, 638.98)|
|19|(6.90, 16.23)<br>~~OO~~|(271.65, 638.98)|
|20|(7.80, 16.23)<br>~~OO~~|(307.09, 638.98)|
|21|(8.71, 16.23)<br>~~OO~~|(342.91, 638.98)|
|22|(9.61, 16.23)<br>~~OO~~<br>~~OO~~|(378.35, 638.98)|
|23|(10.51, 16.23)<br>~~OO~~|(413.78, 638.98)|
|24|(11.62, 14.47)<br>~~OO~~|(457.48, 581.49)|
|25|(11.62, 13.87)<br>~~OO~~|(457.48, 546.06)|
|26|(11.62, 12.97)<br>~~OO~~|(457.48, 510.63)|
|27|(11.62, 12.07)<br>~~OO~~<br>~~OO~~|(457.48, 475.20)|
|28|(11.62, 11.16)<br>~~OO~~|(457.48, 439.37)|
|29|(11.62, 10.26)<br>~~OO~~|(457.48, 403.94)|
|30|(11.62, 9.36)<br>~~OO~~|(457.48, 368.50)|
|31|(11.62, 8.46)<br>~~OO~~|(457.48, 333.07)|
|32|(11.62, 7.56)<br>~~OO~~|(457.48, 297.64)|
|33|(11.62, 6.65)<br>~~OO~~|(457.48, 261.81)|
|34|(11.62, 5.75)<br>~~OO~~|(457.48, 226.38)|
|35|(11.62, 4.85)<br>~~OO~~|(457.48, 190.94)|



Datasheet 

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**AIROC™ Bluetooth® & Bluetooth® LE module** 

Recommended Host PCB layout 

**Top View (Seen on Host PCB)** 

**Figure 7 Solder Pad Reference location** 

Datasheet 

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**AIROC™ Bluetooth® & Bluetooth® LE module** 

Module connections 

## **5 Module connections** 

**Table 4** details the solder pad connection definitions and available functions for each connection pad. The GPIO connections available on the CYBT-213043-02 can be configured to any of the input or output functions listed in **Table 5** . **Table 4** specifies any function that is required to be used on a specific solder pad, and also identifies SuperMux capable GPIOs that can be configured using the ModusToolbox™ device configurator. 

**Table 4 CYBT-213043-02 Solder Pad Connection definitions** 

|**Table 4**|**CYBT-213043-02 Solder Pad Connection definitions**|**CYBT-213043-02 Solder Pad Connection definitions**<br>~~Ss~~|**CYBT-213043-02 Solder Pad Connection definitions**|**CYBT-213043-02 Solder Pad Connection definitions**|||
|---|---|---|---|---|---|---|
|**Pad**|**Pad name**<br>~~es~~|**Silicon Pin name**<br>~~es~~<br>~~Ss~~|**XTALI/O**<br>~~es~~|**ADC**<br>~~es~~|**GPIO**<br>~~es~~|**SuperMux capable**[2]|
|1|GND<br>~~es~~<br>~~es~~|GND<br>~~es~~<br>~~Ss~~<br>~~es~~|Ground<br>~~es~~||||
|2|VDD<br>~~es~~<br>~~es~~|VDDIO<br>~~es~~<br>~~es~~|Power Supply Input (1.71 V ~ 3.3 V)||||
|3|XRES<br>~~es~~|RST_N<br>~~es~~<br>~~es~~|External Reset (Active Low)||||
|4|P29<br>~~es~~<br>~~es~~|P29<br>~~es~~<br>~~es~~<br>~~es~~|–<br>~~es~~|IN10<br>~~es~~|✓<br>~~es~~|✓ see**Table 5**|
|5|P32<br>~~es~~<br>~~es~~|P32<br>~~es~~<br>~~es~~<br>~~es~~<br>~~es~~|–<br>~~es~~<br>~~es~~|IN7<br>~~es~~<br>~~es~~|✓<br>~~es~~<br>~~es~~|✓ see**Table 5**|
|6|P27<br>~~es~~<br>~~es~~|P27<br>~~es~~<br>~~es~~<br>~~es~~<br>~~es~~|–<br>~~es~~<br>~~es~~|–<br>~~es~~<br>~~es~~|✓<br>~~es~~<br>~~es~~|✓ see**Table 5**|
|7|P37<br>~~es~~|P37<br>~~es~~<br>~~es~~<br>~~es~~<br>~~es~~|–<br>~~es~~|IN2<br>~~es~~|✓<br>~~es~~|✓ see**Table 5**|
|8|P28<br>~~es~~|P28<br>~~es~~<br>~~es~~<br>~~es~~|–<br>~~es~~|IN11<br>~~es~~|✓<br>~~es~~|✓ see**Table 5**|
|9|P0<br>~~es~~<br>~~es~~|P0<br>~~es~~<br>~~es~~<br>~~es~~<br>~~es~~|–<br>~~es~~<br>~~es~~|IN29<br>~~es~~<br>~~es~~|✓<br>~~es~~<br>~~es~~|✓ see**Table 5**|
|10|P1<br>~~es~~<br>~~es~~|P1<br>~~es~~<br>~~es~~<br>~~es~~<br>~~es~~|–<br>~~es~~<br>~~es~~|IN28<br>~~es~~<br>~~es~~|✓<br>~~es~~<br>~~es~~|✓ see**Table 5**|
|11|P10<br>~~es~~|P10<br>~~es~~<br>~~es~~<br>~~es~~<br>~~es~~|–<br>~~es~~|IN25<br>~~es~~|✓<br>~~es~~|✓ see**Table 5**|
|12|P13<br>~~es~~|P13<br>~~es~~<br>~~es~~<br>~~es~~|–<br>~~es~~|IN22<br>~~es~~|✓<br>~~es~~|✓ see**Table 5**|
|13|GND<br>~~es~~<br>~~es~~|GND<br>~~es~~<br>~~es~~<br>~~es~~<br>~~es~~|Ground<br>~~es~~||||
|14|P12<br>~~es~~<br>~~es~~|P12<br>~~es~~<br>~~es~~<br>~~es~~<br>~~es~~|–<br>~~es~~|IN23<br>~~es~~|✓<br>~~es~~|✓ see**Table 5**|
|15|P11<br>~~es~~|P11<br>~~es~~<br>~~es~~<br>~~es~~<br>~~es~~|–<br>~~es~~|IN24<br>~~es~~|✓<br>~~es~~|✓ see**Table 5**|
|16|P9<br>~~es~~|P9<br>~~es~~<br>~~es~~<br>~~es~~|–<br>~~es~~|IN26<br>~~es~~|✓<br>~~es~~|✓ see**Table 5**|
|17|P14<br>~~es~~|P14<br>~~es~~<br>~~es~~<br>~~es~~|–<br>~~es~~|IN21<br>~~es~~|✓<br>~~es~~|✓ see**Table 5**|
|18|P17<br>~~es~~<br>~~es~~|P17<br>~~es~~<br>~~es~~<br>~~es~~<br>~~es~~|–<br>~~es~~<br>~~es~~|IN18<br>~~es~~<br>~~es~~|✓<br>~~es~~<br>~~es~~|✓ see**Table 5**|
|19|P5<br>~~es~~|P5<br>~~es~~<br>~~es~~<br>~~es~~<br>~~es~~|–<br>~~es~~|–<br>~~es~~|✓<br>~~es~~|✓ see**Table 5**|
|20|P6<br>~~es~~|P6<br>~~es~~<br>~~es~~<br>~~es~~|–<br>~~es~~|–<br>~~es~~|✓<br>~~es~~|✓ see**Table 5**|
|21|P4<br>~~es~~|P4<br>~~es~~<br>~~es~~<br>~~es~~|–<br>~~es~~|–<br>~~es~~|✓<br>~~es~~|✓ see**Table 5**|
|22|P2<br>~~es~~<br>~~es~~|P2<br>~~es~~<br>~~es~~<br>~~es~~<br>~~es~~|–<br>~~es~~<br>~~es~~|–<br>~~es~~<br>~~es~~|✓<br>~~es~~<br>~~es~~|✓ see**Table 5**|
|23|P3<br>~~es~~|P3<br>~~es~~<br>~~es~~<br>~~es~~|–<br>~~es~~|–<br>~~es~~|✓<br>~~es~~|✓ see**Table 5**|
|24|XTALI_32K|XTALI_32K<br>~~es~~|External<br>Oscillator<br>Input<br>(32 kHz)|–|–|–|
|25|XTALO_32K|XTALO_32K<br>~~es~~|External<br>Oscillator<br>Output<br>(32 kHz)|–|–|–|
|26|P15<br>~~es~~|P15<br>~~es~~<br>~~es~~<br>~~es~~|–<br>~~es~~|IN20<br>~~es~~|✓<br>~~es~~|✓ see**Table 5**|
|27|P8<br>~~es~~|P8<br>~~es~~<br>~~es~~<br>~~es~~|–<br>~~es~~|IN27<br>~~es~~|✓<br>~~es~~|✓ see**Table 5**|



## **Note** 

2. The CYBT-213043-02 can configure GPIO connections to any Input/Output function described in **Table 5** using the ModusToolbox™ Device Configurator. 

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## Module connections 

|**Pad name**<br>~~a~~|**Silicon Pin name**|**XTALI/O**|**ADC**|**GPIO**|
|---|---|---|---|---|
|UART_CTS_N<br>~~a~~<br>~~ee~~|UART_CTS_N<br>~~ee~~||||
|UART_RTS_N<br>~~ee~~<br>~~ee~~|UART_RTS_N<br>~~ee~~<br>~~ee~~||||
|UART_TXD<br>~~ee~~|UART_TXD<br>~~ee~~||||
|UART_RXD<br>~~ee~~<br>~~ee~~<br>~~ee~~|UART_RXD<br>~~ee~~<br>~~ee~~<br>~~eee~~||||
|HOST_WAKE<br>~~ee~~<br>~~ee~~|HOST_WAKE<br>~~ee~~<br>~~eee~~||||
|DEV_WAKE<br>~~ee ~~<br>~~PL~~<br>~~le~~|DEV_WAKE<br> ~~eee~~<br>~~PL~~||||
|P26<br>~~le~~|P26|–|–|✓|
|GND<br>~~le~~<br>~~ee~~|GND<br>~~ee~~||||



## **Note** 

2. The CYBT-213043-02 can configure GPIO connections to any Input/Output function described in **Table 5** using the ModusToolbox™ Device Configurator. 

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## Module connections 

**Table 5** details the available Input and Output functions that are configurable to any solder pad in **Table 4** that are marked as SuperMux capable. 

|**Function**|**Input or Output**|**Function type**|**GPIOs required**|**Function Connection description**|
|---|---|---|---|---|
|SPI 1|Input/Output|Serial Communi-<br>cation<br>(Master or Slave)|4 ~ 7|SPI 1 Clock|
|||||SPI 1 Chip Select|
|||||SPI 1 MOSI|
|||||SPI 1 MISO|
|||||SPI 1 I/O 2 (Quad SPI)|
|||||SPI 1 I/O 3 (Quad SPI)|
|||||SPI 1 Interrupt|
|SPI 2|Input/Output|Serial Communi-<br>cation<br>(Master or Slave)|4 ~ 7|SPI 2 Clock|
|||||SPI 2 Chip Select|
|||||SPI 2 MOSI|
|||||SPI 2 MISO|
|||||SPI 2 I/O 2 (Quad SPI)|
|||||SPI 2 I/O 3 (Quad SPI)|
|||||SPI 2 Interrupt|
|PUART|Input<br>~~pp~~|Serial Communi-<br>cation Input<br>~~pp~~|4<br>~~pp~~|Peripheral UART RX|
|||||Peripheral UART CTS|
||Output<br>~~pp~~|Serial Communi-<br>cation Output<br>~~pp~~||Peripheral UART TX|
|||||Peripheral UART RTS|
|I2C|Input/Output<br>~~PP~~|Serial Communi-<br>cation<br>(Master or Slave)<br>~~PP~~|2<br>~~PP~~|I2C Clock|
|||||I2C Data|
|PCM In|Input|Audio Input<br>Communication|3|PCM Input|
|||||PCM Clock|
|||||PCM Sync|
|PCM Out|Output|Audio Output<br>Communication|3|PCM Output|
|||||PCM Clock|
|||||PCM Sync|
|I2S In|Input|Audio Input<br>Communication|3|I2S DI, Data Input|
|||||I2S WS, Word Select|
|||||I2S Clock|
|I2S Out|Output|Audio Output<br>Communication<br>~~ee~~|3|I2S DO, Data Output|
|||||I2S WS, Word Select|
|||||I2S Clock|
|PDM|Input<br>~~ee~~|Microphone<br>~~ee~~<br>~~ee~~|1 ~ 2<br>~~ee~~|PDM Input Channel 1|
|||||PDM Input Channel 2|



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## Module connections 

**Table 5 GPIO SuperMux Input and Output functions** (continued) 

|**Function**|**Input or Output**|**Function type**|**GPIOs required**|**Function Connection description**|
|---|---|---|---|---|
|PWM|Output|Pulse Width|1 ~ 6|PWM Channel 0|
|||Modulator||PWM Channel 1|
|||||PWM Channel 2|
|||||PWM Channel 3|
|||||PWM Channel 4|
|||||PWM Channel 5|



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Connections and optional external components 

## **6 Connections and optional external components** 

## **6.1 Power connections (VDD)** 

The CYBT-213043-02 contains one power supply connection, VDD. VDD accepts a supply input of 1.71 V to 3.3 V. **Table 12** provides this specification. The maximum power supply ripple for this power connection is 100 mV, as shown in **Table 12** . 

## **6.2 External Reset (XRES)** 

The CYBT-213043-02 has an integrated power-on reset circuit which completely resets all circuits to a known power-on state. This action can also be invoked by an external reset signal, forcing it into a power-on reset state. XRES is an active-low input signal on the CYBT-213043-02 module (solder pad 3). The CYBT-213043-02 does not require external pull-up resistors on the XRES input. Refer to **Figure 10** for Power On and XRES operation and timing requirements during power on events. 

## **6.3 HCI UART connections** 

The recommendations in this section apply to the HCI UART (Solder Pads 28, 29, 30, and 31). For full UART functionality, all UART signals must be connected to the Host device (CTS must be pulled high when power-on/reset). If full UART functionality is not being used, and only UART RXD and TXD are desired or capable, then the following connection considerations should be followed for UART RTS and CTS: 

- UART RTS: Must be left floating. 

- UART CTS: Must be pulled high when power-on/reset and be pulled low after application startup to bypass flow control and ensure that continuous data transfers are made from the host to the module. 

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Connections and optional external components 

## **6.4 External component recommendation** 

## **6.4.1 Power supply circuitry** 

It is not required to place any power supply decoupling or noise reduction circuitry on the host PCB. If desired, an external ferrite bead between the supply and the module connection can be included. The ferrite bead should be positioned as close as possible to the module pad connection. 

If used, the recommended ferrite bead value is 330  , 100MHz. (Murata BLM21PG331SN1D). **Figure 8** illustrates the CYBT-213043-02 schematic. 

**Figure 8 CYBT-213043-02 schematic diagram** 

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Critical components list 

## **7 Critical components list** 

**Table 6** details the critical components used in the CYBT-213043-02 module. 

|**Table 6**|**Critical component list**|**Critical component list**||
|---|---|---|---|
|**Component**||**Reference designator**|**Description**|
|Silicon||U1|62-pin QFN Bluetooth® Silicon Device - CYW20819|
|Crystal||Y1|24.000 MHz, 12 pF|



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Antenna design 

## **8 Antenna design** 

**Table 7** details the PCB trace antenna used in the CYBT-213043-02 module. 

## **Table 7** 

## **PCB Antenna specifications** 

|**Table 7**details the PCB trace antenna used in the CYBT-213043-02 module.<br>**Table 7**<br>**PCB Antenna specifications**|details the PCB trace antenna used in the CYBT-213043-02 module.|
|---|---|
|**Item**|**Description**|
|Frequency Range|2400–2500 MHz|
|Peak Gain|–0.5 dBi typical|
|Return Loss|10 dB minimum|



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Bluetooth® Baseband Core 

## **9 Bluetooth® Baseband Core** 

The Bluetooth® Baseband Core (BBC) implements all time-critical functions required for high-performance Bluetooth® operation. The BBC manages the buffering, segmentation, and routing of data for all connections. It prioritizes and schedules all RX/TX activities including adv, paging, scanning, and servicing of connections. In addition to these functions, it independently handles the host controller interface (HCI) including all commands, events, and data flowing over HCI. The core also handles symbol timing, forward error correction (FEC), header error control (HEC), cyclic redundancy check (CRC), authentication, data encryption/decryption, and data whitening/dewhitening. 

## **Table 8 Bluetooth® features** 

|**Table 8**<br>**Bluetooth® features**<br>**Bluetooth® versions**|||
|---|---|---|
|**Bluetooth® 1.0**|**Bluetooth® 1.2**<br>~~OO~~|**Bluetooth® 2.0**|
|Basic Rate|Interlaced Scans<br>~~OO~~<br>~~OO~~|EDR 2 Mbps and 3 Mbps|
|SCO|Adaptive Frequency Hopping<br>~~OO~~|–|
|Pagingand Inquiry|eSCO<br>~~OO~~|–|
|Page and Inquiry Scan|–<br>~~OO~~<br>~~OO~~|–|
|Sniff|–<br>~~OO~~<br>~~OO~~|–|
|**Bluetooth® 2.1**|**Bluetooth® 3.0**<br>~~OO~~|**Bluetooth® 4.0**|
|Secure Simple Pairing|Unicast Connectionless Data<br>~~OO~~|Bluetooth® Low Energy|
|Enhanced Inquiry Response|Enhanced Power Control<br>~~OO~~<br>~~OO~~|–|
|Sniff Subrating|eSCO<br>~~OO~~<br>~~OO~~|–|
|**Bluetooth® 4.1**|**Bluetooth® 4.2**<br>~~OO~~|**Bluetooth® 5.0**|
|Low Duty Cycle Advertising|Data Packet Length Extension<br>~~OO~~|LE 2 Mbps|
|Dual Mode|LE Secure Connection<br>~~OO~~<br>~~OO~~|Slot Availability Mask|
|LE Link Layer Topology|Link Layer Privacy<br>~~OO~~<br>~~OO~~|High Duty Cycle Advertising|



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Power Management Unit 

## **10 Power Management Unit** 

**Figure 9** shows the CYW20819 power management unit (PMU) block diagram. The CYW20819 includes an integrated buck regulator, a digital LDO for the digital core, and an RF LDO for the Radio. The PMU also includes a brownout detector which places the part in shutdown when input voltage is below a certain threshold. 

**Figure 9 Default Usage Mode** 

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Integrated radio transceiver 

## **11 Integrated radio transceiver** 

The CYBT-213043-02 has an integrated radio transceiver that has been designed to provide low power operation in the globally available 2.4 GHz unlicensed ISM band. 

## **11.1 Transmitter path** 

CYBT-213043-02 features a fully integrated transmitter. The baseband transmit data is GFSK modulated in the 2.4 GHz ISM band. 

## **11.1.1 Digital modulator** 

The digital modulator performs the data modulation and filtering required for the GFSK signal. The fully digital modulator minimizes any frequency drift or anomalies in the modulation characteristics of the transmitted signal. 

## **11.1.2 Power amplifier** 

The CYBT-213043-02 has an integrated power amplifier (PA) that can transmit up to +4 dBm for class 2 operation. 

## **11.2 Receiver path** 

The receiver path uses a low IF scheme to downconvert the received signal for demodulation in the digital demodulator and bit synchronizer. The receiver path provides a high degree of linearity, and an extended dynamic range to ensure reliable operation in the noisy 2.4 GHz ISM band. The front-end topology, which has built-in out-of-band attenuation, enables the CYBT-213043-02 to be used in most applications without off-chip filtering. 

## **11.2.1 Digital demodulator and bit synchronizer** 

The digital demodulator and bit synchronizer take the low-IF received signal and perform an optimal frequency tracking and bit synchronization algorithm. 

## **11.2.2 Receiver signal strength indicator** 

The radio portion of the CYBT-213043-02 provides a receiver signal strength indicator (RSSI) to the baseband. This enables the controller to take part in a Bluetooth® power-controlled link by providing a metric of its own receiver signal strength to determine whether the transmitter should increase or decrease its output power. 

## **11.3 Local oscillator** 

The local oscillator (LO) provides fast frequency hopping (1600 hops/second) across the band. The CYBT-213043-02 uses an internal loop filter. 

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Microcontroller unit 

## **12 Microcontroller unit** 

The CYBT-213043-02 includes a Cortex®-M4 processor with 1 MB of program ROM, 176 KB of RAM, and 256 KB of flash. The CM4 has a maximum speed of 96 MHz. The 256 KB of flash is supported by an 8 KB cache allowing direct code execution from flash at near maximum speed and low power consumption. 

The CM4 runs all the BT layers as well as application code. The ROM includes LMAC, HCI, L2CAP, GATT, as well as other stack layers freeing up most of the flash for application usage. A standard serial wire debug (SWD) interface provides debugging support. 

## **12.1 External reset** 

**Figure 10** shows power on and reset timing of the CYBT-213043-02. After VBAT is applied and reset is inactive, the internal buck turns on, followed by the RF and Digital LDOs. Once the LDO outputs have stabilized, the PMU allows the digital core to come out of reset. As shown in the figure, external reset can be applied at any time subsequent to power up. 

**Figure 10 Reset Timing** 

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Microcontroller unit 

## **12.2 32-kHz crystal oscillator** 

The CYBT-213043-02 includes connections for an external 32-kHz oscillator to provide accurate timing during low power operations. **Figure 11** shows the 32-kHz XTAL oscillator with external components and **Table 9** lists the oscillator characteristics. This oscillator can be operated with a 32 kHz or 32.768-kHz crystal oscillator or be driven with a clock input at similar frequency. The XTAL must have an accuracy of ±250 ppm or better per the BT spec over temperature and including aging. The external component values should be: R1 = 10 M  and C1 = C2 = 6 pF. The values of C1 and C2 are used to fine-tune the oscillator. A XTAL meeting the C1 and C2 values should be used. 

## **Figure 11 32 kHz Oscillator block diagram** 

## **Table 9 XTAL Oscillator characteristics** 

|**Parameter**|**Symbol**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|Output frequency|Foscout|–|–|32.768|–|kHz|
|Frequency tolerance|–|Over temperature and aging|–|–|250|ppm|
|XTAL drive level|Pdrv|For crystal selection|–|–|0.5|µW|
|XTAL series resistance|Rseries|For crystal selection|–|–|70|k|
|XTAL shunt capacitance|Cshunt|For crystal selection|–|–|2.2|pF|
|Load capacitance|Cl|For crystal selection|–|6|–|pF|



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Microcontroller unit 

## **12.3** 

## **Power Modes** 

The CYBT-213043-02 support the following HW power modes are supported: 

- **Active mode** - Normal operating mode in which all peripherals are available and the CPU is active. 

- **Idle mode** - CPU is paused. 

- **Sleep mode** - All system clocks are idle except for the LPO. The device can wake up either after a programmed period of time has expired or if an external event is received via one of the GPIOs. In Sleep mode, the CPU is in WFI (wait for interrupt) and the HCLK is not running. The PMU determines if the other clocks can be turned off and does accordingly. The state of the device is retained, the internal LDOs run at a lower voltage (voltage is managed by the PMU), and SRAM is retained. 

- **Power Down Sleep (PDS) mode** - Radio powered down and digital core mostly powered down except for RAM, registers, and some core logic. CYBT-213043-02 can wake up either after a programmed period of time has expired or if an external event is received via one of the GPIO. 

- **Extended PDS (ePDS)** - This is an extension of PDS Mode. In this mode, only the main RAM and ePDS control circuitry retains power. As in other modes, the CYBT-213043-02 can wake up either after a programmed period or upon receiving an external event. 

- **HID-OFF (Deep Sleep) mode** - Core, radio, and regulators powered down. Only the GPIO domain is powered. In this mode, the CYBT-213043-02 can be woken up either by an external event on one of the GPIOs or after a programmed period of time has expired. The lowest power option for HID-Off mode is to wake by external event, allowing all clocking sources to remain off. If a timed wake HID-Off state is desired, this is accomplished by powering the external or internal LPO. Current consumption will increase slightly in timed wake HID-Off mode to account for the LPO power. After wakeup, the part will go through full FW initialization although it will retain enough information to determine that it came out of HID-Off and the event that caused the wake up. 

Transition between power modes is handled by the on-chip firmware with host/application involvement. In general, ePDS is the most power-efficient mode for active use cases. HID-Off is preferable for non-connectable beacon use cases (long advertisement intervals). 

## **12.4** 

## **Firmware** 

The CYBT-213043-02 ROM firmware runs on a real time operating system and handles the programming and configuration of all on-chip hardware functions as well as the BT/LE baseband, LM, HCI, GATT, ATT, L2CAP, and SDP layers. The ROM also includes drivers for on-chip peripherals as well as handling on-chip power management functions including transitions between different power modes. The ROM also supports OTA firmware update. 

The CYBT-213043-02 is fully supported by the Infineon ModusToolbox™ IDE. ModusToolbox™ releases provide latest ROM patches, drivers, and sample applications allowing customized applications using the CYBT-213043-02 to be built quickly and efficiently. 

## **12.5 Watchdog** 

CYBT-213043-02 includes an onboard watchdog with a period of approximately 4 seconds. The watchdog generates an interrupt to the Firmware after 2 seconds of inactivity and resets the device after 4 seconds. 

## **12.6 Lockout functionality** 

The CYBT-213043-02 powers up with SWD access to flash and RAM is disabled. After reset, FW checks OCF for the presence of a security lockout field. If present, FW leaves SWD Flash and RAM access disabled and also blocks any HCI commands from reading the raw contents of the RAM or Flash. This provides an effective way of protection against tampering, dumping, probing, or reverse engineering of the user application stored in the on-chip flash. The only firmware upgrade path in this scenario is secure over-the-air (OTA) update. The security field can be programmed in the factory after all programming and testing has been done. 

## **12.7 True Random Number Generator** 

The CYBT-213043-02 includes a hardware TRNG (True Random Number Generator). Applications can access the random number generator via firmware APIs. 

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Peripherals and Communication interfaces 

## **13 Peripherals and Communication interfaces** 

## **13.1** 

## **I[2] C** 

The CYBT-213043-02 provides a 2-pin I[2] C master/slave interface to communicate with I[2] C compatible peripherals. The following transfer clock rates are supported: 

- 100 kHz 

- 400 kHz 

- 800 kHz (Not a standard I[2] C-compatible speed) 

- 1 MHz (Compatibility with high-speed I[2] C-compatible devices is not guaranteed) 

The I[2] C compatible master is capable for doing read, write, write followed by read, and read followed by write operations where read/write can be up to 64 bytes. 

SCL and SDA lines can be routed to any of the configurable GPIOs (as indicated in **Table 4** ), allowing for flexible system configuration. When used as SCL/SDA the GPIOs go into open drain mode and require an external pull-up for proper operation. I[2] C does not support multimaster capability or flexible wait-state insertion by either master or slave devices. 

## **13.2 HCI UART interface** 

CYBT-213043-02 includes a UART interface for factory programming as well as when operating as a BT HCI device in a system with an external host. The UART physical interface is a standard, 4-wire interface (RX, TX, RTS, and CTS) with adjustable baud rates from 115200 bps to 3 Mbps. Typical rates are 115200, 921600, 1500000, and 3,000,000 bps although intermediate speeds are also available. Support for changing the baud rate during normal HCI UART operation is included through a vendor-specific command. The CYBT-213043-02 UART operates correctly with the host UART as long as the combined baud rate error of the two devices is within ±5%. The UART interface CYBT-213043-02 has a 1040-byte receive FIFO and a 1040-byte transmit FIFO to support enhanced data rates. The interface supports the Bluetooth® UART HCI (H4) specification. The default baud rate for H4 is 115.2 kbaud. 

During HCI Mode, the DEV_WAKE signal can be programmed to wake up the CYBT-213043-02 or allow the CYBT-213043-02 to sleep when radio activities permit. The CYBT-213043-02 can also wake up the host as needed or allow the host to sleep via the HOST_WAKE signal. Combined, the two signals allow the host and the CYBT-213043-02 to optimize system power consumption by allowing independent control of low power modes. DEV_WAKE and HOST_WAKE signals can be enabled via a vendor-specific command. 

The FW UART driver allows applications to select different baud rates. 

## **13.3 Peripheral UART interface** 

The CYBT-213043-02 has a second UART that may be used to interface to peripherals. Functionally, the peripheral UART is the same as the HCI UART except for 256-byte TX/RX FIFOs. The peripheral UART is accessed through the I/O ports, which can be configured individually and separately for each functional pin. The CYBT-213043-02 can map the peripheral UART to any GPIO. 

## **13.4 Serial Peripheral interface** 

The CYBT-213043-02 has two independent SPI interfaces. Both interfaces support single, dual, and Quad Mode SPI operations. Either interface can be a master or a slave. Each interface has a 64-byte transmit buffer and a 64-byte receive buffer. To support more flexibility for user applications, the CYBT-213043-02 has optional I/O ports that can be configured individually and separately for each functional pin. SPI IO voltage depends on VDDO. 

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Peripherals and Communication interfaces 

## **13.5 ADC Port** 

The CYBT-213043-02 includes a  -  ADC designed for audio and DC measurements. The ADC can measure the voltage on 15 GPIOs (P0, P1, P8–P15, P17, P28, P29, P32, P37). When used for analog inputs, the GPIOs must be placed in digital input disable mode to disconnect the digital circuit from the pin and avoid leakage. The internal bandgap reference has ±5% accuracy without calibration. Calibration and digital correction schemes can be applied to reduce ADC absolute error and improve measurement accuracy in Direct Current (DC) Mode. 

The application can access the ADC through the ADC driver included in the firmware. The following CYBT-213043-02 module solder pads can be used as ADC inputs: 

- Pad 4: P29, ADC Input Channel 10 

- Pad 5: P32, ADC Input Channel 7 

- Pad 7: P37, ADC Input Channel 2 

- Pad 8: P28, ADC Input Channel 11 

- Pad 9: P0, ADC Input Channel 29 

- Pad 10: P13, ADC Input Channels 28 

- Pad 11: P10, ADC Input Channel 25 

- Pad 12: P13, ADC Input Channel 22 

- Pad 14: P12, ADC Input Channel 23 

- Pad 15: P11, ADC Input Channels 24 

- Pad 16: P9, ADC Input Channels 26 

- Pad 17: P14, ADC Input Channels 21 

- Pad 18: P17, ADC Input Channels 18 

- Pad 26: P15, ADC Input Channels 20 

- Pad 27: P8, ADC Input Channels 27 

## **13.6 GPIO port** 

The CYBT-213043-02 has a maximum of 22 GPIOs. All GPIOs support the following: 

- Programmable pull-up/down of approximately 45 k  . 

- Input disable mode, allowing pins to be left floating or analog signals connected without risk of leakage. 

- Source/sink 8 mA at 3.3 V and 4 mA at 1.8 V. 

- P26/P27/P28/P29 can sink/source 16 mA at 3.3 V and 8 mA at 1.8 V. 

Most peripheral functions can be assigned to any GPIO using the ModusToolbox™ Device Configurator. For details on the functions that are assignable via the ModusToolbox™ Device Configurator, refer to **Table 5** . The following list details the GPIOs that are available on the CYBT-213043-02 module: 

- P0–P6, P8–P15, P17, P26–P29, P32, and P37 

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Peripherals and Communication interfaces 

## **13.7 PWM** 

The CYBT-213043-02 has six internal PWMs, labeled PWM0–5. The PWM module consists of the following: 

- Each of the six PWM channels contains the following registers: 

- 16-bit initial value register (read/write) 

- 16-bit toggle register (read/write) 

- 16-bit PWM counter value register (read) 

- PWM configuration register shared among PWM0–5 (read/write). This 18-bit register is used: 

- To configure each PWM channel 

- To select the clock of each PWM channel 

- To change the phase of each PWM channel 

The application can access the PWM module through the FW driver. 

**Figure 12** shows the structure of one PWM channel. 

**Figure 12** 

**PWM block diagram** 

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Peripherals and Communication interfaces 

## **13.8 PDM microphone** 

The CYBT-213043-02 accepts a  -based one-bit pulse density modulation (PDM) input stream and outputs filtered samples at either 8 kHz or 16 kHz sampling rates. The PDM signal derives from an external kit that can process analog microphone signals and generate digital signals. The PDM input shares the filter path with the auxADC. Two types of data rates can be supported: 

- 8 kHz 

- 16 kHz 

The external digital microphone takes in a 2.4-MHz clock generated by the CYBT-213043-02 and outputs a PDM signal, which is registered by the PDM interface with either the rising or falling edge of the 2.4-MHz clock selectable through a programmable control bit. The design can accommodate two simultaneous PDM input channels, so stereo voice is possible. 

## **13.9** 

## **I[2] S interface** 

The CYBT-213043-02 supports a single I[2] S digital audio port, with both master and slave modes. The I[2] S signals are: 

- I[2] S Clock: I[2] S SCK 

- I[2] S Word Select: I[2] S WS 

- I[2] S Data Out: I[2] S DO 

- I[2] S Data In: I[2] S DI 

I[2] S SCK and I[2] S WS become outputs in master mode and inputs in slave mode, while I[2] S DO always stays as an output. The channel word length is 16 bits and the data is justified so that the MSN of the left-channel data is aligned with the MSB of the I[2] S bus, per I[2] S Specifications. The MSB of each data word is transmitted one bit clock cycle after the I[2] S WS transition, synchronous with the falling edge of bit clock. Left Channel data is transmitted when I[2] S WS is low, and right-channel data is transmitted when I[2] S WS is high. Data bits sent by the CYBT-213043-02 are synchronized with the falling edge of I[2] S SCK and should be sampled by the receiver on the rising edge of the I[2] S SCK. 

The clock rate in master mode is either one of the following: 

- 32 kHz × 32 bits per frame = 1024 kHz 

- 32 kHz × 50 bits per frame = 1600 kHz 

The master clock is generated from the reference clock using an N/M clock divider. In the slave mode, any clock rate is supported up to a maximum of 3.072 MHz. 

**Note:** The PCM interface shares HW with the I[2] S interface and only one can be used at a given time. 

Datasheet 

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31 

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**AIROC™ Bluetooth® & Bluetooth® LE module** 

Peripherals and Communication interfaces 

## **13.10 PCM interface** 

The CYBT-213043-02 includes a PCM interface that can connect to linear PCM codec devices in master or slave mode. In master mode, the CYBT-213043-02 generates the PCM_CLK and PCM_SYNC signals. In slave mode, these signals are provided by another master on the PCM interface and are inputs to the CYBT-213043-02. The configuration of the PCM interface may be adjusted by the host through the use of vendor-specific HCI commands. 

**Note:** The PCM interface shares HW with the I[2] S interface and only one can be used at a given time. 

**Note:** Only audio source (other than SCO) use cases are supported on 20819 at this time. 

## **13.10.1 Slot mapping** 

The CYBT-213043-02 supports up to three simultaneous full-duplex channels through the PCM interface. These three channels are time-multiplexed onto the single PCM interface by using a time-slotting scheme where the 8 kHz or 16 kHz audio sample interval is divided into as many as 16 slots. The number of slots is dependent on the selected interface rate (128 kHz, 512 kHz, or 1024 kHz). The corresponding number of slots for these interface rates is 1, 2, 4, 8, and 16, respectively. The PCM data output driver tristates its output on unused slots to allow other devices to share the same PCM interface signals. The data output driver tristates its output after the falling edge of the PCM clock during the last bit of the slot. 

## **13.10.2 Frame synchronization** 

The CYBT-213043-02 supports both short- and long-frame synchronization in both master and slave modes. In short frame synchronization mode, the frame synchronization signal is an active-high pulse at the audio frame rate that is a single-bit period in width and is synchronized to the rising edge of the bit clock. The PCGM slave looks for a high on the falling edge of the bit clock and expects the first bit of the first slot to start at the next rising edge of the clock. In long-frame synchronization mode, the frame synchronization signal is again an active-high pulse at the audio frame rate; however, the duration is three bit periods and the pulse starts coincident with the first bit of the first slot. 

## **13.10.3 Data formatting** 

The CYBT-213043-02 may be configured to generate and accept several different data formats. For conventional narrow band speech mode, the CYBT-213043-02 uses 13 of the 16 bits in each PCM frame. The location and order of these 13 bits can be configured to support various data formats on the PCM interface. The remaining three bits are ignored on the input and may be filled with 0s, 1s, a sign bit, or a programmed value on the output. The default format is 13-bit 2’s complement data, left justified, and clocked MSB first. 

Datasheet 

002-26540 Rev. *E 

32 

2024-05-03 

**AIROC™ Bluetooth® & Bluetooth® LE module** 

Electrical characteristics 

## **14 Electrical characteristics** 

The absolute maximum ratings in **Table 10** indicate levels where permanent damage to the device can occur, even if these limits are exceeded for only a brief duration. Functional operation is not guaranteed under these conditions. Operation at absolute maximum conditions for extended periods can adversely affect long-term reliability of the device. 

## **Table 10 Silicon absolute maximum ratings** 

|**Table 10**<br>**Silicon absolute maximum ratings**|||||
|---|---|---|---|---|
|**Requirement parameter**|**Specification**|||**Unit**|
||**Min**|**Nom**|**Max**||
|Maximum Junction Temperature|–|–|125|°C|
|VDDO1/VDDO2|–0.5|–|3.45|V|
|IFVDD/PLLVDD/VCOVDD/VDDC|–0.5|–|1.38|V|
|PMUAVDD/SR_PVDD|–0.5|–|3.45|V|
|DIGLDO_VDDIN|–0.5|–|1.65|V|
|RFLDO_VDDIN|–0.5|–|1.65|V|
|MIC_AVDD|–0.5|–|3.45|V|



## **Table 11 ESD/Latch-up** 

|**Table 11**<br>**ESD/Latch-up**|||||
|---|---|---|---|---|
|**Requirement parameter**|**Specification**|||**Unit**|
||**Min**|**Nom**|**Max**||
|ESD Tolerance HBM (Silicon)|–2000|–|2000|V|
|ESD Tolerance CDM (Silicon)|–500|–|500|V|
|Latch-up|–|200|–|mA|



|**Table 12**<br>**Power supply specifications**|**Table 12**<br>**Power supply specifications**|||||||||
|---|---|---|---|---|---|---|---|---|---|
|**Parameter**|**Conditions**||**Min**||**Typ**||**Max**||**Unit**|
|VDD input|Module Input||1.71||3.0||3.3||V|
|VDD Ripple|Module Input Ripple (VDD)||–||–||100||mV|
|VBAT Input|Internal to Module (not accessible)||1.90||3.0||3.3||V|
|PMU turn-on time|VBAT is ready.||–||–||300||s|
|**Table 13**<br>**Shutdown voltage (Brown Out)**||||||||||
|**Parameter**<br>**Specification**<br>**Unit**<br>**Min**<br>**Typ**<br>**Max**<br>VSHUT<br>1.54<br>1.62<br>1.7<br>V<br>~~SSS~~||||||||||
|The CYBT-213043-02 uses an onboard low voltage detector to shut down the device when supply voltage (VBAT)|||||||||The CYBT-213043-02 uses an onboard low voltage detector to shut down the device when supply voltage (VBAT)|
|drops below the operating range.||||||||||



Datasheet 

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**AIROC™ Bluetooth® & Bluetooth® LE module** 

Electrical characteristics 

## **14.1 Current consumption** 

**Table 14** provides the current consumption measurements taken at the input of LDOIN and VDDIO combined (LDOIN = VDDIO = 3.0 V). 

## **Table 14 Current consumption** 

|**Operational mode**|**Conditions**|**Typical**|**Unit**|
|---|---|---|---|
|HCI|48 MHz with Pause|1.3|mA|
||48 MHz without Pause|2.55||
|RX|Continuous RX|5.9||
|TX|Continuous TX - 4 dBm|5.8||
|PDS|–|16.5|µA|
|ePDS|All RAM retained|8.7||
|HID-Off (SDS)|32 kHz XTAL on|1.75||



## **14.2 Silicon Core Buck Regulator** 

|||~~es~~||||
|---|---|---|---|---|---|
|**Parameter**|**Conditions**<br>~~es~~|**Min**<br>~~es~~<br>~~es~~|**Typ**<br>~~es~~|**Max**<br>~~es~~|**Unit**|
|Input Supply, VBAT|DC Range<br>~~——~~|1.71<br>~~es~~<br>~~——~~|3.0<br>~~——~~|3.3<br>~~——~~|V|
|Output Current|Active Mode<br>~~——~~|–<br>~~——~~|< 60<br>~~——~~|100<br>~~——~~|mA|
||PDS Mode<br>~~——~~<br>~~—_——~~|–<br>~~——~~<br>~~—_——~~|< 60<br>~~——~~<br>~~—_——~~|70<br>~~——~~<br>~~—_——~~||
|Output Voltage|Active Mode<br>~~—_——~~|1.1<br>~~—_——~~<br>~~ee~~|1.26<br>~~—_——~~<br>~~ee~~|1.4<br>~~—_——~~<br>~~ee~~|V<br>~~ee~~<br>~~ee~~|
||PDS Mode, 40 mV min regulation window.<br>~~ee~~|0.76<br>~~ee~~<br>~~ee~~<br>~~ee ee~~|0.94 Avg<br>(0.92–0.96)<br>~~ee~~<br>~~ee~~<br>~~ee~~|1.4<br>~~ee~~<br>~~ee~~<br>~~ee~~||
|Output Voltage<br>Accuracy|Active Mode, includes line and load regulation.<br>Before trim:<br>After trim:<br>~~ee~~|–4<br>–2<br>~~ee ~~<br>~~ee~~<br>~~ee ee~~|–<br> ~~ee ~~<br>~~ee~~<br>~~ee~~|+4<br>+2<br> ~~ee~~<br>~~ee~~<br>~~ee~~|%<br>%<br>~~ee~~<br>~~ee~~|
|Ripple Voltage|Active Mode<br>2.2 µH ± 25% inductor, DCR = 114 m± 20%<br>4.7 µF ± 10% capacitor, Total ESR < 20 m<br>~~pt~~|–<br>~~ee ee~~<br>~~pt~~|3<br>~~ee~~<br>~~pt~~|–<br>~~ee~~<br>~~pt~~|mV<br>~~ee~~<br>~~ee~~|
||PDS Mode<br>~~pt~~<br>|40<br>~~pt~~<br>|40<br>~~pt~~<br>~~ee~~<br>|–<br>~~pt~~<br>~~ee~~<br>~~—~~||
|Output Inductor, L|Components are included on module.<br>~~a~~|1.6[3]<br>~~ee~~<br>~~a~~|2.2<br>~~ee~~<br>~~ee~~<br>~~a~~|–<br>~~ee~~<br>~~ee~~<br>~~a—~~|µH<br>~~ee~~|
|Output Capacitor, COUT||3.0[3]<br>~~a~~|4.7<br>~~ee~~<br>~~a~~|–<br>~~ee~~<br>~~a—~~|µF<br>~~ee~~|
|Input Capacitor, CIN||4.0[3]<br>~~a~~|10<br>~~a~~|–<br>~~a—~~||
|Input Supply Voltage<br>Ramp Time|0 to 3.3 V<br><br>~~ee~~|40<br><br>~~ee~~|–<br><br>~~ee~~|–<br>~~—~~<br>~~ee~~|µs|



## **Note** 

> 3. Minimum values represent minimums after derating due to tolerance, temperature, and voltage effects. 

Datasheet 

002-26540 Rev. *E 

34 

2024-05-03 

**AIROC™ Bluetooth® & Bluetooth® LE module** 

Electrical characteristics 

## **14.3 Digital LDO** 

|**14.3**<br>**Digital LDO**<br>**Table 16**<br>**Digital LDO**||||||
|---|---|---|---|---|---|
|**Parameter**|**Condition**<br>~~Se~~|**Min**<br>~~Se~~<br>~~ee~~|**Typ**<br>~~Se~~<br>~~ee~~|**Max**<br>~~Se~~<br>~~ee~~|**Unit**|
|Input Supply, DIGLDO_VDDIN|Min must be met for correct<br>operation<br>~~Se~~<br>~~ee~~|VOUT+ 20 mV<br>~~Se~~<br>~~ee~~<br>~~ee~~|1.26<br>~~Se~~<br>~~ee~~<br>~~ee~~|1.4<br>~~Se~~<br>~~ee~~<br>~~ee~~|V|
|Output Voltage, DIGLDO_VDDOUT|Range<br>~~ee~~<br>~~Se~~|0.9<br>~~ee~~<br>~~ee~~<br>~~Se~~|1.2<br>~~ee~~<br>~~ee ~~<br>~~Se~~|1.275<br>~~ee~~<br> ~~ee~~<br>~~Se~~||
||Step<br>~~le~~|–<br>~~le~~|25<br>~~le~~|–<br>~~le~~|mV|
||Accuracy after trimming<br>~~le~~<br>~~le~~|–2<br>~~le~~<br>~~le~~|–<br>~~le~~<br>~~le~~|+2<br>~~le~~<br>~~le~~|%|
|Dropout Voltage|At max load current<br>~~le~~<br>~~le~~|–<br>~~le~~<br>~~le~~|–<br>~~le~~<br>~~le~~|20<br>~~le~~<br>~~le~~|mV|
|Output Current|DC Load<br>~~le~~<br>~~le~~|0.075<br>~~le~~<br>~~le~~|40<br>~~le~~<br>~~le~~|60<br>~~le~~<br>~~le~~|mA|
|Quiescent Current|At T85°C, VIN= 1.4 V<br>~~le~~|–<br>~~le~~<br>~~ee~~|–<br>~~le~~<br>~~ee~~|40<br>~~le~~<br>~~ee~~|µA|
|Output Load Capacitor, COUT|Total trace + cap ESR must be<br>< 80 m<br>~~ee~~|1.55[4]<br>~~ee~~<br>~~ee~~|2.2<br>~~ee~~<br>~~ee~~|–<br>~~ee~~<br>~~ee~~|µF|
|Line Regulation|1.235 VVIN 1.4 V<br>~~ee~~<br>~~le~~|–<br>~~ee~~<br>~~ee ~~<br>~~le~~|5<br>~~ee~~<br> ~~ee ~~<br>~~le~~|10<br>~~ee~~<br> ~~ee~~<br>~~le~~|mV/V|
|Load Regulation|VOUT= 1.2 V, VIN= 1.26 V,<br>1 mAIOUT 25 mA<br>~~le~~|–<br>~~le~~|–<br>~~le~~|0.44<br>~~le~~|mV/mA|
|Load Step Error|IOUTstep 1 mA20 mA @ 1 µs<br>rise/fall,<br>COUT= 2.2F,<br>VIN= 1.235 V, VOUT= 1.2 V|–24<br>~~ee~~|–<br>~~ee~~|+24<br>~~ee~~|mV|
|Leakage Current|Power down Mode, VIN= 1.4 V,<br>Temp = 25°C<br>~~ee~~|–<br>~~ee~~<br>~~ee~~<br>~~ee~~|–<br>~~ee~~<br>~~ee~~<br>~~ee~~|50<br>~~ee~~<br>~~ee~~<br>~~ee~~|nA|
||Power down Mode, VIN= 1.4 V,<br>Temp = 125°C<br>~~ee~~<br>~~ee~~|–<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|–<br>~~ee~~<br>~~ee ~~<br>~~ee~~<br>~~ee~~|2<br>~~ee~~<br> ~~ee~~<br>~~ee~~<br>~~ee~~|µA|
|In-rush Current|COUT= 2.2 µF,<br>VIN= 1.4 V, VOUT= 1.2 V<br>~~ee~~|–<br>~~ee~~<br>~~ee~~|–<br>~~ee~~<br>~~ee ~~|100<br>~~ee~~<br> ~~ee~~|mA|
|LDO Turn On Time|COUT= 2.2 µF,<br>VIN= 1.4 V, VOUT= 1.2 V,<br>IOUT= 20 mA<br>~~P|~~|–<br>~~P|~~|–<br>~~P|~~|120<br>~~P|~~|µs|
|PSRR|COUT= 2.2 µF,<br>1.235VVIN 1.4 V,<br>VOUT= 1.2 V,<br>IOUT= 20 mA|||||
||f = 1 kHz|25|–|–|dB|
||f = 100 kHz<br>~~Le~~|13<br>~~Le~~|–<br>~~Le~~|–<br>~~Le~~|dB|



## **Note** 

4. Minimum values represent minimums after derating due to tolerance, temperature, and voltage effects. 

Datasheet 

002-26540 Rev. *E 

35 

2024-05-03 

**AIROC™ Bluetooth® & Bluetooth® LE module** 

Electrical characteristics 

## **14.4 RF LDO** 

|**14.4**<br>**RF LDO**<br>**Table 17**<br>**RF LDO**||||||
|---|---|---|---|---|---|
|**Parameter**<br>~~a~~|**Conditions**<br>~~a~~|**Min**<br>~~a~~<br>~~ee~~|**Typ**<br>~~a~~<br>~~ee~~|**Max**<br>~~a~~<br>~~ee~~|**Unit**|
|Input Supply, RFLDO_VDDIN<br>~~a~~|Min must be met for correct<br>operation<br>~~a~~<br>~~ee~~|VOUT+ 20 mV<br>~~a~~<br>~~ee~~<br>~~ee~~|1.26<br>~~a~~<br>~~ee~~<br>~~ee~~|1.4<br>~~a~~<br>~~ee~~<br>~~ee~~|V|
|Output Voltage, RFLDO_VDDOUT|Range<br>~~ee~~<br>~~le~~|1.1<br>~~ee~~<br>~~ee~~<br>~~le~~|1.2<br>~~ee~~<br>~~ee ~~<br>~~le~~|1.275<br>~~ee~~<br> ~~ee~~<br>~~le~~||
||Step<br>~~le~~|–<br>~~le~~|25<br>~~le~~|–<br>~~le~~|mV|
||Accuracy after trimming<br>~~le~~<br>~~le~~|–2<br>~~le~~<br>~~le~~|–<br>~~le~~<br>~~le~~|+2<br>~~le~~<br>~~le~~|%|
|Dropout Voltage|At max load current<br>~~le~~<br>~~fe~~|–<br>~~le~~<br>~~fe~~|–<br>~~le~~<br>~~fe~~|20<br>~~le~~<br>~~fe~~|mV|
|Output Current|DC Load<br>~~fe~~<br>~~le~~|0.075<br>~~fe~~<br>~~le~~|20<br>~~fe~~<br>~~le~~|60<br>~~fe~~<br>~~le~~|mA|
|Quiescent Current|At T85°C, VIN= 1.4 V<br>~~a~~|–<br>~~a~~|–<br>~~a~~|40<br>~~a~~|µA|
|Output Load Capacitor, COUT|Total trace + cap ESR must be<br>< 80 m<br>~~eee~~|1.55[4]<br>~~eee~~|2.2<br>~~eee~~|–<br>~~eee~~|µF|
|Line Regulation|1.235 VVIN 1.4 V<br>~~eee~~<br>~~Se~~|–<br>~~eee~~<br>~~Se~~|5<br>~~eee~~<br>~~Se~~|10<br>~~eee~~<br>~~Se~~|mV/V|
|Load Regulation|VOUT= 1.2 V, VIN= 1.26 V,<br>1 mAIOUT 25 mA<br>~~Se~~|–<br>~~Se~~|–<br>~~Se~~|0.44<br>~~Se~~|mV/mA|
|Load Step Error|IOUTstep 1 mA20 mA @ 1 µs<br>rise/fall,<br>COUT= 2.2 µF,<br>VIN= 1.235 V, VOUT= 1.2 V|–24<br>~~ee~~|–<br>~~ee~~|+24<br>~~ee~~|mV|
|Leakage Current|Power down Mode,<br>VIN= 1.4 V, Temp = 25°C<br>~~ee~~|–<br>~~ee~~<br>~~ee~~<br>~~ee~~|–<br>~~ee~~<br>~~ee~~<br>~~ee~~|50<br>~~ee~~<br>~~ee~~<br>~~ee~~|nA|
||Power down Mode, VIN= 1.4 V,<br>Temp = 125°C<br>~~ee~~<br>~~ee~~|–<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|–<br>~~ee~~<br>~~ee ~~<br>~~ee~~<br>~~ee~~|2<br>~~ee~~<br> ~~ee~~<br>~~ee~~<br>~~ee~~|µA|
|In-rush Current|COUT= 2.2 µF,<br>VIN= 1.4 V, VOUT= 1.2 V<br>~~ee~~|–<br>~~ee~~<br>~~ee~~|–<br>~~ee~~<br>~~ee ~~|100<br>~~ee~~<br> ~~ee~~|mA|
|LDO Turn On Time|COUT= 2.2 µF,<br>VIN= 1.4 V, VOUT= 1.2 V,<br>IOUT= 20 mA<br>~~P|~~|–<br>~~P|~~|–<br>~~P|~~|120<br>~~P|~~|µs|
|PSRR|COUT= 2.2 µF,<br>1.235 VVIN 1.4 V,<br>VOUT= 1.2 V,<br>IOUT= 20 mA|25|–|–|dB|
||f = 1 kHz|||||
||f = 100 kHz<br>~~ee~~|13<br>~~ee~~|–<br>~~ee~~|–<br>~~ee~~|dB|
|Noise|COUT= 2.2 µF,<br>VIN= 1.235 V, VOUT= 1.2 V,<br>IOUT= 20 mA|–|–|80|nVHz|
||f = 30 kHz|||||
||f = 100 kHz<br>~~a~~|–<br>~~a~~|–<br>~~a~~|70<br>~~a~~|nVHz|



Datasheet 

002-26540 Rev. *E 

36 

2024-05-03 

**AIROC™ Bluetooth® & Bluetooth® LE module** 

Electrical characteristics 

## **14.5 Digital I/O characteristics** 

|**Table 18**<br>**Digital I/O characteristics**<br>**Characteristics**<br>Input low voltage (VDD = 3 V)<br>Input high voltage (VDD = 3 V)<br>Input low voltage (VDD = 1.8 V)<br>Input high voltage (VDD = 1.8 V)<br>Output low voltage<br>Output high voltage<br>Input low current<br>Input high current<br>Output low current (VDD = 3 V, VOL= 0.4 V)<br>Output low current (VDD = 3 V, VOL= 1.8 V)<br>Output high current (VDD = 3 V, VOH= 2.6 V)<br>Output high current (VDD = 1.8 V, VOH= 1.4 V)<br>Input capacitance|**Symbol**<br>**Min**<br>**Typ**<br>**Max**<br>VIL<br>–<br>–<br>0.8<br>VIH<br>2.4<br>–<br>–<br>VIL<br>–<br>–<br>0.4<br>VIH<br>1.4<br>–<br>–<br>VOL<br>–<br>–<br>0.4<br>VOH<br>VDDO – 0.4 V<br>–<br>–<br>IIL<br>–<br>–<br>1.0<br>IIH<br>–<br>–<br>1.0<br>IOL<br>–<br>–<br>4.0<br>IOL<br>–<br>–<br>2.0<br>IOH<br>–<br>–<br>8.0<br>IOH<br>–<br>–<br>4.0<br>CIN<br>–<br>–<br>0.4<br>~~eeee~~<br>~~ee ee~~<br>~~ee~~<br>~~es ee~~<br>~~ee~~<br>~~es~~<br>~~ee~~<br>~~ee~~<br>~~ee ee~~<br>~~ee~~<br>~~es ee~~<br>~~ee~~<br>~~es~~<br>~~ee~~<br>~~ee~~<br>~~ee ee~~<br>~~ee~~<br>~~es ee~~<br>~~ee~~<br>~~es~~<br>~~eeee~~<br>~~ee~~<br>~~ee~~|**Unit**<br>V<br>V<br>V<br>V<br>V<br>V<br>µA<br>µA<br>mA<br>mA<br>mA<br>mA<br>pF|
|---|---|---|



Datasheet 

002-26540 Rev. *E 2024-05-03 

37 

**AIROC™ Bluetooth® & Bluetooth® LE module** 

Electrical characteristics 

## **14.6 ADC characteristics** 

**Table 19 Electrical characteristics** 

**==> picture [497 x 381] intentionally omitted <==**

**----- Start of picture text -----**<br>
||||||||||
|---|---|---|---|---|---|---|---|---|
|Parameter|Symbol|Conditions/Comments|Min|Typ|Max|Unit|
|Current consumption|ITOT|–|–|2|3|mA|
|Power down current|–|At room temperature|–|1|–|µA|
|ADC Core specification|
|ADC reference voltage|a|VREF|From BG with ±3% accuracy|a|–|0.85|–|V|
|ADC sampling clock|a|–|–|–|12|–|MHz|
|Absolute error|–|Includes gain error, offset and|–|–|5|%|
|distortion. Without factory|
|calibration.|
|Includes gain error, offset and|–|–|2|%|
|distortion. After factory|
|calibration.|
|pf|
|ENOB|–|For audio application|12|13|–|Bit|
|pt|For static measurement|10|||–|–|
|ADC input full scale|FS|For audio application|–|1.6|–|
|For static measurement|1.8|–|3.6|
|Conversion rate|–|For audio application|8|16|–|kHz|
|For static measurement|50|100|–|
|Signal bandwidth|–|For audio application|20|–|8K|Hz|
|For static measurement|–|DC|–|
|Input impedance|RIN|For audio application|10|–|–|k||
|For static measurement|500|–|–|
|Startup time|–|For audio application|–|10|–|ms|
|For static measurement|–|20|–|µs|
|—__|

**----- End of picture text -----**<br>


Datasheet 

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2024-05-03 

**AIROC™ Bluetooth® & Bluetooth® LE module** 

## Electrical characteristics 

|**Table 19**<br>**Electrical characteristics**(continued)|**Table 19**<br>**Electrical characteristics**(continued)|**Table 19**<br>**Electrical characteristics**(continued)|||||
|---|---|---|---|---|---|---|
|**Parameter**|**Symbol**|**Conditions/Comments**|**Min**|**Typ**|**Max**|**Unit**|
|**MIC PGA specifications**|||||||
|MIC PGAgain range|–|–|0|–|42|dB|
|MIC PGAgain step|–|–|–|1|–|dB|
|MIC PGA gain error|–|Includes part-to-part gain|–1|–|1|dB|
|||variation|||||
|PGA input referred|–|At 42 dB PGA gain A-weighted|–|–|4|µV|
|noise|||||||
|Passbandgain flatness|–|PGA and ADC, 100 Hz–4 kHz|–0.5|–|0.5|dB|
|**MIC Bias specifications**|||||||
|MIC bias output voltage|–|At 2.5-V supply|–|2.1|–|V|
|MIC bias loadingcurrent|–|–|–|–|3|mA|
|MIC bias noise|–|Refers to PGA input 20 Hz to|–|–|3|µV|
|||8 kHz, A-weighted|||||
|MIC bias PSRR|–|at 1 kHz|40|–|–|dB|
|ADC SNR|–|A-weighted 0 dB PGAgain|78|–|–|dB|
|ADC THD + N|–|–3 dBFS input 0 dB PGAgain|74|–|–|dB|
|GPIO input voltage||Always lower than avddBAT|–|–|3.6|V|
|GPIO source|–|Resistance|–|–|1|k|
|impedance[5]||Capacitance|–|–|10|pF|



## **Note** 

5. Conditional requirement for the measurement time of 10 µs. Relaxed with longer measurement time for each GPIO input channel. 

Datasheet 

002-26540 Rev. *E 

39 

2024-05-03 

**AIROC™ Bluetooth® & Bluetooth® LE module** 

Chipset RF specifications 

## **15 Chipset RF specifications** 

**Table 20** , **Table 21** , **Table 22** , and **Table 23** apply to single-ended industrial temperatures. Unused inputs are left open. 

|,,, andapply to single-ended industrial temperatures. Unused inputs are left<br>open.|,,, andapply to single-ended industrial temperatures. Unused inputs are left<br>open.|apply to single-ended industrial temperatures. Unused inputs are left|apply to single-ended industrial temperatures. Unused inputs are left|apply to single-ended industrial temperatures. Unused inputs are left|apply to single-ended industrial temperatures. Unused inputs are left|
|---|---|---|---|---|---|
|**Table 20**<br>**BR/EDR - Receiver RF specifications**||||||
|**Parameter**|**Mode and Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|**Receiver section**||||||
|Frequency range|–|2402|–|2480|MHz|
|RX sensitivity|GFSK, BR GFSK 0.1% BER, 1 Mbps|–|–92[6]|–|dBm|
||EDR 2M|–|–93.5|–|dB|
||EDR 3M|–|–87|–||
|Maximum input|–|–20|–|–|dBm|
|**Interference performance**||||||
|C/I cochannel|GFSK, BR GFSK 0.1% BER[7]|–|–|11.0|dB|
|C/I 1 MHz adjacent channel|GFSK, BR GFSK 0.1% BER[7]|–|–|0.0||
|C/I 2 MHz adjacent channel|GFSK, BR GFSK 0.1% BER[7]|–|–|–30.0||
|C/I3 MHz adjacent channel|GFSK, BR GFSK 0.1% BER[7]|–|–|–40.0||
|C/I image channel|GFSK, BR GFSK 0.1% BER[7]|–|–|–9.0||
|C/I 1 MHz adjacent to image|GFSK, BR GFSK 0.1% BER[7]|–|–|–20.0||
|channel||||||
|**Out-of-Band blocking performance (CW)**[8]||||||
|30 MHz to 2000 MHz|BR GFSK 0.1% BER|–|–10.0|–|dBm|
|2000 MHz to 2399 MHz|BR GFSK 0.1% BER|–|–27|–||
|2498 MHz to 3000 MHz|BR GFSK 0.1% BER|–|–27|–||
|3000 MHz to 12.75 GHz|BR GFSK 0.1% BER|–|–10.0|–||
|**Intermodulation performance**[7]||||||
|BT, interferer signal level|BR GFSK 0.1% BER|–|–|–39.0|dBm|
|**Spurious emissions**||||||
|30 MHz to 1 GHz<br>–<br>–<br>–<br>–57.0<br>dBm<br>1 GHz to 12.75 GHz<br>–<br>–<br>–<br>–55.0<br>~~oo~~||||||



## **Notes** 

> 6. The receiver sensitivity is measured at BER of 0.1% on the device interface with dirty TX Off. 

> 7. Desired signal is 10 dB above the reference sensitivity level (defined as –70 dBm). 

> 8. Desired signal is 3 dB above the reference sensitivity level (defined as –70 dBm). 

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**AIROC™ Bluetooth® & Bluetooth® LE module** 

Chipset RF specifications 

|**Table 21**<br>**BR/EDR - Transmitter RF specifications**|||||
|---|---|---|---|---|
|**Parameter**|**Min**|**Typ**|**Max**|**Unit**|
|**Transmitter section**|||||
|Frequency range|2402|–|2480|MHz|
|Class 2: BR TX power|–|4.0|–|dBm|
|Class 2: EDR 2M and 3M TX power|–|0|–||
|20 dB bandwidth|–|930|1000|kHz|
|**Adjacent channel power**|||||
||M – N|= 2|–|–|–20|dBm|
||M – N| 3[9]|–|–|–40||
|**Out-of-Band spurious emission**|||||
|30 MHz to 1 GHz<br>–<br>–<br>–36.0<br>dBm<br>1 GHz to 12.75 GHz<br>–<br>–<br>–30.0<br>1.8 GHz to 1.9 GHz<br>–<br>–<br>–47.0<br>5.15 GHz to 5.3 GHz<br>–<br>–<br>–47.0<br>~~—<—<—<—<—~~|||||
|**LO performance**|||||
|Initial carrier frequency tolerance|–75|–|+75|kHz|
|**Frequency drift**|||||
|DH1 packet|–25|–|+25|kHz|
|DH3 packet|–40|–|+40||
|DH5 packet|–40|–|+40||
|Drift rate|–20|–|+20|kHz/50 µs|
|**Frequency deviation**|||||
|Average deviation in payload (sequence used is 00001111)<br>140<br>–<br>175<br>kHz<br>Maximum deviation in payload (sequence used is 10101010)<br>115<br>–<br>–<br>Channel spacing<br>–<br>1<br>–<br>MHz<br>~~ee~~|||||



**Note** 

9. Meets SIG specification. 

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**AIROC™ Bluetooth® & Bluetooth® LE module** 

Chipset RF specifications 

**Bluetooth® LE RF specifications** 

**==> picture [500 x 150] intentionally omitted <==**

**----- Start of picture text -----**<br>
||||||||||
|---|---|---|---|---|---|---|---|---|
|Table 22|Bluetooth® LE RF specifications|
|Parameter|Conditions|Min|Typ|Max|Unit|
|Frequency rangeRX sensitivity|[[10]]|—|N/AGFSK,|2402–|––95|2480–|—|MHzdBm|
|BDR GFSK 0.1% BER 0.1% BER,|
|1 Mbps|
|TX power|N/A|–|4.0|–|
|Mod Char: Delta F1 average|{|_|}a|N/A|225|255|275|_|kHz|
|Mod Char: Delta F2 max|[[11]]|N/A|99.9|–|–|%|
|Mod Char: Ratio|N/A|0.8|–|–|%|

**----- End of picture text -----**<br>


**==> picture [496 x 61] intentionally omitted <==**

**----- Start of picture text -----**<br>
||||||||
|---|---|---|---|---|---|---|
|Table 23|BLE2 RF specifications|
|Parameter|Conditions|Min|Typ|Max|Unit|
|RX sensitivity|[[12]]|–|–|–89|–|dBm|
|TX power|–|–|4.0|–|

**----- End of picture text -----**<br>


## **Notes** 

> 10.Dirty TX is Off. 

> 11.At least 99.9% of all delta F2 max frequency values recorded over 10 packets must be greater than 185 kHz. 12.255 byte packet. 

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**AIROC™ Bluetooth® & Bluetooth® LE module** 

Timing and AC characteristics 

## **16 Timing and AC characteristics** 

In this section, use the numbers listed in the **Reference** column of each table to interpret the following timing diagrams. 

## **16.1 UART Timing** 

|**16.1**<br>**Table 24**|**UART Timing**<br>**UART Timing specifications**|||||
|---|---|---|---|---|---|
|**Reference**|**Characteristics**|**Min**|**Typ**|**Max**|**Unit**|
|1|Delay time, UART_CTS_N low to UART_TXD valid.|–|–|1.50|Bit periods|
|2|Setup time, UART_CTS_N high before midpoint of<br>stop bit.|–|–|0.67|Bit periods|
|3|Delay time, midpoint of stop bit to UART_RTS_N<br>high.|–|–|1.33|Bit periods|



**Figure 13 UART Timing** 

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**AIROC™ Bluetooth® & Bluetooth® LE module** 

Timing and AC characteristics 

## **16.2 SPI Timing** 

The SPI interface can be clocked up to 24 MHz. 

**Table 25** and **Figure 14** show the timing requirements when operating in SPI Mode 0 and 2. 

|**SPI Mode 0 and 2**|||
|---|---|---|
|**Characteristics**|**Min**|**Max**|
|Time from master assert SPI_CSN to first clock edge|45|–|
|Setup time for MOSI data lines|6|¾ SCK|
|Idle time between subsequent SPI transactions|1 SCK|–|



**Figure 14 SPI Timing, Mode 0 and 2** 

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**AIROC™ Bluetooth® & Bluetooth® LE module** 

Timing and AC characteristics 

**Table 26** and **Figure 15** show the timing requirements when operating in SPI Mode 1 and 3. 

|**SPI Mode 1 and 3**|||
|---|---|---|
|**Characteristics**|**Min**|**Max**|
|Time from master assert SPI_CSN to first clock edge|45|–|
|Setup time for MOSI data lines|6|¾ SCK|
|Idle time between subsequent SPI transactions|1 SCK|–|



**Figure 15 SPI Timing, Mode 1 and 3** 

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## **AIROC™ Bluetooth® & Bluetooth® LE module** 

Timing and AC characteristics 

## **16.3 I[2] C Compatible Interface Timing** 

The specifications in **Table 27** references **Figure 16** . 

|**Table 27**|**I2C Interface Timing specifications (up to 1 MHz)**||||
|---|---|---|---|---|
|**Reference**|**Characteristics**|**Min**|**Max**|**Unit**|
|1|Clock frequency|–|100|kHz|
||||400||
||||800||
||||1000||
|2|START condition setup time|650|–|ns|
|3|START condition hold time|280|–||
|4|Clock low time|650|–||
|5|Clock high time|280|–||
|6|Data input hold time[13]|0|–||
|7|Data input setup time|100|–||
|8|STOP condition setup time|280|–||
|9|Output valid from clock|–|400||
|10|Bus free time[14]|650|–||



**Figure 16 I[2] C Interface Timing diagram** 

## **Notes** 

> 13.As a transmitter, 125 ns of delay is provided to bridge the undefined region of the falling edge of SCL to avoid unintended generation of START or STOP conditions. 

> 14.Time that the CBUS must be free before a new transaction can start. 

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**AIROC™ Bluetooth® & Bluetooth® LE module** 

Timing and AC characteristics 

## **16.4 I[2] S Interface Timing** 

I[2] S timing is shown below in **Table 28** , **Figure 17** , and **Figure 18** . 

## **Table 28 Timing for I[2] S transmitters and receivers** 

|**Transmitter**<br>**Receiver**|
|---|
|**Lower LImit**<br>**Upper Limit**<br>**Lower Limit**<br>**Upper Limit**|
|**Notes**<br>**Min**<br>**Max**<br>**Min**<br>**Max**<br>**Min**<br>**Max**<br>**Min**<br>**Max**|
|Clock Period T<br>Ttr<br>–<br>–<br>–<br>Tr<br>–<br>–<br>–<br>[15]|
|**Master Mode: Clock generated by transmitter or receiver**|
|HIGH tHC<br>0.35 × Ttr<br>–<br>–<br>–<br>0.35 × Ttr<br>–<br>–<br>–<br>[16]<br>LOWtLC<br>0.35 × Ttr<br>–<br>–<br>–<br>0.35 × Ttr<br>–<br>–<br>–<br>[16]<br>**Slave Mode: Clock accepted by transmitter or receiver**<br>~~ee~~<br>~~ee~~|
|HIGH tHC<br>–<br>0.35 × Ttr<br>–<br>–<br>–<br>0.35 × Ttr<br>–<br>–<br>[15]<br>LOW tLC<br>–<br>0.35 × Ttr<br>–<br>–<br>–<br>0.35 × Ttr<br>–<br>–<br>[15]<br>Rise time tRC<br>–<br>–<br>0.15 × Ttr<br>–<br>–<br>–<br>–<br>[16]<br>**Transmitter**<br>~~**e**e ee e~~|
|Delay tdtr<br>–<br>–<br>–<br>0.8 × T<br>–<br>–<br>–<br>–<br>[17]<br>Hold time thtr<br>0<br>–<br>–<br>–<br>–<br>–<br>–<br>–<br>[16]<br>~~tt~~|
|**Receiver**|
|Setup time tsr<br>–<br>–<br>–<br>–<br>0.2 × Ttr<br>–<br>–<br>–<br>[18]<br>Hold time thr<br>–<br>–<br>–<br>–<br>0.2 × Ttr<br>–<br>–<br>–<br>[18]<br>~~ee~~<br>~~eeeeoe~~|



## **Notes** 

> 15.The system clock period T must be greater than Ttr and Tr because both the transmitter and receiver have to be able to handle the data transfer rate. 

> 16.At all data rates in master mode, the transmitter or receiver generates a clock signal with a fixed mark/space ratio. For this reason, tHC and tLC are specified with respect to T. 

> 17.In slave mode, the transmitter and receiver need a clock signal with minimum HIGH and LOW periods so that they can detect the signal. So long as the minimum periods are greater than 0.35 × Tr, any clock that meets the requirements can be used. 

> 18.Because the delay (tdtr) and the maximum transmitter speed (defined by Ttr) are related, a fast transmitter driven by a slow clock edge can result in tdtr not exceeding tRC which means thtr becomes zero or negative. Therefore, the transmitter has to guarantee that thtr is greater than or equal to zero, so long as the clock rise-time tRC is not more than tRCmax, where tRCmax is not less than 0.15 × Ttr. 

- 19.To allow data to be clocked out on a falling edge, the delay is specified with respect to the rising edge of the clock signal and T, always giving the receiver sufficient setup time. 

- 20.The data setup and hold time must not be less than the specified receiver setup and hold time. 

Datasheet 

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**AIROC™ Bluetooth® & Bluetooth® LE module** 

Timing and AC characteristics 

## **Figure 17 I[2] S Transmitter Timing** 

**Figure 18 I[2] S Receiver Timing** 

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**AIROC™ Bluetooth® & Bluetooth® LE module** 

Environmental specifications 

## **17 Environmental specifications** 

## **17.1 Environmental compliance** 

This Infineon Bluetooth® LE module is produced in compliance with the Restriction of Hazardous Substances (RoHS) and Halogen-Free (HF) directives. The Infineon module and components used to produce this module are RoHS and HF compliant. 

## **17.2 RF certification** 

The CYBT-213043-02 module is certified under the following RF certification standards: 

- FCC: WAP3034 

- ISED: 7922A-3034 

- MIC: 203-JN0972 

- CE 

## **17.3 Safety certification** 

The CYBT-213043-02 module complies with the following safety regulations: 

- Underwriters Laboratories, Inc. (UL): Filing E331901 

- CSA 

- TUV 

## **17.4 Environmental conditions** 

**Table 29** describes the operating and storage conditions for the Infineon Bluetooth® module. 

## **Environmental conditions for CYBT-213043-02** 

|**Description**|**Minimum specification**<br>~~OO~~|**Maximum specification**|
|---|---|---|
|Operatingtemperature|–30°C<br>~~OO~~|85°C|
|Operatinghumidity (relative, non-condensation)|5%<br>~~OO~~|85%|
|Thermal ramp rate|–<br>~~OO~~|10°C/minute|
|Storage temperature|–40°C<br>~~OO~~<br>~~OO~~|85°C|
|Storage temperature and humidity|–<br>~~OO~~|85°C at 85%|
|ESD: Module integrated into system<br>Components[21]|–<br>~~OY~~|15 kV Air<br>2.0 kV Contact|



## **17.5 ESD and EMI protection** 

Exposed components require special attention to ESD and electromagnetic interference (EMI). 

A grounded conductive layer inside the device enclosure is suggested for EMI and ESD performance. Any openings in the enclosure near the module should be surrounded by a grounded conductive layer to provide ESD protection and a low-impedance path to ground. 

**Device Handling** : Proper ESD protocol must be followed in manufacturing to ensure component reliability. 

21.This does not apply to the RF pins (ANT). 

**Note** 

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**AIROC™ Bluetooth® & Bluetooth® LE module** 

Regulatory information 

## **18 Regulatory information** 

## **18.1 FCC** 

## FCC NOTICE: 

The device CYBT-213043-02 complies with Part 15 of the FCC Rules. The device meets the requirements for modular transmitter approval as detailed in FCC public Notice DA00-1407.transmitter Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) This device must accept any interference received, including interference that may cause undesired operation. 

## CAUTION: 

The FCC requires the user to be notified that any changes or modifications made to this device that are not expressly approved by Infineon Semiconductor may void the user’s authority to operate the equipment. 

This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: 

- Reorient or relocate the receiving antenna. 

- Increase the separation between the equipment and receiver. 

- Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. 

- Consult the dealer or an experienced radio/TV technician for help. 

## LABELING REQUIREMENTS: 

The Original Equipment Manufacturer (OEM) must ensure that FCC labelling requirements are met. This includes a clearly visible label on the outside of the OEM enclosure specifying the appropriate Infineon Semiconductor FCC identifier for this product as well as the FCC Notice above. The FCC identifier is FCC ID: **WAP3034** . 

In any case the end product must be labeled exterior with “ **Contains FCC ID: WAP3034** ”. 

## ANTENNA WARNING: 

This device is tested with a standard SMA connector and with the antenna listed in **Table 7** . When integrated in the OEMs product, this fixed antenna requires installation preventing end-users from replacing them with non-approved antennas. Any antenna not in **Table 7** must be tested to comply with FCC Section 15.203 for unique antenna connectors and Section 15.247 for emissions. 

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Regulatory information 

## RF EXPOSURE: 

To comply with FCC RF Exposure requirements, the Original Equipment Manufacturer (OEM) must ensure to install the approved antenna in the previous. 

The preceding statement must be included as a CAUTION statement in manuals, for products operating with the approved antenna in **Table 7** , to alert users on FCC RF Exposure compliance. Any notification to the end user of installation or removal instructions about the integrated radio module is not allowed. 

The radiated output power of CYBT-213043-02 with the integrated PCB trace antenna (FCC ID: **WAP3034** ) is far below the FCC radio frequency exposure limits. Nevertheless, use CYBT-213043-02 in such a manner that minimizes the potential for human contact during normal operation. 

End users may not be provided with the module installation instructions. OEM integrators and end users must be provided with transmitter operating conditions for satisfying RF exposure compliance. 

## **18.2 ISED** 

## **Innovation, Science and Economic Development (ISED) Canada Certification** 

CYBT-213043-02 is licensed to meet the regulatory requirements of Innovation, Science and Economic Development (ISED) Canada. 

## License: IC: **7922A-3034** 

Manufacturers of mobile, fixed or portable devices incorporating this module are advised to clarify any regulatory questions and ensure compliance for SAR and/or RF exposure limits. Users can obtain Canadian information on RF exposure and compliance from **www.ic.gc.ca** . 

This device has been designed to operate with the antenna listed in **Table 7** , having a maximum gain of –0.5 dBi. Antennas not included in **Table 7** or having a gain greater than –0.5 dBi are strictly prohibited for use with this device. The required antenna impedance is 50 ohms. The antenna used for this transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. 

## ISED NOTICE: 

The device CYBT-213043-02 including the built-in trace antenna complies with Canada RSS-GEN Rules. The device meets the requirements for modular transmitter approval as detailed in RSS-GEN. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) This device must accept any interference received, including interference that may cause undesired operation. 

L'appareil CYBT-213043-02, y compris l'antenne intégrée, est conforme aux Règles RSS-GEN de Canada. L'appareil répond aux exigences d'approbation de l'émetteur modulaire tel que décrit dans RSS-GEN. L'opération est soumise aux deux conditions suivantes: (1) Cet appareil ne doit pas causer d'interférences nuisibles, et (2) Cet appareil doit accepter toute interférence reçue, y compris les interférences pouvant entraîner un fonctionnement indésirable. 

## ISED INTERFERENCE STATEMENT FOR CANADA 

This device complies with Innovation, Science and Economic Development (ISED) Canada licence-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device. 

Cet appareil est conforme à la norme sur l'innovation, la science et le développement économique (ISED) norme RSS exempte de licence. L'exploitation est autorisée aux deux conditions suivantes : (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement. 

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Regulatory information 

## ISED RADIATION EXPOSURE STATEMENT FOR CANADA 

This equipment complies with ISED radiation exposure limits set forth for an uncontrolled environment. 

Cet équipement est conforme aux limites d'exposition aux radiations ISED prévues pour un environnement incontrôlé. 

## LABELING REQUIREMENTS: 

The Original Equipment Manufacturer (OEM) must ensure that ISED labelling requirements are met. This includes a clearly visible label on the outside of the OEM enclosure specifying the appropriate Infineon Semiconductor IC identifier for this product as well as the ISED Notices above. The IC identifier is **7922A-3034** . In any case, the end product must be labeled in its exterior with “ **Contains IC: 7922A-3034** ”. 

Le fabricant d'équipement d'origine (OEM) doit s'assurer que les exigences d'étiquetage ISED sont respectées. Cela comprend une étiquette clairement visible à l'extérieur de l'enceinte OEM spécifiant l'identifiant Infineon Semiconductor IC approprié pour ce produit ainsi que l'avis ISED ci-dessus. L'identificateur IC est 7922A-3034. En tout cas, le produit final doit être étiqueté dans son extérieur avec “ **Contient IC: 7922A-3034** ”. 

## **18.3 European Declaration of Conformity** 

Hereby, Infineon Semiconductor declares that the Bluetooth® module CYBT-213043-02 complies with the essential requirements and other relevant provisions of Directive 2014. As a result of the conformity assessment procedure described in Annex III of the Directive 2014, the end-customer equipment should be labeled as follows: 

All versions of the CYBT-213043-02 in the specified reference design can be used in the following countries: Austria, Belgium, Cyprus, Czech Republic, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, Poland, Portugal, Slovakia, Slovenia, Spain, Sweden, The Netherlands, the United Kingdom, Switzerland, and Norway. 

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Regulatory information 

## **18.4 MIC Japan** 

CYBT-213043-02 is certified as a module with certification number 203-JN0972. End products that integrate CYBT-213043-02 do not need additional MIC Japan certification for the end product. 

End product can display the certification label of the embedded module. 

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**AIROC™ Bluetooth® & Bluetooth® LE module** 

Packaging 

## **19 Packaging** 

|**Product**|**Package**|**Maximum Peak Temperature**|**Maximum Time at**<br>**Peak Temperature**|**No. of cycles**|
|---|---|---|---|---|
|CYBT-213043-02|35-pad SMT|260°C|30 seconds|2|



|**Table 31**|**Package moisture sensitivity level (MSL), IPC/JEDEC J-STD-2**|**Package moisture sensitivity level (MSL), IPC/JEDEC J-STD-2**|**Package moisture sensitivity level (MSL), IPC/JEDEC J-STD-2**|
|---|---|---|---|
|**Product**||**Package**|**MSL**|
|CYBT-213043-02||35-pad SMT|MSL 3|



The CYBT-213043-02 is offered in tape and reel packaging. **Figure 19** details the tape dimensions used for the CYBT-213043-02. 

**Figure 19 CYBT-213043-02 Tape dimensions** 

**Figure 20** details the orientation of the CYBT-213043-02 in the tape as well as the direction for unreeling. 

**Figure 20 Component orientation in Tape and Unreeling direction** 

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Packaging 

**Figure 21** details reel dimensions used for the CYBT-213043-02. 

**Figure 21 Reel dimensions** 

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**AIROC™ Bluetooth® & Bluetooth® LE module** 

Ordering information 

## **20 Ordering information** 

**Table 32** lists the CYBT-213043-02 part number and features. **Table 32** also lists the target program for the respective module ordering codes. **Table 33** lists the reel shipment quantities for the CYBT-213043-02. 

|**Table 32**<br>**Ordering information**|||||||
|---|---|---|---|---|---|---|
|**Product**<br>**Max CPU**<br>**speed (MHz)**<br>**Flash**<br>**size (KB)**<br>**RAM**<br>**size (KB) **|**UART**|**I2C**|**SPI**<br>**I2S**<br>**PCM**|**PWM**|**ADC**<br>**inputs**<br>**GPIOs Package**|**Packaging**|
|CYBT-213043-02<br>96<br>256<br>176|Yes|Yes|Yes<br>Yes<br>Yes|6|15<br>22<br>35-SMT|Tape and|
|||||||Reel|
|**Table 33**<br>**Tape and reel package quantity and minimum order amount**||||**Tape and reel package quantity and minimum order amount**|||
|**Description**<br>**Minimum Reel**<br>**Quantity**<br>**Maximum Reel**<br>**Quantity**<br>**Comments**<br>Reel Quantity<br>500<br>500<br>Ships in 500 unit reel quantities.<br>Minimum Order Quantity (MOQ)<br>500<br>–<br>–<br>Order Increment (OI)<br>500<br>–<br>–<br>~~—————~~|||||||



The CYBT-213043-02 is offered in tape and reel packaging. The CYBT-213043-02 ships in a reel size of 500 units. 

For additional information and a complete list of Infineon Semiconductor Bluetooth® products, contact your local Infineon sales representative. To locate the nearest Infineon office, visit our website. 

|U.S. Infineon Headquarters Address|198 Champion Court, San Jose, CA 95134|
|---|---|
|U.S. Infineon Headquarter Contact Info|(408) 943-2600|
|Infineon website address|**https://www.infineon.com**|



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Acronyms 

## **21 Acronyms** 

|**Acronym**|**Description**|
|---|---|
|BLE|Bluetooth® Low Energy|
|Bluetooth® SIG|Bluetooth® Special Interest Group|
|CE|European Conformity|
|CSA|Canadian Standards Association|
|EMI|electromagnetic interference|
|ESD|electrostatic discharge|
|FCC|Federal Communications Commission|
|GPIO|general-purpose input/output|
|ISED|Innovation, Science and Economic Development (Canada)|
|IDE|integrated design environment|
|KC|Korea Certification|
|MIC|Ministry of Internal Affairs and Communications (Japan)|
|PCB|printed circuit board|
|RX|receive|
|QDID|qualification design ID|
|SMT|surface-mount technology; a method for producing electronic circuitry in which the<br>components are placed directly onto the surface of PCBs|
|TCPWM|timer, counter, pulse width modulator (PWM)|
|TUV|Germany: Technischer Überwachungs-Verein (Technical Inspection Association)|
|TX|transmit|



Datasheet 

002-26540 Rev. *E 

57 

2024-05-03 

**AIROC™ Bluetooth® & Bluetooth® LE module** 

Document conventions 

## **22 Document conventions** 

## **22.1 Units of measure** 

|**22.1**|**Units of measure**|**Units of measure**|
|---|---|---|
|**Table 35**|**Units of measure**||
|**Symbol**||**Unit of measure**|
|°C||degree Celsius|
|dB||decibel|
|dBi||decibels relative to isotropic|
|dBm||decibel-milliwatts|
|kV||kilovolt|
|mA||milliamperes|
|mm||millimeters|
|mV||millivolt|
|A||microamperes|
|m||micrometers|
|MHz||megahertz|
|GHz||gigahertz|
|V||volt|



Datasheet 

002-26540 Rev. *E 

58 

2024-05-03 

**AIROC™ Bluetooth® & Bluetooth® LE module** 

Revision history 

## **Revision history** 

|**Document**<br>**revision**|**Date**|**Description of changes**|
|---|---|---|
|*D|2023-06-01|Post to external web.|
|||Updated power supply from 3.63 V to 3.3 V in**Table 4**and**Power**|
|*E|2024-05-03|**connections (VDD)**.<br>Replaced “Module part number” with “Product” in**Table 30**,**Table 31**, and|
|||**Table 32**.|



Datasheet 

002-26540 Rev. *E 2024-05-03 

59 

## **Trademarks** 

All referenced product or service names and trademarks are the property of their respective owners. The Bluetooth® word mark and logos are registered trademarks owned by Bluetooth SIG, Inc., and any use of such marks by Infineon is under license. 

||**IMPORTANT NOTICE**|**WARNINGS**|
|---|---|---|
|**Edition 2024-05-03**|The information given in this document shall in no|Due to technical requirements products may contain|
|**Published by**|event be regarded as a guarantee of conditions or<br>characteristics (“Beschaffenheitsgarantie”).|dangerous substances. For information on the types<br>in question please contact your nearest Infineon|
|||Technologies office.|
|**Infineon Technologies AG**<br>**81726 Munich, Germany**|With respect to any examples, hints or any typical<br>values stated herein and/or any information<br>regarding the application of the product, Infineon|Except as otherwise explicitly approved by Infineon<br>Technologies in a written document signed by|
||Technologies<br>hereby<br>disclaims<br>any<br>and<br>all|authorized<br>representatives<br>of<br>Infineon|
||warranties and liabilities of any kind, including|Technologies, Infineon Technologies’ products may|
||without limitation warranties of non-infringement of|not be used in any applications where a failure of the|
|**© 2024 Infineon Technologies AG.**<br>**All Rights Reserved.**|intellectual property rights of any third party.<br>In addition, any information given in this document|product or any consequences of the use thereof can<br>reasonably be expected to result in personal injury.|
||is subject to customer’s compliance with its||
|**Do you have a question about this**<br>**document?**<br>**Email:**|obligations stated in this document and any<br>applicable legal requirements, norms and standards<br>concerning customer’s products and any use of the<br>product of Infineon Technologies in customer’s||
|**erratum@infineon.com**|applications.||
||The data contained in this document is exclusively||
|**Document reference**|intended for technically trained staff. It is the||
|**002-26540 Rev. *E**|responsibility of customer’s technical departments<br>to evaluate the suitability of the product for the||
||intended application and the completeness of the||
||product information given in this document with||
||respect to such application.||
Updated at April 28, 2026
Infineon Technologies is a globally recognized leader in semiconductor solutions, renowned for driving innovation in power management, energy efficiency, and modern mobility. With a strong legacy of engineering excellence, the company provides highly reliable components designed to meet the rigorous demands of industrial, automotive, and advanced commercial applications. The core of our Infineon portfolio is centered on their industry-leading discrete semiconductors. We offer an extensive selection of single and dual MOSFETs, alongside a robust range of single IGBTs and advanced IGBT modules. These flagship power transistors are essential for high-efficiency power conversion and motor control, providing engineers with superior thermal performance and minimized switching losses. Beyond advanced field-effect transistors, the selection includes a comprehensive array of diodes and rectifiers, heavily featuring Schottky diodes, as well as fast-recovery and RF/PIN diodes. This power foundation is further supported by bipolar transistors, intelligent power modules, and thyristor SCR modules, delivering the critical building blocks required for complex power system designs. To support broader system integration, the portfolio also encompasses specialized solutions such as solid-state relays, AC/DC LED driver ICs, and Bluetooth communications modules. From high-power industrial rectifiers to wireless connectivity adapters, Infineon equips designers with the precision components needed to build efficient, scalable, and fully connected electronic systems.
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