CM1422-03CP

CM1420, CM1422 

## LCD EMI Filter Array with ESD Protection 

## **Description** 

The CM1420 and CM1422 are EMI filter arrays with ESD protection, which integrate six and eight Pi−filters (C−R−C), respectively.  The CM1420/22 has component values of 15 pF − 100 − 15 pF.  These devices include ESD protection diodes on every pin, which provide a very high level of protection for sensitive electronic components that may be subjected to electrostatic discharge (ESD).  The ESD diodes connected to the filter ports safely dissipate ESD strikes of ±15 kV, well beyond the maximum requirement of the IEC 61000−4−2 international standard. Using the MIL−STD−883 (Method 3015) specification for Human Body Model (HBM) ESD, the pins are protected for contact discharges at greater than ±30 kV. 

## **http://onsemi.com** 

**WLCSP15 WLCSP20 CP SUFFIX CP SUFFIX CASE 567BS CASE 567BZ** 

This device is particularly well suited for portable electronics (e.g. **MARKING DIAGRAM** wireless handsets, PDAs, notebook computers) because of its small package format and easy−to−use pin assignments.  In particular, the CM1420/22 is ideal for EMI filtering and protecting data lines from N203 N223 ESD for the LCD display in clamshell handsets. The CM1420 and CM1422 incorporate _OptiGuard_ | coating which | CM1420 | Lf CM1422 results in improved reliability at assembly. The CM1420 and CM1422 15−Bump CSP Package 20−Bump CSP Package are available in space−saving, low−profile chip scale packages with RoHS compliant lead−free finishing. N203 = CM1420−03CP N223 = CM1422−03CP 

## **Features** 

• Functionally and Pin Compatible with CSPEMI606 (CM1420) and **ORDERING INFORMATION** CSPEMI608 (CM1422) Devices • _OptiGuard_ Coated for Improved Reliability at Assembly **Device Package Shipping**[†] • Six and Eight Channels of EMI Filtering CM1420−03CP CSP−15 3500/Tape & Reel • ±15 kV ESD Protection on Each Channel (Pb−Free) (IEC 61000−4−2 Level 4, Contact Discharge) CM1422−03CP CSP−20 3500/Tape & Reel • ±30 kV ESD Protection on Each Channel (HBM) (Pb−Free) = ~~=~~ • Better than 30 dB of Attenuation at 1 GHz to 3 GHz †For information on tape and reel specifications, • Chip Scale Package Features Extremely Low Lead Inductance for including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Optimum Filter and ESD Performance Brochure, BRD8011/D. 

- 15−Bump, 2.960 mm x 1.330 mm Footprint Chip Scale Package (CM1420) 

- 20−Bump, 4.000 mm x 1.458 mm Footprint Chip Scale Package (CM1422) 

- These Devices are Pb−Free and are RoHS Compliant 

## **Applications** 

- LCD Data Lines in Clamshell Wireless Handsets 

- EMI Filtering & ESD Protection for High−Speed I/O Data Ports 

- Wireless Handsets / Cell Phones 

- Notebook Computers 

- PDAs / Handheld PCs 

- EMI Filtering for High−Speed Data Lines 

Publication Order Number: **CM1420/D** 

**1** 

© Semiconductor Components Industries, LLC, 2011 **March, 2011 − Rev. 4** 

**CM1420, CM1422** 

## **BLOCK DIAGRAM** 

**==> picture [272 x 103] intentionally omitted <==**

**----- Start of picture text -----**<br>
100  �<br>FILTERn* FILTERn*<br>15 pF 15 pF<br>GND<br>(Pins B1−Bn)<br>1 of n EMI Filtering + ESD Channels<br>(n = 6 for CM1420, 8 for CM1422)<br>**----- End of picture text -----**<br>


*See Package/Pinout Diagrams for expanded pin information. 

## **PACKAGE / PINOUT DIAGRAMS** 

**==> picture [457 x 224] intentionally omitted <==**

**----- Start of picture text -----**<br>
Top View Bottom View<br>(Bumps Down View) (Bumps Up View)<br>Orientation<br>Marking 1 2 3 4 5 6<br>+<br>A C1 C2 C3 C4 C5 C6<br>B N203 B1 B2 B3<br>Orientation<br>C Marking A1 A2 A3 A4 A5 A6<br>A1<br>CM1420 CSP Package<br>Orientation<br>Marking 1 2 3 4 5 6 7 8<br>+<br>A C1 C2 C3 C4 C5 C6 C7 C8<br>B N223 B1 B2 B3 B4<br>Orientation<br>C Marking A1 A2 A3 A4 A5 A6 A7 A8<br>A1<br>**----- End of picture text -----**<br>


CM1422 CSP Package 

**Table 1. PIN DESCRIPTIONS** 

|**CM1420**|**CM1422**|**Name**|**Description**||**CM1420**|**CM1422**|**Name**|**Description**|
|---|---|---|---|---|---|---|---|---|
|**Pin(s)**|**Pin(s)**||||**Pin(s)**|**Pin(s)**|||
|A1|A1|FILTER1|Filter Channel 1||C1|C1|FILTER1|Filter Channel 1|
|A2|A2|FILTER2|Filter Channel 2||C2|C2|FILTER2|Filter Channel 2|
|A3|A3|FILTER3|Filter Channel 3||C3|C3|FILTER3|Filter Channel 3|
|A4|A4|FILTER4|Filter Channel 4||C4|C4|FILTER4|Filter Channel 4|
|A5|A5|FILTER5|Filter Channel 5||C5|C5|FILTER5|Filter Channel 5|
|A6|A6|FILTER6|Filter Channel 6||C6|C6|FILTER6|Filter Channel 6|
|−|A7|FILTER7|Filter Channel 7||−|C7|FILTER7|Filter Channel 7|
|−|A8|FILTER8|Filter Channel 8||−|C8|FILTER8|Filter Channel 8|
|B1−B3|B1−B4|GND|Device Ground||||||



**http://onsemi.com** 

**2** 

**CM1420, CM1422** 

## **SPECIFICATIONS** 

## **Table 2. ABSOLUTE MAXIMUM RATINGS** 

|**Table 2. ABSOLUTE MAXIMUM RATINGS**|||
|---|---|---|
|**Parameter**|**Rating**|**Units**|
|Storage Temperature Range|−65 to +150|°C|
|DC Power per Resistor|100|mW|
|DC Package Power Rating|500|mW|



Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 

## **Table 3. STANDARD OPERATING CONDITIONS** 

|**Table 3. STANDARD OPERATING CONDITIONS**|**Table 3. STANDARD OPERATING CONDITIONS**|**Table 3. STANDARD OPERATING CONDITIONS**||||||
|---|---|---|---|---|---|---|---|
|**Parameter**|||**Rating**||||**Units**|
|Operating Temperature Range|||−40 to +85||||°C|
|**Table 4. ELECTRICAL OPERATING CHARACTERISTICS**(Note 1)||||||||
|**Symbol**|**Parameter**|**Conditions**||**Min**|**Typ**|**Max**|**Units**|
|R|Resistance|||80|100|120|�|
|C|Capacitance|At 2.5 V DC, 1 MHz,<br>30 mV AC||12|15|18|pF|
|VDIODE|Diode Standoff Voltage|IDIODE= 10�A|||6.0||V|
|ILEAK|Diode Leakage Current (reverse bias)|VDIODE= 3.3 V|||100|200|nA|
|VSIG|Signal Clamp Voltage<br>Positive Clamp<br>Negative Clamp|ILOAD= 10 mA<br>(Note 3)||5.6<br>−1.5|6.8<br>−0.8|9.0<br>−0.4|V|
|VESD|In−system ESD Withstand Voltage<br>a) Human Body Model, MIL−STD−883, Method 3015<br>b) Contact Discharge per IEC 61000−4−2 Level 4|(Note 2)||±30<br>±15|||kV|
|RDYN|Dynamic Resistance<br>Positive<br>Negative||||2.30<br>0.90||�|
|fC|Cut−off Frequency<br>ZSOURCE= 50�, ZLOAD= 50�|R = 100�, C = 15 pF|||120||MHz|



1. TA = 25 ° C unless otherwise specified. 

2. ESD applied to input and output pins with respect to GND, one at a time. 

3. Clamping voltage is measured at the opposite side of the EMI filter to the ESD pin. For example, if ESD is applied to Pin A1, then clamping voltage is measured at Pin C1. 

**http://onsemi.com** 

**3** 

**CM1420, CM1422** 

## **PERFORMANCE INFORMATION** 

**Typical Filter Performance (TA = 25** ° **C, DC Bias = 0 V, 50  Environment)** Q 

**Figure 1. Insertion Loss vs. Frequency (A1−C1 to GND B1)** 

**Figure 2. Insertion Loss vs. Frequency (A2−C2 to GND B1)** 

**http://onsemi.com** 

**4** 

**CM1420, CM1422** 

## **PERFORMANCE INFORMATION (Cont’d)** 

**Typical Filter Performance (TA = 25** ° **C, DC Bias = 0 V, 50  Environment)** Q 

**Figure 3. Insertion Loss vs. Frequency (A3−C3 to GND B2)** 

**Figure 4. Insertion Loss vs. Frequency (A4−C4 to GND B2)** 

**http://onsemi.com** 

**5** 

**CM1420, CM1422** 

## **PERFORMANCE INFORMATION (Cont’d)** 

**Typical Filter Performance (TA = 25** ° **C, DC Bias = 0 V, 50  Environment)** Q 

**Figure 5. Insertion Loss vs. Frequency (A5−C5 to GND B3)** 

**Figure 6. Insertion Loss vs. Frequency (A6−C6 to GND B3)** 

**http://onsemi.com** 

**6** 

**CM1420, CM1422** 

## **PERFORMANCE INFORMATION (Cont’d)** 

**Typical Filter Performance (TA = 25** ° **C, DC Bias = 0 V, 50  Environment)** Q 

**Figure 7. Insertion Loss vs. Frequency (A7−C7 to GND B4, CM1422 Only)** 

**Figure 8. Insertion Loss vs. Frequency (A8−C8 to GND B4, CM1422 Only)** 

**http://onsemi.com** 

**7** 

**CM1420, CM1422** 

## **PERFORMANCE INFORMATION (Cont’d)** 

**Figure 9. Filter Capacitance vs. Input Voltage over Temperature (normalized to capacitance at 2.5 VDC and 25 C)** 

**http://onsemi.com** 

**8** 

**CM1420, CM1422** 

## **APPLICATION INFORMATION** 

**Table 5. PRINTED CIRCUIT BOARD RECOMMENDATIONS** 

|**Table 5. PRINTED CIRCUIT BOARD RECOMMENDATIONS**||
|---|---|
|**Parameter**|**Value**|
|Pad Size on PCB|0.240 mm|
|Pad Shape|Round|
|Pad Definition|Non−Solder Mask defined pads|
|Solder Mask Opening|0.290 mm Round|
|Solder Stencil Thickness|0.125 − 0.150 mm|
|Solder Stencil Aperture Opening (laser cut, 5% tapered walls)|0.300 mm Round|
|Solder Flux Ratio|50/50 by volume|
|Solder Paste Type|No Clean|
|Pad Protective Finish|OSP (Entek Cu Plus 106A)|
|Tolerance − Edge To Corner Ball|±50�m|
|Solder Ball Side Coplanarity|±20�m|
|Maximum Dwell Time Above Liquidous|60 seconds|
|Maximum Soldering Temperature for Lead−free Devices using a Lead−free Solder Paste|260°C|



**==> picture [111 x 91] intentionally omitted <==**

**----- Start of picture text -----**<br>
Non−Solder Mask Defined Pad<br>0.240 mm DIA.<br>Solder Stencil Opening<br>0.300 mm DIA.<br>Solder Mask Opening<br>0.290 mm DIA.<br>**----- End of picture text -----**<br>


**==> picture [87 x 90] intentionally omitted <==**

**Figure 10. Recommended Non−Solder Mask Defined Pad Illustration** 

**==> picture [227 x 140] intentionally omitted <==**

**----- Start of picture text -----**<br>
250<br>200<br>150<br>100<br>50<br>0 1:00.0 2:00.0 3:00.0 4:00.0<br>Time (minutes)<br>C)<br>( �<br>Temperature<br>**----- End of picture text -----**<br>


**Figure 11. Lead−free (SnAgCu) Solder Ball Reflow Profile** 

**http://onsemi.com** 

**9** 

# **CM1420, CM1422** 

# **PACKAGE DIMENSIONS** 

# **WLCSP15, 2.96x1.33** CASE 567BS−01 ISSUE O 

**==> picture [260 x 288] intentionally omitted <==**

**----- Start of picture text -----**<br>
D A B<br>PIN A1<br>REFERENCE ÈÈ<br>E<br>2X 0.05 C<br>2X 0.05 C<br>TOP VIEW<br>A2<br>0.05 C<br>A<br>0.05 C<br>SEATING<br>NOTE 3 A1 SIDE VIEW C PLANE<br>eD/2<br>15X b eD<br>0.05 C A B eE<br>C<br>0.03 C<br>B<br>A<br>1 2 3 4 5 6 7 8 9<br>BOTTOM VIEW<br>**----- End of picture text -----**<br>


# NOTES: 

**==> picture [128 x 13] intentionally omitted <==**

**----- Start of picture text -----**<br>
1. DIMENSIONING AND TOLERANCING PER<br>ASME Y14.5M, 1994.<br>**----- End of picture text -----**<br>


**==> picture [133 x 5] intentionally omitted <==**

**----- Start of picture text -----**<br>
2. CONTROLLING DIMENSION: MILLIMETERS.<br>**----- End of picture text -----**<br>


|3.|COPL<br>CROW|ANARITY APPLIES TO SPHERICAL<br>NS OF SOLDER BALLS.<br>**MIN**<br>**MAX**<br>0.56<br>**MILLIMETERS**<br>2.96 BSC<br>0.29<br>0.35<br>0.50 BSC<br>0.65<br>0.21<br>0.27<br>1.33 BSC<br>0.435 BSC<br>0.40 REF|ANARITY APPLIES TO SPHERICAL<br>NS OF SOLDER BALLS.<br>**MIN**<br>**MAX**<br>0.56<br>**MILLIMETERS**<br>2.96 BSC<br>0.29<br>0.35<br>0.50 BSC<br>0.65<br>0.21<br>0.27<br>1.33 BSC<br>0.435 BSC<br>0.40 REF|
|---|---|---|---|
||**DIM**|**MILLIMETERS**||
|||**MIN**|**MAX**|
||**A**|0.56|0.65|
||**A1**|0.21|0.27|
||**A2**|0.40 REF||
||**b**|0.29|0.35|
||**D**|2.96 BSC||
||**E**|1.33 BSC||
||**eD**|0.50 BSC||
||**eE**|0.435 BSC||



## **RECOMMENDED** 

## **SOLDERING FOOTPRINT*** 

**==> picture [231 x 99] intentionally omitted <==**

**----- Start of picture text -----**<br>
PACKAGE<br>OUTLINE<br>A1<br>0.87<br>0.44 15X<br>0.25<br>0.50<br>PITCH<br>DIMENSIONS: MILLIMETERS<br>**----- End of picture text -----**<br>


# *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 

# **http://onsemi.com** 

**10** 

**CM1420, CM1422** 

## **PACKAGE DIMENSIONS** 

**WLCSP20, 4.00x1.46** CASE 567BZ−01 ISSUE O 

**==> picture [475 x 451] intentionally omitted <==**

**----- Start of picture text -----**<br>
D A B NOTES:<br>PIN A1 1. DIMENSIONING AND TOLERANCING PER<br>REFERENCE ASME Y14.5M, 1994.<br>2. CONTROLLING DIMENSION: MILLIMETERS.<br>ÈÈ 3. COPLANARITY APPLIES TO SPHERICAL<br>ane CROWNS OF SOLDER BALLS.<br>ÈÈ E MILLIMETERS<br>DIM MIN MAX<br>2X 0.05 C A 0.56 0.65<br>at A1 0.21 0.27<br>A2 0.40 REF<br>2X 0.05 C TOP VIEW b 0.29 0.35<br>D 4.00 BSC<br>A2 E 1.46 BSC<br>eD 0.50 BSC<br>e 0.05 y C 3 = eE 0.435 BSC<br>A<br>a<br>0.05 C<br>SEATING<br>NOTE 3 A1 SIDE VIEW C PLANE<br>eD/2<br>20X b = eD<br>0.05 C A B eE<br>C<br>0.03 C<br>B<br>A<br>a ereSO 1 2 3 OOOOO 4 5 6 7 8 9 10 O 11 12 f<br>BOTTOM VIEW<br>RECOMMENDED<br>SOLDERING FOOTPRINT*<br>P ACKAGE<br>OUTLINE<br>A1<br>+ S 65 16660 "<br>0.87<br>16- 8 6<br>0.44 20X<br>0.25<br>1S 0.50 OO OO 6 O°<br>PITCH<br>DIMENSIONS: MILLIMETERS<br>*For additional information on our Pb−Free strategy and soldering<br>details, please download the ON Semiconductor Soldering and<br>Mounting Techniques Reference Manual, SOLDERRM/D.<br>**----- End of picture text -----**<br>


_OptiGuard_ is a trademark of Semiconductor Components Industries, LLC (SCILLC). 

**ON Semiconductor** and          are registered trademarks of Semiconductor Components Industries, LLC (SCILLC).  SCILLC reserves the right to make changes without further notice to any products herein.  SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time.  All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.  SCILLC does not convey any license under its patent rights nor the rights of others.  SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.  Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.  SCILLC is an Equal Opportunity/Affirmative Action Employer.  This literature is subject to all applicable copyright laws and is not for resale in any manner. 

## **PUBLICATION ORDERING INFORMATION** 

## **LITERATURE FULFILLMENT** : 

Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA **Phone** : 303−675−2175 or 800−344−3860 Toll Free USA/Canada **Fax** : 303−675−2176 or 800−344−3867 Toll Free USA/Canada **Email** : orderlit@onsemi.com 

**N. American Technical Support** : 800−282−9855 Toll Free **ON Semiconductor Website** : **www.onsemi.com** USA/Canada 

**Europe, Middle East and Africa Technical Support: Order Literature** : http://www.onsemi.com/orderlit Phone: 421 33 790 2910 **Japan Customer Focus Center** For additional information, please contact your local Phone: 81−3−5773−3850 Sales Representative 

**http://onsemi.com** 

**CM1420/D** 

**11**