BUK9880-55A/CUX

Power MOSFET, N Channel, 55 V, 7 A, 0.062 ohm, SC-73, Surface Mount

⚠️ Reference pricing provided. In case of supply shortages, we will connect you with our trusted procurement partners to ensure your project's continuity.
Manufacturer: NEXPERIA
Product type: Single MOSFETs
MSL: MSL 1 - Unlimited
SVHC: No SVHC (25-Jun-2025)
No. of Pins: 4Pins
Channel Type: N Channel
Product Range: TrenchMOS
Qualification: AEC-Q101
Power Dissipation: 8W
Transistor Mounting: Surface Mount
Rds(on) Test Voltage: 10V
Transistor Case Style: SC-73
Drain Source Voltage Vds: 55V
Operating Temperature Max: 150°C
Continuous Drain Current Id: 7A
Drain Source On State Resistance: 0.062ohm
Gate Source Threshold Voltage Max: 1.5V
Delivery and price
Units per pack	500
Price	0.379 €
Current stock	10+
Lead time	30 days
Datasheet
## **BUK9880-55A** & **N-channel TrenchMOS logic level FET 19 March 2014** ~~|~~ 

## **Product data sheet** 

## **1. General description** 

Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. 

## **2. Features and benefits** 

- Low conduction losses due to low on-state resistance 

- Q101 compliant 

- Suitable for logic level gate drive sources 

## **3. Applications** 

- 12 V and 24 V loads 

- Automotive and general purpose power switching 

- Motors, lamps and solenoids 

## **4. Quick reference data** 

## **Table 1. Quick reference data** 

|**Symbol**|**Parameter**|**Conditions**||**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|VDS<br>~~a~~<br>~~es~~|drain-source voltage<br>~~a~~<br>~~es~~|Tj≥ 25 °C; Tj≤ 150 °C<br>~~nn~~|~~es~~|-|-|55|V|
|ID<br>~~a~~<br>~~es~~<br>~~es~~|drain current<br>~~a~~<br>~~es~~<br>~~ee~~|VGS= 5 V; Tsp= 25 °C; Fig. 3<br>;Fig. 2<br>~~nn~~<br>|~~es~~<br>|-<br>|-<br>|7<br>|A<br>|
|Ptot<br>~~es~~<br>~~es~~|total power dissipation<br>~~es~~<br>~~ee~~|Tsp= 25 °C;Fig. 1<br>~~nn~~<br>|~~es~~<br>|-<br>|-<br>|8<br>|W<br>|
|**Static characteristics**<br>~~es~~<br>~~ee~~<br>~~Seeeeeee~~||||||||
|RDSon<br>~~i~~|drain-source on-state<br>resistance<br><br>~~i ~~|VGS= 10 V; ID= 8 A; Tj= 25 °C<br>~~ee~~<br>~~po~~<br>~~Seeeeeee~~|~~ee~~<br>~~po~~<br>~~Seeeeeee~~|-<br>~~ee~~<br>~~po~~<br>~~Seeeeeee~~|62<br>~~ee~~<br>~~po~~<br>~~Seeeeeee~~|73<br>~~ee~~<br>~~po~~<br>~~Seeeeeee~~|mΩ<br>~~ee~~<br>~~po~~<br>~~Seeeeeee~~|
|||VGS= 4.5 V; ID= 8 A; Tj= 25 °C<br>~~ee~~<br>~~po~~<br>~~Seeeeeee~~|~~ee~~<br>~~po~~<br>~~Seeeeeee~~|-<br>~~ee~~<br>~~po~~<br>~~Seeeeeee~~|-<br>~~ee~~<br>~~po~~<br>~~Seeeeeee~~|89<br>~~ee~~<br>~~po~~<br>~~Seeeeeee~~|mΩ<br>~~ee~~<br>~~po~~<br>~~Seeeeeee~~|
|||VGS= 5 V; ID= 8 A; Tj= 25 °C; Fig. 13<br>;<br>Fig. 14<br>~~po~~<br> ~~Seeeeeee~~|~~po~~<br>~~Seeeeeee~~|-<br>~~po~~<br>~~Seeeeeee~~|68<br>~~po~~<br>~~Seeeeeee~~|80<br>~~po~~<br>~~Seeeeeee~~|mΩ<br>~~po~~<br>~~Seeeeeee~~|
|**Avalanche ruggedness**<br> ~~Seeeeeee~~||||||||
|EDS(AL)S<br>~~re~~|non-repetitive drain-<br>source avalanche<br>energy<br>~~re~~|ID= 6 A; Vsup≤ 55 V; RGS= 50 Ω;<br>VGS= 5 V; Tj(init)= 25 °C; unclamped<br>~~ee~~|~~ee~~|-<br>~~ee~~|-<br>~~ee~~|36<br>~~ee~~|mJ<br>~~ee~~|



**Nexperia** 

**BUK9880-55A** 

**N-channel TrenchMOS logic level FET** 

## **5. Pinning information** 

## **Table 2. Pinning information** 

|**Pin**|**Symbol**|**Description**|**Simplified outline**|**Graphic symbol**|
|---|---|---|---|---|
|1|G|gate|1<br>3<br>2<br>4<br>**SC-73 (SOT223)**|S<br>D<br>G<br>_mbb076_|
|2|D|drain|||
|3|S|source|||
|4|D|drain|||



## **6. Ordering information** 

## **Table 3. Ordering information** 

|**Type number**|**Package**|||
|---|---|---|---|
||**Name**|**Description**|**Version**|
|BUK9880-55A|SC-73|plastic surface-mounted package with increased heatsink; 4<br>leads|SOT223|
|BUK9880-55A/CU|SC-73|plastic surface-mounted package with increased heatsink; 4<br>leads|SOT223|



## **7. Marking** 

## **Table 4. Marking codes** 

|**Type number**|**Marking code**|
|---|---|
|BUK9880-55A|988055A|
|BUK9880-55A/CU|988055|



## **8. Limiting values** 

## **Table 5. Limiting values** 

_In accordance with the Absolute Maximum Rating System (IEC 60134)._ 

|**Symbol**|**Parameter**|**Conditions**||**Min**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|VDS|drain-source voltage|Tj≥ 25 °C; Tj≤ 150 °C||-|55|V|
|VDGR|drain-gate voltage|RGS= 20 kΩ||-|55|V|
|VGS|gate-source voltage|||-15|15|V|
|Ptot|total power dissipation|Tsp= 25 °C; Fig. 1||-|8|W|
|ID|drain current|Tsp= 100 °C; VGS= 5 V; Fig. 2||-|4|A|
|||Tsp= 25 °C; VGS= 5 V; Fig. 3<br>;Fig. 2||-|7|A|
|IDM|peak drain current|Tsp= 25 °C; pulsed; tp≤ 10 µs; Fig. 3||-|30|A|



All information provided in this document is subject to legal disclaimers. 

BUK9880-55A 

© Nexperia B.V. 2017. All rights reserved 

**Product data sheet** 

**19 March 2014** 

**2 / 13** 

**Nexperia** 

**BUK9880-55A** 

**N-channel TrenchMOS logic level FET** 

|**Symbol**<br>~~fF~~<br>~~Terr~~<br>~~ee~~|**Parameter**<br>~~Terr~~<br>~~rrt—(_is~~<br>~~ee Ge~~|**Conditions**<br>~~is~~<br>~~esis~~<br>~~Ge~~|~~esis~~<br>~~es~~|**Min**<br>~~tn~~|**Max**<br>~~ee~~|**Unit**|
|---|---|---|---|---|---|---|
|Tstg<br>~~fF~~<br>~~Terr~~<br>~~ee~~<br>~~ee~~|storage temperature<br>~~Terr~~<br>~~rrt—(_is~~<br>~~ee Ge~~<br>~~er Gn~~|~~is~~<br>~~esis~~<br>~~Ge~~<br>~~Gn~~|~~esis~~<br>~~es~~<br>~~ts~~|-55<br>~~tn~~|150<br>~~ee~~|°C|
|Tj<br>~~ee~~<br>~~ee~~<br>~~es~~|junction temperature<br>~~ee Ge~~<br>~~er Gn~~<br>~~ts~~|~~Ge~~<br>~~Gn~~<br>~~es~~|~~es ~~<br>~~ts~~<br>~~es~~|-55<br> ~~tn ~~<br>~~es~~|150<br> ~~ee~~<br>~~es~~|°C<br>~~es~~|
|VGSM<br>~~ee~~<br>~~es~~|peak gate-source voltage<br>~~er Gn~~<br>~~ts~~|pulsed; tp≤ 50 µs<br>~~Gn~~<br>~~es~~|~~ts~~<br>~~es~~|-15<br>~~es~~|15<br>~~es~~|V<br>~~es~~|
|**Source-drain diode**<br>~~es~~<br>~~tses~~<br>~~eee~~<br>~~es~~<br>~~tses~~|||||||
|IS<br>~~eee~~<br>~~es~~<br>~~a~~|source current<br>~~eee~~<br>~~ts~~<br>~~es~~|Tsp= 25 °C<br>~~eee~~<br>~~es~~<br>~~es~~|~~eee~~<br>~~es~~<br>~~es~~|-<br>~~eee~~<br>~~es~~<br>~~es~~|7<br>~~eee~~<br>~~es~~<br>~~es~~|A<br>~~eee~~<br>~~es~~<br>~~es~~|
|ISM<br>~~es~~<br>~~a~~|peak source current<br>~~ts~~<br>~~es~~|pulsed; tp≤ 10 µs; Tsp= 25 °C<br>~~es~~<br>~~es~~|~~es~~<br>~~es~~|-<br>~~es~~<br>~~es~~|30<br>~~es~~<br>~~es~~|A<br>~~es~~<br>~~es~~|
|**Avalanche ruggedness**<br>~~a~~<br>~~eses~~<br>~~eee~~|||||||
|EDS(AL)S<br>~~eee~~|non-repetitive drain-source<br>avalanche energy<br>~~eee~~|ID= 6 A; Vsup≤ 55 V; RGS= 50 Ω;<br>VGS= 5 V; Tj(init)= 25 °C; unclamped<br>~~eee~~<br>~~—isi~~|~~eee~~<br>~~—isi~~|-<br>~~eee~~|36<br>~~eee~~|mJ<br>~~eee~~|
|EDS(AL)R<br>~~El~~|repetitive drain-source<br>avalanche energy<br>~~El~~|Fig. 4<br>~~El~~<br>~~—isi~~|[1]<br>[2]<br>[3]<br>[4]<br>~~El~~<br>~~—isi~~|[4]<br>-<br>~~El~~|-<br>~~El~~|J<br>~~El~~|



[1] Maximum value not quoted. Repetitive rating defined in avalanche rating figure. [2] Single-pulse avalanche rating limited by maximum junction temperature of 150 °C. [3] Repetitive avalanche rating limited by an average junction temperature of 145 °C. [4] Refer to application note AN10273 for further information. 

**==> picture [491 x 219] intentionally omitted <==**

**----- Start of picture text -----**<br>
03aa17 003aab787<br>120 8<br>ID<br>Pder SER (A) P|] | | tt i<br>(%)<br>6<br>80<br>CN ET PERCE<br>4<br>40<br>2<br>TTP PEN te<br>0 ELLEN [I 0 ~EEELLYL<br>0 50 100 150 200 0 50 100 150 200<br>Tsp (°C) Tsp (°C)<br>Fig. 1. Normalized total power dissipation as a Fig. 2. Continuous drain current as a function of solder<br>function of solder point temperature point temperature<br>**----- End of picture text -----**<br>


All information provided in this document is subject to legal disclaimers. 

BUK9880-55A 

© Nexperia B.V. 2017. All rights reserved 

**Product data sheet** 

**19 March 2014** 

**3 / 13** 

**Nexperia** 

**BUK9880-55A** 

## **N-channel TrenchMOS logic level FET** 

**==> picture [503 x 185] intentionally omitted <==**

**----- Start of picture text -----**<br>
03nc54<br>10 [3]<br>I(A)D ee<br>10 [2]<br>RDSon = VDS / ID<br>a OcCO Ole as t p = 10 µs<br>10 ee ee eeST= 100 µs<br>1 ms<br>1 aHI P δ = tp i DC 10 ms<br>T<br>[ 100 ms<br>10 [-1] l | | | | eeeSn RETAee ee<br>10 [-2] [HpT> tp k) T  EE t a ETE<br>10 [-1] 1 10 10 [2]<br>VDS (V)<br>**----- End of picture text -----**<br>


**Fig. 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage** 

**==> picture [193 x 184] intentionally omitted <==**

**----- Start of picture text -----**<br>
003aab771<br>10<br>PRS EON ET<br>IAL LTT TTT ONTNTT<br>(A) NSPAKS| (1)<br>1 (2)<br>eS:<br>ee Sa a<br>a 0 0<br>Pt TTT TAT TONNE)<br>(3)<br>tt STI<br>a lie we<br>10 [-1] aN<br>SS<br>Corera a Ce<br>10 [-2]<br>10 [-3] 10 [-2] 10 [-1] 1 10<br>tAL (ms)<br>**----- End of picture text -----**<br>


**Fig. 4. Single-pulse and repetitive avalanche rating; avalanche current as a function of avalanche time.** 

## **9. Thermal characteristics** 

## **Table 6. Thermal characteristics** 

|**Symbol**|**Parameter**|**Conditions**||**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|Rth(j-sp)|thermal resistance<br>from junction to solder<br>point|||-|-|15|K/W|



All information provided in this document is subject to legal disclaimers. 

BUK9880-55A 

© Nexperia B.V. 2017. All rights reserved **4 / 13** 

**Product data sheet** 

**19 March 2014** 

**Nexperia** 

**BUK9880-55A** 

**N-channel TrenchMOS logic level FET** 

|**Symbol**|**Parameter**|**Conditions**||**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|Rth(j-a)|thermal resistance<br>from junction to<br>ambient|Fig. 5||-|120|-|K/W|



|~~Single Shot~~<br>~~0.2~~<br>0.1<br>~~0.05~~<br>0.02<br>10-2<br>10-1<br>1<br>10<br>102<br>10-6<br>10-5<br>10-4<br>10-3<br>10-2<br>10-1<br>1<br>Zth(j-sp)<br>(K/W)<br>δ = 0.5|||||||||||||||||||||||||||||||||||||||||||_03nc55_<br>10<br>102<br>tp(s)<br>~~t~~p<br>T<br>~~P~~<br>~~t~~<br>~~tp~~<br>~~T~~<br>δ=|_03nc55_<br>10<br>102<br>tp(s)<br>~~t~~p<br>T<br>~~P~~<br>~~t~~<br>~~tp~~<br>~~T~~<br>δ=|_03nc55_<br>10<br>102<br>tp(s)<br>~~t~~p<br>T<br>~~P~~<br>~~t~~<br>~~tp~~<br>~~T~~<br>δ=|_03nc55_<br>10<br>102<br>tp(s)<br>~~t~~p<br>T<br>~~P~~<br>~~t~~<br>~~tp~~<br>~~T~~<br>δ=|_03nc55_<br>10<br>102<br>tp(s)<br>~~t~~p<br>T<br>~~P~~<br>~~t~~<br>~~tp~~<br>~~T~~<br>δ=|_03nc55_<br>10<br>102<br>tp(s)<br>~~t~~p<br>T<br>~~P~~<br>~~t~~<br>~~tp~~<br>~~T~~<br>δ=|_03nc55_<br>10<br>102<br>tp(s)<br>~~t~~p<br>T<br>~~P~~<br>~~t~~<br>~~tp~~<br>~~T~~<br>δ=|_03nc55_<br>10<br>102<br>tp(s)<br>~~t~~p<br>T<br>~~P~~<br>~~t~~<br>~~tp~~<br>~~T~~<br>δ=|_03nc55_<br>10<br>102<br>tp(s)<br>~~t~~p<br>T<br>~~P~~<br>~~t~~<br>~~tp~~<br>~~T~~<br>δ=|
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
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||δ =|0.5||||||||||||||||||||||||||||||||||||||||||||||||||
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||~~02~~|||||||||||||||||||||||||||||||||||||||||||||||||||
||~~.~~|||||||||||||||||||||||||||||||||||||||||||||||||||
||0.1<br>~~00~~|||||||||||||||||||||||||||||||||||||||||||||||||||
||~~.~~|||||||||||||||||||||||||||||||||||||||||||||||||||
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||||||||||||||||||||||||||||||||||||||||||||||||||~~t~~|||
||002|||||||||||||||||||||||||||||||||||||||||||~~P~~|||δ|=||~~p~~||
||.||||||||||||||||||||||||||||||||||||||||||||||||~~T~~|||
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|||~~Si~~|~~ng~~|~~le~~||~~S~~|~~h~~|~~ot~~|||||||||||||||||||||||||||||||||||||~~t~~|||||||
||||||||||||||||||||||||||||||||||||||||||||||p<br>T|||||||



## **10. Characteristics** 

**Table 7. Characteristics** 

|**Symbol**|**Parameter**|**Conditions**||**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|**Static characteristics**||||||||
|V(BR)DSS|drain-source<br>breakdown voltage|ID= 0.25 mA; VGS= 0 V; Tj= -55 °C||50|-|-|V|
|||ID= 0.25 mA; VGS= 0 V; Tj= 25 °C||55|-|-|V|
|VGS(th)|gate-source threshold<br>voltage|ID= 1 mA; VDS= VGS; Tj= 25 °C;<br>Fig. 12<br>; Fig. 8||1|1.5|2|V|
|||ID= 1 mA; VDS= VGS; Tj= 150 °C;<br>Fig. 12<br>; Fig. 8||0.6|-|-|V|
|||ID= 1 mA; VDS= VGS; Tj= -55 °C;<br>Fig. 12<br>; Fig. 8||-|-|2.3|V|
|IDSS|drain leakage current|VDS= 55 V; VGS= 0 V; Tj= 150 °C||-|-|500|µA|
|||VDS= 55 V; VGS= 0 V; Tj= 25 °C||-|0.05|10|µA|
|IGSS|gate leakage current|VGS= 10 V; VDS= 0 V; Tj= 25 °C||-|2|100|nA|
|||VGS= -10 V; VDS= 0 V; Tj= 25 °C||-|2|100|nA|
|RDSon|drain-source on-state<br>resistance|VGS= 5 V; ID= 8 A; Tj= 150 °C;<br>Fig. 13<br>; Fig. 14||-|-|147|mΩ|
|||VGS= 10 V; ID= 8 A; Tj= 25 °C||-|62|73|mΩ|
|||VGS= 4.5 V; ID= 8 A; Tj= 25 °C||-|-|89|mΩ|
|BUK9880-55A||All informationprovided in this document is subject to legal disclaimers.|||©Nexperia|B.V. 2017. All|rights reserved|
|**Product data sheet**||**19 March 2014**|||||<br>**5 / 13**|



**Nexperia** 

**BUK9880-55A** 

**N-channel TrenchMOS logic level FET** 

|**Symbol**<br>~~eePr~~<br>~~a~~<br>~~RC~~|**Parameter**<br>~~Pr~~<br>|**Conditions**<br>~~Pr~~<br>|~~Pr~~<br>~~ts~~<br>|**Min**<br>~~Pr~~<br>~~ts~~<br><br>~~ee~~|**Typ**<br>~~Pr~~<br><br>~~ee~~|**Max**<br>~~Pr~~<br><br>~~ee~~|**Unit**<br>~~Pr~~<br><br>~~ee~~|
|---|---|---|---|---|---|---|---|
|~~eePr~~<br>~~a ee~~<br>~~RC~~|~~Pr~~<br>~~ee~~|VGS= 5 V; ID= 8 A; Tj= 25 °C; Fig. 13<br>;<br>Fig. 14<br>~~Pr~~<br>~~ee~~|~~Pr~~<br>~~ts~~<br>~~ee~~|-<br>~~Pr~~<br>~~ts~~<br>~~ee~~<br>~~ee~~|68<br>~~Pr~~<br>~~ee~~<br>~~ee~~|80<br>~~Pr~~<br>~~ee~~<br>~~ee~~|mΩ<br>~~Pr~~<br>~~ee~~<br>~~ee~~|
|**Dynamic characteristics**<br>~~ts ts~~<br>~~a ee~~<br>~~eeee~~<br>~~RC~~<br>~~ee~~<br>~~ee~~||||||||
|QG(tot)<br>~~RCa~~<br>~~ee~~|total gate charge<br>~~ae~~|ID= 10 A; VDS= 44 V; VGS= 5 V;<br>Fig. 11<br>~~ee~~<br>~~ee~~|~~e~~|-<br>~~ee~~<br>~~e~~<br>~~ee~~|11<br>~~ee ~~<br>~~e~~<br>~~ee~~|-<br> ~~ee~~<br>~~e~~|nC<br>~~ee~~<br>~~e~~|
|QGS<br>~~a~~<br>~~ee~~<br>~~es~~|gate-source charge<br>~~ae~~||~~e~~<br>~~ee~~|-<br>~~e~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|1.6<br>~~e~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|-<br>~~e~~<br>~~ee~~<br>~~ee~~|nC<br>~~e~~<br>~~ee~~<br>~~ee~~|
|QGD<br>~~a~~<br>~~ee~~<br>~~a ee~~<br>~~es~~|gate-drain charge<br>~~ae~~<br>~~ee~~|ID= 10 A; VDS= 44 V; VGS= 5 V;<br>Fig. 15<br>~~ee~~<br>~~ee~~<br>~~ee~~|~~e~~<br>~~ee~~<br>~~ee~~|-<br>~~e~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|4.6<br>~~e~~<br>~~ee~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|-<br>~~e~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|nC<br>~~e~~<br>~~ee~~<br>~~ee~~<br>~~ee~~|
|Ciss<br>~~a ee~~<br>~~es~~<br>~~+S~~<br>~~S|~~|input capacitance<br>~~ee~~<br>~~+S~~<br>~~S|~~|VGS= 0 V; VDS= 25 V; f = 1 MHz;<br>Tj= 25 °C; Fig. 16<br>~~ee~~<br>~~**e**~~<br>~~+S-~~<br>~~tt~~|~~ee~~<br>~~**e**e~~|-<br>~~ee~~<br>~~ee~~|438<br>~~ee~~<br>~~ee~~<br>~~S~~|584<br>~~ee~~<br>~~ee~~<br>~~S~~|pF<br>~~ee~~<br>~~ee~~<br>~~S~~|
|Coss<br>~~es~~<br>~~+S~~<br>~~S|~~|output capacitance<br>~~+S~~<br>~~S|~~||~~**e**e~~|-<br>~~ee~~|87<br>~~ee ~~<br>~~S~~|104<br> ~~ee~~<br>~~S~~|pF<br>~~ee~~<br>~~S~~|
|Crss<br>~~+S~~<br>~~S|~~|reverse transfer<br>capacitance<br>~~+S~~<br>~~S|~~||~~**e**e~~<br>~~tt~~|-<br>~~tt~~|62<br>~~S~~<br>~~ttft~~|85<br>~~S~~<br>~~ft~~|pF<br>~~S~~<br>~~ft~~|
|td(on)<br>~~+S~~<br>~~S|~~<br>~~es~~<br>~~ee~~|turn-on delay time<br>~~+S~~<br>~~S|~~|VDS= 30 V; RL= 1.2 Ω; VGS= 5 V;<br>RG(ext)= 10 Ω; Tj= 25 °C<br>~~**e**~~<br>~~+S -~~<br>~~tt~~<br>~~ee~~<br>~~es~~<br>ee|~~**e**e~~<br>~~tt~~<br>~~ee~~<br>~~es~~|-<br>~~tt~~|8<br>~~S~~<br>~~tt ft~~|-<br>~~S~~<br>~~ft~~|ns<br>~~S~~<br>~~ft~~|
|tr<br>~~es~~<br>~~ee~~|rise time||~~ee~~<br>~~es~~|-|118|-|ns|
|td(off)<br>~~ee~~|turn-off delay time||~~es~~|-|20|-|ns|
|tf<br>~~ee~~|fall time||ee|-|32|-|ns|
|**Source-drain diode**<br>~~Be~~||||||||
|VSD<br>~~Be~~<br>~~a~~|source-drain voltage<br>~~Be~~<br>~~a~~|IS= 15 A; VGS= 0 V; Tj= 25 °C; Fig. 17<br>~~Be~~|~~Be~~|-<br>~~Be~~|0.85<br>~~Be~~|1.2<br>~~Be~~|V<br>~~Be~~|
|trr<br>~~a~~<br>~~aee~~|reverse recovery time<br>~~a~~<br>~~aee~~|IS= 20 A; dIS/dt = -100 A/µs;<br>VGS= -10 V; VDS= 30 V; Tj= 25 °C<br>~~ee~~<br>~~ee~~|~~ee~~|-<br>~~ee~~|33<br>~~ee~~|-<br>~~ee~~|ns<br>~~ee~~|
|Qr<br>~~aee~~<br>~~ee~~|recovered charge<br>~~aee~~||~~ee~~<br>~~ee~~|-<br>~~ee~~|60<br>~~ee~~|-<br>~~ee~~|nC<br>~~ee~~|



**==> picture [483 x 219] intentionally omitted <==**

**----- Start of picture text -----**<br>
03nc51 03nc50<br>60 80<br>(A)ID TLL EETT VGS (V) = 10 RDSon<br>(mΩ)<br>7<br>40 | 6<br>5<br>60<br>fa<br>4<br>20<br>Parr 3. 4<br>3<br>2.4<br>2.2<br>0 -——a 40<br>0 2 4 6 8 10 2 4 6 8 10<br>VDS (V) VGS (V)<br>Fig. 6. Output characteristics: drain current as a Fig. 7. Drain-source on-state resistance as a function<br>function of drain-source voltage; typical values of gate-source voltage; typical values<br>**----- End of picture text -----**<br>


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**Nexperia** 

**BUK9880-55A** 

## **N-channel TrenchMOS logic level FET** 

**==> picture [453 x 435] intentionally omitted <==**

**----- Start of picture text -----**<br>
03aa36 03nc48<br>10 [-1] 12<br>ID gfs<br>(A) (S)<br>10<br>10 [-2]<br>eee fo NET<br>=== 8 PFEPPPeRE<br>10 [-3] ee a ee Ty<br>min typ max 6<br>SSF<br>10 [-4] 4 FEE Ee<br>SS = =a<br>10 [-5]<br>2<br>= a<br>10 [-6] Fy f/f fF fT 0 | | | | | | | ff<br>0 1 2 3 0 5 10 15 20<br>VGS (V) ID (A)<br>Tj = 25 °C; VDS = 5 V Fig. 9. Forward transconductance as a function of<br>Fig. 8. Sub-threshold drain current as a function of drain current; typical values<br>gate-source voltage<br>T; = 25°C; Vp, = 25V<br>03nc49 03nc47<br>15 5<br>VGS<br>ID (V)<br>(A) LLL AL 4 ef<br>10 fe VDS = 14 V fe |<br>3 ff<br>VDS = 44 V<br>2 ;|<br>5<br>f P/ | | fl hf |<br>Tj = 150 °C<br>1<br>cor) ERE<br>Tj = 25 °C<br>0 TEAL 0 ITT<br>0 1 2 3 4 0 5 10 15<br>VGS (V) QG (nC)<br>**----- End of picture text -----**<br>


**Fig. 9. Forward transconductance as a function of drain current; typical values** 

**Fig. 10. Transfer characteristics: drain current as a function of gate-source voltage; typical values** 

**Fig. 11. Gate-source voltage as a function of turn-on gate charge; typical values** 

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**Product data sheet** 

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**N-channel TrenchMOS logic level FET** 

**==> picture [190 x 186] intentionally omitted <==**

**----- Start of picture text -----**<br>
03aa33<br>2.5<br>VGS(th)<br>(V)<br>2 mee pp |<br>max<br>FRRRR<br>1.511 SP|aP|aa E.. pe)NTPON| typminmin PON|<br>a<br>ee eee<br>0.5 |} —~LL<br>{tt }++ Fs<br>0 Ft | ft tt|| ffttflttflfl<br>-60 0 60 120 180<br>Tj (°C)j (°C) (°C)<br>**----- End of picture text -----**<br>


**==> picture [448 x 468] intentionally omitted <==**

**----- Start of picture text -----**<br>
03aa33 03nc52<br>2.5 180<br>RDSon 3 3.2 3.4 3.6 3.8 4 VGS (V) = 5<br>(mΩ)<br>150<br>2 mee pp | ahs<br>max<br>FRRRR A<br>120<br>E.. NT| ——HAHEee<br>pe)NTPON| 90 EAI<br>1.511 SP|aP|aa typminmin IIT | 7<br>a 60 LLL<br>ee eee ew<br>0.5 |} —~LL TTrT LLL<br>30<br>{tt }++ Fs FEE<br>0 Ft | ft tt|| ffttflttflfl 0 aee<br>-60 0 60 120 180 0 10 20 30 40<br>Tj (°C)j (°C) (°C) ID (A)<br>Gate-source threshold voltage as a function of Fig. 13. Drain-source on-state resistance as a function<br>junction temperature of drain current; typical values<br>In =1MAV ps = Ves E;225°C<br>03nc24 03nc37<br>2 5<br>a1.8 aSER eeee ee ee V(V)GS VDD = 14 V<br>1.6 eeP|eetfeeft EEEft yeeeeyt ytYreeeae 4 OSS<br>1.4 P| | | | J | yy fy<br>1.2 frPt| [|tf ft[ ||Peet| [AT fT ft 3<br>VDD = 44 V<br>1 | | [| Pr] | | ft ft ft fy<br>0.8 alor [| eeefT ct cE rT eee 2 fs<br>0.6 P| tf tf ft ty yt fe yt ty<br>0.4 a ee 1 fo<br>fF | [| [— | | [ ee| [— | ee[| 7]<br>0.2 aee<br>0 aLt tT — | | [ ee| [ eeft ff Tf 0 Po<br>-60 -20 20 60 100 140 180 0 10 20 30<br>Tj (°C) QG (nC)<br>Normalized drain source on-state resistance Fig. 15. Gate-source voltage as a function of turn-on<br>factor as a function of junction temperature gate charge; typical values<br>**----- End of picture text -----**<br>


**Fig. 13. Drain-source on-state resistance as a function of drain current; typical values** 

**Fig. 12. Gate-source threshold voltage as a function of junction temperature** 

**Fig. 14. Normalized drain source on-state resistance factor as a function of junction temperature** 

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**Product data sheet** 

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**N-channel TrenchMOS logic level FET** 

**==> picture [194 x 185] intentionally omitted <==**

**----- Start of picture text -----**<br>
03nc53<br>C 1200 [oTeeTTTTTT)a a<br>(pF) |[|| TTAee TP)<br>1000 Ptpt TTTPTNERE<br>| | Tn TNT<br>| | TTTNT<br>Lt TT<br>800 [ofaANT NTT Pn<br>|Pt| TTTTTTATTTTT C iss aa<br>| | TT TN TTTTIN ee<br>600 PT PT PONTING PT)<br>| | TTA TTTANSE<br>LT TTT NP NTT TSA TT TTT<br>| TT NXT TNT TT TPS TTT<br>tT INC TINT TT TT TP SAAT<br>400 LTa TTT ONC C oss TTTT Tri<br>200 LLt[TTTapt| TTTTTTaNYtTtT aTTTTTAINENTINGNET TTT T T TTPT ET TT<br>| PTTT PT NENT)ANNES TTT<br>LT[TT TT C rss [ASSESTT ThSST<br>0 LT TT TTT a<br>10 [-2] 10 [-1] 1 10 10 [2]<br>VDS (V)<br>**----- End of picture text -----**<br>


**Fig. 16. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values** 

**==> picture [185 x 184] intentionally omitted <==**

**----- Start of picture text -----**<br>
03nc46<br>60<br>IS<br>(A)<br>y)<br>40 rd<br>Yy<br>20<br>Tj = 150 °C F<br>\/ f| Tj = 25 °C<br>0 A<br>0.0 0.5 1.0 1.5 2.0<br>VSD (V)<br>**----- End of picture text -----**<br>


**Fig. 17. Reverse diode current as a function of reverse diode voltage; typical value** 

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**Product data sheet** 

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**Nexperia** 

**BUK9880-55A** 

**N-channel TrenchMOS logic level FET** 

## **11. Package outline** 

**==> picture [478 x 581] intentionally omitted <==**

**----- Start of picture text -----**<br>
Plastic surface-mounted package with increased heatsink; 4 leads SOT223<br>D B E A X<br>c<br>y<br>HE v M A<br>b1<br>4<br>Q<br>A<br>A1<br>1 2 3 Lp<br>e1 bp w M B detail X<br>e<br>0 2 4 mm<br>scale<br>DIMENSIONS (mm are the original dimensions)<br>UNIT A A1 bp b1 c D E e e1 HE Lp Q v w y<br>1.8 0.10 0.80 3.1 0.32 6.7 3.7 7.3 1.1 0.95<br>mm 4.6 2.3 0.2 0.1 0.1<br>1.5 0.01 0.60 2.9 0.22 6.3 3.3 6.7 0.7 0.85<br>OUTLINE REFERENCES EUROPEAN<br>ISSUE DATE<br>VERSION IEC JEDEC JEITA PROJECTION<br>04-11-10<br>SOT223 SC-73<br>06-03-16<br>**----- End of picture text -----**<br>


**Fig. 18. Package outline SC-73 (SOT223)** BUK9880-55A All information provided in this document is subject to legal disclaimers. 

© Nexperia B.V. 2017. All rights reserved 

**Product data sheet** 

**19 March 2014** 

**10 / 13** 

**Nexperia** 

**BUK9880-55A** 

**N-channel TrenchMOS logic level FET** 

## **12. Legal information** 

## **12.1 Data sheet status** 

|**Document**<br>**status [1]**<br>**[2]**|**Product**<br>**status[3]**|**Definition**|
|---|---|---|
|Objective<br>[short] data<br>sheet|Development|This document contains data from<br>the objective specification for product<br>development.|
|Preliminary<br>[short] data<br>sheet|Qualification|This document contains data from the<br>preliminary specification.|
|Product<br>[short] data<br>sheet|Production|This document contains the product<br>specification.|



[1] Please consult the most recently issued document before initiating or completing a design. 

[2] The term 'short data sheet' is explained in section "Definitions". 

[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nexperia.com. 

## **12.2 Definitions** 

**Preview** — The document is a preview version only. The document is still subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. 

**Draft** — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. 

**Short data sheet** — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 

**Product specification** — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet. 

## **12.3 Disclaimers** 

**Limited warranty and liability** — Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no responsibility for the content in this document if provided by an information source outside of Nexperia. 

In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. 

Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the _Terms and conditions of commercial sale_ of Nexperia. 

**Right to make changes** — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. 

**Suitability for use in automotive applications** — This Nexperia product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of a Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. 

**Quick reference data** — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 

**Applications** — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 

Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. 

Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. 

**Limiting values** — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. 

**Terms and conditions of commercial sale** — Nexperia 

products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. 

All information provided in this document is subject to legal disclaimers. 

BUK9880-55A 

© Nexperia B.V. 2017. All rights reserved 

**Product data sheet** 

**19 March 2014** 

**11 / 13** 

**Nexperia** 

**BUK9880-55A** 

**N-channel TrenchMOS logic level FET** 

**No offer to sell or license** — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 

**Export control** — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. 

**Translations** — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 

## **12.4 Trademarks** 

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 

All information provided in this document is subject to legal disclaimers. 

BUK9880-55A 

© Nexperia B.V. 2017. All rights reserved 

**Product data sheet** 

**19 March 2014** 

**12 / 13** 

**Nexperia** 

**BUK9880-55A** 

**N-channel TrenchMOS logic level FET** 

## **13. Contents** 

|**13. **|**Contents**|
|---|---|
|**1**|**General description ............................................... 1**|
|**2**|**Features and benefits ............................................1**|
|**3**|**Applications ........................................................... 1**|
|**4**|**Quick reference data ............................................. 1**|
|**5**|**Pinning information ...............................................2**|
|**6**|**Ordering information .............................................2**|
|**7**|**Marking ...................................................................2**|
|**8**|**Limiting values .......................................................2**|
|**9**|**Thermal characteristics .........................................4**|
|**10**|**Characteristics .......................................................5**|
|**11**|**Package outline ................................................... 10**|
|**12**|**Legal information .................................................11**|
|12.1|Data sheet status ............................................... 11|
|12.2|Definitions ...........................................................11|
|12.3|Disclaimers .........................................................11|
|12.4|Trademarks ........................................................ 12|



## © **Nexperia B.V. 2017. All rights reserved** 

For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com **Date of release: 19 March 2014** 

All information provided in this document is subject to legal disclaimers. 

BUK9880-55A 

© Nexperia B.V. 2017. All rights reserved 

**Product data sheet** 

**19 March 2014** 

**13 / 13**
Updated at April 24, 2026
Nexperia is a dedicated global leader in discretes, logic, and MOSFET devices. Built on over half a century of semiconductor expertise and operating independently since 2017, the company produces consistently reliable components at an exceptional volume of 85 billion units annually. With its own manufacturing facilities, Nexperia delivers industry-leading small packages that combine power and thermal efficiency with best-in-class quality, meeting the rigorous standards of the automotive sector. Our extensive Nexperia portfolio is heavily focused on discrete semiconductors, providing engineers with a robust selection of core building blocks. This includes a comprehensive range of diodes and rectifiers, featuring a vast selection of Zener single diodes and Schottky diodes designed for precise voltage regulation and efficient power routing. Additionally, we offer an expansive array of bipolar transistors and single MOSFETs tailored for reliable switching and amplification in demanding applications. Beyond these primary offerings, the lineup extends into specialized circuit protection and passive components. This includes transient voltage suppressor (TVS) diodes, Zener array diodes, and small signal diodes, alongside dual MOSFETs and fast recovery rectifiers. For comprehensive design needs, the selection also encompasses integrated passive filters, common mode chokes, and precision timers and oscillators, ensuring a complete solution for high-performance electronic systems.
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