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BUK761R6-40E,118
Power MOSFET, N Channel, 40 V, 120 A, 1300 µohm, TO-263 (D2PAK), Surface Mount
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- Manufacturer: NEXPERIA
- Product type: Single MOSFETs
- Transistor Polarity:N Channel; Continuous Drain Current Id:120A; Drain Source Voltage Vds:40V; On Resistance Rds(on):0.0013ohm; Rds(on) Test Voltage Vgs:10V; Threshold Voltage Vgs:3V; Powe
- MSL: MSL 1 - Unlimited
- SVHC: Lead (25-Jun-2025)
- No. of Pins: 3Pins
- Channel Type: N Channel
- Product Range: -
- Qualification: -
- Power Dissipation: 357W
- Transistor Mounting: Surface Mount
- Rds(on) Test Voltage: 10V
- Transistor Case Style: TO-263 (D2PAK)
- Drain Source Voltage Vds: 40V
- Operating Temperature Max: 175°C
- Continuous Drain Current Id: 120A
- Drain Source On State Resistance: 1300µohm
- Gate Source Threshold Voltage Max: 3V
| Delivery and price | |
|---|---|
| Units per pack | 4800 |
| Price | 2.01 € |
| Current stock | 10+ |
| Lead time | 30 days |
Datasheet
## **BUK761R6-40E**
## **N-channel TrenchMOS standard level FET**
**Rev. 2 — 16 May 2012**
## **Product data sheet**
## **1. Product profile**
## **1.1 General description**
Standard level N-channel MOSFET in a SOT404 package using TrenchMOS technology. This product has been designed and qualified to AEC Q101 standard for use in high performance automotive applications.
## **1.2 Features and benefits**
- AEC Q101 compliant
- Repetitive avalanche rated
- Suitable for thermally demanding environments due to 175 °C rating
- True standard level gate with VGS(th) rating of greater than 1V at 175 °C
## **1.3 Applications**
- 12 V Automotive systems
- Electric and electro-hydraulic power steering
- Motors, lamps and solenoid control
- Start-Stop micro-hybrid applications
- Transmission control
- Ultra high performance power switching
## **1.4 Quick reference data**
## **Table 1. Quick reference data**
|**Symbol**|**Parameter**|**Conditions**||**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|VDS|drain-source voltage|Tj≥25 °C; Tj≤175 °C||-|-|40|V|
|ID|drain current|VGS= 10 V; Tmb= 25 °C; seeFigure 1|[1]|-|-|120|A|
|Ptot|total power dissipation|Tmb= 25 °C; seeFigure 2||-|-|357|W|
|**Static characteristics**||||||||
|RDSon|drain-source on-state|VGS= 10 V; ID= 25 A; Tj= 25 °C;||-|1.3|1.6|mΩ|
||resistance|seeFigure 11||||||
|||||||||
|**Dynamic characteristics**|**Dynamic characteristics**|||||||
|QGD|gate-drain charge|VGS= 10 V; ID= 25 A; VDS= 32 V;||-|48.2|-|nC|
|||seeFigure 13<br>;see Figure 14||||||
[1] Continuous current is limited by package.
**BUK761R6-40E**
**NXP Semiconductors**
**N-channel TrenchMOS standard level FET**
## **2. Pinning information**
## **Table 2. Pinning information**
|**Pin**<br>**Symbol**<br>**Description**<br>**Simplified outline**<br>**Graphic symbol**|**Pin**<br>**Symbol**<br>**Description**<br>**Simplified outline**<br>**Graphic symbol**|
|---|---|
|1<br>G<br>gate<br>2<br>D<br>drain<br>3<br>S<br>source<br>mb<br>D<br>mounting base;<br>connected to drain|mb<br>1<br>3<br>2<br>S<br>D<br>G<br>_mbb076_|
**==> picture [72 x 9] intentionally omitted <==**
**----- Start of picture text -----**<br>
SOT404 (D2PAK)<br>**----- End of picture text -----**<br>
## **3. Ordering information**
## **Table 3. Ordering information**
|**Type number**|**Package**|
|---|---|
||**Name**<br>**Description**<br>**Version**|
|BUK761R6-40E|D2PAK<br>plastic single-ended surface-mounted package (D2PAK);<br>3 leads (one lead cropped)<br>SOT404|
## **4. Marking**
**Table 4. Marking codes**
|**Type number**|**Marking code**|
|---|---|
|BUK761R6-40E|BUK761R6-40E|
© NXP B.V. 2012. All rights reserved.
All information provided in this document is subject to legal disclaimers.
BUK761R6-40E
**Product data sheet**
**Rev. 2 — 16 May 2012**
**2 of 14**
**BUK761R6-40E**
**NXP Semiconductors**
**N-channel TrenchMOS standard level FET**
## **5. Limiting values**
**Table 5. Limiting values**
_In accordance with the Absolute Maximum Rating System (IEC 60134)._
|**Symbol**|**Parameter**|**Conditions**|||**Min**|**Max**|**Unit**|
|---|---|---|---|---|---|---|---|
|VDS|drain-source voltage|Tj≥25 °C; Tj≤175 °C|||-|40|V|
|VDGR|drain-gate voltage|RGS= 20 kΩ|||-|40|V|
|VGS|gate-source voltage||||-20|20|V|
|ID|drain current|Tmb= 25 °C; VGS= 10 V; seeFigure 1||[1]|-|120|A|
|||Tmb= 100 °C; VGS= 10 V; seeFigure 1||[1]|-|120|A|
|IDM|peak drain current|Tmb= 25 °C; pulsed; tp≤10 µs;|||-|1370|A|
|||seeFigure 4||||||
|Ptot|total power dissipation|Tmb= 25 °C; seeFigure 2|||-|357|W|
|||||||||
|Tstg|storage temperature||||-55|175|°C|
|Tj|junction temperature||||-55|175|°C|
|**Source-drain**|**diode**|||||||
|IS|source current|Tmb= 25 °C||[1]|-|120|A|
|ISM|peak source current|pulsed; tp≤10 µs; Tmb= 25 °C|||-|1370|A|
|**Avalanche ruggedness**||||||||
|EDS(AL)S|non-repetitive drain-source|ID= 120 A; Vsup≤40 V; RGS= 50 Ω;|[2]<br>[3]||-|1008|mJ|
||avalanche energy|VGS= 10 V; Tj(init)= 25 °C; unclamped;||||||
|||seeFigure 3||||||
[1] Continuous current is limited by package.
[2] Single-pulse avalanche rating limited by maximum junction temperature of 175 °C.
[3] Refer to application note AN10273 for further information.
© NXP B.V. 2012. All rights reserved.
All information provided in this document is subject to legal disclaimers.
BUK761R6-40E
**Product data sheet**
**Rev. 2 — 16 May 2012**
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**BUK761R6-40E**
**NXP Semiconductors**
## **N-channel TrenchMOS standard level FET**
**==> picture [432 x 186] intentionally omitted <==**
**----- Start of picture text -----**<br>
360 003aag308 120 03aa16<br>ID PNET Pder FELL Tt<br>(A)240 PEEL PLEN TT (%)80 EXGEEEEEIN<br>(1)<br>120 J TING 40 EREANEEE<br>Pf LING | FLINT TEE<br>PFE LTT AL\ PT [ELLEN] \ T o<br>0 0<br>0 50 100 150 Tmb ( ° C) 200 0 50 100 150Tmb ( ° C)200<br>**----- End of picture text -----**<br>
(1) Capped at 120A due to package
**Fig 1. Continuous drain current as a function of Fig 2. Normalized total power dissipation as a mounting base temperature function of mounting base temperature**
**==> picture [31 x 6] intentionally omitted <==**
**----- Start of picture text -----**<br>
003aag343<br>**----- End of picture text -----**<br>
**==> picture [186 x 182] intentionally omitted <==**
**----- Start of picture text -----**<br>
10 [3]<br>IAL<br>(A) |<br> 10 [2] oT<br>(1)<br>Pir SS<br> 10 aae<br>(2)<br>ER<br> 1 1Sn (3)<br>|<br>10 [-1] ELH TEI FTI [ET<br>10 [-3] 10 [-2] 10 [-1] 1 10<br>tAL (ms)<br>**----- End of picture text -----**<br>
**Fig 3. Single-pulse and repetitive avalanche rating; avalanche current as a function of avalanche time**
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All information provided in this document is subject to legal disclaimers.
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**Product data sheet**
**Rev. 2 — 16 May 2012**
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**BUK761R6-40E**
**NXP Semiconductors**
**N-channel TrenchMOS standard level FET**
**==> picture [438 x 185] intentionally omitted <==**
**----- Start of picture text -----**<br>
003aag309<br> 10 [4]<br>ID<br>(A) — es<br> 10 [3]<br> 10 [2] DSaaoRa Limit RDSon = VDS / ID eeaeee eeee eee tp 100 =10 μ μ s s<br>ee<br> 10 DC<br>EEeeEe a ec ee NY=== 1 ms10 ms poe |<br> 1 a ES 100 ms aon<br> eeeemwcgeaeS aeeSS SE EE EE eeeeeee eeeeoee___cw“ce a eeESssmwckhwaE.vwveEeE—E—eEeEEeeneeaeeaeaeaOS OS EE eSee eye Ee Eee eee)<br>10 [-1] Po<br>0.1 1 10 10 [2]<br>VDS (V)<br>**----- End of picture text -----**<br>
**Fig 4. Safe operating area; continuous and peak drain currents as a function of drain-source voltage**
## **6. Thermal characteristics**
**Table 6. Thermal characteristics**
|**Symbol**|**Parameter**|**Conditions**|**Min**|**Typ**|**Max**|**Unit**|
|---|---|---|---|---|---|---|
|Rth(j-mb)|thermal resistance from|seeFigure 5|-|-|0.42|K/W|
||junction to mounting base||||||
|Rth(j-a)|thermal resistance from|minimum footprint; mounted on|-|50|-|K/W|
||junction to ambient|a printed-circuit board|||||
**==> picture [440 x 185] intentionally omitted <==**
**----- Start of picture text -----**<br>
003aaf570<br> 1<br>a CO OO GOO OG GG OO GG NG GG GC OG GO<br>Zth(j-mb) po = 0.5 EE<br> (K/W) RBpeSH etarr ls<br>0.2<br>10 [-1] anmerr is<br>0.1 a eeermeaeOO<br>Spe 8<br>eet tt eee<br>a a oe<br>Eero) 0.05 P tp<br>10 [-2] et——___-a 0.02 a a eece ==.eeeeIE0 esLEI=OO OOeeOOee OO OO GO | = T |EIim<br>EH Ft FH H<br>A _ Lo<br>t p t<br>La single shot iii fF PP sia T |<br>10 [-3] Sr a|<br>10 [-6] 10 [-5] 10 [-4] 10 [-3] 10 [-2] 10 [-1] tp (s) 1<br>**----- End of picture text -----**<br>
**Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration.**
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**Product data sheet**
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**N-channel TrenchMOS standard level FET**
## **7. Characteristics**
|**Table 7.**<br>**Characteristics**|||
|---|---|---|
|**Symbol**<br>**Parameter**|**Conditions**|**Min**<br>**Typ**<br>**Max**<br>**Unit**|
|**Static characteristics**|||
|V(BR)DSS<br>drain-source<br>breakdown voltage|ID= 250 µA; VGS= 0 V; Tj= 25 °C|40<br>-<br>-<br>V|
||ID= 250 µA; VGS= 0 V; Tj= -55 °C|36<br>-<br>-<br>V|
|VGS(th)<br>gate-source threshold<br>voltage|ID= 1 mA; VDS= VGS; Tj= 25 °C;<br>seeFigure 9<br>;seeFigure 10|2.4<br>3<br>4<br>V|
||ID= 1 mA; VDS= VGS; Tj= -55 °C;<br>seeFigure 10|-<br>-<br>4.5<br>V|
||ID= 1 mA; VDS= VGS; Tj= 175 °C;<br>seeFigure 10|1<br>-<br>-<br>V|
|IDSS<br>drain leakage current|VDS= 40 V; VGS= 0 V; Tj= 25 °C|-<br>0.25<br>3<br>µA|
||VDS= 40 V; VGS= 0 V; Tj= 175 °C|-<br>-<br>500<br>µA|
|IGSS<br>gate leakage current|VGS= 20 V; VDS= 0 V; Tj= 25 °C|-<br>2<br>100<br>nA|
||VGS= -20 V; VDS= 0 V; Tj= 25 °C|-<br>2<br>100<br>nA|
|RDSon<br>drain-source on-state<br>resistance|VGS= 10 V; ID= 25 A; Tj= 25 °C;<br>seeFigure 11|-<br>1.3<br>1.6<br>mΩ|
||VGS= 10 V; ID= 25 A; Tj= 175 °C;<br>seeFigure 12<br>;see Figure 11|-<br>-<br>3<br>mΩ|
|**Dynamic characteristics**|||
|QG(tot)<br>total gate charge|ID= 25 A; VDS= 32 V; VGS= 10 V;<br>seeFigure 13<br>;see Figure 14|-<br>145<br>-<br>nC|
|QGS<br>gate-source charge||-<br>35.7<br>-<br>nC|
|QGD<br>gate-drain charge||-<br>48.2<br>-<br>nC|
|Ciss<br>input capacitance|VGS= 0 V; VDS= 25 V; f = 1 MHz;<br>Tj= 25 °C; seeFigure 15|-<br>8500<br>11340<br>pF|
|Coss<br>output capacitance||-<br>1620<br>1950<br>pF|
|Crss<br>reverse transfer<br>capacitance||-<br>985<br>1350<br>pF|
|td(on)<br>turn-on delay time|VDS= 30 V; RL= 1.2 Ω; VGS= 10 V;<br>RG(ext)= 5 Ω|-<br>42<br>-<br>ns|
|tr<br>rise time||-<br>60<br>-<br>ns|
|td(off)<br>turn-off delay time||-<br>121<br>-<br>ns|
|tf<br>fall time||-<br>83<br>-<br>ns|
|LD<br>internal drain<br>inductance|from upper edge of drain mounting base<br>to center of die|-<br>2.5<br>-<br>nH|
|LS<br>internal source<br>inductance|from source lead to source bonding<br>pad|-<br>7.5<br>-<br>nH|
|**Source-drain diode**|||
|VSD<br>source-drain voltage|IS= 25 A; VGS= 0 V; Tj= 25 °C;<br>seeFigure 16|-<br>0.77<br>1.2<br>V|
|trr<br>reverse recovery time|IS= 20 A; dIS/dt = -100 A/µs; VGS= 0 V;<br>VDS= 25 V|-<br>56<br>-<br>ns|
|Qr<br>recovered charge||-<br>94<br>-<br>nC|
© NXP B.V. 2012. All rights reserved.
All information provided in this document is subject to legal disclaimers.
BUK761R6-40E
**Product data sheet**
**Rev. 2 — 16 May 2012**
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**BUK761R6-40E**
**NXP Semiconductors**
**N-channel TrenchMOS standard level FET**
**==> picture [438 x 204] intentionally omitted <==**
**----- Start of picture text -----**<br>
003aag310 003aag315<br>300 8<br>ID V GS (V) = 20 10 6.0 RDSon<br>(A) TT TTT LTT<br>250 e/a ae (m Ω )<br>5.5<br>6<br>200 |<br>ee<br>ff ae 5.3<br>150 4<br>—_| 5.1<br>100 YeaPe)<br>4.9<br>2<br>50 Pe | 4.7<br>YW [—_|] ——— KR<br>4.5<br>0 0<br>0 ——_—— 0.5 1 a 1.5 0 TEE 5 10 T Tt 15 20<br>VDS (V) VGS (V)<br>Tj = 25 °C; tp = 300 μs<br>**----- End of picture text -----**<br>
**Fig 6. Output characteristics: drain current as a function of drain-source voltage; typical values**
**Fig 7. Drain-source on-state resistance as a function of gate-source voltage; typical values**
**==> picture [460 x 241] intentionally omitted <==**
**----- Start of picture text -----**<br>
400 003aag311 10 [-1] 003aah028<br>ID ID<br>See (A) — fap<br>(A)<br>10 [-2]<br>300<br>min typ max<br>10 [-3]<br>200<br>Pi te a| —_—fFff<br>10 [-4]<br>ttt tlt =Ef<br>100<br>Tj = 175 ° C T j = 25 ° C 10 [-5]<br>0 10 [-6]<br>0 PT 2 PTA 4 | 6 8 0 Pri 2 4 6<br>VGS (V) VGS (V)<br>Vos=12V Ty =25°C; Vpy=5V<br>Transfer characteristics: drain current as a Fig 9. Sub-threshold drain current as a function of<br>function of gate-source voltage; typical values gate-source voltage<br>**----- End of picture text -----**<br>
**Fig 8. Transfer characteristics: drain current as a function of gate-source voltage; typical values**
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All information provided in this document is subject to legal disclaimers.
BUK761R6-40E
**Product data sheet**
**Rev. 2 — 16 May 2012**
**7 of 14**
**BUK761R6-40E**
**NXP Semiconductors**
**N-channel TrenchMOS standard level FET**
**==> picture [438 x 443] intentionally omitted <==**
**----- Start of picture text -----**<br>
003aah027 003aag316<br>5 6<br>V RDSon VGS (V) = 5.1 5.3 5.5<br>GS(th)(V) FTE. (m Ω ) ees<br>max 5<br>4 PSE ee ee ee<br>4<br>3 mee typ a<br>a ~ 3 ape<br>2 SSS min 6.0<br>2<br>SSE ess a<br>10.0<br>1<br>1<br>20.0<br>0 FETT reryt ft 0 e es<br>-60 0 60 120 180 0 100 200 300<br>Tj ( ° C) ID (A)<br>Ip=1 mA; Vps= Veg Tj = 25 °C; tp = 300 µs<br>Gate-source threshold voltage as a function of Fig 11. Drain-source on-state resistance as a function<br>junction temperature of drain current; typical values<br>003aag816<br>2<br>a,<br>Bee<br>a VDS a<br>1.5<br>{tt | te ID j<br>Beeeeaee VGS(pl) si \<br>1<br>Beene a<br>VGS(th)<br>Cert<br>VGS<br>0.5 7 | tte — QGS1 QGS2 -<br>eee QGS QGD<br>QG(tot)<br>0 Tt TTT] yt 003aaa508<br>-60 0 60 120 180<br>Tj ( ° C)<br>**----- End of picture text -----**<br>
**Fig 10. Gate-source threshold voltage as a function of junction temperature**
**Fig 11. Drain-source on-state resistance as a function of drain current; typical values**
**Fig 12. Normalized drain-source on-state resistance factor as a function of junction temperature**
**Fig 13. Gate charge waveform definitions**
© NXP B.V. 2012. All rights reserved.
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**Product data sheet**
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## **N-channel TrenchMOS standard level FET**
**==> picture [497 x 458] intentionally omitted <==**
**----- Start of picture text -----**<br>
003aag317 003aag313<br>10 10 [5]<br>VGS<br>(V) C<br>8 (pF)<br> 10 [4]<br>14 V Ciss<br>6<br>VDS = 32 V<br>4 Coss<br> 10 [3]<br>Crss<br>2<br>0 10 [2]<br>0 40 80 120 160 10 [-1] 1 10 10 [2]<br>QG (nC) VDS (V)<br>Tj = 25 °C; ID = 25 A VGS = 0 V; f = 1 MHz<br>Fig 14. Gate-source voltage as a function of gate Fig 15. Input, output and reverse transfer capacitances<br>charge; typical values as a function of drain-source voltage; typical<br>values<br>003aag390<br>300<br>IS<br>(A)<br>240<br>180<br>120<br>60<br>Tj = 175 ° C Tj = 25 ° C<br>0<br>0 0.5 1 1.5<br>VSD (V)<br>**----- End of picture text -----**<br>
VGS = 0 V **Fig 16. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values**
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All information provided in this document is subject to legal disclaimers.
BUK761R6-40E **Product data sheet**
**Rev. 2 — 16 May 2012**
**9 of 14**
**BUK761R6-40E**
**NXP Semiconductors**
**N-channel TrenchMOS standard level FET**
**SOT404**
## **8. Package outline**
**Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped)**
**==> picture [479 x 560] intentionally omitted <==**
**----- Start of picture text -----**<br>
A<br>E A1<br>D1 mounting<br>base<br>D<br>HD<br>2<br>Lp<br>1 3<br>b c<br>e e Q<br>0 2.5 5 mm<br>scale<br>DIMENSIONS (mm are the original dimensions)<br>D<br>UNIT A A1 b c max. D1 E e Lp HD Q<br>mm 4.50 1.40 0.85 0.64 11 1.60 10.30 2.54 2.90 15.80 2.60<br>4.10 1.27 0.60 0.46 1.20 9.70 2.10 14.80 2.20<br>OUTLINE REFERENCES EUROPEAN<br>ISSUE DATE<br>VERSION IEC JEDEC JEITA PROJECTION<br>05-02-11<br> SOT404<br>06-03-16<br>**----- End of picture text -----**<br>
**Fig 17. Package outline SOT404 (D2PAK)**
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**Product data sheet**
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**N-channel TrenchMOS standard level FET**
## **9. Revision history**
|**Table 8.**<br>**Revision**|**history**||||
|---|---|---|---|---|
|**Document ID**|**Release date**|**Data sheet status**|**Change notice**|**Supersedes**|
|BUK761R6-40E v.2|20120516|Product data sheet|-|BUK761R6-40E v.1|
|Modifications:|**•** Status changed from objective to product.||||
||**•** Various changes to content.||||
|BUK761R6-40E v.1|20120330|Objective data sheet|-|-|
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**Product data sheet**
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## **10. Legal information**
## **10.1 Data sheet status**
|**Document statu**~~**s**~~**[1]**<br> **[2]**|**Product status[3]**|**Definition**|
|---|---|---|
|Objective [short] data sheet|Development|This document contains data from the objective specification for product development.|
|Preliminary [short] data sheet|Qualification|This document contains data from the preliminary specification.|
|Product [short] data sheet|Production|This document contains the product specification.|
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URLhttp://www.nxp.com.
## **10.2 Definitions**
**Right to make changes** — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.
**Preview** — The document is a preview version only. The document is still subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.
**Suitability for use in automotive applications** — This NXP Semiconductors product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk.
**Draft** — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.
**Short data sheet** — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
**Quick reference data** — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding.
**Applications** — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
**Product specification** — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.
Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products.
## **10.3 Disclaimers**
**Limited warranty and liability** — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors.
NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect.
In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory.
**Limiting values** — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the
Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the _Terms and conditions of commercial sale_ of NXP Semiconductors.
© NXP B.V. 2012. All rights reserved.
BUK761R6-40E All information provided in this document is subject to legal disclaimers. **Product data sheet**
**Rev. 2 — 16 May 2012**
**12 of 14**
**BUK761R6-40E**
**NXP Semiconductors**
## **N-channel TrenchMOS standard level FET**
Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device.
**Terms and conditions of commercial sale** — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published athttp://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer.
**No offer to sell or license** — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
**Export control** — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities.
**Translations** — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions.
## **10.4 Trademarks**
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
**Adelante** , **Bitport** , **Bitsound** , **CoolFlux** , **CoReUse** , **DESFire** , **EZ-HV** , **FabKey** , **G reenChip** , **HiPerSmart** , **HITAG** , **I²C-bus**
logo, **ICODE** , **I-CODE** , **ITEC** , **Labelution** , **MIFARE** , **MIFARE Plus** , **MIFARE Ultralight** , **MoReUse** , **QLPAK** , **Silicon**
**Tuner** , **SiliconMAX** , **SmartXA** , **STARplug** , **TOPFET** , **TrenchMOS** , **TriMedia** and **UCODE** — are trademarks of NXP B.V.
**HD Radio** and **HD Radio** logo — are trademarks of iBiquity Digital Corporation.
## **11. Contact information**
For more information, please visit:http://www.nxp.com
For sales office addresses, please send an email to:salesaddresses@nxp.com
© NXP B.V. 2012. All rights reserved.
All information provided in this document is subject to legal disclaimers.
BUK761R6-40E
**Product data sheet**
**Rev. 2 — 16 May 2012**
**13 of 14**
**BUK761R6-40E**
**NXP Semiconductors**
**N-channel TrenchMOS standard level FET**
## **12. Contents**
|**1**|**Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1**|
|---|---|
|1.1|General description . . . . . . . . . . . . . . . . . . . . . .1|
|1.2|Features and benefits. . . . . . . . . . . . . . . . . . . . .1|
|1.3|Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1|
|1.4|Quick reference data . . . . . . . . . . . . . . . . . . . . .1|
|**2**|**Pinning information. . . . . . . . . . . . . . . . . . . . . . .2**|
|**3**|**Ordering information. . . . . . . . . . . . . . . . . . . . . .2**|
|**4**|**Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2**|
|**5**|**Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3**|
|**6**|**Thermal characteristics . . . . . . . . . . . . . . . . . . .5**|
|**7**|**Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .6**|
|**8**|**Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10**|
|**9**|**Revision history. . . . . . . . . . . . . . . . . . . . . . . . .11**|
|**10**|**Legal information. . . . . . . . . . . . . . . . . . . . . . . .12**|
|10.1|Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12|
|10.2|Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .12|
|10.3|Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12|
|10.4|Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13|
|**11**|**Contact information. . . . . . . . . . . . . . . . . . . . . .13**|
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.
**© NXP B.V. 2012.**
**All rights reserved.**
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com **Date of release: 16 May 2012 Document identifier: BUK761R6-40E**
Updated at April 24, 2026
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